8/21/97 4:00 PM
a
Dual Low Bias Current
Precision Operational Amplifier
OP297
FEATURES
Precision Performance in Standard SO-8 Pinout
Low Offset Voltage: 50 V max
Low Offset Voltage Drift: 0.6 V/ⴗC max
Very Low Bias Current:
␣ ␣ +25ⴗC (100 pA max)
␣␣–55ⴗC to +125ⴗC (450 pA max)
Very High Open-Loop Gain (2000 V/mV min)
Low Supply Current (Per Amplifier): 625 A max
Operates From 62 V to 620 V Supplies
High Common-Mode Rejection: 120 dB min
Pin Compatible to LT1013, AD706, AD708, OP221,
␣ ␣ LM158, and MC1458/1558 with Improved Performance
APPLICATIONS
Strain Gauge and Bridge Amplifiers
High Stability Thermocouple Amplifiers
Instrumentation Amplifiers
Photo-Current Monitors
High-Gain Linearity Amplifiers
Long-Term Integrators/Filters
Sample-and-Hold Amplifiers
Peak Detectors
Logarithmic Amplifiers
Battery-Powered Systems
GENERAL DESCRIPTION
The OP297 is the first dual op amp to pack precision performance into the space-saving, industry standard 8-pin SO package. Its combination of precision with low power and extremely
low input bias current makes the dual OP297 useful in a wide
variety of applications.
Precision performance of the OP297 includes very low offset,
under 50 µV, and low drift, below 0.6 µV/°C. Open-loop gain
exceeds 2000 V/mV insuring high linearity in every application.
PIN CONNECTIONS
Plastic Epoxy-DIP (P Suffix)
8-Pin Cerdip (Z Suffix)
8-Pin Narrow Body SOIC (S Suffix)
OUT A V+
–IN A OUT B
+IN A –IN B
1
A
2
+
–
3
45
V– +IN B
8
B
7
–
+
6
Errors due to common-mode signals are eliminated by the
OP297’s common-mode rejection of over 120 dB. The
OP297’s power supply rejection of over 120 dB minimizes
offset voltage changes experienced in battery powered systems.
Supply current of the OP297 is under 625 µA per amplifier and
it can operate with supply voltages as low as ±2 V.
The OP297 utilizes a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all temperatures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP 297 is under 100 pA
at 25°C and is under 450 pA over the military temperature
range.
Combining precision, low power and low bias current, the
OP297 is ideal for a number of applications including instrumentation amplifiers, log amplifiers, photodiode preamplifiers
and long-term integrators. For a single device, see the OP97;
for a quad, see the OP497.
60
40
20
0
20
INPUT CURRENT (pA)
–40
–60
–75 –50 –25 0 25 50 75 100 125
I
–
B
+
I
B
I
OS
TEMPERATURE (°C)
V
S
V
CM
= ±15V
= 0V
400
1200 UNITS
300
200
NUMBER OF UNITS
100
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
Figure 1. Low Bias Current Over Temperature Figure 2. Very Low Offset
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703 © Analog Devices, Inc., 1997
T
A
V
S
V
CM
= +25°C
= ±15V
= 0V
8/21/97 4:00 PM
OP297–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ VS = ⴞ15 V, TA = +25ⴗC, unless otherwise noted.)
␣␣␣␣OP297A/E ␣␣␣␣ OP297F ␣␣␣␣␣ OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units
Input Offset Voltage V
OS
25 50 50 100 80 200 µV
Long-Term Input
␣ ␣ Voltage Stability 0.1 0.1 0.1 µV/mo
Input Offset Current I
Input Bias Current I
Input Noise Voltage e
Input Noise e
␣ ␣ Voltage Density e
Input Noise Current Density i
OS
B
p-p 0.1 Hz to 10 Hz 0.5 0.5 0.5 µV p-p
n
n
n
n
VCM = 0 V 20 100 35 150 50 200 pA
V
= 0 V 20 ±100 35 ±150 50 ±200 pA
CM
f
= 10 Hz 20 20 20 nV/√Hz
O
f
= 1000 Hz 17 17 17 nV/√Hz
O
f
= 10 Hz 20 20 20 fA√Hz
O
Input Resistance
␣ ␣ Differential Mode R
IN
30 30 30 MΩ
Input Resistance
␣ ␣ Common-Mode R
INCM
Large-Signal V
␣ ␣ Voltage Gain A
VO
= ±10 V
O
R
= 2 kΩ 2000 4000 1500 3200 1200 3200 V/mV
L
500 500 500 GΩ
Input Voltage Range IVR (Note 1) ±13 ±14 ±13 ±14 ±13 ±14 V
Common-Mode Rejection CMR V
Power Supply Rejection PSR V
Output Voltage Swing V
Supply Current Per Amplifier I
Supply Voltage V
O
V
O
SY
S
= ±13 V 120 140 114 135 114 135 dB
CM
= ±2 V to ±20 V 120 130 114 125 114 125 dB
S
R
= 10 kΩ±13 ±14 ±13 ±14 ±13 ±14 V
L
R
= 2 kΩ±13 ±13.7 ±13 ±13.7 ±13 ±13.7 V
L
No Load 525 625 525 625 525 625 µA
Operating Range ±2 ±20 ±2 ±20 ±2 ±20 V
Slew Rate SR 0.05 0.15 0.05 0.15 0.05 0.15 V/µs
Gain Bandwidth Product GBWP AV = +1 500 500 500 kHz
Channel Separation CS VO = 20 V p–p 150 150 150 dB
fO = 10 Hz
Input Capacitance C
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
IN
333pF
(@ V
= ⴞ15 V, –55ⴗC ≤ TA ≤ +125ⴗC for OP297A, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
S
␣␣␣␣␣ OP297A
Parameter Symbol Conditions Min Typ Max Units
Input Offset Voltage V
OS
Average Input Offset Voltage Drift TCV
Input Offset Current I
Input Bias Current I
Large-Signal Voltage Gain A
OS
B
VO
OS
VCM = 0 V 60 450 pA
V
= 0 V 60 ±450 pA
CM
V
= ±10 V, RL = 2 kΩ 1200 2700 V/mV
O
45 100 µV
0.2 0.6 µV/°C
Input Voltage Range IVR (Note 1) ±13 ±13.5 V
Common-Mode Rejection CMR V
Power Supply Rejection PSR V
Output Voltage Swing V
Supply Current Per Amplifier I
Supply Voltage V
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
O
SY
S
= ±13 114 130 dB
CM
= ±2.5 V to ±20 V 114 125 dB
S
R
= 10 kΩ±13 ±13.4 V
L
No Load 575 750 µA
Operating Range ±2.5 ±20 V
–2–
REV. D
8/21/97 4:00 PM
OP297
(@ V
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units
Input Offset Voltage V
Average Input Offset
Voltage Drift TCV
Input Offset Current I
Input Bias Current I
Large-Signal Voltage Gain A
Input Voltage Range IVR (Note 1) ±13 ±13.5 ±13 ±13.5 ±13 ±13.5 V
Common-Mode Rejection CMR V
Power Supply Rejection PSR V
Output Voltage Swing V
Supply Current Per Amplifier I
Supply Voltage V
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
OS
B
SY
OS
VO
O
S
OS
VCM = 0 V 50 450 80 750 80 750 pA
V
= 0 V 50 ±450 80 ±750 80 ±750 pA
CM
V
= ±10 V,
O
= 2 kΩ 1200 3200 1000 2500 700 2500 V/mV
R
L
= ±13 114 130 108 130 108 130 dB
CM
= ±2.5 V
S
to ±20 V 114 0.15 108 0.15 108 0.3 dB
R
= 10 kΩ±13 ±13.4 ±13 ±13.4 ±13 ±13.4 V
L
No Load 550 750 550 750 550 750 µA
Operating Range ±2.5 ±20 ±2.5 ±20 ±2.5 ±20 V
= ⴞ15 V, –40ⴗC ≤ TA ≤ +85ⴗC for OP297E/F/G, unless otherwise noted.)
S
␣␣␣␣OP297E ␣␣␣␣ OP297F ␣␣␣␣␣ OP297G
35 100 80 300 110 400 µV
0.2 0.6 0.5 2.0 0.6 2.0 µV/°C
Wafer Test Limits
(@ VS = ⴞ15 V, TA = +25ⴗC, unless otherwise noted.)
Parameter Symbol Conditions Limit Units
Input Offset Voltage V
Input Offset Current I
Input Bias Current I
Large-Signal Voltage Gain A
OS
B
OS
VO
VCM = 0 V 200 pA max
V
= 0 V ±200 pA max
CM
V
= ±10 V, RL = 2 kΩ 1200 V/mV min
O
200 µV max
Input Voltage Range IVR (Note 1) ±13 V min
Common-Mode Rejection CMR V
Power Supply PSR V
Output Voltage Swing V
Supply Current Per Amplifier I
NOTES
1. Guaranteed by CMR test.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
O
SY
= ±13 V 114 dB min
CM
= ±2 V to ±l 8 V 114 dB min
S
R
= 2 kΩ±13 V min
L
No Load 625 µA max
DICE CHARACTERISTICS
Dimension shown in inches and (mm).
Contact factory for latest dimensions
OUTPUT A
–INPUT A
+INPUT A
+V
S
0.118 (3.00)
OUTPUT B
–V
S
0.074 (1.88)
–INPUT B
+INPUT B
–3–REV. D
8/21/97 4:00 PM
WARNING!
ESD SENSITIVE DEVICE
OP297
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Input Voltage
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
2
. . . . . . . . . . . . . . . . . . . . . . . . 40 V
1
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP297A (Z) . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
OP297E, F (Z) . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
OP297F, G (P, S) . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
OP297AZ –55°C to +125°C 8-Pin Cerdip Q-8
OP297EZ –40°C to +85°C 8-Pin Cerdip Q-8
OP297EP –40°C to +85°C 8-Pin Plastic DIP N-8
OP297FP –40°C to +85°C 8-Pin Plastic DIP N-8
OP297FS –40°C to +85°C 8-Pin SO SO-8
OP297FS-REEL –40°C to +85°C 8-Pin SO SO-8
OP297FS-REEL7 –40°C to +85°C 8-Pin SO SO-8
OP297GP –40°C to +85°C 8-Pin Plastic DIP N-8
OP297GS –40°C to +85°C 8-Pin SO SO-8
OP297GS-REEL –40°C to +85°C 8-Pin SO SO-8
OP297GS-REEL7
2
–40°C to +85°C 8-Pin SO SO-8
Package Type
3
JA
JC
Units
8-Pin Cerdip (Z) 134 12 °C/W
8-Pin Plastic DIP (P) 96 37 °C/W
8-Pin SO (S) 150 41 °C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
For supply voltages less than ±20 V, the absolute maximum input voltage is equal
to the supply voltage.
3
θJA is specified for worst case mounting conditions, i.e., θ
socket for cerdip and P-DIP, packages; θ
circuit board for SO package.
1
is specified for device soldered to printed
JA
is specified for device in
JA
1
NOTES
1
Burn-in is available on extended industrial temperature range parts in cerdip, and plastic DIP
packages. For outline information see Package Information section.
2
For availability and burn-in information on SO packages, contact your local sales office.
–
50Ω
1/2
OP-297
+
50kΩ
–
1/2
OP-297
2kΩ
V1 20V
V
2
p-p
@ 10Hz
+
V
CHANNEL SEPARATION = 20 log
Figure 3. Channel Separation Test Circuit
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP297 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
1
)
V2/10000
)
–4–
REV. D
8/21/97 4:00 PM
400
1200 UNITS
300
200
NUMBER OF UNITS
100
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
T
A
V
S
V
CM
= +25°C
= ±15V
= 0V
Figure 4. Typical Distribution of Input
Offset Voltage
60
40
20
0
20
INPUT CURRENT (pA)
–40
–60
–75 –50 –25 0 25 50 75 100 125
I
–
B
+
I
B
I
OS
TEMPERATURE (°C)
V
S
V
CM
= ±15V
= 0V
Typical Performance Characteristics–
250
1200
UNITS
200
150
100
NUMBER OF UNITS
50
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT BIAS CURRENT (pA)
Figure 5. Typical Distribution of Input
Bias Current
60
= +25°C
T
A
= ±15V
V
S
40
20
0
–20
INPUT CURRENT (pA)
–40
–60
–15 –10 –5 0 5 10 15
COMMON-MODE VOL T A GE (VOL TS)
= +25°C
T
A
V
= ±15V
S
V
CM
= 0V
I
I
I
–
B
+
B
OS
OP297
400
1200 UNITS
300
200
NUMBER OF UNITS
100
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET CURRENT (pA)
Figure 6. Typical Distribution of Input Offset Current
±3
T
= +25°C
A
= ±15V
V
S
= 0V
V
CM
±2
±1
DEVIATION FROM FINAL VALUE (µV)
0
012345
TIME AFTER POWER APPLIED (MINUTES)
= +25°C
T
A
= ±15V
V
S
V
CM
= 0V
Figure 7. Input Bias, Offset Current
vs. Temperature
10000
BALANCED OR UNBALANCED
= ±15V
V
S
V
= 0V
CM
1000
100
–55°C
≤
T
≤
125°C
A
EFFECTIVE OFFSET VOLTAGE (µV)
T
= +25°C
A
10
10 100 1k 10k 100k 1M 10M
SOURCE RESISTANCE (Ω)
Figure 10. Effective Offset Voltage
vs. Source Resistance
Figure 8. Input Bias, Offset Current
vs. Common-Mode Voltage
100
BALANCED OR UNBALANCED
VS = ±15V
= 0V
V
CM
10
1
0.1
EFFECTIVE OFFSET VOLTAGE DRIFT (µV/°C)
100 100M1k 10k 100k 1M 10M
SOURCE RESISTANCE (Ω)
Figure 11. Effective TCVOS vs. Source
Resistance
Figure 9. Input Offset Voltage WarmUp Drift
35
30
25
20
15
10
5
= ±15V
V
S
OUTPUT SHORTED
0
TO GROUND
–5
–10
–15
–20
SHORT-CIRCUIT CURRENT (mA)
–25
–30
–35
01 2 34
TIME FROM OUTPUT SHORT (MINUTES)
T
= –55°C
A
= +25°C
T
A
= +125°C
T
A
= +125°C
T
A
= +25°C
T
A
= –55°C
T
A
Figure 12. Short Circuit Current vs.
Time, Temperature
–5–REV. D
8/21/97 4:00 PM
OP297
TOTAL SUPPLY CURRENT (µA)
–Typical Performance Characteristics
1300
NO LOAD
T
1200
1100
1000
900
800
0 ±5 ±10 ±15 ±20
SUPPLY VOLTAGE (VOLTS)
= +125°C
A
= +25°C
T
A
= –55°C
T
A
Figure 13. Total Supply Current vs.
Supply Voltage
100
TA = +25°C
V
= ±2V TO ±15V
S
0
CURRENT
NOISE
VOLTAGE
NOISE
100
VOLTAGE NOISE DENSITY (nV/ Hz)
10
1 10 100
FREQUENCY (Hz)
1000
1000
100
10
1
160
140
120
100
80
60
40
COMMON-MODE REJECTION (dB)
20
0
1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 14. Noise Density vs.
Frequency
10
TA = +25°C
= ±2V TO ±20V
V
S
1
0.1
CURRENT NOISE DENSITY (fA/ Hz)
TOTAL NOISE DENSITY (µV/ Hz)
0.01
1kHz
2
10
10Hz
10310410510610
SOURCE RESISTANCE (Ω)
= +25°C
T
A
= ±15V
V
S
10Hz
1kHz
140
120
100
80
60
40
POWER SUPPLY REJECTION (dB)
20
0.1 1 10 100 1k 10k 100k 1M
+PSR
FREQUENCY (Hz)
Figure 15. Open Loop Gain Linearity
10000
TA = +25°C
1000
OPEN-LOOP GAIN (V/mV)
7
100
V
S
V
O
TA = –55°C
TA = +125°C
= ±15V
= ±10V
3
2510
LOAD RESISTANCE (kΩ)
TA = +25°C
= ±15V
V
S
∆V
S
–PSR
= 10V
p-p
201
Figure 16. Common-Mode Rejection
vs. Frequency
RL = 10kΩ
= ±15V
V
S
V
= 0V
CM
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
–15 –10 –5 0 5
OUTPUT VOLTAGE (VOLTS)
TA = +125°C
TA = +25°C
TA = –55°C
10
15
Figure 19. Power Supply Rejection
vs. Frequency
Figure 17. Total Noise Density vs.
Source Resistance
35
TA = +25°C
30
= ±15V
V
S
= +1
A
)
VCL
1%THD
p-p
25
fo = 1kHz
20
15
10
OUTPUT SWING (V
5
0
10
100
LOAD RESISTANCE (Ω)
1k 10k
Figure 20. Open Loop Gain vs. Load
Resistance
Figure 18. Maximum Output Swing
vs. Load Resistance
35
30
)
25
p-p
20
15
10
OUTPUT SWING (V
5
0
100
1k
FREQUENCY (Hz)
TA = +25°C
= ±15V
V
S
A
= +1
VCL
1%THD
= 10kΩ
R
L
10k 100k
Figure 21. Maximum Output Swing
vs. Frequency
–6–
REV. D
8/21/97 4:00 PM
OP297
100
80
GAIN
60
PHASE
40
20
0
OPEN-LOOP GAIN (dB)
–20
–40
100
1k 10k 100 1M 10M
FREQUENCY (Hz)
VS = ±15V
C
L
R
L
TA = –55°C
TA = +125°C
Figure 22. Open Loop Gain,
Phase vs. Frequency
= 30pF
= 1MΩ
90
135
180
225
PHASE SHIFT (DEG)
70
T
= +25°C
A
= ±15V
V
60
S
A
= +1
VCL
= 100mV
V
OVERSHOOT (%)
OUT
50
40
30
20
10
0
10
p-p
100
LOAD CAPACITANCE (pF)
Figure 23. Small Signal Overshoot
vs. Capacitance Load
APPLICATIONS INFORMATION
Extremely low bias current over the full military temperature
range makes the OP297 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
not necessary with the OP297 Offset voltage and TCV
OS
are
degraded only minimally by high source resistance, even when
unbalanced.
The input pins of the OP297 are protected against large differential voltage by back-to-back diodes and current-limiting resistors. Common-mode voltages at the inputs are not restricted,
and may vary over the full range of the supply voltages used.
The OP297 requires very little operating headroom about the
supply rails, and is specified for operation with supplies as low
as +2 V. Typically, the common-mode range extends to within
one volt of either rail. The output typically swings to within one
volt of the rails when using a 10 kΩ load.
1000
–EDGE
1000
+EDGE
OUTPUT IMPEDANCE (Ω)
10000
TA = +25°C
V
= ±15V
S
100
10
1
0.1
0.01
0.001
10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 24. Open Loop Output
Impedance vs Frequency
100
90
10
0%
20mV
5µs
Figure 26. Small-Signal Transient Response
(C
= 1000 pF, A
LOAD
VCL
= +1)
1M
AC PERFORMANCE
The OP297’S AC characteristics are highly stable over its full
operating temperature range. Unity-gain small-signal response is
shown in Figure 25. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response even with
1000 pF loads (Figure 26).
100
90
10
0%
20mV
5µs
Figure 25. Small-Signal Transient Response
(C
= 100 pF, A
LOAD
VCL
= +1)
–7–REV. D
100
90
10
0%
20mV
5µs
Figure 27. Large-Signal Transient Response
= +1)
(A
VCL
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the
OP297, care must be taken in circuit board layout and manufacturing. Board surfaces must be kept scrupulously clean and
free of moisture. Conformal coating is recommended to provide
8/21/97 4:00 PM
OP297
UNITY-GAIN FOLLOWER
–
1/2
OP-297
+
INVERTING AMPLIFIER
–
1/2
OP-297
+
Figure 28. Guard Ring Layout and Connections
NONINVERTING AMPLIFIER
–
1/2
OP-297
+
MINI-DIP
BOTTOM VIEW
8
B
1
A
a humidity barrier. Even a clean PC board can have 100 pA of
leakage currents between adjacent traces, so guard rings should
be used around the inputs. Guard traces are operated at a voltage close to that on the inputs, as shown in Figure 28, so that
leakage currents become minimal. In noninverting applications,
the guard ring should be connected to the common-mode voltage at the inverting input. In inverting applications, both inputs
remain at ground, so the guard trace should be grounded. Guard
traces should be on both sides of the circuit board.
OPEN-LOOP GAIN LINEARITY
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the precision of the OP297 and provides for very high accuracy in high
closed loop gain applications. Figure 29 illustrates the typical
open-loop gain linearity of the OP297 over the military temperature range.
R
= 10kΩ
L
= ±15V
V
S
= 0V
V
CM
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
–15 –10 –5 0 5
OUTPUT VOL T A GE (VOL TS)
TA = +125°C
TA = +25°C
TA = –55°C
10
15
APPLICATIONS
PRECISION ABSOLUTE VALUE AMPLIFIER
The circuit of Figure 30 is a precision absolute value amplifier
with an input impedance of 30 MΩ. The high gain and low
of the OP297 insure accurate operation with microvolt
TCV
OS
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
+15V
C
2
0.1µF
6
5
R
2kΩ
–
1/2
OP-297
+
2
R
1kΩ
3
7
0V < V
OUT
< 10V
R
1
1kΩ
C
C
0.1µF
30pF
1
3
8
2
–
1/2
OP-297
3
V
IN
+
4
–15V
D
1
1
1N4148
D
2
1N4148
Figure 30. Precision Absolute Value Amplifier
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 31 is ±10 mA. Voltage compliance is ±10 V with
±15 V supplies. Output impedance of the current transmitter
exceeds 3 MΩ with linearity better than 16 bits.
Figure 29. Open-Loop Linearity of the OP297
–8–
REV. D
8/21/97 4:00 PM
OP297
PRECISION POSITIVE PEAK DETECTOR
In Figure 32, the CH must be of polystyrene, Teflon®*, or polyethylene to minimize dielectric absorption and leakage. The
droop rate is determined by the size of C
and the bias current
H
of the OP297.
R
3
R
–
V
IN
+
I
=
OUT
1
10kΩ
R
2
10kΩ
V
V
IN
IN
= 10mA/V
=
R
100Ω
5
2
3
10kΩ
10kΩ
–
1/2
OP-297
+
R
4
7
1
+15V
8
1/2
OP-297
4
–15V
+
–
R
5
100Ω
5
6
I
OUT
±10mA
Figure 31. Precision Current Pump
SIMPLE BRIDGE CONDITIONING AMPLIFIER
Figure 33 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is:
V
OUT=VREF
∆R
R +∆R
R
F
R
The REF43 provides an accurate and stable reference voltage
for the bridge. To maintain the highest circuit accuracy, R
F
should be 0.1% or better with a low temperature coefficient.
1kΩ
1N4148
2
–
1/2
1
OP-297
1kΩ
V
IN
3
+
2N930
C
H
1kΩRESET
+15V
0.1µF
6
8
–
7
1/2
OP-297
1kΩ
5
+
4
0.1µF
–15V
V
OUT
Figure 32. Precision Positive Peak Detector
+5V
2
REF-43
4
V
2.5V
6
REF
R
R
R + ∆RR
2
3
R
–
1/2
OP-297
+
F
1
V
OUT
+5V
∆R
R
6
5
–
1/2
OP-297
+
V
=
8
OUTVREF
(
R + ∆R
7
4
(
F
R
–5V
Figure 33. A Simple Bridge Conditioning Amplifier Using the OP297
*Teflon is a registered trademark of the Dupont Company
–9–REV. D
8/21/97 4:00 PM
OP297
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and squareroot circuits shown in Figures 34 and 35. Using the squaring
circuit of Figure 34 as an example, the analysis begins by writing
ln
1
I
O
I
S3
, Q2, Q3 and Q4.
I
T 4
ln
REF
I
S4
+V
a voltage loop equation across transistors Q
VT1ln
I
IN
+V
I
S1
T2
ln
I
IN
=V
I
T 3
S2
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the I
2 ln I
= ln IO + ln I
IN
and VT terms cancel, giving:
S
= ln (IO × I
REF
REF
)
Exponentiating both sides of the equation leads to:
2
(I
)
IN
I
=
O
I
REF
Op amp A2 forms a current-to-voltage converter which gives
V
= R2 × 10. Substituting (V
OUT
equation for I
yields:
O
V
OUT
/R1) for IIN and the above
IN
R2
=
I
REF
2
V
IN
R1
A similar analysis made for the square-root circuit of Figure 35
leads to its transfer function:
)(I
R1
REF
)
(V
V
= R2
OUT
IN
C
2
100pF
R
2
33kΩ
6
–
1/2
5
OP-297
A
2
+
I
O
7
V
OUT
1
2
Q
C
1
100pF
1
3
V+
7
6
Q
2
5
8
Q
3
MAT-04E
9
I
REF
14
12
13
Q
4
10
R
V
IN
33kΩ
I
1
IN
2
3
–
1/2
OP-297
A
1
+
V–
8
R
1
4
3
50kΩ
R
4
50kΩ
–15V
Figure 34. Squaring Amplifier
–10–
REV. D
8/21/97 4:00 PM
OP297
R
2
33kΩ
C
2
100pF
6
–
1/2
OP-297
I
5
O
+
7
V
OUT
I
IN
C
1
100pF
V+
R
V
IN
1
33kΩ
2
3
–
1/2
OP-297
+
8
R
1
5
2kΩ
4
V–
Figure 35. Square-Root Amplifier
In these circuits, I
To maintain accuracy, the negative supply should be well regulated. For applications where very high accuracy is required, a
voltage reference may be used to set I
eration for the squaring circuit is that a sufficiently large input
voltage can force the output beyond the operating range of the
output op amp. Resistor R4 can be changed to scale I
and R2 can be varied to keep the output voltage within the
usable range.
Unadjusted accuracy of the square-root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
is a function of the negative power supply.
REF
. An important consid-
REF
, or R1,
REF
Q
1
1
2
MAT-04E
I
REF
3
13
7
6
Q
2
5
10
8
9
Q
3
R
50kΩ
14
Q
4
12
3
R
4
50kΩ
–15V
OP297 SPICE MACRO-MODEL
Figures 36 and 37 show the node end net list for a SPICE
macro model of the OP297. The model is a simplified version of
the actual device and simulates important dc parameters such as
, IOS, IB, AVO, CMR, VO and ISY. AC parameters such as
V
OS
slew rate, gain and phase response and CMR change with frequency are also simulated by the model.
The model uses typical parameters for the OP297. The poles
and zeros in the model were determined from the actual open
and closed-loop gain and phase response of the OP297. In this
way, the model presents an accurate ac representation of the
actual device. The model assumes an ambient temperature
of 25°C.
–11–REV. D
8/21/97 4:00 PM
OP297
99
–IN
+IN
C
22
+
V
2
–
13
3
14
+
–
C
4
D
3
R
8
15
+
–
D
4
V
3
16
R
E
9
1
+
E
REF
–
R
5
2
1
R
IN2
8
R
1
I
C
IN
R
IN1
7
OS
3
R
2
E
OS
D
1
–
+
17
Q
1
10
D
2
R
9
C
6
R
11
R
3
C
5
4
2
6
Q
2
11
R
6
4
I
1
50
C
R
13
12
R
G
7
1
98
7
98
50
99
23
R
G
10
2
R
16
I
SY
+
C
E
5
2
–
D
5
26
22
D
6
27
R
17
D
9
+
R
12
–
D
7
28
29
G
4
R
E
14
3
D
8
V
4
–
+
V
5
–
+
G
5
D
10
R
G
3
25
C
15
G
G
8
R
6
18
L
1
R
19
7
Figure 36. OP297 Macro-Model
–12–
REV. D
8/21/97 4:00 PM
OP297
Table I. SPICE Net-List
OP297 SPICE MACRO-MODEL
•
• NODE ASSIGNMENTS
•NONINVERTING INPUT
INVERTING INPUT
OUTPUT
POSITIVE SUPPLY
NEGATIVE SUPPLY
• SUBCKT OP297 1 2 30 99 50
•
INPUT STAGE & POLE AT 6 MHz
•
RIN1 1 7 2500
RIN2 2 8 2500
R1 8 3 5E11
R2 7 3 5E11
R3 5 99 612
R4 6 99 612
CIN 7 8 3E-12
C2 5 6 21.67E-12
I1 4 50 0.1E-3
IOS 7 8 20E-12
EOS 9 7 POLY(1) 19 23 25E-6 1
Q1 5 8 10 QX
Q2 6 9 11 QX
R5 10 4 96
R6 11 4 96
D1 8 9 DX
D2 9 8 DX
•
EREF 98 0 23 0 1
•
GAIN STAGE & DOMINANT POLE AT 0.13 HZ
•
R7 12 98 2.45E9
C3 12 98 500E-12
G1 98 12 5 6 1.634E-3
V2 99 13 1.5
V3 14 50 1.5
D3 12 13 DX
D4 14 12 DX
•
• NEGATIVE ZERO AT -1 8 MHz
•
R8 15 16 1E6
C4 15 16 –88.4E-15
R9 16 98 1
E1 15 98 12 23 1E6
•
• POLE AT 1.8 MHz
•
R10 17 98 1E6
C5 17 98 88 4E-15
G2 98 17 16 23 1 E-6
•
• COMMON-MODE GAIN NETWORK WITH ZERO AT 50 HZ
•
R11 18 19 1E6
C6 18 19 3.183E-9
R12 19 98 1
E2 18 98 3 23 100E-3
•
• POLE AT 6 MHz
•
R15 22 98 1E6
C8 22 98 26.53E-15
G3 98 22 17 23 1 E-6
•
• OUTPUT STAGE
•
R16 23 99 160K
R17 23 50 160K
ISY 99 50 331 E-6
R18 25 99 200
R19 25 50 200
L1 25 30 1 E-7
G4 28 50 22 25 5E-3
G5 29 50 25 22 5E-3
G6 25 99 99 22 5E-3
G7 50 25 22 50 5E-3
V4 26 25 1.8
V5 25 27 1.3
D5 22 26 DX
D6 27 22 DX
D7 99 28 DX
D8 99 29 DX
D9 50 28 DY
D10 50 29 DY
•
• MODELS USED
•
• MODEL QX NPN BF=2.5E6)
• MODEL DX D IS = 1 E-15)
• MODEL DY D IS = 1 E-15 BV = 50)
• ENDS OP297
–13–REV. D
8/21/97 4:00 PM
OP297
0.210 (5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
8
14
PIN 1
0.100
(2.54)
BSC
5
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
SEATING
PLANE
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
8-Lead Cerdip
(Q-8)
0.195 (4.95)
0.115 (2.93)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.1574 (4.00)
0.1497 (3.80)
0.0098 (0.25)
0.0040 (0.10)
0.005 (0.13)
MIN
0.055 (1.4)
8
1
PIN 1
0.405 (10.29)
MAX
0.100
(2.54)
BSC
MAX
5
0.310 (7.87)
0.220 (5.59)
4
0.060 (1.52)
0.015 (0.38)
0.070 (1.78)
0.030 (0.76)
0.150
(3.81)
MIN
SEATING
PLANE
8-Lead Narrow Body (SOIC)
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
0.2440 (6.20)
41
0.2284 (5.80)
PIN 1
0.0688 (1.75)
0.0532 (1.35)
15°
0°
0.320 (8.13)
0.290 (7.37)
0.0196 (0.50)
0.0099 (0.25)
0.015 (0.38)
0.008 (0.20)
x 45°
SEATING
PLANE
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
–14–
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
REV. D
–15–
8/21/97 4:00 PM
OP297
000000000
–16–
PRINTED IN U.S.A.
REV. D
Loading...