Analog Devices OP297 e Datasheet

Dual Low Bias Current

Precision Operational Amplifier

OP297

FEATURES
Low Offset Voltage: 50 ␮V Max
Low Offset Voltage Drift: 0.6 ␮V/ⴗC Max
Very Low Bias Current: 100 pA Max
Very High Open-Loop Gain: 2000 V/mV Min
Low Supply Current (Per Amplifier): 625 ␮A Max
Operates From ⴞ2 V to ⴞ20 V Supplies
High Common-Mode Rejection: 120 dB Min
Pin Compatible to LT1013, AD706, AD708, OP221,

LM158, and MC1458/1558 with Improved Performance

APPLICATIONS
Strain Gage and Bridge Amplifiers
High Stability Thermocouple Amplifiers
Instrumentation Amplifiers
Photo-Current Monitors
High Gain Linearity Amplifiers
Long-Term Integrators/Filters
Sample-and-Hold Amplifiers
Peak Detectors
Logarithmic Amplifiers
Battery-Powered Systems

GENERAL DESCRIPTION

The OP297 is the first dual op amp to pack precision performance
into the space-saving, industry-standard, 8-lead SOIC package.
Its combination of precision with low power and extremely low
input bias current makes the dual OP297 useful in a wide variety
of applications.

60

40

20

0

–20

INPUT CURRENT (pA)

–40

+

I

B

I

OS

VS = ⴞ15V

= 0V

VCM

–

I

B

PIN CONNECTIONS

OUTA

–INA

+INA

1

2

3

4

8

V+

7

OUTB

BA

6

–INB

5

+INBV–

Precision performance of the OP297 includes very low offset,
under 50 µV, and low drift, below 0.6 µV/°C. Open-loop gain
exceeds 2000 V/mV, ensuring high linearity in every application.

Errors due to common-mode signals are eliminated by the
OP297’s common-mode rejection of over 120 dB, which mini­mizes offset voltage changes experienced in battery-powered
systems. Supply current of the OP297 is under 625 µA per
amplifier, and the part can operate with supply voltages as low
as ±2 V.

The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all temperatures.
This is in contrast to FET input op amps whose bias currents
start in the picoamp range at 25°C, but double for every 10°C
rise in temperature, to reach the nanoamp range above 85°C.
Input bias current of the OP297 is under 100 pA at 25°C and is
under 450 pA over the military temperature range.

Combining precision, low power, and low bias current, the OP297
is ideal for a number of applications, including instrumentation
amplifiers, log amplifiers, photodiode preamplifiers, and long­term integrators. For a single device, see the OP97; for a quad,
see the OP497.

400

1200 UNITS

300

200

NUMBER OF UNITS

100

TA = 25ⴗC
V

= ⴞ15V

S

= 0V

V

CM

–60

–75 –50 125–25 0 25 50 75 100

TEMPERATURE (ⴗC)

Figure 1. Low Bias Current over Temperature

REV. E

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.

0
–100 –80 60–60 –40 –20 0 20 40

INPUT OFFSET VOLTAGE (␮V)

80 100

Figure 2. Very Low Offset

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

OP297–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(@ VS = ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)

OP297E OP297F OP297G

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage V

OS

25 50 50 100 80 200 µV

Long-Term Input

Voltage Stability 0.1 0.1 0.1 µV/mo

Input Offset Current I
Input Bias Current I
Input Noise Voltage e
Input Noise Voltage Density e

Input Noise Current Density i

OS

B

p-p 0.1 Hz to 10 Hz 0.5 0.5 0.5 µV p-p

n

n

n

VCM = 0 V 20 100 35 150 50 200 pA
VCM = 0 V 20 ± 100 35 ± 150 50 ± 200 pA

fO = 10 Hz 20 20 20 nV/√Hz

= 1000 Hz 17 17 17 nV/√Hz

f

O

fO = 10 Hz 20 20 20 fA/√Hz

Input Resistance

Differential Mode R

IN

30 30 30 MΩ

Input Resistance

Common-Mode R

INCM

Large-Signal V

Voltage Gain A

Input Voltage Range* V

VO

CM

Common-Mode Rejection CMRR V
Power Supply Rejection PSRR V
Output Voltage Swing V

Supply Current per Amplifier I
Supply Voltage V

O

SY

S

= ±10 V

O

RL = 2 kΩ 2000 4000 1500 3200 1200 3200 V/mV

= ±13 V 120 140 114 135 114 135 dB

CM

= ±2 V to ±20 V 120 130 114 125 114 125 dB

S

RL = 10 kΩ±13 ± 14 ± 13 ±14 ±13 ±14 V

= 2 kΩ±13 ± 13.7 ± 13 ±13.7 ± 13 ±13.7 V

R

L

No Load 525 625 525 625 525 625 µA
Operating Range ±2 ±20 ± 2 ±20 ±2 ±20 V

500 500 500 GΩ

±13 ± 14 ± 13 ±14 ±13 ±14 V

Slew Rate SR 0.05 0.15 0.05 0.15 0.05 0.15 V/µs
Gain Bandwidth Product GBWP A
Channel Separation CS V

Input Capacitance C

*Guaranteed by CMR test.

Specifications subject to change without notice.

IN

= [phone] kHz

V

= 20 V p-p 150 150 150 dB

O

= 10 Hz

f

O

333pF

ELECTRICAL CHARACTERISTICS

(@ VS = ⴞ15 V, –40ⴗC ⱕ TA ⱕ +85ⴗC for OP297E/F/G, unless otherwise noted.)

OP297E OP297F OP297G

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage V

OS

35 100 80 300 110 400 µV

Average Input Offset

Voltage Drift TCV
Input Offset Current I
Input Bias Current I
Large-Signal Voltage Gain A

Input Voltage Range* V

OS

OS

B

VO

CM

Common-Mode Rejection CMRR V
Power Supply Rejection PSRR V

VCM = 0 V 50 450 80 750 80 750 pA
VCM = 0 V 50 ±450 80 ± 750 80 ± 750 pA
VO = ±10 V,

= 2 kΩ 1200 3200 1000 2500 800 2500 V/mV

R

L

= ±13 114 130 108 130 108 130 dB

CM

= ±2.5 V

S

0.2 0.6 0.5 2.0 0.6 2.0 µV/°C

±13 ± 13.5 ± 13 ±13.5 ± 13 ±13.5 V

to ±20 V 114 0.15 108 0.15 108 0.3 dB

Output Voltage Swing V
Supply Current per Amplifier I
Supply Voltage V

*Guaranteed by CMR test.

Specifications subject to change without notice.

O

SY

S

RL = 10 kΩ±13 ± 13.4 ± 13 ±13.4 ±13 ± 13.4 V
No Load 550 750 550 750 550 750 µA
Operating Range ±2.5 ±20 ± 2.5 ±20 ± 2.5 ±20 V

REV. E–2–

OP297

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V

Input Voltage
Differential Input Voltage

2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V

2

. . . . . . . . . . . . . . . . . . . . . . . . 40 V

1

Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite

Storage Temperature Range

Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C

P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range

OP297E (Z) . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

OP297F, OP297G (P, S) . . . . . . . . . . . . . . –40°C to +85°C

Junction Temperature

Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C

P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C

ORDERING GUIDE

Model Temperature Range Package Description Package Options

OP297EZ –40°C to +85°C 8-Lead CERDIP Q-8
OP297FP –40°C to +85°C 8-Lead PDIP N-8
OP297FS –40°C to +85°C 8-Lead SOIC R-8
OP297FS-REEL –40°C to +85°C 8-Lead SOIC R-8
OP297FS-REEL7 –40°C to +85°C 8-Lead SOIC R-8
OP297GP –40°C to +85°C 8-Lead PDIP N-8
OP297GS –40°C to +85°C 8-Lead SOIC R-8
OP297GS-REEL –40°C to +85°C 8-Lead SOIC R-8
OP297GS-REEL7 –40°C to +85°C 8-Lead SOIC R-8

Package Types ␪

3

JA

␪

JC

Unit

8-Lead CERDIP (Z) 134 12 °C/W
8-Lead PDIP (P) 96 37 °C/W
8-Lead SOIC (S) 150 41 °C/W

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma­nent damage to the device. This is a stress rating only; and functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

2

For supply voltages less than ± 20 V, the absolute maximum input voltage is equal
to the supply voltage.

3

JA is specified for worst case mounting conditions, i.e., JA is specified for device

in socket for CERDIP and PDIP, packages; JA is specified for device soldered to
printed circuit board for SOIC package.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
OP297 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

1/2
OP297

50k⍀

50⍀

1/2
OP297

CHANNEL SEPARATION = 20 log

V1 20Vp-p @ 10Hz

2k⍀

V

2

V

1

)

V2/10000

)

REV. E

Figure 3. Channel Separation Test Circuit

–3–

OP297

)

(pA)

)

–Typical Performance Characteristics

400

1200 UNITS

300

200

NUMBER OF UNITS

100

0

–100 –80 60–60 –40 –20 0 20 40

INPUT OFFSET VOLTAGE (pA)

TA = 25ⴗC
V
V

TPC 1. Typical Distribution of
Input Offset Voltage

60

40

20

0

–20

INPUT CURRENT (pA)

–40

–60

–75 –50 125–25 0 25 50 75 100

TEMPERATURE (ⴗC)

IB–

IB+

I

OS

TPC 4. Input Bias, Offset
Current vs. Temperature

= ⴞ15V

S

= 0V

CM

VS = ⴞ15V

= 0V

VCM

80 100

250

1200 UNITS

200

150

100

NUMBER OF UNITS

50

0

–100 –80 60–60 –40 –20 0 20 40

INPUT BIAS CURRENT (pA)

TA = 25ⴗC
V

= ⴞ15V

S

V

= 0V

CM

80 100

TPC 2. Typical Distribution of
Input Bias Current

60

VS = ⴞ15V

= 0V

V

CM

40

20

0

INPUT CURRENT (pA)

–20

–40

–10 –5 0 5 10 15

–15

COMMON-MODE VOLTAGE (V)

IB–

I

IB+

OS

TPC 5. Input Bias, Offset Current vs.
Common-Mode Voltage

400

1200 UNITS

300

200

NUMBER OF UNITS

100

0

–100

–80 60–60 –40 –20 0 20 40 80 100

INPUT OFFSET VOLTAGE

TA = 25ⴗC
V

= ⴞ15V

S

= 0V

V

CM

TPC 3. Typical Distribution of
Input Offset Current

ⴞ3

TA = 25ⴗC

V)

V

= ⴞ15V

S

␮

DEVIATION FROM FINAL VALUE (

= 0V

V

CM

ⴞ2

ⴞ1

0

012345

TIME AFTER POWER APPLIED (Minutes

TPC 6. Input Offset Voltage
Warm-Up Drift

10000

BALANCED OR UNBALANCED
VS = ⴞ15V

= 0V

V

CM

1000

100

–55ⴗC TA +125ⴗC

EFFECTIVE OFFSET VOLTAGE (␮V)

TA = +25ⴗC

10

10 10M

SOURCE RESISTANCE (⍀

TPC 7. Effective Offset Voltage
vs. Source Resistance

100

BALANCED OR UNBALANCED
VS = ⴞ15V

= 0V

V

CM

10

1

0.1

1M100k10k1k100

EFFECTIVE OFFSET VOLTAGE DRIFT (␮V/ⴗC)

SOURCE RESISTANCE (⍀)

10M1M100k10k1k100

100M

TPC 8. Effective TCVOS vs.
Source Resistance

35

30
25

20
15
10

5

VS = ⴞ15V

0

OUTPUT SHORTED

–5

TO GROUND

–10
–15

–20

SHORT-CIRCUIT CURRENT (mA)

–25

–30
–35

0412 3

TIME FROM OUTPUT SHORT (Minutes)

TA = –55ⴗC

TA = +25ⴗC

TA = +125ⴗC

TA = +125ⴗC

TA = +25ⴗC

TA = –55ⴗC

TPC 9. Short Circuit Current
vs. Time, Temperature

REV. E–4–