Analog Devices OP176 Datasheet

Bipolar/JFET,

NULL

–IN
+IN
V–

NC
V+
OUT
NULL

1
2
3
45

6

7

8

OP176

1
2
3
45

6

7

8

NULL

–IN
+IN

V–

OP-482

NC

V+
OUT
NULL

OP176

a

FEATURES
Low Noise: 6 nV/√Hz
High Slew Rate: 25 V/
Wide Bandwidth: 10 MHz
Low Supply Current: 2.5 mA
Low Offset Voltage: 1 mV
Unity Gain Stable
SO-8 Package

APPLICATIONS
Line Driver
Active Filters
Fast Amplifiers
Integrators

GENERAL DESCRIPTION

The OP176 is a low noise, high output drive op amp that
features the Butler Amplifier front-end. This new front-end
design combines both bipolar and JFET transistors to attain
amplifiers with the accuracy and low noise performance of
bipolar transistors, and the speed and sound quality of JFETs.
Total Harmonic Distortion plus Noise equals previous audio
amplifiers, but at much lower supply currents.

Improved dc performance is also provided with bias and offset
currents greatly reduced over purely bipolar designs. Input
offset voltage is guaranteed at 1 mV and is typically less than

*Protected by U.S. Patent No. 5101126.

µ

s

Audio Operational Amplifier

OP176*

PIN CONNECTIONS

8-Lead Narrow-Body SO 8-Lead Epoxy DIP

(S Suffix) (P Suffix)

200 µV. This allows the OP176 to be used in many dc coupled
or summing applications without the need for special selections
or the added noise of additional offset adjustment circuitry.

The output is capable of driving 600 Ω loads to 10 V rms while
maintaining low distortion. THD + Noise at 3 V rms is a low

0.0006%.
The OP176 is specified over the extended industrial (–40°C to

+85°C) temperature range. OP176s are available in both plastic
DIP and SO-8 packages. SO-8 packages are available in 2500
piece reels. Many audio amplifiers are not offered in SO-8
surface mount packages for a variety of reasons, however, the
OP176 was designed so that it would offer full performance in
surface mount packaging.

7

RB4

RB5

QB6

Z2

Q5

QB8

R2S

5

JB1

Z1

CB1

QB4

QB1

RB2

QB2

RB1

QB3

CC1

R1L

R1A

RB3

QB5

J1

Q1

Q3

R1P1

R1P2

R1S

1

Simplified Schematic

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

Q8

Q9

RB6

QB7

R4

Q7

CC2

Q10

4

Q11

RS1

QS1

QS2

R5

RS2

RB7

Q2

J2

32

CCB

Q6

Q4 QS3

CF

R3

R2L

R2P1

R2P2

R2A

One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: [phone] Fax: [phone]

QB9

6

OP176–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(@ VS = ±15.0 V, TA = +25°C unless otherwise noted)

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage V
Offset Voltage V
Input Bias Current I

Input Offset Current I

Input Voltage Range V

OS

OS

B

OS

CM

Common-Mode Rejection CMRR V

Large Signal Voltage Gain A

Offset Voltage Drift ∆V

VO

/∆T5µV/°C

OS

–40°C ≤ TA ≤ +85°C 1.25 mV
VCM = 0 V 350 nA

= 0 V, –40°C ≤ TA ≤ +85°C 400 nA

V

CM

V

= 0 V ±50 nA

CM

= 0 V, –40°C ≤ TA ≤ +85°C ±100 nA

V

CM

–10.5 +10.5 V

= ±10.5 V,

CM

–40°C ≤ T
R

= 2 kΩ 250 V/mV

L

= 2 kΩ, –40°C ≤ TA ≤ +85°C 175 V/mV

R

L

= 600 Ω 200 V/mV

R

L

≤ +85°C 80 106 dB

A

1mV

OUTPUT CHARACTERISTICS

R

Output Voltage Swing V

Output Short Circuit Current I

O

SC

= 2 kΩ, –40°C ≤ TA ≤ +85°C –13.5 +13.5 V

L

= 600 Ω, VS = ±18 V –14.8 +14.8 V

R

L

±25 ±50 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR V

Supply Current I

Supply Current I

Supply Voltage Range V

SY

SY

S

= ±4.5 V to ±18 V 86 108 dB

S

–40°C ≤ T
V

= ±4.5 V to ±18 V, V

S

= ∞, –40°C ≤ TA ≤ +85°C 2.5 mA

R

L

V

= ±22 V, V

S

–40°C ≤ T

≤ +85°C80 dB

A

= 0 V, R

O

≤ +85°C 2.75 mA

A

= 0 V,

O

= ∞,

L

±4.5 ±22 V

DYNAMIC PERFORMANCE

Slew Rate SR R

= 2 kΩ 15 25 V/µs

L

Gain Bandwidth Product GBP 10 MHz

AUDIO PERFORMANCE

THD + Noise V

Voltage Noise Density e
Current Noise Density i

Specifications subject to change without notice.

n

n

= 3 V rms,

IN

= 2 kΩ, f = 1 kHz 0.001 %

R

L

f = 1 kHz 6 nV/√Hz
f = 1 kHz 0.5 pA/√Hz

–2–

REV. 0

OP176

WAFER TEST LIMITS

(@ VS = ±15.0 V, TA = +25°C unless otherwise noted)

Parameter Symbol Conditions Limit Units

Offset Voltage V
Input Bias Current I
Input Offset Current I
Input Voltage Range

1

OS

B

OS

V

CM

Common-Mode Rejection CMRR V

VCM = 0 V 350 nA max
V

= 0 V ±50 nA max

CM

= ±10.5 V 80 dB min

CM

1 mV max

±10.5 V min

Power Supply Rejection Ratio PSRR V = ± 4.5 V to ±18 V 86 dB min

R

Large Signal Voltage Gain A
Output Voltage Range V

Supply Current I

NOTES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.

1

Guaranteed by CMR test.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V

Input Voltage
Differential Input Voltage

2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V

2

. . . . . . . . . . . . . . . . . . . . . . . ±7.5 V

VO

O

SY

1

= 2 kΩ 250 V/mV min

L

R

= 2 kΩ 13.5 V min

L

= ±18.0 V, RL = 600 Ω 14.8 V min

V

S

V

= ±22.0 V, V

S

= ±4.5 V to ±18 V, 2.5 mA max

V

S

VO = 0 V, R

= ∞

L

= 0 V, R

O

= ∞ 2.75 mA max

L

DICE CHARACTERISTICS

+

V

OUT

NULL

Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite

Storage Temperature Range

P, S Package . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C

Operating Temperature Range

OP176G . . . . . . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C

Junction Temperature Range

P, S Package . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C

Package Type θ

3

JA

θ

JC

Units

NULL

–IN

+IN

–

V

8-Pin Plastic DIP (P) 103 43 °C/W
8-Pin SOIC (S) 158 43 °C/W

NOTES

1

Absolute maximum ratings apply to both DICE and packaged parts, unless

otherwise noted.

2

For input voltages greater than ±7.5 V limit input current to less than 5 mA.

3

θJA is specified for the worst case conditions, i.e., θ

for P-DIP packages; θ
package.

is specified for device soldered in circuit board for SOIC

JA

is specified for device in socket

JA

OP176 Die Size 0.069 × 0.067 Inch, 4,623 Sq. Mils.
Substrate (Die Backside) Is Connected to V–.
Transistor Count, 26.

ORDERING GUIDE

Model Temperature Range Package Description Package Option

OP176GP –40°C to +85°C 8-Pin Plastic DIP N-8
OP176GS –40°C to +85°C 8-Pin SOIC SO-8
OP176GSR –40°C to +85°C SO-8 Reel, 2500 Pieces
OP176GBC +25°C DICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP176 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

REV. 0

–3–

WARNING!

ESD SENSITIVE DEVICE

OP176–Typical Characteristics

120

100

80

60

40

20

±VS = ±15V

≤–40°C ≤ T

BASED ON 300 OP AMPS

0

1

0

µ

t

VOS – µV/°C

C

≤ +85°C

A

754362

8

30

25

20

15

10

MAXIMUM OUTPUT SWING – Volts

5

0

10k 10M1M100k1k

FREQUENCY – Hz

±VS = ±15V

ΩTA = +25°C

RL = 2kΩ

Figure 1. Input Offset Voltage Drift Distribution @ ±15 V Figure 4. Maximum Output Swing vs. Frequency

16

ΩVS = ±18V, +VOM, RL = 600Ω

ΩVS = ±18V, –VOM, RL = 600Ω

15

14

ΩVS = ±15V, –VOM, RL = 2kΩ

13

ΩVS = ±15V, –VOM, RL = 600Ω

ABSOLUTE OUTPUT VOLTAGE – V

ΩVS = ±15V, +VOM, RL = 2kΩ

ΩVS = ±15V, +VOM, RL = 600Ω

16

VS = ±15V
T

= +25°C

A

14

12

10

8

6

OUTPUT SWING – Volts

4

2

POSITIVE SWING

NEGATIVE SWING

12

–25–50

TEMPERATURE – °C

100

7550250

0

10 100 10k1k

ΩLOAD RESISTANCE – Ω

Figure 2. Output Swing vs. Temperature Figure 5. Maximum Output Swing vs. Load Resistance

300

250

200

150

100

INPUT BIAS CURRENT – nA

50

0

–50

–25

TEMPERATURE – °C

±VS = ±15V

V

= 0V

CM

7550250

100

2.50

2.25

TA = +85°C

2.00

SUPPLY CURRENT – mA

1.75

1.50
0

TA = +25°C

TA = –40°C

±5±

SUPPLY VOLTAGE – V

±15± ±20±±10±

±25±

Figure 3. Input Bias Current vs. Temperature Figure 6. Supply Current per Amplifier vs. Supply Voltage

–4–

REV. 0

OP176

40

20

0

1k 1M100k10k100

10

30

FREQUENCY – Hz

ΩIMPEDANCE – Ω

AV = +100

AV = +10

AV = +1

TA = +25°C
V

S

= ±15V

80

70

60

50

40

30

20

ABSOLUTE OUTPUT CURRENT – mA

10

0

SINK

SOURCE

–25–50

TEMPERATURE – °C

±VS = ±15V

7550250

Figure 7. Short Circuit Current vs. Temperature @

120

100

80

60

40

20

GAIN – dB

–20

–40

–60

PHASE

0

1k 10k 100M10M1M100k

GAIN

PHASE MARGIN = 60°

FREQUENCY – Hz

TA = +25°C
VS = ±15V

R

= >600

L

Ω

100

±

15 V

90

135

180

225

POWER SUPPLY REJECTION – dB

Figure 10. Power Supply Rejection vs. Frequency

2000

1750

1500

1250

1000

PHASE – Degrees

OPEN-LOOP GAIN – V/mV

120

100

750

500

250

80

60

40

20

0

0

±VS = ±15V
±VO = ±10V

–25–50

–PSRR

1k 1M100k10k100

FREQUENCY – Hz

TEMPERATURE – °C

+PSRR

Ω–GAIN, RL = 2kΩ

+GAIN, RL = 2kΩ

–GAIN, RL = 600Ω

+GAIN, RL = 600Ω

TA = +25°C

±VS = ±15V

7550250

100

Figure 8. Open-Loop Gain & Phase vs. Frequency

50

40

30

20

10

GAIN – dB

0

–10

–20

–30

1k 10k 100M10M1M100k

FREQUENCY – Hz

TA = +25°C

V

= ±15V

S

Figure 11. Open-Loop Gain vs. Temperature

Figure 12. Closed-Loop Output Impedance vs. FrequencyFigure 9. Closed-Loop Gain vs. Frequency

REV. 0

–5–

OP176

65

45

–75 125

60

50

–50

55

75 10050250–25

±VS = ±15V

14

6

12

8

10

TEMPERATURE – °C

PHASE MARGIN – Degrees

GAIN BANDWIDTH PRODUCT – MHz

PHASE

GAIN

40

0

100

10

5

–25–50

20

15

25

30

35

7550250

±VS = ±15V
ΩRL = 2kΩ

SLEW RATE – V/µs

TEMPERATURE – °C

SR–

SR+

140

120

100

80

60

40

COMMON-MODE REJECTION – dB

20

TA = +25°C
V

= ±15V

S

0

1k 1M100k10k100

FRERQUENCY – Hz

Figure 13. Common-Mode Rejection vs. Frequency

100

±VS = ±15V

90

ΩRL = 2kΩ

VIN = 100mVp-p

80

70

60

50

40

OVERSHOOT – %

30

20

10

0

= 1

AV

CL

100

0

LOAD CAPACITANCE – pF

NEGATIVE SWING

POSITIVE SWING

1000

900800700600500400300200

Figure 14. Small Signal Overshoot vs. Load Capacitance

35

Figure 16. Gain Bandwidth Product & Phase Margin vs.
Temperature

50

40

NEGATIVE SLEW RATE

30

POSITIVE SLEW RATE

20

SLEW RATE – V/µs

10

0

200

0

LOAD CAPACITANCE – pF

VS = ±15V
R

= 2kΩ

L

SWING = ±10V
SLEW WINDOW = ±5V
T

= +25°C

A

18001600140012001000800600400

2000

Figure 17. Slew Rate vs. Load Capacitance

30

ΩVS = ±15V

R

= 2kΩ

L

TA = +25°C

25

20

15

SLEW RATE – V/µs

10

5

0

0

Figure 15. Slew Rate vs. Differential Input Voltage

0.4
DIFFERENTIAL INPUT VOLTAGE – V

SR+ AND SR–

1.61.20.8

2.0

–6–

Figure 18. Slew Rate vs. Temperature

REV. 0

25

10k

2.5

2.0

0

10 100 1k

1.5

1.0

0.5

FREQUENCY – Hz

CURRENT NOISE – pA/ Hz

VS = ±15V
T

A

= +25°C

±VS = ±15V
ΩTA = +25°C

20

15

10

VOLTAGE NOISE – nV/ Hz

5

0

10 100 10k1k

FREQUENCY – Hz

OP176

Figure 19. Voltage Noise Density vs. Frequency

100

90

V

OUT

(50mV/DIV)

10

0%

50mV

TIME –100ns/DIV

100nS

Figure 20. Small Signal Transient Response

Figure 21. Current Noise Density vs. Frequency

100

90

V

OUT

(5V/DIV)

10

0%

5V

TIME – 500ns/DIV

500nS

Figure 22. Large Signal Transient Response

REV. 0

–7–