ANALOG DEVICES EVAL-AD7472CB Service Manual
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Evaluation Board for 12-bit high speed,
a
low power, successive-approximation ADC
FEATURES
Full-Featured Evaluation Board for the AD7472
EVAL-CONTROL BOARD Compatible
HSC-INTERFACE BOARD Compatible
Stand Alone Capability
On-Board Analog Buffering and Reference
Optional On-Board Analog Bias-Up Circuit
Optional On-Board Burst Clock Generator Circuit
Various Linking Options
PC Software for Control and Data Analysis when used
with EVAL-CONTROL BOARD
INTRODUCTION
This Technical Note describes the evaluation board for the
AD7472 12-bit, high speed, low power, successive approximation A/D converter that operates from a single 2.7 V to
5.25 V supply. Full data on the AD7472 is available in the
AD7472 data sheet available from Analog Devices and
should be consulted in conjunction with this Technical Note
when using the Evaluation Board.
On-board components include an AD780 which is a pin
programmable +2.5 V or +3 V ultra high precision bandgap
reference, two AD797 op-amps used to buffer the analog
input, and an OP07 op-amp used to buffer the DC bias
voltage applied to the optional analog input bias-up circuit.
There are various link options which are explained in detail
on page 2.
Interfacing to this board is through a 96-way connector. This
96-way connector is compatible with the EVAL-CONTROL
BOARD which is also available from Analog Devices.
External sockets are provided for the CONVST input,
CLKIN input and the VIN inputs.
FUNCTIONAL BLOCK DIAGRAM
EVAL-AD7472CB
OPERATING THE AD7472 EVALUATION BOARD
Power Supplies
When using this evaluation board with the EVAL-CONTROL BOARD all supplies are provided from the EVALCONTROL BOARD through the 96 way connector.
When using the board as a stand alone unit or with the HSCINTERFACE BOARD, external supplies must be provided.
This evaluation board has five power supply inputs: V
A
, VSS, V
GND
V
input to supply the AVDD and DVDD pins on the AD7472,
DD
DRIVE
and D
. +5 V must be connected to the
GND
the AD780 voltage reference, the positive supply pin of all
three op-amps and the digital control logic. 0 V is connected
to the A
input. -5 V must be connected to the VSS input to
GND
supply the negative supply pins on all three op-amps. The
V
input can be used to provide an external voltage for the
DRIVE
output drivers on the AD7472. If an external V
supplied, it is referenced to the D
input which should be
GND
tied to 0 V. The supplies are decoupled to the relevant ground
plane with 47µF tantalum and 0.1µF multilayer ceramic
capacitors at the point where they enter the board. The supply
pins of the op-amps and reference are also decoupled to A
with a 10µF tantalum and a 0.1µF ceramic capacitor. The
AD7472 AV
supply pin is decoupled to A
DD
with 10uF
GND
tantalum and 0.1µF multilayer ceramic capacitors. The
AD7472 DV
10uF tantalum capacitors and to D
and VDRIVE pins are decoupled to A
DD
with 0.1µF multilayer
GND
GND
ceramic capacitors.
Extensive ground planes are used on this board to minimize
the effect of high frequency noise interference. There are two
ground planes, A
GND
and D
. These are connected at one
GND
location close to the AD7472.
DRIVE
with
DD
is
GND
,
Unipolar
Ain
Buffer
Bipolar
Ain
Bias-up
buffer
Reference
Power Supply Circuit
AD7472 ADC
Vin
Refin
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
40 pin HSC interface
Data Bus
Control Lines
Generator
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
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EV AL-AD7472CB
Analog Input Section
The analog input section of this evaluation board accommodates unipolar and bipolar signals. Unipolar signals within the
AD7472 analog input signal range of 0 V - 2.5 V are connected via SK5. They are then buffered by the on-board buffer before
being applied to the VIN pin of the AD7472. Bipolar signals are connected via SK3 and are biased up by the on-board biasup buffer circuit before being applied to the VIN pin of the AD7472. The input impedence of the bias-up circuit is 50W which
is determined by the value of R7. The input impedence may be modified by removing/changing the value of R7. To obtain
optimum performance from this evaluation board the use of an impedence matched, passive filter is recommended before the
analog signal is applied to the evaluation board. For example, when using a 100KHz input tone, a 100KHz 50W filter from
TTE (part number KC5-100K-15K-50/50-720B) is suitable.
R8 Potentiometer (50Kohm)
This variable resistor is used to trim the DC bias voltage applied to the optional analog input bias-up circuit. This bias voltage
is factory preset to 1.25 V which biases a bipolar signal to swing around the midpoint of the analog input range (0 - 2.5 V).
If any adjustment is required, the user can use the histogram window in the eval-board software to analyze the DC voltage
variation while adjusting the trim pot. To view this properly, an analog input signal should not be applied to the board. Under
normal operation this pot should not be adjusted as it is preset for optimum performance.
LINK AND SWITCH OPTIONS
There are 11 link options which must be set for the required operating setup before using the evaluation board. The functions
of these options are outlined below.
Link No. Function.
LK1 This link is used to select the DC bias voltage to be applied to the optional Vin bias-up circuit.
If the user is using the bias-up circuit, this link must be inserted which will apply the 2.7 V reference voltage
to the bias-up circuit. This causes a bipolar signal (applied to the bipolar vin input socket) to be biased up
around +1.25 V before it is applied to the AD7472 VIN pin. - see also LK10 (below)
If the bias up circuit is not being used this link should be removed.
LK2 This link must be in position "A" if external power supplies are being used. In this position the control logic
is being powered by the voltage applied to the VDD input.
When power is being supplied from the EVAL-CONTROL BOARD, this link can be moved to position "B"
if the user wants to drive the control logic from a separate +5 V which is generated on the EVAL-CONTROL
BOARD.
LK3 This link option selects the source of the CLKIN input.
When this link is in position "A" the CLKIN input is provided by the EVAL-CONTROL BOARD.
When this link is in position "B" the CLKIN input is provided via the on-board 25MHz oscillator.
When this link is in position "C", an external CLKIN signal must be provided via SK1.
When using the on-board generated burst clock, this link must be in position "D".
LK4 This link option selects the source of the CONVST input.
When this link is in position "A" the CONVST input is provided by the EVAL-CONTROL BOARD.
When this link is in position "B" the CONVST input is provided via the external socket, SK2.
LK5 This link option selects the source of the RD input.
When this link is in position "A" the RD input is provided by the EVAL-CONTROL BOARD.
When this link is in position "B" the RD input is tied to GND. This option must be selected while using the
High Speed Converter Interface Board.
LK6 This link option selects the source of the CS input.
When this link is in position "A" the CS input is provided by the EVAL-CONTROL BOARD.
When this link is in position "B" the CS input is tied to GND. This option must be selected while using the
High Speed Converter Interface Board.
LK7 This link option sets the voltage applied to the VDRIVE pin on the AD7472.
When this link is in position "A", VDRIVE is connected directly to the DVDD pin.
When this link is in position "B", an external voltage must be applied to the VDRIVE pin Via J3.
LK8 This link selects the source of the V
When this link is in position "A" V
When this link is in position "B" V
LK9 This link selects the source of the V
When this link is in position "A" V
When this link is in position "B" V
LK10 This link must be in position "A" if a bipolar AIN signal is being applied to the bipolar Vin socket, SK3.
This link must be in position "B" if a unipolar AIN signal is being applied to the unipolar Vin socket, SK5
Continued on next page
supply.
DD
must be supplied from an external source via J2.
DD
is supplied from the EVAL-CONTROL BOARD.
DD
supply.
SS
must be supplied from an external source via J2.
SS
is supplied from the EVAL-CONTROL BOARD.
SS
–2–
REV. A
EV AL-AD7472CB
LK11 This link is used to provide a clock signal path to the burst mode circuit generator from either the on-board
clock oscillator or from an extermnal clock source via SK1.
In position "A" the master clock signal is provided from the on-board crystal oscillator.
In position "B" the master clock signal must be provided from an external source via SK1.
SET-UP CONDITIONS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the
required operating mode. Table I shows the position in which all the links are set when the evaluation board is sent out. All
links are set for use with the EVAL-CONTROL BOARD.
Table I. Initial Link and Switch Positions
Link No. Position Function.
LK 1 Inserted Provides DC bias voltage to the analog bias-up circuit.
LK2 A The digital logic circuitry is powered from the same voltage as the AD7472.
LK3 A CLKIN signal is provided by the EVAL-CONTROL BOARD via J1.
LK4 A CONVST signal is provided by the EVAL-CONTROL BOARD via J1.
LK5 A RD signal is provided by the EVAL-CONTROL BOARD via J1.
LK6 A CS signal is provided by the EVAL-CONTROL BOARD via J1.
LK7 A AD7472 VDRIVE pin is connected to the AD7472 DVDD pin.
LK8 B V
LK9 B V
LK10 A The AD7472 Vin pin is connected to the output of the bias-up circuit.
LK11 A Master clock for burst clock generator is provided from the on-board clock oscillator.
is supplied by the EVAL-CONTROL BOARD via J1.
DD
is supplied by the EVAL-CONTROL BOARD via J1.
SS
REV. A
–3–
EV AL-AD7472CB
EVAL-CONTROL BOARD INTERFACING
Interfacing to the EVAL-CONTROL BOARD is via a 96way connector, J1. The pinout for the J1 connector is shown
in Figure 2 and its pin designations are given in Table II.
1
A
B
C
1
Figure 2. Pin Configuration for the 96-Way
Connector, J1
96-Way Connector Pin Description
32
32
D0-D11 Data Bit 0 to Data Bit 11. Three-state TTL
outputs. D11 is the MSB.
SCLK0 Serial Clock Zero. This continuous clock can be
connected to the CLKIN pin of the AD7472 via
LK3.
+5VD Digital +5 V supply. This can be used to provide
a separate +5 V supply for the digital logic if
required via LK2.
RD Read. This is an active low logic input connected
to the RD pin of the AD7472 via LK5.
CS Chip Select. This is an active low logic input
connected to the CS pin of the AD7472 via LK6.
FL0 Flag zero. This logic input is connected to the
CONVST input of the AD7472 via LK4.
IRQ2 Interrupt Request 2. This is a logic output and is
connected to the BUSY logic output on the
AD7472.
DGND Digital Ground. These lines are connected to
the digital ground plane on the evaluation
board. It allows the user to provide the digital
supply via the connector along with the other
digital signals.
AGND Analog Ground. These lines are connected to
the analog ground plane on the evaluation
board.
AV
SS
Negative Supply Voltage. This provides a nega-
tive supply to the on-board op-amps via LK9.
AV
DD
Positive Supply Voltage. This provides a positive
supply to the op-amps, the reference, the AD7472
and the digital logic.
When interfacing directly to the EVAL-CONTROL BOARD,
all power supplies and control signals are generated by the
EVAL-CONTROL BOARD. However, due to the nature of
the DSP interface on the EVAL-CONTROL BOARD,
AD7472 sampling rates greater than 400 KHz are not
supported when interfacing the EVAL-AD7472CB directly
to the EVAL-CONTROL BOARD. To achieve sample rates
greater than 400 KHz, the HSC-INTERFACE BOARD
must be used. The HSC-INTERFACE BOARD is a board
designed to interface between evaluation boards for high
speed analog-to-digital converters and the EVAL-CONTROL BOARD. It can be ordered from Analog Devices
through the normal channels using the part number "HSCINTERFACE BOARD".
Table II. 96-Way Connector Pin Functions.
ROW A ROWB ROWC
1
2D0
3D1
4 DGND DGND DGND
5D2
6D3
7 SCLK0 D4 SCLK0
8 +5VD +5VD +5VD
9 RD D5
10 D6 CS
11 D7
12 DGND DGND DGND
13 D8
14 D9
15 D10
16 DGND DGND DGND
17 FL0 D11 IRQ2
18
19
20 DGND DGND DGND
21 AGND AGND AGND
22 AGND AGND AGND
23 AGND AGND AGND
24 AGND AGND AGND
25 AGND AGND AGND
26 AGND AGND AGND
27 AGND
28 AGND
29 AGND AGND AGND
30 AGND
31 AVSS AVSS AVSS
32 AVDD AVDD AVDD
Note : The unused pins of the 96-way connector are not shown.
–4–
REV. A
HIGH SPEED CONVERTER (HSC) BOARD
INTERFACING
Interfacing to the HSC BOARD is via a 40-way connector,
J4. The pinout for the J4 connector is shown in Figure 3 and
its pin designations are given in Table III.
39
40
Figure 3. Pin Configuration for the 40-pin HSC
Interface Connector, J1
40-Way Connector Pin Description
D0-D11 Data Bit 0 to Data Bit 11. Three-state TTL
outputs. D11 is the MSB.
BUSY BUSY. This is a logic output and is connected to
the BUSY logic output on the AD7472 via an
inverting buffer.
GND Ground. These lines are connected to
the digital ground plane on the evaluation
board.
When interfacing to the High Speed Converter Interface
board, all required power supplies must be supplied from
external sources via the power terminal, J2.
The CLKIN signal can be generated on-board (using the
crystal oscillator or the burst clock generator circuit) or
provided externally via SK1.
The RD and CS inputs to the AD7472 must all be tied low
using LK5 and LK6 respectively.
The CONVST signal must be provided externally via SK1.
Due to the 25 MHz on-board crystal (not the maximum of
26 MHz as specified in the datasheet) the throughput rate will
not meet the maximum datasheet specification of 1.5 MSPS.
1
2
EV AL-AD7472CB
Table III. HSC Interface Connector Pin Functions.
Pin No. Function Pin No. Function
1 D11 2 GN D
3 D10 4 GN D
5 D9 6 GND
7 D8 8 GND
9 D7 10 GND
11 D6 12 GND
13 D5 14 GND
15 D4 16 GND
17 D3 18 GND
19 D2 20 GND
21 D1 22 GND
23 D0 24 GND
25 N/ C 26 G ND
27 N/ C 28 G ND
29 N/ C 30 G ND
31 N/ C 32 G ND
33 BUSY 34 GND
35 N/ C 36 G ND
37 N/ C 38 G ND
39 N/ C 40 G ND
N/C = Not Connected.
Refer to the documentation included with the HSC-INTERFACE BOARD for more information. Note, the HSCINTERFACE BOARD was designed for other high speed
ADC devices but it is compatible with the AD7472 evaluation system.
REV. A
–5–
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