Analog Devices AD7845SE-883B, AD7845AQ, AD7845KR, AD7845KP, AD7845KN Datasheet
...
REV. B
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which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
LC2MOS
Complete 12-Bit Multiplying DAC
AD7845
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
1. Voltage Output Multiplying DAC
The AD7845 is the first DAC which has a full 4-quadrant
multiplying capability and an output amplifier on chip. All
specifications include amplifier performance.
2. Matched Application Resistors
Three application resistors provide an easy facility for gain
ranging, voltage offsetting, etc.
3. Space Saving
The AD7845 saves space in two ways. The integration of the
output amplifier on chip means that chip count is reduced.
The part is housed in skinny 24-lead 0.3" DIP, 28-terminal
LCC and PLCC and 24-terminal SOIC packages.
GENERAL DESCRIPTION
The AD7845 is the industry’s first 4-quadrant multiplying D/A
converter with an on-chip amplifier. It is fabricated on the
LC
2
MOS process, which allows precision linear components
and digital circuitry to be implemented on the same chip.
The 12 data inputs drive latches which are controlled by standard CS and WR signals, making microprocessor interfacing
simple. For stand-alone operation, the CS and WR inputs can
be tied to ground, making all latches transparent. All digital
inputs are TTL and 5 V CMOS compatible.
The output amplifier can supply ±10 V into a 2 kΩ load. It is
internally compensated, and its input offset voltage is low due to
laser trimming at wafer level. For normal operation, R
FB
is tied
to V
OUT
, but the user may alternatively choose RA, RB or RC to
scale the output voltage range.
FEATURES
12-Bit CMOS MDAC with Output Amplifier
4-Quadrant Multiplication
Guaranteed Monotonic (T
MIN
to T
MAX
)
Space-Saving 0.3" DIPs and 24- or 28-Terminal Surface
Mount Packages
Application Resistors On Chip for Gain Ranging, etc.
Low Power LC
2
MOS
APPLICATIONS
Automatic Test Equipment
Digital Attenuators
Programmable Power Supplies
Programmable Gain Amplifiers
Digital-to-4–20 mA Converters
(VDD = +15 V, ⴞ 5%, VSS = –15 V, ⴞ 5%, V
REF
= +10 V, AGND = DGND = O V,
V
OUT
connected to RFB. V
OUT
load = 2 k⍀, 100 pF. All specifications T
MIN
to T
MAX
unless otherwise noted.)
REV. B–2–
AD7845–SPECIFICATIONS
1
Parameter J Version K Version A Version B Version S Version T Version Units Test Conditions/Comments
ACCURACY
Resolution 12 12 12 12 12 12 Bits 1 LSB =
V
REF
2
12
= 2.4 mV
Relative Accuracy
at +25°C ±1 ±1/2 ±1 ±1/2 ±1 ±1/2 LSB max All Grades Are Guaranteed
T
MIN
to T
MAX
±1 ±3/4 ±1 ±3/4 ±1 ±3/4 LSB max Monotonic over Temperature
Differential Nonlinearity ±1 ±1 ±1 ±1 ±1 ±1 LSB max DAC Register Loaded with
Zero Code Offset Error All 0s.
at +25°C ±2 ±1 ±2 ±1 ±2 ±1mV max
T
MIN
to T
MAX
±3 ±2 ±3 ±2 ±4 ±3mV max
Offset Temperature Coefficient;
(∆Offset/∆Temperature)
2
±5 ±5 ±5 ±5 ±5 ±5 µV/°C typ
Gain Error ±3 ±2 ±3 ±2 ±3 ±2 LSB max R
FB
, V
OUT
Connected
±6 ±6 ±6 ±6 ±6 ±6 LSB max R
C
, V
OUT
Connected, V
REF
= +5 V
±6 ±6 ±6 ±6 ±6 ±6 LSB max R
B
, V
OUT
Connected, V
REF
= +5 V
±7 ±7 ±7 ±7 ±7 ±7 LSB max R
A
, V
OUT
Connected, V
REF
= +2.5 V
Gain Temperature Coefficient;
(∆Gain/∆Temperature)
2
±2 ±2 ±2 ±2 ±2 ±2 ppm of FSR/°CR
FB
, V
OUT
Connected
typ
REFERENCE INPUT
Input Resistance, Pin 17 8888 88 kΩ min Typical Input Resistance = 12 kΩ
16 16 16 16 16 16 kΩ max
APPLICATION RESISTOR
RATIO MATCHING 0.5 0.5 0.5 0.5 0.5 0 5 % max Matching Between RA, RB, R
C
DIGITAL INPUTS
V
IH
(Input High Voltage) 2.4 2.4 2.4 2.4 2.4 2.4 V min
V
IL
(Input Low Voltage) 0.8 0.8 0.8 0.8 0.8 0.8 V max
I
IN
(Input Current) ±1 ±1 ±1 ±1 ±1 ±1 µA max Digital Inputs at 0 V and V
DD
CIN (Input Capacitance)27777 77 pF max
POWER SUPPLY
4
VDD Range 14.25/15.75 14.25/15.75 14.25/15.75 14.25/15.75 14.25/15.75 14.25/15.75 V min/V max
V
SS
Range –14.25/–15.75 –14.25/–15.75 –14.25/–15.75 –14.25/–15.75 –14.25/–15.75 –14.25/–15.75 V min/V max
Power Supply Rejection
∆Gain/∆V
DD
±0.01 ±0.01 ±0.01 ±0.01 ±0.01 ±0.01 % per % max VDD = +15 V ± 5%, V
REF
= –10 V
∆Gain/∆V
SS
±0.01 ±0.01 ±0.01 ±0.01 ±0.01 ±0.01 % per % max VSS = –15 V ± 5%.
I
DD
6666 66 mA maxV
OUT
Unloaded
I
SS
4444 44 mA maxV
OUT
Unloaded
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for Design Guidance and are not subject to test.
DYNAMIC PERFORMANCE
Output Voltage Settling Time 5555 55 µs max To 0.01% of Full-Scale Range
V
OUT
Load = 2 kΩ, 100 pF.
DAC Register Alternately Loaded
with All 0s and All 1s. Typically
2.5 µs at 25°C.
Slew Rate 11 11 11 11 11 11 V/µs typ V
OUT
Load = 2 kΩ, 100 pF.
Digital-to-Analog 55 55 55 55 55 55 nV–s typ Measured with V
REF
= 0 V.
Glitch Impulse DAC Register Alternately Loaded
with All 0s and All 1s.
Multiplying Feedthrough 5555 55 mV p-p typ V
REF
= ±10 V, 10 kHz Sine Wave
Error
3
DAC Register Loaded with All 0s.
Unity Gain Small Signal
Bandwidth 600 600 600 600 600 600 kHz typ V
OUT
, RFB Connected. DAC Loaded
with All 1s V
REF
= 100 mV p-p
Sine Wave.
Full Power Bandwidth 175 175 175 175 175 175 kHz typ V
OUT
, RFB Connected. DAC Loaded
with All 1s. V
REF
= 20 V p-p
Sine Wave. R
L
= 2 kΩ.
Total Harmonic Distortion –90 –90 –90 –90 –90 –90 dB typ V
REF
= 6 V rms, 1 kHz Sine Wave.
OUTPUT CHARACTERISTICS
5
Open Loop Gain 85 85 85 85 85 85 dB min V
OUT
, RFB Not Connected
V
OUT
= ±10 V, RL = 2 kΩ
Output Voltage Swing ±10 ±10 ±10 ±10 ±10 ±10 V min R
L
= 2 kΩ, C
L
= 100 pF
Output Resistance 0.2 0.2 0.2 0.2 0.2 0.2 Ω typ R
FB
, V
OUT
Connected,
Short Circuit Current @ +25°C 11 11 11 11 11 11 mA typ V
OUT
Shorted to AGND
Output Noise Voltage Includes Noise Due to Output
(0.1 Hz to 10 Hz) @ +25°C2222 22 µV rms typ Amplifier and Johnson Noise
f = 10 Hz 250 250 250 250 250 250 nV/√Hz typ of R
FB
f = 100 Hz 100 100 100 100 100 100 nV/√Hz typ
f = 1 kHz 50 50 50 50 50 50 nV/√Hz typ
f = 10 kHz 50 50 50 50 50 50 nV/√Hz typ
f = 100 kHz 50 50 50 50 50 50 nV/√Hz typ
NOTES
1
Temperature ranges are as follows: J, K Versions: 0°C to +70°C; A, B Versions: –40°C to +85°C; S, T Versions: –55°C to +125°C.
2
Guaranteed by design and characterization, not production tested.
3
The metal lid on the ceramic D-24A package is connected to Pin 12 (DGND).
4
The device is functional with a power supply of ±12 V.
5
Minimum specified load resistance is 2 kΩ.
Specifications subject to change without notice.
AD7845
REV. B –3–
Limit at T
MIN
to T
MAX
Parameter (All Versions) Units Test Conditions/Comments
t
CS
30 ns min Chip Select to Write Setup Time
t
CH
0 ns min Chip Select to Write Hold Time
t
WR
30 ns min Write Pulsewidth
t
DS
80 ns min Data Setup Time
t
DH
0 ns min Data Hold Time
NOTES
1
Guaranteed by design and characterization, not production tested.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1
(VDD = +15 V, ⴞ 5%. VSS = –15 V, ⴞ 5%. V
REF
= +10 V. AGND = DGND = O V.)
ORDERING GUIDE
1
Relative
Temperature Accuracy Package
Model
2
Range @ +25ⴗC Option
3
AD7845JN 0°C to +70°C ±1 LSB N-24
AD7845KN 0°C to +70°C ±1/2 LSB N-24
AD7845JP 0°C to +70°C ±1 LSB P-28A
AD7845KP 0°C to +70°C ±1/2 LSB P-28A
AD7845JR 0°C to +70°C ±1 LSB R-24
AD7845KR 0°C to +70°C ±1/2 LSB R-24
AD7845AQ –40°C to +85°C ±1 LSB Q-24
AD7845BQ –40°C to +85°C ±1/2 LSB Q-24
AD7845AR –40°C to +85°C ±1 LSB R-24
AD7845BR –40°C to +85°C ±1/2 LSB R-24
AD7845SQ/883B –55°C to +125°C ±1 LSB Q-24
AD7845TQ/883B –55°C to +125°C ±1/2 LSB Q-24
AD7845SE/883B –55°C to +125°C ±1 LSB E-28A
NOTES
1
Analog Devices reserves the right to ship either ceramic (D-24A) or cerdip
(Q-24) hermetic packages.
2
To order MIL-STD-883, Class B processed parts, add /883B to part number.
3
E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7845 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Operating Temperature Range
Commercial (J, K Versions) . . . . . . . . . . . . . 0°C to +70°C
Industrial (A, B Versions) . . . . . . . . . . . . –40°C to +85°C
Extended (S, T Versions) . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect device
reliability. Only one Absolute Maximum Rating may be applied at any one time.
2
V
OUT
may be shorted to AGND provided that the power dissipation of the
package is not exceeded.
CS
WR
DATA
5V
0V
5V
0V
5V
0V
NOTES
1. ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM
10% TO 90% OF +5V. t
R
= tF = 20ns.
2. TIMING MEASUREMENT REFERENCE LEVEL IS
V
IH
+ V
IL
2
t
CS
t
CH
t
WR
t
DStDH
Figure 1. AD7845 Timing Diagram
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise stated)
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +17 V
V
SS
to DGND . . . . . . . . . . . . . . . . . . . . . . . .+0.3 V to –17 V
V
REF
to AGND . . . . . . . . . . . . . . . . VDD + 0.3 V, VSS – 0.3 V
V
RFB
to AGND . . . . . . . . . . . . . . . . VDD + 0.3 V, VSS – 0.3 V
V
RA
to AGND . . . . . . . . . . . . . . . . .VDD + 0.3 V, VSS – 0.3 V
V
RB
to AGND . . . . . . . . . . . . . . . . .VDD + 0.3 V, VSS – 0.3 V
V
RC
to AGND . . . . . . . . . . . . . . . . . VDD + 0.3 V, VSS – 0.3 V
V
OUT
to AGND2 . . . . . . . . . . . . . . . VDD + 0.3 V, VSS – 0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
Digital Input Voltage to DGND . . . . . –0.3 V to VDD + 0.3 V
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW
Derates above +75°C . . . . . . . . . . . . . . . . . . . . . 10 mW/°C
WARNING!
ESD SENSITIVE DEVICE
AD7845
REV. B
–4–
PIN CONFIGURATIONS
LCC
PLCC
DIP, SOIC
DIGITAL-TO-ANALOG GLITCH IMPULSE
This is the amount of charge injected from the digital inputs to
the analog output when the inputs change state. This is normally specified as the area of the glitch in either pA-secs or
nV-secs depending upon whether the glitch is measured as a
current or voltage. The measurement takes place with V
REF
=
AGND.
DIGITAL FEEDTHROUGH
When the DAC is not selected (i.e., CS is high) high frequency
logic activity on the device digital inputs is capacitively coupled
through the device to show up as noise on the V
OUT
pin. This
noise is digital feedthrough.
MULTIPLYING FEEDTHROUGH ERROR
This is ac error due to capacitive feedthrough from the V
REF
terminal to V
OUT
when the DAC is loaded with all 0s.
OPEN-LOOP GAIN
Open-loop gain is defined as the ratio of a change of output
voltage to the voltage applied at the V
REF
pin with all 1s loaded
in the DAC. It is specified at dc.
UNITY GAIN SMALL SIGNAL BANDWIDTH
This is the frequency at which the magnitude of the small signal
voltage gain of the output amplifier is 3 dB below unity. The
device is operated as a closed-loop unity gain inverter (i.e.,
DAC is loaded with all 1s).
OUTPUT RESISTANCE
This is the effective output source resistance.
FULL POWER BANDWIDTH
Full power bandwidth is specified as the maximum frequency, at
unity closed-loop gain, for which a sinusoidal input signal will
produce full output at rated load without exceeding a distortion
level of 3%.
TERMINOLOGY
LEAST SIGNIFICANT BIT
This is the analog weighting of 1 bit of the digital word in a
DAC. For the AD7845, 1 LSB =
V
REF
2
12
.
RELATIVE ACCURACY
Relative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for both endpoints (i.e., offset and gain error are adjusted out) and is normally expressed in least significant bits or
as a percentage of full-scale range.
DIFFERENTIAL NONLINEARITY
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of +1 LSB max over
the operating temperature range ensures monotonicity.
GAIN ERROR
Gain error is a measure of the output error between an ideal
DAC and the actual device output with all 1s loaded after offset
error has been adjusted out. Gain error is adjustable to zero
with an external potentiometer. See Figure 13.
ZERO CODE OFFSET ERROR
This is the error present at the device output with all 0s loaded
in the DAC. It is due to the op amp input offset voltage and
bias current and the DAC leakage current.
TOTAL HARMONIC DISTORTION
This is the ratio of the root-mean-square (rms) sum of the harmonics to the fundamental, expressed in dBs.
OUTPUT NOISE
This is the noise due to the white noise of the DAC and the
input noise of the amplifier.
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