Analog Devices AD7322 pri Datasheet
Software Selectable True Bipolar Input,
Preliminary Technical Data
FEATURES
• 12-Bit Plus Sign SAR ADC
• True Bipolar Analog Inputs
• Software Selectable Input Ranges
± 10V, ± 5V, ± 2.5V, 0 to 10V
• Two Analog Inputs with Channel Sequencer
• Single Ended, True Differential and Pseudo Differential
Capability.
• High Analog Input Impedance
• Low Power:- 12 mW
• Full Power Signal Bandwidth: >7 MHz
• Internal 2.5 V Reference
• High Speed Serial Interface
• Power Down Modes
• 14-Lead TSSOP
• iCMOS
• For 8 and 4 channel equivalent devices see AD7328 and
GENERAL DESCRIPTION
The AD7322 is a 2-Channel, 12-Bit plus Sign Successive
Approximation ADC. The ADC has a high speed serial interface
that can operate at throughput rates up to 1 MSPS.
The AD7322 can accept true bipolar Analog Input signals. The
AD7322 has four software selectable inputs Ranges, ±10V, ±5V,
±2.5V and 0 to 10V. Each analog input channel can be
independently programmed to one of the four input ranges.
The Analog input channels on the AD7322 can be programmed
to be Single-Ended, true Differential or Pseudo Differential.
TM
Process Technology
AD7324 respectively.
2-Channel, 12-Bit Plus Sign ADC
AD7322*
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
PRODUCT HIGHLIGHTS
1. The AD7322 can accept True Bipolar Analog Input signals,
±10V, ±5V, ±2.5V and 0 to 10V unipolar signals.
2. The Two Analog Inputs can be configured as Two SingleEnded inputs, One True Differential or One Pseudo Differential
Input. The AD7322 has high Impedance Analog Inputs.
3. The AD7322 features a High Speed Serial Interface.
Throughput Rates up to 1 MSPS can be achieved on the
AD7322.
4. Low Power, 26 mW at maximum throughput rate of 1 MSPS.
The AD7322 contains a 2.5V Internal reference. The AD7322
also allows for external Reference operation. If a 3V reference is
applied the REF
±12V Analog Input. Minimum V
pin the AD7322 can accept a true Bipolar
IN/OUT
and VSS supplies of ±12V are
DD
required for the ±12V Input Range.
Device Number Number of Bits Number of Channels
AD7328 12-Bits Plus Sign 8
AD7324 12-Bits Plus Sign 4
* Protected by U.S. Patent No. 6,731,232
TM
Process Technology
iCMOS
For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher-voltage levels, iCMOS is a technology platform
that enables the development of analog ICs capable of 30V and operating at +/- 15V supplies while allowing dramatic reductions in power consumption and package size, and
increased AC and DC performance.
Rev. PrI
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
AD7322 Preliminary Technical Data
TABLE OF CONTENTS
AD7322—Specifications.................................................................. 3
Absolute Maximum Ratings............................................................ 7
Pin Functional Descriptions ....................................................... 8
Terminology ...................................................................................... 9
REVISION HISTORY
Revision PrI: Preliminary Version
Theory of Operation.................................................................. 10
AD7322 Registers ........................................................................... 13
Serial interface ................................................................................ 18
OUTLINE DIMENSIONS.................................................................. 19
Rev. PrI | Page 2 of 19
AD7322 Preliminary Technical Data
AD7322—SPECIFICATIONS
Table 1. Unless otherwise noted, VDD = + 12V to +16.5V, VSS = -12V to –16.5V, VCC = 2.7V to 5.25V, V
2.5V Internal/External, f
Parameter Specification Units Test Conditions/Comments
DYNAMIC PERFORMANCE F
Signal to Noise Ratio (SNR)
Signal to Noise + Distortion (SINAD)2 75 dB min Differential Mode
71.5 dB min Single-Ended/Pseudo Differential Mode
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
2
(SFDR)
Intermodulation Distortion (IMD)
Second Order Terms -88 dB typ
Third Order Terms
Aperature Delay
Aperature Jitter2
2
Common Mode Rejection (CMRR)
Channel-to-Channel Isolation
Full Power Bandwidth
DC ACCURACY
Resolution 12+Sign Bits
Integral Nonlinearity
Differential Nonlinearity
Offset Error3 ±8 LSB max Unipolar Range with Straight Binary output coding
Offset Error Match2 ±0.5 LSB max
Gain Error
Gain Error Match
2
2
Positive Full-Scale Error
Positive Full Scale Error Match
Bipolar Zero Error
2
Bipolar Zero Error Match
Negative Full Scale Error2 ±4 LSB max
Negative Full Scale Error Match
ANALOG INPUT
Input Voltage Ranges
(Programmed via Range Register)
DC Leakage Current ±10 nA max
Input Capacitance 12 pF typ When in Track, ±10V Range
15 pF typ When in Track, ±5V, 0 to 10V Range
20 pF typ When in Track, ±2.5V Range
3 pF typ When in Hold
REFERENCE INPUT/OUTPUT
Input Voltage Range +2.5 to +3V V min to max
Input DC Leakage Current ±1 µA max
Input Capactiance 20 pF typ
Reference Output Voltage 2.49/2.51 Vmin/max
Reference Temperature Coefficient 25 ppm/°Cmax
10 ppm/°Ctyp
= 20 MHz, fS = 1 MSPS TA = T
SCLK
2
2
2
2
2
2
2
2
2
2
2
1
= 2.7V to 5.25V, V
DRIVE
to T
MAX
MIN
= 50 kHz Sine Wave
IN
76 dB min Differential Mode
72 dB min Single-Ended /Pseudo Differential Mode
-80 dB max
-80
F
dB max
= 40.1 kHz, Fb = 41.5 kHz
a
-88 dB typ
10 ns max
50 ps typ
2
TBD dB typ
-80 dB typ F
7
1.5
MHz typ
MHz typ
= 400 kHz
IN
@ 3 dB
@ 0.1 dB
±1.5 LSB max
± 0.95 LSB max Guaranteed No Missing Codes to 13-Bits
±6 LSB max
±0.6 LSB max
±3 LSB max Bipolar Range with Twos Complement Output Coding
±0.6 LSB max
±8 LSB max
±0.5 LSB max
±0.5 LSB max
±10V
±5V
±2.5V
0 to 10V
Volts V
= +10V min , VSS = -10V min, VCC = 2.7V to 5.25V
DD
V
= +5V min, VSS = -5V min, VCC = 2.7V to 5.25V
DD
V
= +5V min, VSS = - 5V min, VCC = 2.7V to 5.25V
DD
V
= +10V min, VSS = 0 V min, VCC = 2.7V to 5.25V
DD
See Table 5
REF
=
Rev. PrI | Page 3 of 19
AD7322 Preliminary Technical Data
Parameter Specification Units Test Conditions/Comments
Reference Output Impedance 25
Ω typ
LOGIC INPUTS
Input High Voltage, V
Input High Voltage, V
2.4 V min
INH
0.8 V max V
INL
o.4 V max V
Input Current, IIN ± 1 µA max VIN = 0V or VCC
Input Capacitance, C
3
IN
10 pF max
LOGIC OUTPUTS
Output High Voltage, VOH V
- 0.2V V min I
DRIVE
Output Low Voltage, VOL 0.4 V max I
Floating State Leakage Current ±1 µA max
Floating State Output Capacitance
Output Coding
3
10 pF max
Straight
Coding bit set to 1 in Control Register
Natural
Binary
Two’s
Coding bit set to 0 in Control Register
Complement
CONVERSION RATE
Conversion Time 800 ns max 16 SCLK Cycles with SCLK = 20 MHz
Track-and-Hold Acquisition Time 200 ns max Sine Wave Input
200 ns max Full Scale Step input
Throughput Rate 1 MSPS max See Serial Interface section
POWER REQUIREMENTS Digital Inputs = 0V or VCC
4
V
DD
4
V
SS
12V/+16.5V V min/max See Table 5
-12V/16.5V V min/max See Table 5
VCC 2.7V / 5.25V V min/max See Table 5
V
2.7V/5.25V V min/max
DRIVE
Normal Mode
IDD 300 µA max V
ISS 370 µA max V
ICC 2 mA max V
Auto-Standby Mode F
IDD TBD µA max
ISS TBD µA max
ICC 1.6 mA typ
Auto-Standby Mode F
IDD TBD µA max
ISS TBD µA max
ICC 1 mA typ
Full Shutdown Mode
IDD 0.9 µA max
ISS 0.9 µA max
ICC 0.9 µA max SCLK On or Off
POWER DISSIPATION
Normal Mode 26 mW max V
12 mW typ V
Full Shutdown Mode 35 µW max V
NOTES
1
Temperature ranges as follows: -40°C to +85°C
2
See Terminology
3
Guaranteed by Characterization
4
Functional from VDD = +4.75V and VSS = -4.75V.
= 4.75 to 5.25 V
CC
= 2.7 to 3.6 V
CC
= 200 µA
SOURCE
= 200 µA
SINK
= +16.5V
DD
= -16.5V
SS
= 5.25V
CC
= TBD
SAMPLE
= TBD
SAMPLE
= +16.5V, VSS = -16.5V, V
DD
= +5V, VSS = -5V, V
DD
= +16.5V, VSS = -16.5V, V
DD
CC
= 5V,
= 5.25V,
CC
= 5.25V,
CC
Rev. PrI | Page 4 of 19
AD7322 Preliminary Technical Data
Specifications subject to change without notice.
Rev. PrI | Page 5 of 19
AD7322 Preliminary Technical Data
TIMING SPECIFICATIONS
Table 2. Unless otherwise noted,
2.5V Internal/External, T
Parameter Limit at T
f
SCLK
10 kHz min
20 MHz max
t
CONVERT
t
50 ns max
QUIET
16×t
t1 10 ns min
t
2
t
3
t
4
10 ns min
20 ns max
TBD ns max Data Access Time after SCLK Falling Edge.
t5 0.4t
t6 0.4t
t
7
t
8
10 ns min SCLK to Data Valid Hold Time
25 ns max SCLK Falling Edge to D
10 ns min SCLK Falling Edge to D
t
9
t
10
TBD ns min DIN set-up time prior to SCLK falling edge
5 ns min DIN hold time after SCLK falling edge
1 µs max Power up from Auto Standby
TBD µs max Power up from Full Shutdown/Auto Shutdown Mode
MIN
ns max T
SCLK
SCLK
ns min SCLK High Pulsewidth
SCLK
VDD = +12V to + 16.5V, VSS = -12V to –16.5V, V
= T
to T
MIN
Unit Description
SCLK
= 1/f
SCLK
Minimum Time between End of Serial Read and Next Falling Edge of CS
Minimum CS Pulse width
CS
to SCLK Setup Time
Delay from CS until D
ns min SCLK Low Pulsewidth
, T
A
MAX
MAX
=2.7V to 5.25, V
CC
Three-State Disabled
OUT
High Impedance
OUT
High Impedance
OUT
=2.7V to 5.25, V
DRIVE
REF
=
Rev. PrI | Page 6 of 19
Figure 2. Serial Interface timing Diagram
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