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AD5398
Datasheet
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Analog Devices AD5398 Datasheet

120 mA, Current Sinking, 10-Bit, I2C DAC

FEATURES

120 mA current sink Available in 8-lead LFCSP package 2-wire (I 10-bit resolution Integrated current sense resistor
2.7 V to 5.5 V power supply Guaranteed monotonic over all codes Power-down to 0.5 µA typical Internal reference Ultralow noise preamplifier Power-down function Power-on reset

CONSUMER/COMMUNICATIONS APPLICATIONS

Lens autofocus Image stabilization Optical zoom Shutters Iris/exposure Neutral density filter NDFs Lens covers Camera phones Digital still cameras Camera modules Digital video cameras (DVCs)/camcorders Camera-enabled devices Security cameras Web/PC cameras

INDUSTRIAL APPLICATIONS

Heater control Fan control Cooler (Peltier) control Solenoid control Valve control Linear actuator control Light control Current loop control
2
C®-compatible) serial interface
AD5398

FUNCTIONAL BLOCK DIAGRAM

V
DD 6
REFERENCE
10-BIT
CURRENT
OUTPUT DAC
2
DGND
Figure 1.
SDA
SCL
PD
3
4
1
AD5398
I2C SERIAL
INTERFACE
5
DGND

GENERAL DESCRIPTION

The AD5398 is a single 10-bit DAC with 120 mA output current sink capability. It features an internal reference, and operates from a single 2.7 V to 5.5 V supply. The DAC is controlled via a 2-wire (I operates at clock rates up to 400 kHz.
The AD5398 incorporates a power-on reset circuit, which ensures that the DAC output powers up to 0 V and remains there until a valid write takes place. It has a power-down feature that reduces the current consumption of the device to 1 µA max.
The AD5398 is designed for autofocus, image stabilization, and optical zoom applications in camera phones, digital still cameras, and camcorders.
The AD5398 also has many industrial applications, such as controlling temperature, light, and movement, over the range
−40°C to +85°C without derating.
2
C address range for the AD5398 is 0x18 to 0x1F
The I inclusive.
2
C-compatible) serial interface that
POWER-ON
RESET
8
R
R
SENSE
3.3Ω
7
AGND
I
SINK
05034-001
Rev. 0
5
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
AD5398
TABLE OF CONTENTS
Specifications..................................................................................... 3
Theory of Operation ...................................................................... 10
AC Characteristics ............................................................................ 4
Timing Characteristics..................................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics............................................. 7
Te r mi n ol o g y ...................................................................................... 9
REVISION HISTORY
12/04—Revision 0: Initial Version
Serial Interface............................................................................ 10
2
I
C Bus Operation ...................................................................... 10
Data Format ................................................................................ 10
Power Supply Bypassing and Grounding................................ 11
Applications..................................................................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Rev. 0 | Page 2 of 16
AD5398

SPECIFICATIONS

VDD = 2.7 V to 5.5 V, AGND = DGND = 0 V, load resistance RL = 25 Ω connected to VDD; all specifications T unless otherwise noted.
Table 1.
B Version
1
Parameter Min Typ Max Unit Test Conditions/Comments
DC PERFORMANCE
= 3.6 V to 4.5 V. Device operates over 2.7 V to 5.5 V
V
DD
with reduced performance. Resolution 10 Bits 117 µA/LSB Relative Accuracy Differential Nonlinearity Zero Code Error Offset Error @ Code 16 Gain Error Offset Error Drift Gain Error Drift
2
2, 4
2
4, 5
2, 5
±1.5 ±4 LSB
2, 3
±1 LSB Guaranteed monotonic over all codes.
0 1 5 mA All 0s loaded to DAC.
2
0.5 mA ±0.6 % of FSR @ 25°C 10 µA/ºC ±0.2 ±0.5 LSB/ºC
OUTPUT CHARACTERISTICS
Minimum Sink Current Maximum Sink Current 120 mA
4
3 mA
= 3.6 V to 4.5 V. Device operates over 2.7 V to 5.5 V, but
V
DD
specified maximum sink current might not be achieved.
Output Current During PD 80 nA PD = 1. Output Compliance
5
0.6 V
DD
V
Output voltage range over which max sink current is
available.
Power-Up Time 20 µs To 10% of FS, coming out of power-down mode. VDD = 5 V.
LOGIC INPUTS (PD)
5
Input Current ±1 µA Input Low Voltage, V Input High Voltage, V
INL
INH
0.8 V VDD = 2.7 V to 5.5 V
0.7 V
V V
DD
= 2.7 V to 5.5 V
DD
Pin Capacitance 3 pF
HYST
5
INL
INH
IN
−0.3 0.3 V
0.7 V
DD
VDD + 0.3
±1 µA V
V
DD
V
= 0 V to V
IN
DD
0.05 VDD V
LOGIC INPUTS (SCL, SDA)
Input Low Voltage, V Input High Voltage, V Input Leakage Current I Input Hysteresis, V Digital Input Capacitance, CIN 6 pF Glitch Rejection
6
50 ns Pulse width of spike suppressed.
POWER REQUIREMENTS
V
DD
2.7 5.5 V IDD (Normal Mode) IDD specification is valid for all DAC codes. VDD = 2.7 V to 5.5 V V
= 2.7 V to 4.5 V
DD
2.5
2.3
4 3
mA mA
= VDD, and VIL = GND, VDD = 5.5 V
V
IH
V
= VDD, and VIL = GND, VDD = 4.5 V
IH
IDD (Power-Down Mode) 0.5 1 µA VIH = VDD, and VIL = GND
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
See the Terminology section.
3
Linearity is tested using a reduced code range: Codes 32 to 1023.
4
To achieve near zero output current, use the power-down feature.
5
Guaranteed by design and characterization; not production tested.
6
Input filtering on both the SCL and SDA inputs suppresses noise spikes that are less than 50 ns.
MIN
to T
MAX
,
Rev. 0 | Page 3 of 16
AD5398

AC CHARACTERISTICS

VDD = 2.7 V to 5.5 V, AGND = DGND = 0 V, load resistance RL = 25 Ω connected to VDD, unless otherwise noted.
Table 2.
B Version
1, 2
Parameter Min Typ Max Unit Test Conditions/Comments
Output Current Settling Time 250 µs
= 5 V, RL = 25 Ω, LL = 680 µH
V
DD
¼ scale to ¾ scale change (0x100 to 0x300) Slew Rate 0.3 mA/µs Major Code Change Glitch Impulse 0.15 nA-s 1 LSB change around major carry Digital Feedthrough
3
0.06 nA-s
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design and characterization; not production tested.
3
See the section. Terminology

TIMING CHARACTERISTICS

VDD = 2.7 V to 5.5 V. All specifications T
Table 3.
Parameter
f
SCL
t
1
t
2
t
3
t
4
t
5
2
t
6
Limit at T
1
(B Version) Unit Conditions/Comments
400 kHz max SCL clock frequency
2.5 µs min SCL cycle time
0.6 µs min t
1.3 µs min t
0.6 µs min t 100 ns min t
0.9 µs max t
MIN
, T
MAX
0 µs min t
7
t
8
t
9
t
10
0.6 µs min t
0.6 µs min t
1.3 µs min t
300 ns max tR, rise time of both SCL and SDA when receiving 0 ns min May be CMOS driven t
11
250 ns max tF, fall time of SDA when receiving 300 ns max tF, fall time of Both SCL and SDA when transmitting 20 + 0.1 C C
b
400 pF max Capacitive load for each bus line
3
b
1
Guaranteed by design and characterization; not production tested.
2
A master device must provide a hold time of at least 300 ns for the SDA signal (referred to the VIH MIN of the SCL signal) in order to bridge the undefined region of SCL’s
falling edge.
3
C
is the total capacitance of one bus line in pF. t
b
MIN
to T
, unless otherwise noted.
MAX
, SCL high time
HIGH
, SCL low time
LOW
, start/repeated start condition hold time
HD,STA
, data setup time
SU,DAT
, data hold time
HD,DAT
, setup time for repeated start
SU,STA
, stop condition setup time
SU,STO
, bus free time between a stop condition and a start condition
BUF
ns min
and tF are measured between 0.3 VDD and 0.7 V
R
DD.
SDA
t
9
SCL
START
CONDITION
t
3
t
4
t
10
t
6
t
11
t
2
t
5
Figure 2. 2-Wire Serial Interface Timing Diagram
t
7
REPEATED
START
CONDITION
t
4
t
1
t
8
STOP
CONDITION
05034-002
Rev. 0 | Page 4 of 16
AD5398

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 4.
Parameter Rating
VDD to AGND –0.3 V to +7 V VDD to DGND –0.3 V to VDD + 0.3 V AGND to DGND –0.3 V to +0.3 V SCL, SDA to DGND –0.3 V to VDD + 0.3 V PD to DGND –0.3 V to VDD + 0.3 V I
to AGND –0.3 V to VDD + 0.3 V
SINK
Operating Temperature Range
Industrial (B Version) –40°C to +85°C Storage Temperature Range –65°C to +150°C Junction Temperature (TJ max) 150°C LFCSP Power Dissipation (TJ max – TA)/θ θJA Thermal Impedance
2
Mounted on 2-Layer Board 84°C/W
Mounted on 4-Layer Board 48°C/W Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
____________________
1
Transient currents of up to 100 mA do not cause SCR latch-up.
2
To achieve the optimum θJA, it is recommended that the AD5398 is soldered on a
4-layer board. The AD5398 comes in an 8-lead LFCSP package with an exposed paddle that should be connected to the same potential as the AD5398 DGND pin.
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
JA

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 16
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