Analog Devices AD537 Datasheet
Integrated Circuit
a
FEATURES
Low Cost A–D Conversion
Versatile Input Amplifier
Positive or Negative Voltage Modes
Negative Current Mode
High Input Impedance, Low Drift
Single Supply, 5 V to 36 V
Linearity: ⴞ0.05% FS
Low Power: 1.2 mA Quiescent Current
Full-Scale Frequency up to 100 kHz
1.00 V Reference
Thermometer Output (1 mV/K)
F-V Applications
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTION
The AD537 is a monolithic V-F converter consisting of an input
amplifier, a precision oscillator system, an accurate internal reference generator and a high current output stage. Only a single
external RC network is required to set up any full-scale (F.S.)
frequency up to 100 kHz and any F.S. input voltage up to
± 30 V. Linearity error is as low as ± 0.05% for 10 kHz F.S., and
operation is guaranteed over an 80 dB dynamic range. The overall temperature coefficient (excluding the effects of external
components) is typically ±30 ppm/°C. The AD537 operates
from a single supply of 5 V to 36 V and consumes only 1.2 mA
quiescent current.
A temperature-proportional output, scaled to 1.00 mV/K,
enables the circuit to be used as a reliable temperature-tofrequency converter; in combination with the fixed reference
output of 1.00 V, offset scales such as 0°C or 0°F can be generated.
The low drift (1 µV/°C typ) input amplifier allows operation
directly from small signals (e.g., thermocouples or strain gages)
while offering a high (250 MΩ) input resistance. Unlike most
V–F converters, the AD537 provides a square-wave output, and
can drive up to 12 TTL loads, LEDs, very long cables, etc.
The excellent temperature characteristics and long-term stability
of the AD537 are guaranteed by the primary bandgap reference
generator and the low T.C. silicon chromium thin film resistors
used throughout.
The device is available in either a 14-lead ceramic DIP or a 10-lead
metal can; both are hermetically sealed packages.
*Protected by Patent Nos. 3,887,963 and RE 30,586.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Voltage-to-Frequency Converter
AD537*
PIN CONFIGURATIONS
D-14 Package H-10A Package
LOGIC GND
LOGIC GND
SYNC
–V
+V
V
TEMP
V
REF
BUF
V
T
V
REFERENCE
R
AD537
DRIVER
CURR-
TO-FREQ
CONV
PRECISION
VOLTAGE
14
13
12
11
10
9
8
OUTPUT
+V
CAP
CAP
V
OS
V
OS
–V
1
2
I
3
IN
4
IN
5
IN
6
7
–V
IN
S
+V
IN
2
3
V
TEMP
S
V
REF
The AD537 is available in three performance/temperature
grades; the J and K grades are specified for operation over the
0°C to +70°C range while the AD537S is specified for operation
over the extended temperature range, –55°C to +125°C.
PRODUCT HIGHLIGHTS
1. The AD537 is a complete V-F converter requiring only an
external RC timing network to set the desired full-scale frequency and a selectable pull-up resistor for the open collector output stage. Any full-scale input voltage range from
100 mV to 10 volts (or greater, depending on +V
accommodated by proper selection of timing resistor. The
full-scale frequency is then set by the timing capacitor from
the simple relationship, f = V/10RC.
2. The power supply requirements are minimal, only 1.2 mA
quiescent current is drawn from a single positive supply from
4.5 volts to 36 volts. In this mode, positive inputs can vary
from 0 volts (ground) to (+V
– 4) volts. Negative inputs can
S
easily be connected for below ground operation.
3. F-V converters with excellent characteristic are also easy to
build by connecting the AD537 in a phase-locked loop. Application particulars are shown in Figure 6.
4. The versatile open-collector NPN output stage can sink up
to 20 mA with a saturation voltage less than 0.4 volts. The
Logic Common terminal can be connected to any level between ground (or –V
) and 4 volts below +VS. This allows
S
easy direct interface to any logic family with either positive or
negative logic levels.
5. The AD537 is available in versions compliant with MILSTD-883. Refer to the Analog Devices Military Product
Databook or current AD537/883B data sheet for detailed
specifications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2000
10
1
AD537
DRIVER
CURR-
TO-FREQ
CONV
BUF
V
PRECISION
T
VOLTAGE
V
R
REFERENCE
4
5
–V
S
(CONNECTED TO CASE)
) can be
S
9
6
CAP
OUTPUT
8
7
+V
CAP
S
AD537–SPECIFICATIONS
Model AD537JH AD537JD AD537KH AD537SH
(typical @ +25ⴗC with VS (total) = 5 V to 36 V, unless otherwise noted)
AD537KD AD537SD
1
1
CURRENT-TO-FREQUENCY CONVERTER
Frequency Range 0 kHz to 150 kHz * * *
Nonlinearity
f
MAX
f
MAX
1
= 10 kHz 0.15% max (0.1% typ) * 0.07% max **
= 100 kHz 0.25% max (0.15% typ) * 0.1% max **
Full-Scale Calibration Error
C = 0.01 µF, I
vs. Supply (f
vs. Temp (T
= 1.000 mA ± 10% max ± 7% max ± 5% max * *
IN
< 100 kHz) ± 0.1%/V max (0.01% typ) * * *
MAX
MIN
to T
) ± 150 ppm/°C max (50 ppm typ) * 50 ppm/°C max (30 ppm typ)2250 ppm/°C max
MAX
ANALOG INPUT AMPLIFIER
(Voltage-to-Current Converter)
Voltage Input Range
Single Supply 0 to (+V
Dual Supply –V
– 4) Volts (min) * * *
S
to (+VS – 4) Volts (min) * * *
S
Input Bias Current
(Either Input) 100 nA * * *
Input Resistance (Noninverting) 250 MΩ ** *
Input Offset Voltage
(Trimmable in “D” Package Only) 5 mV max * 2 mV max **
vs. Supply 200 µV/V max 100 µV/V max 100 µV/V max **
to T
vs. Temp (T
MIN
Safe Input Voltage
3
)5µV/°C*1µV/°C10µV/°C max
MAX
± V
S
** *
REFERENCE OUTPUTS
Voltage Reference
Absolute Value 1.00 Volt ± 5% max * * *
vs. Temp (T
vs. Supply ± 0.03%/V max * * *
Output Resistance
Absolute Temperature Reference
MIN
to T
4
) 50 ppm/°C * 100 ppm/°C max **
MAX
5
380 Ω ** *
Nominal Output Level 1.00 mV/K * * *
Initial Calibration @ +25°C 298 mV (±5 mV typ) * 298 mV (±5 mV max) **
Slope Error from 1.00 mV/K ±0.02 mV/K * * *
Slope Nonlinearity ± 0.1 K * * *
Output Resistance
5
900 Ω ** *
OUTPUT INTERFACE (Open Collector Output)
(Symmetrical Square Wave)
Output Sink Current in Logic “0”
V
= 0.4 V max (T
OUT
MIN
to T
) 20 mA min 20 mA min 20 mA min 10 mA min
MAX
Output Leakage Current in Logic “1”
(T
to T
MIN
Logic Common Level Range –V
Rise/Fall Times (C
= l mA 0.2 µs** *
I
IN
) 200 nA max * * 2 µA max
MAX
= 0.01 µF)
T
to (+VS – 4) Volts * * *
S
IIN = 1 µA1µs** *
POWER SUPPLY
Voltage, Rated Performance
Single Supply 4.5 V to 36 V * * *
Dual Supply ± 5 V to ±18 V * * *
Quiescent Current 1.2 mA (2.5 mA max) * * *
TEMPERATURE RANGE
Rated Performance 0°C to +70°C** –55°C to +125°C
Storage –65°C to +150°C** *
PACKAGE OPTIONS
6, 7
D-14 Ceramic DIP AD537JD AD537KD AD537SD
H-10A Header AD537JH AD537KH AD537SH
NOTES
*Specifications same as AD537JH.
**Specifications same as AD537K.
1
Nonlinearity is specified for a current input level (IIN) to the converter from 0.1 µA to 1000 µA. Converter has 100% overrange capability up to IIN = 2000 µA with slightly
reduced linearity. Nonlinearity is defined as deviation from a straight line from zero to full scale, expressed as a percentage of full scale.
2
Guaranteed not tested.
3
Maximum voltage input level is equal to the supply on either input terminal. However, large negative voltage levels can be applied to the negative terminal if the input is scaled to
a nominal 1 mA full scale through an appropriate value resistor (See Figure 2).
4
Loading the 1.0 volt or 1 mV/K outputs can cause a significant change in overall circuit performance, as indicated in the applications section. To maintain normal operation,
these outputs should be operated into the external buffer or an external amplifier.
5
Temperature reference output performance is specified from 0°C to +70°C for “J” and “K” devices, –55°C to +125°C for “S” model.
6
D = Ceramic DIP; H = Hermetic Metal Can. For outline information see Package Information section.
7
For AD537/883B specifications, refer to Analog Devices Military Products Databook.
Specifications subject to change without notice.
–2–
REV. C
Applying the AD537
V
1
2
14
13
5
6
7
10
9
8
3
4
12
11
AD537
BUF
DRIVER
CURR-
TO-FREQ
CONV
PRECISION
VOLTAGE
REFERENCE
V
T
V
R
V
IN
0 TO –10V
C
20kΩ
5kΩ (TYP)
f
OUT
+V
S
FO =
V
IN
10 (R1 + R2) C
CR1
0 TO –1mA
I
IN
R
1
R
2
F
OUT
=
I
IN
10C
CIRCUIT OPERATION
Block diagrams of the AD537 are shown above. A versatile
operational amplifier (BUF) serves as the input stage; its purpose is to convert and scale the input voltage signal to a drive
current in the NPN follower. Optimum performance is achieved
when, at the full-scale input voltage, a 1 mA drive current is
delivered to the current-to-frequency converter. The drive current to the current-to-frequency converter (an astable
multivibrator) provides both the bias levels and the charging
current to the externally connected timing capacitor. This
“adaptive” bias scheme allows the oscillator to provide low nonlinearity over the entire current input range of 0.1 µA to
2000 µA. The square wave oscillator output goes to the output
driver which provides a floating base drive to the NPN power
transistor. This floating drive allows the logic interface to be referenced to a different level than –V
. The “SYNC” input (“D”
S
package only) allows the oscillator to be slaved to an external
master oscillator; this input can also be used to shut off the
oscillator.
The reference generator uses a bandgap circuit (this allows
single-supply operation to 4.5 volts which is not possible with
low T.C. Zeners) to provide the reference and bias levels for the
amplifier and oscillator stages. The reference generator also provides the precision, low T.C. 1.00 volt output and the V
TEMP
output which tracks absolute temperature at 1 mV/K.
V-F CONNECTIONS FOR NEGATIVE INPUT VOLTAGE
OR CURRENT
A wide range of negative input voltages can be accommodated
with proper selection of the scaling resistor, as indicated in Figure 2. This connection, unlike the buffered positive connection,
is not high impedance since the 1 mA F.S. drive current must be
supplied by the signal source. However, very large negative voltages beyond the supply can be handled easily; just modify the
scaling resistors appropriately. Diode CR1 (HP50822811) is
necessary for overload and latchup protection for current or
voltage inputs.
If the input signal is a true current source, R1 and R2 are not
used. Full-scale calibration can be accomplished by connecting a
200 kΩ pot in series with a fixed 27 kΩ from Pin 7 to –V
(see
S
calibration section, below).
V-F CONNECTION FOR POSITIVE INPUT VOLTAGES
The positive voltage input range is from –VS (ground in single
supply operation) to 4 volts below the positive supply. The connection shown in Figure 1 provides a very high (250 MΩ) input
impedance. The input voltage is converted to the proper drive
current at Pin 3 by selecting a scaling resistor. The full-scale
current is 1 mA, so, for example a 10 volt range would require a
nominal 10 kΩ resistor. The trim range required will depend on
capacitor tolerance. Full-scale currents other than 1 mA can be
chosen, but linearity will be reduced; 2 mA is the maximum
allowable drive.
As indicated by the scaling relationship in Figure 1, a 0.01 µF
timing capacitor will give a 10 kHz full-scale frequency, and
0.001 µF will give 100 kHz with a 1 mA drive current. The
maximum frequency is 150 kHz. Polystyrene or NPO ceramic
capacitors are preferred for T.C. and dielectric absorption;
polycarbonate or mica are acceptable; other types will degrade
linearity. The capacitor should be wired very close to the
AD537.
FO =
14
13
12
11
10
9
8
10 (R1 + R2) C
R
R
20k
DRIVER
CURR-
BUF
TO-FREQ
CONV
PRECISION
VOLTAGE
REFERENCE
AD537
1
10µF
2
3
4
5
6
7
V
V
T
R
GUARD RING
R2 R1
OPTIONAL
REV. C
V
10kΩ
IN
INPUT
FILTER
Figure 1. Standard V-F Connection for Positive Input
Voltages
C
OUT
T
Figure 2. V-F Connections for Negative Input Voltage or
Current
CALIBRATION
There are two independent adjustments: scale and offset. The
first is trimmed by adjustment of the scaling resistor R and the
second by the (optional) potentiometer connected to +V
the V
pins (“D” package only). Precise calibration requires the
OS
and
S
use of an accurate voltage standard set to the desired FS value
and a frequency meter; a scope is useful for monitoring output
waveshape. Verification of linearity requires the availability of a
switchable voltage source (or a DAC) having a linearity error
below ± 0.005%, and the use of long measurement intervals to
minimize count uncertainties. Every AD537 is automatically tested
for linearity, and it will not usually be necessary to perform this
verification, which is both tedious and time-consuming.
Although drifts are small it is good practice to allow the operating environment to attain stable temperature and to ensure that
IN
f
OUT
+V
S
the supply, source and load conditions are proper. Begin by setting the input voltage to 1/10,000 of full scale. Adjust the offset
pot until the output frequency is 1/10,000 of full scale (for example 1 Hz for FS of 10 kHz). This is most easily accomplished
using a frequency meter connected to the output. Then apply
the FS input voltage and adjust the gain pot until the desired FS
frequency is indicated. In applications where the FS input is
small, this adjustment will very slightly affect the offset voltage,
due to the input bias current of the buffer amplifier. A change of
lkΩ in R will affect the input by approximately 100 µV, which is
as much as 0.1% of a 100 mV FS range. Therefore, it may be
necessary to repeat the offset and scale adjustments for the highest accuracy. The design of the input amplifier is such that the
input voltage drift after offset nulling is typically below l µV/°C.
–3–
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