ANALOG DEVICES AD5063 Service Manual

Fully Accurate 16-Bit V

V

V

A

nanoDAC

OUT

SPI Interface 2.7 V to 5.5 V in an MSOP

FEATURES

Single 16-bit DAC, 1 LSB INL
Power-on reset to midscale
Guaranteed monotonic by design
3 power-down functions
Low power serial interface with Schmitt-triggered inputs
10-lead MSOP, low power
Fast settling time of 1 μs maximum (AD5063-1 model)

2.7 V to 5.5 V power supply
Low glitch on power-up
Unbuffered voltage capable of driving 60 kΩ load

interrupt facility

SYNC

APPLICATIONS

Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators

GENERAL DESCRIPTION

The AD5063, a member of ADI’s nanoDAC™ family, is a low
power, single 16-bit, unbuffered voltage-output DAC that operates
from a single 2.7 V to 5 V supply. The part offers a relative
accuracy specification of ±1 LSB, and operation is guaranteed
monotonic with a ±1 LSB DNL specification. The AD5063
comes with on-board resistors in a 10-lead MSOP, allowing
bipolar signals to be generated with an output amplifier. The
part uses a versatile 3-wire serial interface that operates at
clock rates up to 30 MHz and that is compatible with standard
SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The
reference for the AD5063 is supplied from an external V
A reference buffer is also provided on-chip. The part incor­porates a power-on reset circuit that ensures the DAC output
powers up to midscale and remains there until a valid write to
the device takes place. The part contains a power-down feature

REF

pin.

AD5063

FUNCTIONAL BLOCK DIAGRAM

AD5063

DD

R

FB

INV

V

OUT

GND

RESISTOR
NETWORK

04766-001

REF

POWER-ON

RESET

DAC

REGISTER

INPUT

CONTROL

LOGIC

SCLK DIN

SYNC DACGND

BUF

REF(+)

DAC

POWER-DOWN

CONTROL LO GIC

Figure 1.

Table 1. Related Devices

Part No. Description

AD5061

2.7 V to 5.5 V, 16-bit nanoDAC D/A,
4 LSBs INL, SOT-23.

AD5062

2.7 V to 5.5 V, 16-bit nanoDAC D/A,
1 LSB INL, SOT-23.

AD5040/AD5060

2.7 V to 5.5 V, 14-/16-bit nanoDAC D/A,
1 LSB INL, SOT-23.

that reduces the current consumption of the device to typically
300 nA at 5 V and provides software-selectable output loads
while in power-down mode. The part is put into power-down
mode via the serial interface. Total unadjusted error for the part
is <1 mV.

This part exhibits very low glitch on power-up.

PRODUCT HIGHLIGHTS

Available in 10-lead MSOP.

16-bit accurate, 1 LSB INL.

Low glitch on power-up.

High speed serial interface with clock speeds up to 30 MHz.

Three power-down modes available to the user.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: [phone] www.analog.com
Fax: [phone] ©2005–2009 Analog Devices, Inc. All rights reserved.

AD5063

TABLE OF CONTENTS

Features .............................................................................................. 1

Serial Interface ............................................................................ 13

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Timing Characteristics ................................................................ 5

Absolute Maximum Ratings ............................................................ 6

ESD Caution .................................................................................. 6

Pin Configuration and Function Descriptions ............................. 7

Typical Performance Characteristics ............................................. 8

Terminology .................................................................................... 12

Theory of Operation ...................................................................... 13

DAC Architecture ....................................................................... 13

Reference Buffer ......................................................................... 13

Input Shift Register .................................................................... 13

SYNC

Interrupt .......................................................................... 13

Power-On to Midscale ............................................................... 14

Software Reset ............................................................................. 14

Power-Down Modes .................................................................. 14

Microprocessor Interfacing ....................................................... 14

Applications ..................................................................................... 16

Choosing a Reference for the AD5063 .................................... 16

Bipolar Operation Using the AD5063 ..................................... 16

Using the AD5063

with a Galvanically Isolated Interface Chip ............................ 17

Power Supply Bypassing and Grounding ................................ 17

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 18

REVISION HISTORY

8/09—Rev. B to Rev. C

Changes to Features Section............................................................ 1

Changes to Output Voltage Settling Time Parameter, Table 2 ... 3

Updated Outline Dimensions ....................................................... 18

Changes to Ordering Guide .......................................................... 18

3/06—Rev. A to Rev. B

Updated Format .................................................................. Universal

Change to Features ........................................................................... 1

Change to Figure 1 ........................................................................... 1

Changes to Specifications ................................................................ 3

Change to Absolute Maximum Ratings ......................................... 6

Change to Reference Buffer Section ............................................ 13

Change to Serial Interface Section ............................................... 13

Change to Table 6 ........................................................................... 14

Change to Bipolar Operation Using the AD5063 Section ........ 16

7/05—Rev. 0 to Rev. A

Changes to Galvanically Isolated Chip Section .......................... 17

Changes to Figure 38 ...................................................................... 17

4/05—Revision 0: Initial Version

Rev. C | Page 2 of 20

AD5063

SPECIFICATIONS

VDD = 2.7 V to 5.5 V, V

Table 2.

B Version1
Parameter Min Typ Max Unit Test Conditions/Comments

STATIC PERFORMANCE

Resolution 16 Bits
Relative Accuracy (INL) ±0.5 ±1 LSB −40°C to + 85°C, B grade over all codes
Total Unadjusted Error (TUE) ±500 ±800 μV
Differential Nonlinearity (DNL) ±0.5 ±1 LSB Guaranteed monotonic
Gain Error ±0.01 ±0.02 % FSR TA = −40°C to +85°C
Gain Error Temperature Coefficient 1 ppm FSR/°C
Zero-Code Error ±0.05 ±0.1 mV

Zero-Code Error Temperature Coefficient 0.05 μV/°C
Offset Error ±0.05 ±0.1 mV TA = −40°C to +85°C
Offset Error Temperature Coefficient 0.5 μV/°C
Full-Scale Error ±500 ±800 μV

Bipolar Resistor Matching 1 Ω/Ω RFB/R
Bipolar Zero Offset Error ±8 ±16 LSB
Bipolar Zero Temperature Coefficient ±0.5 ppm FSR/°C
Bipolar Gain Error ±16 ±32 LSB

OUTPUT CHARACTERISTICS2

Output Voltage Range 0 V

−V
Output Voltage Settling Time3 ¼ scale to ¾ scale code transition to ±1 LSB

AD5063BRMZ 4 μs

AD5063BRMZ-1 1 μs VDD = 4.5 V to 5.5 V
4 μs VDD = 2.7 V to 5.5 V
Output Noise Spectral Density 64 nV/√Hz DAC code = midscale, 1 kHz
Output Voltage Noise 6 μV p-p

Digital-to-Analog Glitch Impulse 2 nV-s 1 LSB change around major carry
Digital Feedthrough 0.002 nV-s
DC Output Impedance (Normal) 8 kΩ Output impedance tolerance ±10%
DC Output Impedance (Power-Down)

(Output Connected to 1 kΩ Network) 1 kΩ Output impedance tolerance ±400 Ω
(Output Connected to 10 kΩ Network) 100 kΩ Output impedance tolerance ±20 kΩ

REFERENCE INPUT/OUPUT

V

Input Range 2 V

REF

Input Current (Power-Down) ±1 μA Zero-scale loaded
Input Current (Normal) ±1 μA
DC Input Impedance 1 MΩ Bipolar/unipolar operation

LOGIC INPUTS

Input Current4 ±1 ±2 μA
Input Low Voltage, VIL 0.8 V VDD = 4.5 V to 5.5 V

0.8 VDD = 2.7 V to 3.6 V
Input High Voltage, VIH 2.0 V VDD = 2.7 V to 5.5 V

1.8 VDD = 2.7 V to 3.6 V
Pin Capacitance 4 pF

= 4.096 V @ VDD = 5.0 V, RL = unloaded, CL = unloaded to GND; T

REF

V Unipolar operation

REF

V

REF

V Bipolar operation

REF

− 50 mV

DD

MIN

to T

, unless otherwise noted.

MAX

All 0s loaded to DAC register,

= −40°C to +85°C

T

A

All 1s loaded to DAC register,
TA = −40°C to +85°C

, RFB = R

INV

= 30 kΩ typically

INV

DAC code = midscale, 0.1 Hz to 10 Hz
bandwidth

Rev. C | Page 3 of 20

AD5063

B Version1
Parameter Min Typ Max Unit Test Conditions/Comments

POWER REQUIREMENTS

VDD 2.7 5.5 V All digital inputs at 0 V or VDD
IDD (Normal Mode) DAC active and excluding load current
VDD = 4.5 V to 5.5 V 0.65 0.7 mA

VDD = 2.7 V to 3.6 V 0.5 mA VIH = VDD and VIL = GND, VDD = 3 V
IDD (All Power-Down Modes)

VDD = 4.5 V to 5.5 V 1 μA VIH = VDD and VIL = GND
VDD = 2.7 V to 3.6 V 1 μA VIH = VDD and VIL = GND

Power Supply Rejection Ratio (PSRR) 0.5 LSB ∆VDD ± 10%, VDD = 5 V, unloaded

1

Temperature ranges for the B version: −40°C to +85°C, typical at +25°C, functional to +125°C.

2

Guaranteed by design and characterization, not production tested.

3

See the Ordering Guide.

4

Total current flowing into all pins.

= VDD and VIL = GND, VDD = 5 V,

V

IN

= 4.096 V, code = midscale

V

REF

Rev. C | Page 4 of 20

AD5063

TIMING CHARACTERISTICS

VDD = 2.7 V to 5.5 V; all specifications T

Table 3.

Parameter Limit1 Unit Test Conditions/Comments

2

t

33 ns min SCLK cycle time

1

t2 5 ns min SCLK high time
t3 3 ns min SCLK low time
t4 10 ns min
t5 3 ns min Data setup time
t6 2 ns min Data hold time
t7 0 ns min

t8 12 ns min
t9 9 ns min

1

All input signals are specified with tR = tF = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.

2

Maximum SCLK frequency is 30 MHz.

SCLK

SYNC

DIN

t

8

to T

MIN

t

4

, unless otherwise noted.

MAX

to SCLK falling edge setup time

SYNC

SCLK falling edge to SYNC
Minimum SYNC

rising edge to next SCLK fall ignore

SYNC

t

t

2

1

t

3

t

t

5

high time

6

D0D1D2D22D23

rising edge

t

9

t

7

D23 D22

04766-002

Figure 2. Timing Diagram

Rev. C | Page 5 of 20

AD5063

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter Rating

VDD to GND −0.3 V to +7.0 V
Digital Input Voltage to GND −0.3 V to VDD + 0.3 V
V

to GND −0.3 V to VDD + 0.3 V

OUT

V

to GND −0.3 V to VDD + 0.3 V

REF

INV to GND −0.3 V to VDD + 0.3 V
RFB to GND +7 V to −7 V
Operating Temperature Range

Industrial (B Version) −40°C to + 85°C1
Storage Temperature Range −65°C to +150°C
Maximum Junction Temperature 150°C
MSOP Package

Power Dissipation (TJ max − TA)/θJA

θJA Thermal Impedance 206°C/W

θJc Thermal Impedance 44°C/W
Reflow Soldering (Pb-Free)

Peak Temperature 260(0/−5)°C

Time at Peak Temperature 10 sec to 40 sec
ESD 1.5 kV

1

Temperature range for this device is −40°C to +85°C; however, the device is

still operational at 125°C.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

This device is a high performance integrated circuit with an
ESD rating of <2 kV, and it is ESD sensitive. Proper precautions
should be taken for handling and assembly.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. C | Page 6 of 20