Analog Devices AD5062 63 prc Datasheet

Full Accurate 16 Bit Vout nanoDac

2.7V- 5.5V, in a Sot 23

TM

,

Preliminary Technical Data

FEATURES

Single 16-Bit DAC, 1Lsb inl.

1.8 Volt Digital Interface Capability
Power-On-Reset to Zero Volts/Mid Scale
Three Power-Down Functions
Low Power Serial Interface with Schmitt­Triggered Inputs
8-Lead Sot23, 10-Lead MSOP Package
Low Power
Fast Settling 3us.

2.7-5.5 V Power Supply
Low Glitch on Powerup.
Unbuffered Voltage Capable of driving
60k Ohm load.

APPLICATIONS

Process Control
Data Acquisition Systems
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators

GENERAL DESCRIPTION

The AD5062/AD5063, a member of the nanoDAC
are single 16-bit unbuffered voltage out DACs that operate
from a single 2.7-5V supply. The AD5062 version is available
in a 8 ld Sot23. The AD5063 version is available with on board
resistors in a 10 ld uSOIC, making it easy to generate bipolar
signals on the output.

The parts utilize a versatile three-wire serial interface that
operates at clock rates up to 30 MHz and is compatible with
standard SPI™, QSPI™, MICROWIRE™ and DSP interface
standards.

The reference for AD5062/AD5063 is supplied from an
external REF pin. A reference buffer is also provided on chip.
The part incorporates a power-on-reset circuit that ensures that
the DAC output powers up to zero volts/ mid scale and remains
there until a valid write takes place to the device. The part
contains a power-down feature that reduces the current
consumption of the device to 50nA at 5 V and provides
software selectable output loads while in power-down mode.
The part is put into power-down mode over the serial interface.
Total unadjusted error for the part is <1mV.

These parts also provide a very low glitch on power-up.

Rev. PrC

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

TM

family,

AD5062/AD5063

AD5062 8 Ld Sot23.

AD5063. 10 Ld MSOP.

Part Number Description

AD5061

AD5040/60

2.7 V to 5.5 V, 16 Bit
Sot 23

2.7 V to 5.5 V, 14/16 Bit
INL, Sot23.

nano

nano

PRODUCT HIGHLIGHTS

1. Available in 8-lead SOT23, 10-lead MSOP.

2. 16 Bit Accurate, 1 LSB INL.

3. Low Glitch on Power-up.

4. High speed serial interface with clock speeds up to 30 MHz.

5. Three power down modes available to the user.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

DAC

DAC

TM

D/A, 4 LSBs INL,

TM

D/A, 1 LSBs

AD5062/AD5063 Preliminary Technical Data

AD5062/AD5063—SPECIFICATIONS1

(VDD = 2.7-5.5 V, Vref =4.096V @ VDD = 5.0V . T

Parameter B Version1

STATIC PERFORMANCE

AD5062/AD5063
Resolution 16 Bits
Relative Accuracy ±1 LSB
TUE 0.5 mV
Differential Nonlinearity ±1 LSB Guaranteed Monotonic by Design.

Offset Error 0.65 % of FSR
Zero Code Error 100 mv All 0’s loaded to dac reg

Full scale Error +/-0.01 mv All 1’s loaded to dac reg

Gain Error +/- 0.04 % of FSR
Zero code Error Drift 6 µV/°C
Gain Temperature Coefficient 2.5 ppm of FSR
AD5063
Bipolar Resistor Matching +/-0.025 % Ratio Error
Bipolar Zero Offset Error 1 mV
Bipolar Zero Temperature Co-ef. 2 uV/oC
OUTPUT CHARACTERISTICS

Output Voltage Range

Output Voltage Settling Time 3 µs CODE TBD

Slew Rate 1 V/µs

Output Noise Spectral Density

50

Digital-to-Analog Glitch

Impulse

Digital Feedthrough 0.5 nV-s

DC Output Impedance 12

REFERENCE INPUT/OUPUT
Vref Input Range

Input Current 1

DC Input Impedance 1

LOGIC INPUTS

Input Current ±1 µA

V

, Input Low Voltage

INL

V

, Input High Voltage

INH

Pin Capacitance 3 pF
POWER REQUIREMENTS

VDD

I

(Normal Mode)

DD

VDD = +2.7 V to +5.5 V

IDD (All Power-Down Modes)

VDD = +2.7 V to +5.5 V

POWER EFFICIENCY

to T

MIN

unless otherwise noted)

MAX

Unit Test Conditions/Comments

Min Typ Max

0 V

50

ref

-100mv

V

nV/√Hz

nV/√Hz

DAC code=TBD , 1kHz

DAC code=TBD , 10kHz

5 nV-s 1 LSB Change Around Major Carry.

ΚΩ

2 V

DD-100mV

uA
MΩ

0.8 V

2. 0 V

2.7 5.5 V

VDD = +2.7 to +5.5 V
VDD = +2.7 to +5.5 V

All Digital Inputs at Zero or VDD
DAC Active and Excluding Load Current
600 µA

VIH = VDD and VIL = GND

50 nA

VIH = VDD and VIL = GND

Rev. Pr C | Page 2 of 19

Preliminary Technical Data AD5062/AD5603

Parameter B Version1

Min Typ Max

I

OUT/IDD

TBD %

PSSR 0.5 LSB VDD +/- 10%

NOTES
1

Temperature ranges are as follows: B Version: –40°C to +125°C, typical at 25°C.

2

Guaranteed by design and characterization, not production tested.

Specifications subject to change without notice.

Unit Test Conditions/Comments

I

= 2 mA. VDD = +5 V

LOAD

Rev. Pr C | Page 3 of 19

AD5062/AD5063 Preliminary Technical Data

TIMING CHARACTERISTICS

(VDD = 2.7-5.5 V; all specifications T

Parameter Limit1 Unit Test Conditions/Comments

3

t

1

t2
t3
t4
t5
t6
t7
t8
t9

NOTES
1

All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.

2

See Figure 1.

3

Maximum SCLK frequency is 30 MHz.

Specifications subject to change without notice.

to T

MIN

unless otherwise noted)

MAX

33 ns min SCLK Cycle Time

13 ns min SCLK High Time
12 ns min SCLK Low Time
13 ns min

SYNC to SCLK Falling Edge Setup Time

5 ns min Data Setup Time

4.5 ns min Data Hold Time
0 ns min
33 ns min
13 ns min

SCLK Falling Edge to SYNC Rising Edge
Minimum SYNC High Time
SYNC Rising Edge to next SCLK Fall

Ignore

.

Figure 1. Timing Diagram

Rev. Pr C | Page 4 of 19

Preliminary Technical Data AD5062/AD5603

ABSOLUTE MAXIMUM RATINGS

Table 1. Absolute Maximum Ratings (TA = 25°C unless otherwise noted)

Parameter Rating

VDD to GND –0.3 V to + 7.0 V
Digital Input Voltage to GND –0.3 V to VDD + 0.3 V
V

to GND1 –0.3 V to VDD + 0.3 V

OUT

Operating Temperature Range

Industrial (B Version) –40°C to +125°C
Storage Temperature Range –65°C to +150°C
Maximum Junction Temperature 150°C
SOT23 Package
Power Dissipation (Tj Max-Ta)/ θJA
θJA Thermal Impedance 240°C/W

Lead Temperature, Soldering
Vapour Phase (60 Sec) 215°C
Infrared (15 Sec) 220°C

uSOIC Package
θJA Thermal Impedance 206°C/W
θJc Thermal Impedance 44°C/W
Lead Temperature, Soldering
Vapour Phase (60 Sec) 215°C
Infrared (15 Sec) 220°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD Caution

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

This device is a high performance RF integrated circuit with an ESD rating of <2 kV, and it is ESD sensitive. Proper precautions should be
taken for handling and assembly.

Rev. Pr C | Page 5 of 19

AD5062/AD5063 Preliminary Technical Data

Model Temperature

Range

AD5062BRJ-1 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Zero RT8
AD5062BRJ-1500RL7 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Zero RT8
AD5062BRJ-1REEL7 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Zero RT8
AD5062BRJ-2 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Mid RT8
AD5062BRJ-2500RL7 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Mid RT8
AD5062BRJ-2 REEL7 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Mid RT8
AD5062BRJ-3 -40OC to 125 OC 2 LSB 2.7-5.5V, Reset to Zero RT8
AD5062EB -40OC to 125 OC AD5062 Evaluation

AD5063BRM-1 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Zero RM-10

INL Description Package

Options

Board

Rev. Pr C | Page 6 of 19