Analog Devices AD5040 60 pre Datasheet

TM

Full Accurate 14/16 Bit Vout nanoDac
Buffered, 3V/5V, Sot 23

,

Preliminary Technical Data

FEATURES

Single 14/16-Bit DAC, 1 Lsb inl.
Power-On-Reset to Zero Volts/Mid Scale
Three Power-Down Functions
Low Power Serial Interface with Schmitt­Triggered Inputs
8-Lead Sot23
Low Power Operation
Fast Settling.
Low Glitch on Powerup.

APPLICATIONS

Process Control
Data Acquisition Systems
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators

GENERAL DESCRIPTION

The AD5040/AD5060, members of the nanoDAC

TM

family,
are single 14/16-bit buffered voltage out DACs. Both parts are
available in a 8ld Sot23. The AD5040 can be operated from

2.7-5.5V and the AD5060 can be operated at 3V/5V.
The part utilizes a versatile three-wire serial interface that

operates at clock rates up to 30 MHz and is compatible with
standard SPI™, QSPI™, MICROWIRE™ and DSP interface
standards.

The reference for the AD5040/AD5060 is supplied from an
external REF pin. A reference buffer is also provided on chip.
The parts incorporate a power-on-reset circuit that ensures that
the DAC output powers up to zero volts/ mid scale and remains
there until a valid write takes place to the device. The parts also
contain a power-down feature that reduces the current
consumption of the device to 50nA at 5 V and provides
software selectable output loads while in power-down mode.
The part is put into power-down mode over the serial interface.
Total unadjusted error for the part is <1mV.

These parts also provide a very low glitch on power-up.

AD5040/AD5060

Part Number Description

AD5061

AD5062

AD5063

2.7 V to 5.5 V, 16 Bit
Buffered, Sot 23

2.7 V to 5.5 V, 16 Bit
Unbuffered, Sot 23.

2.7 V to 5.5 V, 16 Bit
Unbuffered, 10 uSOIC, uncommitted bi-polar resistors.

PRODUCT HIGHLIGHTS

1. Available in 8-lead SOT23.

2. 16 Bit Accurate, 1 LSB INL.

3. Low Glitch on Power-up.

4. High speed serial interface with clock speeds up to 30 MHz.

5. Three power down modes available to the user.

AD5040/AD5060

TM

DAC

DAC

DAC

D/A, 4 LSBs INL,

TM

D/A, 1 LSBs INL.,

TM

D/A, 1 LSBs INL.,

nano

nano

nano

Rev. PrE

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

www.analog.com

AD5040/5060 Preliminary Technical Data

AD5040/AD5060—SPECIFICATIONS1

AD5040, VDD = 3.3V, Vref =3.0V. AD5060, VDD = 5.5V, Vref =4.096V, RL=5k, 200pF . T

Parameter B Version1

Unit Test Conditions/Comments

Min Typ Max

STATIC PERFORMANCE

AD5040/AD5060
Resolution

16 Bits

Relative Accuracy

±1 LSB

TUE

0. 2 0. 5 mV

Differential Nonlinearity ±1 LSB Guaranteed Monotonic by Design.

MIN

to T

; unless otherwise noted.

MAX

Offset Error

Full scale Error

Zero code Error 0.7 1.5

+ 0. 1 + 0.3

+/- 1. 5

mv

Code 160 loaded to Dac reg

mv Alll 1’s loaded to Dac reg

mv Alll 0’s loaded to Dac reg

offset code Error Drift

2 µV/°C

Gain Error

0. 005 0. 01 %FSR

Gain Temperature Coefficient 2.5 ppm of FSR/°C

OUTPUT CHARACTERISTICS

Output Voltage Range

0 V

ref

-50mV

V

Unloaded. See plot for loaded condition

(sink/source.)
Output Voltage Settling Time 10 µs ¼ code to 3/4 code
Slew Rate 1 V/µs
Capacitive Load Stability 470 pF

RL= ∞
1000 pF RL = 5K
Output Noise Spectral Density

60

nV/√Hz

DAC code= 1/4 scale , 1kHz

60
Digital-to-Analog Glitch

5 nV-s 1 LSB Change Around Major Carry.

nV/√Hz

DAC code=1/4 scale , 10kHz

Impulse
Digital Feedthrough 0.5 nV-s
DC Output Impedance 0.1

Ω

REFERENCE INPUT/OUPUT

Vref Input Range

2 V
Input Current 1
DC Input Impedance 1

DD-50mV

V

uA

ΜΩ

LOGIC INPUTS

Input Current ±1 µA

V

, Input Low Voltage

INL

V

, Input High Voltage

INH

0.8 V

2. 0 V

VDD = +2.7 to +5 V
VDD = +2.7 to +5 V

Pin Capacitance 3 pF

POWER REQUIREMENTS

Rev. PrE | Page 2 of 19

Preliminary Technical Data AD5040/AD5060

Parameter B Version1

Min Typ Max

VDD
I

(Normal Mode)

DD

VDD = +2.7 V to +3.6 V
IDD (All Power-Down Modes)

2.7 3.6 V AD5060 (3 Volt Option)
DAC Active and Excluding Load Current
900 µA

VDD
I

(Normal Mode)

DD

VDD = +5.0 V to +5.5 V
IDD (All Power-Down Modes)

5.0 5.5 V AD5060 (5 Volt Option)
DAC Active and Excluding Load Current

1.3 mA

VDD
I

(Normal Mode)

DD

VDD = +2.7 V to +5.5 V
IDD (All Power-Down Modes)

2.7 5.5 V AD5040
DAC Active and Excluding Load Current

1.3 mA

Dc PSSR 0.25 LSB VDD +/- 10%

0.5 LSB VDD +/- 10%

Ac PSSR - 68 db Vdd = 5v, onboad ref,@1khz

- 68 db Vdd = 3v, onboad ref,@1khz

NOTES
1

Temperature ranges are as follows: B Version: –40°C to +125°C, typical at 25°C.

2

Guaranteed by design and characterization, not production tested.
3 Linearity calculated using a reduced code range 480-64716.
Specifications subject to change without notice.

Unit Test Conditions/Comments

VIH = VDD and VIL = GND

VIH = VDD and VIL = GND

VIH = VDD and VIL = GND

vdd = 5v , vref = 4.096v
Dac set to midscale

vdd = 3v , vref = 2.5v
Dac set to midscale

Dac set to midscale

Dac set to midscale

Rev. PrE | Page 3 of 19

AD5040/5060 Preliminary Technical Data

TIMING CHARACTERISTICS

(VDD = 2.7-5.5 V; all specifications T

Parameter Limit1 Unit Test Conditions/Comments

3

t

1

t2
t3
t4
t5
t6
t7
t8
t9

NOTES
1

All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.

2

See Figure 1.

3

Maximum SCLK frequency is 30 MHz.

Specifications subject to change without notice.

to T

MIN

unless otherwise noted)

MAX

33 ns min SCLK Cycle Time

13 ns min SCLK High Time
12 ns min SCLK Low Time
13 ns min

SYNC to SCLK Falling Edge Setup Time

5 ns min Data Setup Time

4.5 ns min Data Hold Time
0 ns min
33 ns min
13 ns min

SCLK Falling Edge to SYNC Rising Edge
Minimum SYNC High Time
SYNC Rising Edge to next SCLK Fall

Ignore

.

Figure 1. Timing DiagramAD5060. AD5040 has same timing specs with 14 bit Word.

Rev. PrE | Page 4 of 19

Preliminary Technical Data AD5040/AD5060

ABSOLUTE MAXIMUM RATINGS

Table 1. Absolute Maximum Ratings (TA = 25°C unless otherwise noted)

Parameter Rating

VDD to GND –0.3 V to + 7.0 V
Digital Input Voltage to GND –0.3 V to VDD + 0.3 V
V

to GND1 –0.3 V to VDD + 0.3 V

OUT

Operating Temperature Range

Industrial (B Version) –40°C to +125°C
Storage Temperature Range –65°C to +150°C
Maximum Junction Temperature 150°C
SOT23 Package
Power Dissipation (Tj Max-Ta)/ θJA
θJA Thermal Impedance 229.6°C/W
θJC Thermal Impedance 91.99°C/W

Lead Temperature, Soldering
Vapour Phase (60 Sec) 300°C
Infrared (15 Sec) 220°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating
only; functional operation of the device at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD Caution

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

This device is a high performance RF integrated circuit with an ESD rating of <2 kV, and it is ESD sensitive. Proper precautions should be
taken for handling and assembly.

Rev. PrE | Page 5 of 19

AD5040/5060 Preliminary Technical Data

Model Temperature

Range

AD5060BRJ-1 -40OC to 125 OC 1 LSB 5V, Reset to Zero RT8
AD5060BRJ-1500RL7 -40OC to 125 OC 1 LSB 5V, Reset to Zero RT8
AD5060BRJ-1REEL7 -40OC to 125 OC 1 LSB 5V, Reset to Zero RT8
AD5060BRJ-2 -40OC to 125 OC 1 LSB 5V, Reset to Mid RT8
AD5060BRJ-2500RL7 -40OC to 125 OC 1 LSB 5V, Reset to Mid RT8
AD5060BRJ-2REEL7 -40OC to 125 OC 1 LSB 5V, Reset to Mid RT8
AD5060BRJ-3 -40OC to 125 OC 1 LSB 3V, Reset to Zero RT8
AD5060BRJ-3500RL7 -40OC to 125 OC 1 LSB 3V, Reset to Zero RT8
AD5060BRJ-3REEL7 -40OC to 125 OC 1 LSB 3V, Reset to Zero RT8
AD5060ARJ-1 -40OC to 125 OC 2 LSB 5V, Reset to Zero RT8
AD5060ARJ-1500RL7 -40OC to 125 OC 2 LSB 5V, Reset to Zero RT8
AD5060ARJ-1REEL7 -40OC to 125 OC 2 LSB 5V, Reset to Zero RT8
AD5060ARJ-2 -40OC to 125 OC 2 LSB 5V, Reset to Mid RT8
AD5060ARJ-2500RL7 -40OC to 125 OC 2 LSB 5V, Reset to Mid RT8
AD5060ARJ-2REEL7 -40OC to 125 OC 2 LSB 5V, Reset to Mid RT8
AD5060ARJ-3 -40OC to 125 OC 2 LSB 3V, Reset to Zero RT8
AD5060ARJ-3500RL7 -40OC to 125 OC 2 LSB 3V, Reset to Zero RT8
AD5060ARJ-3REEL7 -40OC to 125 OC 2 LSB 3V, Reset to Zero RT8

AD5040BRJZ -40

O

C to 125 OC 1LSB 2.7-5.5V, Reset to Zero RT8
AD5040BRJZ – 500RL -40 OC to 125 OC 1LSB 2.7-5.5V, Reset to Zero RT8
AD5040BRJZ – REEL7 -40OC to 125 OC 1 LSB 2.7-5.5V, Reset to Zero RT8

EVAL-AD5040EB AD5040 Evaluation Board
EVAL-AD5060EB AD5060 Evaluation Board

INL Description Package

Options

Rev. PrE | Page 6 of 19