Alinco DR-620 Service Manual

DR-620

Service Manual

CONTENTS

SPECIFICATIONS

1) G ENE R AL.............................................................................2

2) TRAN S M IT T ER...................................................................2

3) R E CEIVER

CIR CUIT DESCRIPTION

1) VHF Reception....................................................................4

2) UHF Reception....................................................................5

3) FM Reception.......................................................................5

4) V/V (VHF-VHF) Dual Reception......................................6

5) U/U (UHF-UHF) Dual Reception

6) VHF Squelch Control

7) UHF Squelch Control.........................................................6

8) Transmit Signal Path..........................................................7

9) VHF Transmit Signal P ath.................................................7

10) UHF Transmit Signal Path.................................................7

11) VHF Tx APC Circuit............................................................7

12) UHF Tx APC Circuit............................................................8

13) VHF PTT Circuit...................................................................8

14) UHF PTT Circuit..................................................................8

15) VHF PLL................................................................................8

16) UHF PLL ................................................................................9

17) Power-on Circuit.................................................................9

SEMICONDU CTOR DATA

1) M5218FP (X A0068)......................................................... 10

2) NJM78L05UA (XA0098) ................................................. 10

3) NJM7808FA (XA0102).................................................... 10

4) TC4S66F (X A 0115)......................................................... 11

5) AN8010M (X A 0 119).........................................................11

6) BU4052BF (XA0236)....................................................... 11

7) TA75S01F (XA0332)........................................................ 12

8) TC4W 53FU (XA0348)..................................................... 12

9) TA31136FN (XA0404)..................................................... 12

10) LA4425A (XA0410).......................................................... 13

11) NJM2904V (XA0573)....................................................... 13

12) NJM2902V-TE1 (XA0596) ............................................. 13

13) S-80845ALMP-EA9-T2 (X A0620)

14) TK10931V (XA0666)........................................................ 14

...........................................................................3

....................................

.........................................................6

...............................

15) BR24C64F-E2 (X A 0669 )

16) LC75884W (XA 08 9 9)

17) M51132FP (XA0900)....................................................... 17

18) M30620FCAGP (XA 0913/XA0949)...................... 17~19

19) M38503M2H667FP (XA 0914)

20) M64076AGP (XA0 9 1 5)...................................................22

21) S-816A50AM C (XA0925)

22) NJM 78M05DL1A (XA 0 947)

23) Transistor, Diode, and LED Outline Drawings.... 24~25

24) LCD Connection........................................................26~27

EXPLODED VIE W

1) Front View

2) Bottom V iew....................................................................... 29

PARTS LIST

Front Unit.................................................................... 30~31

LED Un it..............................................................................31

Main Un it.....................................................................31~42

Mechanical Parts..............................................................42

Packing Parts.....................................................................42

Accessories (Screw S et).................................................42

ADJUSTM ENT

1) Adjustment Sp o t...............................................................43

2) Adjustment Mode..............................................................44

3) VHF Adjustment Specification.......................................45

4) UHF Adjustment Specification.....................................46

5) VHF Test Specification....................................................47

6) UHF Test Specification....................................................48

PC BOARD VIEW

1) Front Side A ........................................................................49

2) Front Side B ........................................................................49

3) Main Side A ........................................................................50

4) Main Side B ........................................................................ 51

FRONT SCHEMATIC DIA G R A M ...................................52

MAIN SCHEMATIC D IA G R A M ........................................53

FRONT B LO CK D IA G R AM ..............................................54

MAIN BLOCK DIA G R AM ...................................................55

...........................................................................28

...............................................

..................................................... 16

...............................

...............................................

..........................................

ALINCO,INC.

20~21

23 23

SPECIFICATIONS

1) GENERAL

Frequency coverage DR-620T (U.S amateur)

DR-620E (European amateur)

Operating mode Frequency resolution

Number of memory channels Antenna impedance Power requirement Ground method

Current drain Receive

Transmit Operating temperature Frequency stability

Dimensions

Weight

87.500 - 107.995MHz (WFM RX)

108.000 - 135.995MHz (AM RX)

136.000 - 173.995MHz (RX)

144.000 - 147.995MHz (TX)

335.000 - 479.995MHz (RX)

430.000 - 449.995MHz (TX)

87.500 - 107.995MHz (WFM)

144.000 - 145.995MHz (RX, TX)

430.000 - 439.995MHz (RX, TX) 16K0F3E (Wide mode) 8K50F3E (Narrow mode)

5, 8.33, 10, 12.5, 15, 20, 25, 30, 50, 100kHz 200 50Q unbalanced

13.8V DC±15% (11.7 to 15.8V)

Negative ground

0.6A (Max.) 0.4A (Squelched)

11.0A

- 10 to 60 C

±2.5ppm

142 (w) x 40 (h) x 174 (d) mm

(w/o knobs) Approx. 1.0kg

2) TRANSMITTER

Output power

Modulation system Maximum frequency deviation Spurious emission

Adjacent channel power

Modulation Distortion Microphone impedance

High : 50W (VHF)

35 W(UHF)

Mid : 10W Low : 5W Variable reactance frequency modulation ±5kHz (Wide mode) ±2.5kHz (Narrow mode)

-60dB

Lass than 3% 2kQ

3) RECEIVER

Sensitivity Receiver circuitry Intermediate frequency

Squelch sensitivity Selectivity (-6dB / -60dB) Spurious and image rejection ratio Audio output power

! Note : All specifications are subject to change without notice or obligation.

-16dBu for 12dB SINAD Double conversion superheterodyne

1st 21.7MHz 2nd 450kHz (VHF) 1st 45.1MHz 2nd 455kHz (UHF)

-18dBu

12kHz/ 24kHz

70dB

2.0W (8Q, 10% THD)

CIRCUIT DESCRIPTION

1) VHF Reception

Incoming VHF signals are passed through a low-pass filter network, antenna switching diodes D20 (1SV268), D19 (1SS355) and D26 (DAN235E), and a high-pass filer network, and on to the RF amplifier Q19 (3SK131). The amplified RF signal is passed through another RF amplifier Q18 (2SC5226) and band-pass filtered again by varactor-turned resonators L46, L49, L51 and D28, D29, D30 (all HVU359),

then applied to the 1st mixer Q21 (3SK240) along with the first local signal from the PLL circuit. The first local signal is generated between 122.3 MHz and 126.3 MHz by the VHF VCO, which consists

of Q9 (2SK508) and varactor diodes D10, and D11 (both 1SV282) according to the receiving frequency. The 21.7 MHz first IF signal is applied to monolithic crystal filters XF and XF2 (both Q2175AD20) which strip away unwanted mixer products, and the IF signal is applied to the first IF amplifier Q20

(2SC4618). The amplified first IF signal is then delivered to the FM IF subsystem IC IC3 (TK10931V), which contains the second mixer, limiter amplifier, noise amplifier, and FM detector. The second local signal is generated by 21.25MHz TCXO, producing the 450 kHz second IF signal when mixed with the first IF signal within IC3. The 450 kHz second IF signal is applied to the ceramic filter FL1 (ALFYM450E) which strips away all

but the desired signal, and then passes through the limiter amplifier within IC3 to the discriminator coil

L101, which removes any amplitude variations in the 450 kHz IF signal before detection of speech. The detected audio then signal is amplified by IC9 (NJM2902V-B) passes through the de-emphasis

network, a high-pass filter consisting of IC9 (NJM2902V-A) and associated circuitry, and low-pass filter consisting and associated circuitry. The filtered audio signal is switched by IC12 (BU4052), then

passes through the audio volume control IC IC13 (M511312FP) which adjusts the audio sensitivity to

compensate for audio level variations. The audio signal is amplified by IC8 (LA4425A), then applied to the internal loudspeaker.

2) UHF Reception

Incoming UHF signals are passed through a low-pass filter network, high-pass filter network, antenna switching diodes D16 (1SS355) and D18 (1SV268), and on to the band-pass filter network consisting of varctor diode D49 (HVU359) and L79. The filtered UHF signal is amplified by RF amplifier Q41 (3SK240) and fed to another band-pass filter consisting of varactor diode D50 (HVU359) and L80, and then is passed through another RF amplifier Q43 (2SC5226) to another band-pass filter consisting of varactor diodes D51 and D52 (both HVU359) and L81/L82. The amplified and filtered UHF signal is applied to the 1st mixer Q42 (3SK240) along with the first local signal from the PLL circuit. The first local signal is generated between 384.9 MHz and 404.9 (*2) MHz by the UHF VCO, which consists of Q29 (2SK508) and varactor diodes D38 and D40 (both ISV278), according to the receiving frequency. The 45.1MHz first IF signal is applied to monolithic crystal filters XF3A and XF3B (Q4511BD10) which strip away unwanted mixer products, and the IF signal is applied to the first IF amplifier Q44 (2SC4618). The amplified first IF signal is then delivered to the FM IF subsystem IC IC5 (TA31136FN), which 2) The amplified first IF signal is then delivered to the FM IF subsystem IC IC5 (TA31136FN), which contains the second mixer, limiter amplifier, noise amplifier, and FM detector. The second local signal is generated by 45.555 MHz crystal X4, producing the 455 kHz second IF signal within IC5. The 455kHz second IF signal is applied to the ceramic filter FL4 (CFW455E) which strips away all but the desired signal, and then passes through the limiter amplifier within IC5 to the discriminator coil L102 , which removes any amplitude variations in the 455 kHz IF signal before detection of speech. The detected audio then signal is amplified by IC9 (NJM2902V-C) passes through the de-emphasis network, a high-pass filter consisting of IC9 (NJM2902V-D) and associated circuitry, and a low-pass filter consisting and associated circuitry. The filtered audio signal is switched by IC12 (BU4052), then passes through the audio volume control IC IC13 (M511312FP), which adjusts the audio sensitivity to compensate for audio level variations. The audio signal is amplified by IC8 (LA4425A) then applied to the internal loudspeaker.

3) FM Reception

Incoming FM signals are passed through a low-pass filter network, antenna switching diodes D19 (1SS355), D20 (1SV2685) and D26 (DAN235E), and a high-pass filter network, and on the RF amplifier Q36 (2SC5066). The amplified RF signal is passed through band-pass filtered L, C, then applied to the 1st mixer Q33 (2SC5066) along with the first local signal from the circuit. The first local signal is generated between 86.7 MH and 118.7 MHz by the FM VCO, which consists of Q14 (2SC4808) and varactor diodes D23, and D25, (both 1SV282) according to the receiving frequency. The 10.7 MHz first IF signal is applied to ceramic filters FL3 (SFT10.7MAS) which strip away unwanted mixer products, and the IF signal is applied to the first IF amplifier Q37 (2SC4618). The amplified first IF signal is then delivered to the FM IF subsystem IC IC3 (TK10931V), limiter amplifier, noise amplifier, and FM detector. The 10.7 MHz first IF signal is applied to the discriminator coil L53, which removes any amplitude variations in the 10.7 MHz IF signal before detection of speech.

4) V/V (VHF-VHF) Dual Reception

During V & V operation, the incoming VHF “sub” band signal is passed through a low-pass filter network,

antenna switching diode D19 (1SS355), D20 (1SV268) and a high-pass filter network to the RF amplifier

Q19 (3SK131). The amplified RF signal is passed through a high-pass filter network, VHF “sub” RF

amplifier Q31 (2SC5066), and a low-pass filter network, then is applied to the VHF “sub” first mixer

Q32 (2SC5066) along with the 45.1 MHz VHF “sub” first local signal from the VHF “sub” VCO circuit. The VHF “sub” first local signal is generated between 189.1 MHz and 193.1 MHz by the VHF “sub” VCO Q38. The 45.1 MHz VHF “sub” second IF signal is applied to the UHF receiving circuit. The VHF “sub” signal

is amplified, filtered, and demodulated, etc., by the UHF “main” receiving circuit, described previously.

5) U/U (UHF-UHF) Dual Reception

During U/U operation, the incoming UHF “sub” band signal is passed through high-pass and low-pass filter networks, antenna switching diodes D16 (1SS355) and D18 (ISV268), and another high-pass filter network to the RF amplifier Q51 (2SC5066). The amplified RF signal is passed through a low-

pass filter network, UHF “sub ”RF amplifier Q49 (2SC5066), and low-pass filter network, then is applied to the UHF “sub” first mixer Q52 (2SC5066) along with the 21.7 MHz UHF “sub” first local signal from the UHF “sub” VCO. The UHF “sub” first local signal is generated between 408.3 MHz and 428.3MHz by the UHF “sub” VCO Q13. The 21.7 MHz UHF “sub” second IF signal applied to VHF receiving circuit. The UHF “sub” signal is

amplified, filtered, and demodulated, etc., by the VHF receiving circuit, described previously.

6) VHF Squelch Control

When no VHF carrier is being received, noise at the output of the detector stage in IC3 is amplified and

band-pass filtered by the noise amp section of IC3, then passes through the noise adjust VR (VR8) to

CPU. The resulting DC voltage is applied to pin 88 of main CPU IC19 (M30624FGAGP), which

compares the squelch threshold level to that which set by the font panel VHF SQL knob. While no carrier is received, pin 55 of IC19 remains “high,” turning on the squelch switch Q108

(DTC363EK) to disable audio output from the speaker.

7) UHF Squelch Control

When no UHF carrier is being received, noise at the output of the detector stage in IC5 is amplified

and band-pass filtered by the noise amp section of IC5, then passes through the noise adjust VR8 to

cpu. The resulting DC voltage is applied to pin 90 of main CPU IC19, which compares the squelch threshold level to that which set by the front panel UHF SQL knob. While no carrier is received, pin 56 of IC19 remains “high” turning the squelch switch Q109 (DTC363EK) to disable audio output from the speaker.

8) Transmit Signal Path

The speech signal from the microphone passes through the MIC jack CN601 to AF amplifier IC601 (M5218FP) on the FRONT UNT. The amplified speech signal is subjected to amplitude limiting by IC601 (M5218FP), then passes through the Front interface jacks CN602 and CN2 to MAIN Unit. On the MAIN UNIT, the speech signal passes through the audio mute switch IC7 (TC4066F), MIC gain control VR5 and buffer amplifier IC1 (NJM2902V-C) and a low-pass filter network at IC1 (NJM2902V- A) to deviation control VR3 (for VHF Tx audio) or VR4 (for UHF Tx audio).

9) VHF Transmit Signal Path

The adjusted speech signal from VR3 is delivered to VHF VCO Q9, which frequency modulates the transmitting VCO D6 (1SV278). The modulated transmit signal passes through buffer amplifier Q7 (2SC5066), a low-pass filter network, and another buffer amplifier Q3 (2SC5226) to another low-pass filter network. The filtered transmit signal is applied to the Pre-Drive amplifier Q2 (2SK3074) and Drive amplifier Q1 (2SK2975), then finally is amplified by Power amplifier Q4 (RD70HV1) up to 50 Watts. This three stage power amplifier’s gain is controlled by the APC circuit. The 50-Watt RF signal passes through a low-pass filter network, antenna switch D1 (XB15A407), and another low-pass filter network, and then is delivered to the ANT jack.

10) UHF Transmit Signal Path

The adjusted speech signal from VR4 is delivered to UHF VCO Q29 which frequency modulates the transmitting VCO D35 (1SV278). The modulated transmit signal passes through buffer amplifiers Q28 (2SC5066) and Q7 (2SC5226) to a high-pas filter network. The filtered transmit signal is applied to the Pre-Drive amplifier Q2 (2SK3074) and Drive amplifier Q1 (2SK2975), then finally is amplified by Power amplifier Q4 (RD70HV1) up to 35 Watts. This three stage power amplifier’s gain is controlled by the APC circuit. The 35-Watt RF signal passes through a high-pass filter network, antenna switch D12 and D13 (UM9401F), low-pass filter and high-pass filter networks, and then is delivered to the ANT jack.

11) VHF Tx APC Circuit

A portion of the power amplifier output is rectified by D8 (MA4S713), D9 (MA4S713) and Q12 (2SC4081), then delivered to APC IC1 (NJM2902V-D) as a DC voltage which is proportional to the output level of the power amplifier. The APC IC1 compares the rectified DC voltage from the power amplifier and the reference voltage from the main CPU IC19, producing a control voltage for the Automatic Power Controller Q8 (RN2107) and Q11 (RN1107) which regulates supply voltage to the Pre-Drive amplifier Q2, Drive amplifier Q1, and Power amplifier Q4, so as to maintain stable output power under varying antenna loading conditions.

12) UHF Tx APC Circuit

A portion of the power amplifier output is rectified by D9 (M44S713), D22 (MA4S713) and Q12

(2SC4081), then delivered to APCD ICI (NJM2902V-D) as a DC voltage which is proportional to the

output level of the power amplifier. The APC IC1 compares the rectified DC voltage from the power amplifier and the reference voltage from the main CPU IC19, producing a control voltage for the Automatic Power Controller Q8 (RN2107)

and Q11 (RN1107) which regulates supply voltage to the Pre-Drive amplifier Q2, Drive amplifier Q1,

and Power amplifier Q4, so as to maintain stable output power under varying antenna loading conditions.

13) VHF PTT Circuit

When the PTT switch is pressed, pin 4 of front CPU IC604 (M38503M) goes “LOW,” which sends the

“PTT” command to the main CPU, IC19. When it receives the “PTT” command, pin71 of Q19 goes

“high” to control local switch D5 (DAN235E), filter switch D2, D3, TX switch D17 (DAN235E), and APC

switch Q8/Q11, which activates the VHF Tx circuit. Meanwhile, pin 69 of IC19 goes “low,” which

disables the VHF Rx circuit.

14) UHF PTT Circuit

When the PTT switch is pressed, pin 4 of FICront CPU IC604 (M38503M) goes “LO” which sends the

“PTT” command to the main CPU, IC19, When it receives the “PTT” command, pin72 of IC19 goes

“high” to controls local switch D5, filter switch D2, D3, TX switch D17 and APC switch Q8/Q11, which

activates the UHF Tx circuit. Meanwhile, pin 70 of Q19 goes “low,” which disables the UHF Rx circuit.

15) VHF PLL

A portion of the output from the VHF VCO Q9 (2SK508) passes through buffer amplifiers Q7 (2SC5066)

and Q5 (2SC5066) to the programmable divider section of the PLL IC IC2 (M64076AGP), which

divides the frequency according to the frequency dividing data from the main CPU, IC19. It is then

sent to the phase comparator. The 21.25 MHz frequency of the reference oscillator circuit, made up of TCXO X1, is divided by the

reference frequency divider section of IC2 into 4250 or 3400 parts to become 5 kHz or 6.25 kHz

comparative reference frequencies, which are utilized by the phase comparator. The phase comparator section of IC2 compares the phase between the frequency-divided oscillation frequency of the VCO circuit and comparative frequency, and its output is a pulse corresponding to the

phase difference. This pulse is integrated by the charge pump and loop filter of IC2 into a control voltage (VCV) to

control the oscillation frequency of the VHF VCO Q9.

16) UHF PLL

A portion of the output from the UHF VCO Q29 (2SK508) passes through buffer amplifier Q28 (2SC5066) and Q39 (2SC5066) to the programmable divider section of the PLL IC IC2 (M64076AGP), which divides the frequency according to the frequency dividing data from the main PU IC2. It is then sent to the phase comparator. The 21.25 MHz frequency of the reference oscillator circuit, made up of TCX0 X1, is divided by the reference frequency divider section of IC2 into 4250 or 3400 parts to become 5 kHz or 6.25kHz comparative reference frequencies, which are utilized by the phase comparator. The phase comparator section of IC2 compares the phase between the frequency-divided oscillation frequency of the VCO circuit and comparative frequency, and its output is a pulse corresponding to the phase difference. This pulse is integrated by the charge pump and loop filter of IC2 into a control voltage (VCV) to control the oscillation frequency of the UHF VCO Q29.

17) Power-on Circuit

When the POWER switch is turned on, pin 18 of man CPU IC19 goes “low.” When pin 18 of IC19 goes “low,” pin 79 of IC19 goes “high” to activate the power switches Q63 (2SB1386) and Q74 (2SC4081), which supply the DC power to the radio.

SEMICONDUCTOR DATA

1) M5218FP (XA0068)

Dual Low Noise Operational Amplifiers

Output 1 1

Inverting Input 1 2

Non Inverting Input 1 3

Power supply Minus 4

2) NJM78L05UA (XA0098)

5V Voltage Regulator

3) NJM7808FA (XA0102)

1. OUTPUT

2. COMMON

3. INPUT

Power Supply Plus

Output 2

Inverting Input 2

Non Inverting Input 2

8V Voltage Ragulator Pin Assignment

3 2 1

1. OUTPUT

2. COMMON

3. INPUT

4) TC4S66F (XA0115)

Bilateral Switch

5) AN8010M (XA0119)

10V Voltage Regulator

Test Circuit

u u u

Output Common Input

AN8010M

6) BU4052BF (XA0236)

Analog Multiplexer/Demultiplexer

7) TA75S01F (XA0332)

Operational Amplifiers

____

y y y

8) TC4W53FU (XA0348)

Multiplexer/Demultiplexer

VCC OUT

Function Table

Control input

INH A

L L ch0 L H

* Don't Care

ON channel

ch1

NONE

9) TA31136FN (XA0404)

Low Power FM IF

Block Diagram

COMMON 1

INH 2 7 ch0

VEE |_3_

VSS 4 5 A

•

-P*

O i

8 VDD

6 | ch1

10) LA4425A (XA0410)

5W Audio Power Amplifiers

Test Circuit

11) NJM2904V (XA0573)

1 2 3 4 5

12) NJM2902V-TE1 (XA0596)

Quad Single Supply Operational Amplifier

13) S-80845ALMP-EA9-T2 (XA0620)

Pin Assignment / BLOCK Diagram (Top View)

0 < c 3

1 -

o 02

o <

o> o> o>

3 c

c r (D

CD CD

O O

15) BR24C64F-E2 (XA0669)

EE-P ROM Block Diagram

AO 1

A1 2

A2 3

GND 4

Pin Assignment

páb it

ADDRESS DECO DER

CON TROL C IR CU IT

HIGH VOLTAGE

GENERATOR

Vcc WP SCL SDA

64Kbit EEP R OM ARRAY

13bit

START STOP

SLAVE^WORD

ADDRESS REGISTER

VOLTAGE

DETECTOR

ACK

DATA

a Vcc

7 WP

e SCL

5 SDA

BR24Ce4/F

AO A1 A2 GND

16) LC75884W (XA0899)

LCD Driver

*n 'J' in m

vt in

-c m fN ■-<

LC75884W

KS 6 \= Z 61 K I1 t = Z K I2 C = K I3 K I4 C = K I5 C T! VD D E =

VLCD 1ZZ

V L C D l C Z VLCD2 i =

VS S EZZ

TEST 1 =

OSC C Z RE S C Z

d o i n :

CE 1 = CL C Z

D i c n P l / S l c = P 2 /S 2 c z:

in Tf fo fs h j ; £ E E f O iN H ü t n c c ^ y M n ' # ^ [/) ui tu m u O O O o m m u -u r j^ j '-î ï^ r ^ j'- ïj' ^ ’iT i i W K K i i U U U U i O t i f l n n w w w w w u j u )

nnnnnnnnnnnnnnnnnnnn

/ fiO 50 41

aoO

1 10

UUUUUUUUUUUUUUUUUWLIU

■v.-^ w w M w w n t n t o w w u i u li /) cO ** A ft

(S QFP 80 )

t z i S 4 2

— } S4G

E = l S 3 9

S41

= Z I S 38 = ) S 3 7 “ Z I S 3 6 z n S 3 5 = 1 S 3 4 = 1 S 3 3

= J S 3 2 = ] S 3 1 = □ S 3 0 n : S 29

5 2 9 m S 2 7 ^ S 2 6 = 3 £ 2 5

S24 = 3 S 2 3

Block Diagram

DO O-

D I O- CL O- CE O-

VD D O

VDET

co (N

S 2

o o

u u

O O O

COMMON D R IVER

CLOC K

GE NERAT OR

CCB

IN T E R F A C E

SEGM EN T D R IVER & LAT CH

S H IF T REGIS T E R

CO NTROL

RE G ISTER

KE Y

KEY SCAN

^ ro CN I—)

P4 P4 Al Ai \ \ \ \

in ^ m fN >h

co co co co co

0 0 0 0 0

BUF FER

Ô Ô Ô Ô Ô

in n (N h

H H H H H

« « « « «

Ô Û Ô Ô Ô Ô

vo in (*) in h

co co co co co co « « W w U5 W

N X

in in in

co co

17) M51132FP (XA0900)

2ch Electronic Volume

5 !

Ref. supply out

Filter

GND

Volume 1 cont.

[ T

w K> T I

Noise cont.

Volume 2 cont.

VCA S W

T I

18) M30620FCAGP (XA0913/XA0949)

Main CPU

? Q Q Q Q Q Q Q

'5 ^ 's i's ^ -a 's ' i; Q QQQQQQQQ 5-

"co ^ 7?5

Q Q

K. 51

< << < << < < < ■?<<< <<<

Q Q Q

^ 1- cjIo ^ w^5 Is-

U) "(Ö N

C\JC\IC\1C\JCMC\JC\JC\IC0C0 OCOCOCOCOCOCOCO

D_Q_Q_D_Q_Q_Q_CL>Q_>CLÜ_CLCLQ_Q_Q-

1 1 L

16 Output 1

15 Input 1

VCC

1 3

S I

1 2

11 Input 2

H Output 2

Mode SW

CL CL

P12/D10 -

pi 1/D9 - P-Io/Ds- PO7/D7 - P06/D6 * P05/D5 - P04/D4 - P03/D3 * P02/D2 - P01/D1 -

PO0/D0 - PIO7/AN7/KI3- PIO6/AN6/KI2 - P105/AN5/KM -

P104/AN4/KIO -

P103/AN3 - PIO2/AN2 -

PIO1/AN1 -

AVss -

PIO0/AN0 '

Vref "

_____

AVcc _

P97/ADtrg/Sin4 "

P96/ANEX1/SOUT4 "

P95/ANEX0/CLK4 -

m u m u m w m

M30620FCAGP

^ CO CD CD

< < Q Q ! CD CD

Ü_ CL

i dÜ

"i s5;

11— tr c0 2 O 1=1 .cmi^-i ,o n

I j 01550

¿3 Iff!X

o<!o

0- CL CL CL C

■ P42/A18

Ü] -

■ P43/A19

U 

- P44/CS0

m 

• P45/CS1

s 

• P46/CS2

i -

■ P47/CS3

441 -

0  S 

m •

4o1 •

m -

s -

m -

___

• P50/WRL7WR

• P51/WRH/BHE

• P52/RD ' P53/BCLK ' P54/HLDA ‘ P55/HOLD

• P56/ALE

• P57/RDY/CLKOUT

■ P60/CTS0/RTS0

- P61/CLK0

• P62/RXD0

• P63/TXD0

____

’ P64/CTS1/RTS1/CLKS1

■ P65/CLK1

■ P6e/RxDi

• P67/TXD1

■ P7o/TxD2/SDA/TAOoUT(;ii)

• P7i/RxD2/SCL7TA0lN/TB5lN(ä1) ' P72/CLK2/TA1 out/V

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