Alinco DJ-S11E, DJ-S11T, EC10, DJ-S41 C, DJ-S41 J Service Manual

DJ -S41 T/T2/(J)/(C)
EC10

DJ-S11T/E

Service Manual

CONTENTS

SPECIFICATIONS

1) General

2) Transmitter .............................................................. 2

3) Receiver ................................................................... 2

CIRCUIT DESCRIPTION

1) Receiver System .................................................... 3

2) PLL, VCO Circuit ...................................................4

3) Transm itter System ................................................ 4

SEMICONDUCTOR DATA

1) AN77L03M ..................................................................7

2) AT24C02N ................................................................ 7

3) M38223M4HP ..........................................................8

4} M64076GP ................................................................ 9

5) NJM2070M .............................................................. 10

6) NJM2070M .............................................................. 11

7) RN5VL25AA-T1 ...................................................... II

8) TA31136FN ............................................................ 12

9) Transmitter, Diode and Outline Drawings 12

10) LCD ....................................................................... 13

EXPLODED VIEW

1) Front Assembly .................................................... 14

2) Rear Assembly 1 ................................................. 15

3) Rear Assembly 2 ................................................. 16

D J-S41T|T2/( J)/( C)& EC10

PARTS LIST

ADJUSTMENT

1) R eq uir ed Te st Equ ipm e nt

2) Adjustment

..................................................................... 2

.........................

17-20

PC BOARD VIEW

1) RF Unit ............................................................24~25

2) CPU Unit (early veersion) .......................2E>~27

3) CPU Unit (later version)

4) VCO Unit ................................................................30

5) SW Unit ..................................................................30

CIRCUIT DIAGRAM

1) RF Unit ..................................................................31

2) CPU Unit

3) VCO Unit ................................................................33

BI.OCK DIAGRAM .........................................................34

PARTS LIST ............................................................35-37

ADJUSTMENT

1) Required Test Equipment ..................................36

2) Adjustment ............................................................ 39

3) Adjustment Points ...............................................40

PC BOARD VIEW

1) RF Unit ..........................................................41~42

2) CPU Unit ........................................................43~44

3) VCO Unit ................................................................45

4) SW Unit ..................................................................45

CIRCUIT DIAGRAM

1) RF Unit ................................................................... 4B

2) Cru Unit ................................................................47

3) VCO Unit ................................................................48

21

22

BLOCK DIAGRAM ........................................................49

................................................................32

........................

28~29

3) Adjustment Points

............

23

A L IN C O , In c

SPECIFICATIONS

1) General

Frequency Range

Modulation :
DC Power Source

Curient Consumption ; TX/approx. 30mA(© 5i5V DC) (C Version &EC10)

Dimensions :

Weight :

DJ-S41T/ T2 / (J) / (C) & EC10

430.000-449.995MHz (T Version)

450.000-470. OOOM Hz (T2 Veraion)

430.000-439.995MHz (J Version)

433.050—434.790MHz (C Version & ECI0)

F3E

3.6—4.5 Volte DC (internal battery)

5.5V (external regulated source)

290mA(Hi Power ©5.5V DC) (T,J Version)
RX/approx. 33mA (squelched)
55(W)X 100(H) x 28(D)mm without projections
approx. 185g (with three AA drycells)

2) Transmitter

Outpul Power :

approx. IOmW(with 5.5V DC supply)(C Version & EC 10)
approx 340mW(wrth 5.5V DC supply)(T.J Version)

DJ-S11T/E

144.000-147.995MHz (T Version)

144.000— 145.995MHz (E Version)

F3E
36—4.5 Volts DC (internal battery)

5.5V (external regulated source)
TX/approx. 260mA(Hi Power @5.5V DC)

RX/approx. 33mA (squelched)
55(W) x 100(H) x 28(D)mm wilhout projections
approx. 185g (with three AA drycells)

approx.. 340mW(with 5.5V DC supply)

approx. 300mW(with 5.5V DC supply) (T2 Version)
Modulator :
Max. Deviation :

Variable Reactance

± 5kHz

3) Receiver

Configuration :
Intermediate Frequency
Sensitivity :
AF Output :

Note : Specifications are subject to change without notice or obligation

Double Conversion Superheterodyne

First : 23.05MHz/Second : 450kHz
Better than -15dBn (l2dB SINAD)
Not less than lOOmW (@10% distortion © 8 £i)

Variable Reactance
± 5kHz

Double Conversion Superheterodyne
First : 23.05MHz/Second ; 450kHz
Better than -15dB|j (12dB SiNAD)
Not less than lOOmW (@10% distortion @ 8 £1)

2.

CIRCUIT DESCRIPTION

1) Receiver System

The receiver system is the double superheterodyne.
The first IF is 23.05MHz and the second IF is 450kHz.

1. Front End

The signal from the antenna is passed through a low-pass filter and input to RF
coil L21.
The signal from L21 is amplified by Q10, Q12 and led to the band pass filter, and
led to the first mixer base of Q7.

2. First Mixer

3. IF Circuit

4. Audio Circuit

The amplified signal (10) by Qio, QtZ is mixed with the first local oscillator signal
(fO-23.05MHz) from the PLL circuit by the first stage mixer Q7 and so is converted
into the first IF signal.
The unwanted frequency band of the first IF signal is eliminated by the monolithic

crystal filter FL1, and led to IF amplifier Q9.

The first IF signal is amplified by Q9, and input to pin 16 of IC2, where it is mixed
with the second local oscillator signal (22.6or23.5MHz) and so is converted into
the second IF signal (450kH2).
The second IF signal is output from pin3 of IC2, and unwanted frequency band of
second IF signal is eliminated by a ceramic filter FL2.
The resulting signal is tnen amplified by the second IF limiting amplifier, and
detected by quadrature circuit The audio signal is output from pin9 of IC2,

The detected signal from IC2 is passed through the low-pass filter and led to the
amplifier Q307, Q306.
Q308 is switched ON/OFF by AFC signal from CPU.
The audio signal is input to the main volume VR301 and amplified by the power
amplifier IC302 to drive the speaker.
The power supply voltage of IC302 is limited by AF regulator consisting of Q304.
The power supply voltage of IC302 is switched ON/OFF by AFP signal from CPU.

*

*

5. Squelch Circuit
The noise in the audio signal from IC2 is passed through the squelch control
variable resistor RT2 and input pin8 of IC2.
IC2 includes filler amplifier, high-pass filter and rectifier.
When squelch circuit is close, pin13 of IC2 goes to "High".
When squelch circuit is open or a signal is received, pin13 of IC2 goes to "Low“,
then the signal of pin13 is led to CPU.

* for S41 only.

3

2) PLL, VCO Circuit

3) Transmitter System

1. Microphone Amplifier

2. Power Amplifier

Output frequency of PLL circuit is set by the serial data from microprocessor.
PLL circuit consists of VCO Q101, buffer amplifier Q102.
The pulse wave output of charge pump is converted to DC voltage by PLL loop
filter circuit, and supplied to D102, D103 of varicap diode in VCO unit.
The frequency modulation is executed when audio signal voltage is supplied to the
varicap D104.
When PLL is unlocked, pin7 of IC1 goes to "High".

The voice from the internal or external microphone is !ed to the pre-emphasis
circuit, and then input to the microphone amplifier IC301, which consists of two
operational amplifiers.

The amplified is signal is input to the low-pass filter IC301.
The output from the microphone amplifier is passed through variable resistors
RT301 for modulation adjustment to varicap diode of the VCO.

The signal from VCO is passed through Tx/Rx switch circuit D3.
The signal is amplified by Q4 and 05, and input to power amplifier 02, 03, 06,
and then passed through the low-pass filter, the antenna switch circuit and the
output low-pass filter.
The unwanted harmonics frequency signal is eliminated by the low-pass filter and

input to fhe antenna.

4) Terminal function of CPU

N o.

1
2
3 T X L O W
4 '
5
6 RXC

'7

S

9
10
11 C B E E P
12
13
14 BP 1 "
15

16

17

18

19

20 RXD I Clo n e FIX data input
21 T X C
22
23 TXA 0
24
25
26
27
28
29 X OUT
30
31
32
33 V M K
34 L A M P K
35 F K
36
37
38 M .M U T E

N a m e
U P K
D O W NK

NC
LB

S M T (C A S )

SD I
E E C L K
E E D A T A

BE E P

LBS W o

BP 2
P S T B
D A TA 0
C LK
TX D

C LO

U L I
R E S E T I
PLLC
LAM P
X IN

Vss I G N D
C A LL K !
S C A N K I S can ke y inp u t

M O N IK

SHIFTC 0 VC O sh ift o u tput

I/O

I F reque n c y U P ke y inp u t

Freque n c y DOW N key input

I

0

T X o utp u t pow er switch H igh/L o w
N o U se

-
Low v o lta g e d e te ction input

I

P o w e r supply con tro l lo r FIX

o

I S m e te r signa l in put

S D s ignal input

0 E E P R O M d o c k o u tput

EE PR O M da ta outp u t

o
o N o use

o B e e p s o u n d o u tpu t

I Ban d pla n 1 input

B a n d p lan 2 input

I

P LL !C stro b e o u tput

0

P L L 1C data ou tpul
P L L 1C clock o u tput

o

C lone TX data outp u t

0

P o w e r s u p p ly c o n trol (or TX o u tpu t

o
o

P o w e r supply con tro l tor C lone outp ut
S w itch e s V C O o u lpu t to TX

P LL un lo ck sig n a l inp u t Active
C P U reset in p ut
P o w e r su pp ly c o n tro l lor V C O output

0
0 Lam p O N /O F F o u tput

I Inte rnal o s c illator input

o

Inte rnal o s c illa tor oulp u t

C a li k e y inpu t

I V/M kfiy in p ut

I

Lam p key in p u t

I Function ke y inpul

I

M o n i key in p u t

o

M ic ro p h o n e m u te oulp u t

D es c r iptio n

H

Low p o w er

Normal

at w o rit

Active

L

A ctive
A ctive

Hig h p o w er

A ctive

A c tiv e

A c tive

C lone

A ctive

on re s e t

A c tiv e

A ctive

A c tiv e
A c tiv e
A c tiv e

A ctive
A c tiv e
A c tiv e

N o . N a m e

39 A F P 0
40

A F C
T O N E 5 0

41
42

T O N E 4
T O N E 3 0

43
44 T O N E 2
45 TO N E 1 0

46

TO N E O 0
47 P T T K
48 R E F
49

O P E N
50 O P E N

O P E N

51

O P E N

52

O P E N

53
54

O P E N
55 O P E N
56 S i 4 0

S 1 3 0

57
58 S 1 2
59 S11 o LCD S E G 1 1
60 S 1 0 0
61 S9
62

S8

63 S 7
64

S 6
65 S5
66 S 4

S3

67

S2

66

S1

69
70 SO

V c c I

71
72

V R E F I
73 G N D I
74 C O M 3 0

75 C O M 2
76 C O M 1

CO M O o

77
70 V L 3 o LC D p o w e r su p p ly
79 V L 2

VL1

80

I/O D e s c r ip tio n

P o w e r su p p ly contro l fo r A F am p

0

A F m u te
S ub tcne sig n al o u tput

0 S u b tone sig n a l outp u t

S u b tone sig nal ou tput
S ub to n e sig n a l outp ut

0

S u b to n e sig n a l outp u t

S ub tone signal o u tput
I PTT key input
I P L L refe rence sele c t

No use

-
No use

-
No use

-
No use

-
No use

-
No use

-
No use

■
LCD S E G 1 4
LCD S E G 1 3
LC D S E G 1 2

0

LCD S E G 1 0

0 LCD S E G 9

0 L C D S E G 6
0 L C D S E G 7
0 L C D S E G 6
0 LCD S E G 5
0 LC D S E G 4
0 LCD S E G 3

LC D S E G 2

0
0 LCD S E G 1
0 L C D SE G 0

P o w er supply term inal 3V
A /D refe rence le v e l 3V
A n a log gro u n d

LCD C O M 3
0 LC D CO M 2
0 L C D CO M 1

LC D C O M O

0 LC D p o w er supply

LCD p o w e r s u p p ly

0

H

22 .6M H z 23.5M H z

L
A c tiv e
A c tiv e

SEMICONDUCTOR DATA

1) AN77L03M (XA0230)

Voltage Regulator

Block Diagram

C O
LU

u

O u tp u t C o m m o n Inpui

C O
C O

J u

2) AT24C02N (XA0364)

CMOS Serial EEPROM

Block Diagram

!B1 Vcc

--

î*î a»© —

OCL -

t»| 5ÜA -

PI «

•21 A1
(I) AO

START

ST OP

l o g ;c

DEVICE

ADDRESS

COMPARATOR

P

Sfcf tlA L

C O tfT W X

LOG*G

ccmsJ

DATA WCRD

AOWVCOLMTEft

1 Y DEC h ~ "

DATA REGISTER

Dcct/ACK

LOGIC

AO 1

A1

A2

G N D

£ Z Z
c z

tzz

2

3

4

>

— 1
IO

■ U

O
o

IO

Z

Pin Configurations

Pn Name

AO to A2

SDA

SCL
Test

NC No Cor.nect

Address inputs
Sefiai Daïa
S erial Clock
Test input (GND or V « )

Function

8

7

6

5

V c c

T E S T

S C L

S D A

-

n n n o u c o f f l w w w c o f t M B

- ■ M U o - j o t J í l T lO O-'fO C JJ iy iCn-s lODlO

iiiîîlîliiîîîîîîîîîî

3) M38223M4HP (XA0470)

CPU

UPK

DOWNK

TX LOW

NC

LB,
RXC
SMT

SD

EECLK

EEDATA

CBEEP

. BEEP

LBSW

BP1
BP2

PSTB

DATA

CLK

TXD

RXD

c e

CE

c m

C E

cz :

C E

CE

C E

p f T
I Ï2~

~ÜT

s

f f i

16

C H

19

~2Ô~

" v l oo c d JJ o

co

00

ÏO

ro
co

X

X

X
I

" 0

fO ko Ol 03 K l 00 <0 o

~6Ô1

~59~|

~ 5 s n

57
56
55
54

53
52
51
5D
49
48

3 D

46

SEG10
SEG11

P34/SEG12
P35/SEG13

P 3 6 /S E G 1 4

P37/SEG15
PD0/S EG16

P01/SEG17
P02/SEG18
P03/SEG19

PÛ4/SEG20

P05/SEG21
P06/SEG22
P07/SEG23

P 1 0 /S E G 2 4

P11/SEG25
P12/SEG26
P13/SEG27

P14/SEG28

P15/SEG29

iiiîîini itniiittt

X

TJ "O

-v| 'vj

-* o

£ £
O O

2 O

z

2

U "O XJ X I XI XI XI

ro ro ro ro ro ro ro

S

^ CD ü l 4^ CO ro —*■ o

■o -D

_

t _ 1

03 co

m m

CD O

0 3 CO

jn

4) M64076GP (XA0352)

Dual PLL Synthesizer

Equivalent Circuit

Fin 2 (1

ParaiTitrter

Pcv»®f vofrage

LPF supply vcrtage

Locai osGriHifif tevei Vii

Local a K taf a r ni* * fra ip m y

Xin ,npiit tevei Ver

Xm rp ut frequency

Symbol

Vcc

Rn

Fxin

— D a ta la tch (1 7 bit)

I

Lo c a l 2
program m a b le div ider

VF

Condition

Fm -8 0-520f*4z

Vta—lOiJBm

Fm-8Û-S20WHz
Vcc-2.7-5.5V

Vin—20—4<®ni
Vcc--2.7-5.5V

Vcc*«2.7-5.5V
Fn n-5 0-25MHr

StnÈ wave

Vco2.7-5.5V

Vxin*0.4-V‘Wp-p

Min.

Typ»

2.7

-

-

9 12 V

•20

-

00

-

0.4 - Î.4

10

-

Max.. Lbrf

5.5 V

-4

dBm

520

fcfrü

Vp-p

MHz

25

D a ta latch (16bit)

R e ference freq u e n c y 2
program m a b le div ider

R e fere nc e freq u e n c y 1
program m a b le div ider

i

D a ta la tch (1 6 b il)

Lo cal 1
program m a b le div ider

' l ~ ~

D a ta la tch (I7 b it)

D a ta la tch (6 b it)

G N D

B U | >

---------

(vj) GND

^ 7 ) O P 2

9

5) NJM2070M (XA0210)

Low Voltage Power Amplifier

Equivalent Circuit

V + - 6 V , T a= 2 5 + /-2 ° C

P a ra m e te r

S u p p ty v o ltag e

IcSe curre n t

O utpu! volta g e

Inp u t b ias curre n t

O utpu! p o w e r

D istortio n
V o lta g e g a in
Inp u t im p e d a n c e

E q u iv alent in p u t n o ise

voltage

P o w e r su p p ly v o lta g e

re jection ratio

C o n d ition

RL= °o

T H D = 1 0 % , t= 1 k H z

T H D -1 % , (.1 k H z

P O -0.4 W , H L= 4 £ Î, f= 1 k H z
f=1kHz

f-lk H z

R s = 1 0 k il

l= 1 0 0 H z , C x = 1 0 0 m.F

V + - 6 V , R L = 4 il
V + = 4 .5 V , R L - 4 Ü

V + = 3 V , R L = 4 fi

V + = 2 V , R L = *4il
V + = 6 V , H L - 4 Î1

V + - 4 . 5 V , R L = 4 Ii

A c u rve

B = 2 2 H z to 22kH z

Sym b o l Min .

V+

IQ
V o

Id

Po

TH D - 0.2 5 -

Av

ZlN

Vn1

Vn2

SV R

1.B

0.5 Û.6

100

Typ.

-

-

- 2,7

-

-

-

- 2 5 0 -

41 44

- '

- 3 -

24

4 7

200

0.3 2
120

' 3 0

500

-

2.5

30

M ax.

15

-

-

-

-

-

47

-

-

-

U n it

V

m A

-

-

V

nA

W

W
m W
m W
m W
m W

%

dB

ki2

n v

n v

dB

P o w e r g a in b a n d w idth

(-3dB)

R L - 8 a P o = 2 5 0 m W

P.B

2G0

-

-

kH z

6) NJM2100M (XA0209)

Dual Operational Amplifiers

V - 4

Equivalent Circuit

7) RN5VL25AA-T1 (XA0309)

C-MOS Voltage Detector

Equivalent Circuit

VDD ■

U T T U "

OUT VDD VSS

R L 5 V L 2 5 A A

8) TA31136FN (XA0404)

Low Power FM IF

Block Diagram

9) Transistor, Diode and LED Outline Drawings

Top View

. JSS356.

XD0272

2SA1576

" XTÖ094

C

g___

FR

“H — E T

B E

UN5214

.XU0052.

” c ' ”

□

8D

LB ^

B E

1SV237

X D 0 Î 4 Ï ’

1 S V 2 3 9 .

X D 0 2 3 6 "

# 1

a a

BB

2SC3366 2_SC4Q81_

XTÛ142

C

__Q__

R25

S — S '

B E

XN_1_1_1M_

XÜQÓ46’

62 E ¡31

T*

O'

]X T 0 Q S 5 "

C ‘

J 3

___

BR

' S — B "

B E

X D 0 1 3 .4.

H V Ü ’359"

n a n

EK

~ S ~

S '

C2

Cl

,

1SV257

*

2SÇ4213A

"x T û ib ï”

c ”

AA

■Q— B ~

B E

.M A 111. .

XD029Ö"

2 S C 4 2 2 6

” c ”

R24

□ □

B E

SML-110MT

""XLÖÖ37 "

/ / / / j / /

f

2SC5065

’xtÔÏ37"

c

_Q _

MAO

S — S ’

B E

SML-310ÜT

XL0Ö35“ '

I

UN511H

X Ü Ô Î66

C

___

B _

6P

~ Q — S

B E

UlGWJfW

XD0225 "XD0293

G W

f

UN2122
XÜÓÍ67'

. . . . . .

___S___

7B

LW

B

E

10) LCD

L C D Pattern

, M Q o r LOW

!B D B APO Q

f S t n & OOcn

O O I mJiimJ Lmf i! S

BUSY

M1 M2 M3 M4

t T i' ' 1 ' i ■ i ■ i 1 i 1 i i i ; i 1 i 1 i : i "i~~i’ni~T 1 i 1 i 1 i 1 i

1 1; I ; !; I i 11 ;; I i !; !; ! i I ; I : !; I ; ! i I i I i I : ; ¡19

1 ! i ! i I i ! i I i ! i ! i I i I i I i I i I i I i I i I i ! i ! i ! i I i ' J

LCD connection table

No,

10 3A
11
12
13

14
15

16
17
18

19 75

C O M 1 C O M 2

1
2 - C O M 2 - -
3
4
5
6
7
B A P O M S
9 3 F

C O M 1

- -

- - -

B

2E

2C

4F
4A

5F

5A

6F

6A
7F
7A

- - -

m

2 G

2B

3G

3B

4G
4B
5G
5B

6G
6B
7G
7B

50

C O M 3

C O M 3

0
2F

2A

LO W

3 E iB U S Y l
3C
4E
4C AD
5E
5C

6E
6C 6D
7E
7C

25

C O M 4

C O M 4

1B , C

-

M

2D
M 6

3D
M1

M 2
5D

DP

M 3
7D

M4

EXPLODED VIEW

1) Front Assembly

AF0005

AF0005

TW0Û07B

NK0053

AN0012

FG0164

FG0161

AFGG05

MRCL02AA

MBCLQ2AA \

ST0075Z

ES0011AZ

TG0021

FG0221

AFÛ005

s o ld e r

solder

YZ0139

PR0237 (T)

CPU UNIT

AF0005

SDO044

FG0107

KÎ0057Y (T,T2tJ|

KZ0059Y|C)

KZÛMéY(EC)O)

SD0044

M0ALO4GG

FM0150

1

KZQ060Y

KZ0065Y{J)

KZ0066Y(T.T2,C,EC10)

KZ0066Y

2) Rear Assembly 1

T W 0 0 0 8

E A 0 0 6 2

(D J - S 1 1 )

E A 0 0 5 0 A

(D J - S 4 1 .E C 1 0 )

The black-marked side
should be installed upside.

FG 0 1 0 8 S 0 0 0 4 1 1

* T *

FG 0 1 3 2

KB0063

TZ0059

FG0132

i

T

3) Rear Assembly 2

DJ-S4I

p f i cai ogj
P fl030 3( C. ECl0)

D sc oa afT2 j ,c)
05 03 72 EK T)
DS 03 73 A(EC 10)

- AX0004

A X 0 0 0 4

’f- « — A X 0 0 0 4

PR03 C9( E)

DJ S 4I

D JS1J

D J - S l l

DS Q3a7A0T)
0 S 03M(E )

AX0004

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CiuUttr La W t

Cailiia LiLtl Ti
Cj«liun LiUlC

Ca*tt.w U c l EC1&
Bdlleij ’ftnrniii B
&>U«iy Tenniwt C

Mu» Spritj

LhtTjtîirraini

Ver.

For DJ-S41T/T2/(J)/(C) & EC10

Ref.

Parta No. Description

Ño.

ST0075Z

TWCW7B Ji;L Cip
1WHIÛS
rrfasaj
TBMM

HKMWB

HK033SB
HKC©

HKGHsH

raiw ii

PHOOM

KBWWA

PÎM37

fn:ai35E

PS0270

psa:i

PÍ0383A

PSBÎ1W
PS0ÍÍS

Ffa»5

DSÏïî-ill

DSJJJÍE

dsbss

DS038S SjÉt &1»L
DSU373A
rocou
PBiWI
P&IJM
H?®:»
m ica
AKC08
AZ0C29
BB0C07

Pack in q

Parts Narno

SPHelder

C«vtr Rubber
P-tlluy Etuhier
lüijLilor

[lia Csrlcn T
lu n ti-jin

iknCuni*«

liil i
l’imCtrttn

Fj ■■ ■■ 'ml kn Csrd
fu ia n
KCEkifllSul
ItinCKtin l&ifc.
Infctruetfcn Mâaçif
l'-înicl; ■■ I t a n 1
h Mxr.ujf
I'1 Ln¿:i.::ri Man ml
l-i'.njri'-.T VjubjI

fîSfad

S;**- SWt
Kp« S)twl

Sjx: SSmi

Sjct Si«l
lût Ni Stal For Boi
CSWirVbUl
Ci' Mark Label EC10

fríítíUSlL Eaj frlSGitîO
Bell Clip
B«'{ Clip Screw
PE Washer
Hand Slrap

Ver.

TJ
J

C

BC10

T

T

ï
TJ

C
C
B010
T2
T
T2
J
C
BC10

C

Hot.

Mechanical ParW Packinjj

Parts No. Description Parts Na mo

No.

Vor.

H

o

Ref.

Part» No. Description: Parta Ñamo

No.

Ver,

Ref.

Parts No. Description Parts Namo Ver,

No.

For DJ-S41 T/T2/(J)/(C) & EC10

ADJUSTMENT

For DJ-S41 T/T2/(J)/(C) & EC10

1) Required Test Equipment

1. Digital Multimeter

2. Regulated Power Supply

Supply voltage: 5.5VDC
Current: 1A or more

3. Oscilloscope

Measurable frequency: Audio Frequency

4. Spectrum Analyzer

Measuring range: Up to 2GHz or more

5. Power Meter

Measurable frequency:
Impedance:
Power:

Up to 500MHz
5012
1W or more

6. Speaker

Impedance: 8Q

8. Transceiver Tester

Up to 500MHz

a. Frequency Counter

b. Power Meter

Impedance: 50£2

Measuring range: 1W or more

c. Audio Voltmeter

Measurable frequency: 50Hz ~ 10kHz

Sensitivity: 1mV~10V

d. Distortion Meter

Measurable frequency: 1 kHz
Input level: Up to 40dB
Distortion level: 1 % ~ 100%

e. Audio Generator

Output frequency: 1 kHz ~ 10kHz
Output impedance: 600Q

7. SSG

Output frequency: UptolG H z
Output level: -20dB/0-VV to120dB/1V
Modulation: FM

f. Linear Detector

Note:

1. 5.5V of power voltage is supplied from DC jack.

2. The transmitter system should be adjusted or inspected in high power.

2) Adjustment

F o r D J -S 4 1 T /T 2 /{ J )/(C ) & E C 1 0

Item

Condition

f=439.95 RX(J)
f=434.05 RX

(C h e c i o )

f=449.95 RX(T)

PLL VCO

f=439.95 TX(J)
f=434.05 TX

( G ) ( E c i o ;

f=449.95 TX{T)

Reference
Frequency

TX Power

f=435.05 TX(J}(T)
f=434.05 TX (C)(ECI0)

f=434.05 TX (C)(ecio)

TX Power Hif=435.05 TX{J)(T)

DC=5.5V

TX Power

See *2.

Low

f=435.05 TX(J)(T)

Diviation

f=434.05 TX (C)(Ecio)
AG :1kHz
50mV (-30dBm)

Measurem ent

Equipment

Digital

Multimeter

Freq. Counter

Power Meter

Linear Det.
Oscilloscope
Power Meter

AG

Terminal

Unit

RF

RF

ANT

RF ANT

Unit

PD VCO

RF TC5

RF

- - ■

CPU

Adju stment

Parts

-

f= 43 5 .0 5 (J)(T)

f=4 34. 05( 0(E ci o)

i0mW±Q.5mW 10mW±0.5mW

RT3

RT301

4.5±0.1 kHz

Specifics rtions

Method

1.6~1.8V(J)

See "1.

1.2-1.4V(C)

0.7-0.9V(T)

Check

2.3V or below

1.3 or betow(c)

±100Hz

Check 340mW or more

Check

150mW or below

4 . 5± 0.1 kHz

Tone

Sensitivity

Squelch

f=435.05 TX(J)(T)
f=434.05 TX (C)tECio)

f=435.05 RX(J)(T)
f=434.05 RX(C)(EC,o)

f=435.05 TX(J)(T)
t=434.05 TX (C)(£Cio)

Output: -12dB//

Mad: ON

SSG

Distortion Meter

Oscilloscope

Level Meter

RF

ANT RF

(=435.05 RX(J}{T)

S meter

f =¡434.05 RX (C)iecio)
Out put: +l2dB/i

CPU

Mod: ON

1.7±0.1V(J).

*1:Extend the coil L102 so that the P.D. voltage becomes ■{ 1.3±0.1{C)(EC10).

0.8±0.1 V{T).

*2:Switching to Low power

(J)

.........................

.........................

(T)
(C)(EC10)

Press RPT key while transmitting.
Press SCAN key while transmitting.

..............

NoTX power selector

RF TC2,4

RT2

RT302

Check 0.8 ~ 1.0kHz

12dB SINAD

-8dB/j (EMF)

max.

SQ Open

-15dB^>Close

-9dB/j <Open

All digits are lit

up.

or below

3) Adjustment Points

RF Unit

For DJ-S41T/T2/(J)/(C) & EC10

CN1 (Antenna Connector)

RT2 (Squelch)

TC3 (Ref. Frequency]

L102 (PDAdj.)

TP2 (PD test point)

CPU Unit

RT3 (TX Power)
(Mounted C Version, EC10 only)

TC2 (Sensitivity)

TC4 (Sensitivity)

VCO

Lo

23

PC BOARD VIEW

1) RF Unit
Component side

For DJ-S41 T/T2/(J)/(C) & EC10

z i

Solder side For D J -S41 T/T2/(J)/(C) & EC10

25

For DJ-S41T/T2/(J)/(C)

SV50-*

SVÎ0Ï

svice

H 5 ä ? 0 ■

s

SV30»

vm

«354

Solder side

For DJ-S41T/T2/(J)/(C)

(N ot lo r ECl 0)

2 7

3) CPU Unit later version Component side

For DJ-S41 T/T2/(J)/(C) & EC10

2&

4) vco unit nxrœ

For DJ-S41T7T2/(J)/(C) & EC 10

Component side

Solder side

5) SW Unit For DJ-S41T/T2/(J)/{C) & EC10

Component side

30

CURCUIT DIAGRAM

1 ) RF Unit

For DJ-S41T/T2/(J)/(C) & EC10

9W

ru*i

For DJ-S41T/T2/(J)/(C) & EC10

Install ng R383 will make

C41 rechargable thru lh«
DC Jack (max. 6V DC).

14 s f< 3! s i * s i e s x | § r m

CO

0102

2 S C 5 0 6 5

t- Q > h- 9

3 z m ^ o o

O O Cl loc 2 Cl

<

o

o

c

3

For DJ-S41 T/T2/(J)/(C) & EC10

BLOCK DIAGRAM

For DJ-S41T/T2/(J)/(C) & EC10

RF UNIT CPU UNIT

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No.

W1

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CEO*J
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Parts Name

Wire

OORbUIICSOHI

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Kfe r, Dump«
PCB

C P U U n it
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Chip Tintai
Chip lif i iil

ch ipe.
Chip C.
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RK30J1

Description Parts Namo Vor.

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Chip E. ERjæsïJIMY
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Description
Chip R.

Chip H.

Chip E.

M e c h a n ica l P a r ts

CPU Unit / VCO Unit / M uchanical Parts

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Parta Name

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Speaker fixlart

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Parts No.

No.

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Description

Packing

Parts Namo Var.

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raw^bt

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Rei.

Purls No.

No.

E

T
T

Mechanical P a ils / Packing

Description

Parts Name

Vor.

For DJ-S11T/E

ADJUSTMENT

For DJ-S11T/E

1) Required Test Equipment

1. Digital Multimeter

2. Regulated Power Supply

Supply voltage: 5.5VDC
Current: 1A or more

3. Oscilloscope

Measurable frequency: Audio Frequency

4. Spectrum Analyzer

Measuring range: Up to 2GHz or more

5. Power Meter

Measurable frequency: Up to 500MHz
Impedance: 50fi
Power: 1W or more

6. Speaker

Impedance:

8. Transceiver Tester

Up to 500MHz

a. Frequency Counter

b. Power Meter

Impedance: 50ii
Measuring range: 1W or more

c. Audio Voltmeter

Measurable frequency: 50Hz ~ 10kHz

Sensitivity: 1mV~10V

d. Distortion Meter

Measurable frequency: 1kHz
Input level: Up to 40dB
Distortion level: 1 % — 100%

e. Audio Generator

Output frequency:
Output impedance:

1kHz~10kHz
600Q

7. SSG

Output frequency:
Output level:
Modulation:

Up to 1GHz

-20dB/0.1 jxV to120dB/1V
FM

f. Linear Detector

Note:

1. 5.5V of power voltage is supplied from DC jack.

2. The transmitter system should be adjusted or inspected in high power.

a

2) Adjustment

For DJ-S11T/E

Item

PLL VCO

Reference
Frequency

TX Power

Hi

TX Power

Low

Diviation

Tone

Condition

f=1 46.00 RX

f= 145.95 TX

f=145.00 TX

f=145.00 TX

DC=5.5V

See '2.

f=145.00 TX

AG :1 kHz
50mV(-30dBm)

1=145.00 TX

Measurement

Equipment

Digital

Multimeter

Freq. Counter

Poer Meter

Linear Det.

Oscilloscope

Power Meter

AG

Unit

RF

RF

RF

Terminal

PD

ANT

ANT

Unit

VCO

RF

-

CPU

Adjustment

Parts

-

TC5 t= 145.00

-

RT301

Method

See *1

Check

Check

Check

4.5±0.1kHz 4.5+0.1kHz

Check

0.9 - 1.1V

3.0V or below

±100Hz

340mW or more

150mW or below

0.4 ~ 1,3kHz

f=145.05 RX

Sensitivity

f= 145.05 RX

SSG

Squelch

S meter

*1 :Extend the coil L102 so that the P.D. voltage becomes 1.0+0.1 V

'2:Switching to Low power

Output:-12dB/i

Mod: ON

(=145.05 RX

Ou1put:+12dB^
Mod: ON

Distortion Meter

Oscilloscope

Level Meter

RF

ANT

RF TC2.4

RF

RT2

CPU

RT302

12dB SINAD

max.

SQ Open

All digits are lit

up.

-8dB^ (EMF)
or below

-15dB/i>Close

-9dB/i <Oper>

39

3) Adjustment Points

For DJ-S11T/E

RF Unit

RT2 (Squelch)

TC3 (Ref. Frequency

L102 (PDAdj.)

TP2 (PDtest point)

CPU Unit

CN1 (Antenna Connector)

RT3 (TX Power)
(Mounted C Version, EC10 only)

TC2 (Sensitivity)

TC4 (Sensitivity)

40

PC BOARD VIEW

1) RF Unit

Component side

For DJ-S11T/E

Solder side

For DJ-S11T/E

2) CPU UNIT

Component side

For DJ-S11T/E

43

3) VCO Unit raiTES

For DJ-S11T/E

Component side

Solder side

4) sw Unit

For DJ-S11T/E

____ _ _

Component side

CURCUIT DIAGRAM

1) RF Unit B B B n B

For DJ-S11T/E

2) CPU UNIT

For DJ-S11T/E

DISPLAY

HKTñ

iW ¡sîï-

«Í3

jo

lira

MÎTÏ

47

3/ius-na joj

nun OOA (e

BLOCK DIAGRAM

For DJ-S11T/E

x a / x t

RF UNIT C P U UNIT

49

ALINCO, INC.

Head Office : "TWIN 21” MID Tower Building 23F

1-61, 2-Chome, Shiromi, Chuo-ku, Osaka 540 Japan
Phone:[phone] Fax:[phone] Telex: 63086
E-mail: [e-mail]

U.S.A. : 438 Amapola Ave., Suite 130, Torrance, CA 90501-6201, U.S.A.

Phone: [phone] Fax: [phone]
h tt p:// www. al i nco. co m/

Germany : Eschborner Landstrasse 55, 60489 Frankfurt am Main, Germany

Phone: [phone] Fax: [phone]

Dealer/Distributor

C o p y rig h t 19 9 7 A lin e o , Inc. O s a k a J a p a n
P r in te d in J a p a n

PM0040A