Agilent Technologies 16750A User Manual

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© 1992-2002 Agilent Technologies. All rights reserved.
Agilent Technologies 16750A/B Logic Analyzer

Agilent Technologies 16750A/B Logic Analyzer

The Agilent Technologies 16750A/B 400 MHz State/2 GHz Timing Zoom logic analyzer offers 4M deep memory and very fast sample rates - up to 2 GHz for areas around the trigger - with up to 340 channels.
“Getting Started” on page 11
“Task Guide” on page 31
“Step 1. Connect the logic analyzer to the device under test” on page 13
“Step 2. Choose the sampling mode” on page 14
“Step 3. Format labels for the probed signals” on page 17
“Step 4. Define the trigger condition” on page 20
“Step 5. Run the measurement” on page 21
“Step 6. Display the captured data” on page 22
“Probing the Device Under Test” on page 33
“Choosing the Sampling Mode” on page 36
“Selecting the Timing Mode (Asynchronous Sampling)” on page 36
“Selecting the State Mode (Synchronous Sampling)” on page 43
“In Either Timing Mode or State Mode” on page 52
“Using 2 GHz Timing Zoom” on page 54
“Formatting Labels for Logic Analyzer Probes” on page 57
“Setting Up Triggers and Running Measurements” on page 64
“Using Trigger Functions” on page 65
“Using State Mode Trigger Features” on page 70
“Editing the Trigger Sequence” on page 72
“Editing Advanced Trigger Functions” on page 78
“Saving/Recalling Trigger Setups” on page 85
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Agilent Technologies 16750A/B Logic Analyzer
“Running Measurements” on page 86
“Displaying Captured Data” on page 88
“Using Symbols” on page 95
“Printing/Exporting Captured Data” on page 104
“Solving Logic Analysis Problems” on page 108
“Saving and Loading Logic Analyzer Configurations” on page 110
“Reference” on page 113
“Concepts” on page 191
See Also Main System Help (see the Agilent Technologies 16700A/B-Series Logic
“The Sampling Tab” on page 115
“The Format Tab” on page 119
“The Trigger Tab” on page 146
“The Symbols Tab” on page 159
“Error Messages” on page 170
“Specifications and Characteristics” on page 186
“Understanding Logic Analyzer Triggering” on page 192
“Understanding State Mode Sampling Positions” on page 208
Analysis System help volume)
Glossary (see page 211)
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Agilent Technologies 16750A/B Logic Analyzer
4

Contents

Agilent Technologies 16750A/B Logic Analyzer
1 Getting Started
Step 1. Connect the logic analyzer to the device under test 13
Step 2. Choose the sampling mode 14
Step 3. Format labels for the probed signals 17
Step 4. Define the trigger condition 20
Step 5. Run the measurement 21
Step 6. Display the captured data 22
For More Information... 24
Example: Timing measurement on counter board 26
Example: State measurement on counter board 28
2Task Guide
Probing the Device Under Test 33
Choosing the Sampling Mode 36
Selecting the Timing Mode (Asynchronous Sampling) 36
5
Contents
To select transitional timing or store qualified 37
More on Store Qualification in Transitional Timing 38 More on Storing Transitions 38 Transitional Timing Considerations 39 Selecting the State Mode (Synchronous Sampling) 43 In Either Timing Mode or State Mode 52 Using 2 GHz Timing Zoom 54
Formatting Labels for Logic Analyzer Probes 57
To assign pods to one or two analyzers 57 To set pod threshold voltages 58 To assign probe channels to labels 59 To change the label polarity 61 To reorder bits in a label 61 To turn labels off or on 62
Setting Up Triggers and Running Measurements 64
Using Trigger Functions 65 Using State Mode Trigger Features 70 Editing the Trigger Sequence 72 Editing Advanced Trigger Functions 78 Saving/Recalling Trigger Setups 85 Running Measurements 86
Displaying Captured Data 88
To open Waveform or Listing displays 88 To display Timing Zoom data 89 To use other display tools 90 If the captured data doesn't look correct 92 If there are filtered data holes in display memory 92 To display symbols for data values 93 To cancel the display processing of captured data 94
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Contents
Using Symbols 95
To load object file symbols 96 To adjust symbol values for relocated code 97 To create user-defined symbols 98 To enter symbolic label values 99 To create an ASCII symbol file 100 To create a readers.ini file 101
Printing/Exporting Captured Data 104
Cross-Triggering 106
To cross-trigger between two analyzers 106 To cross-trigger with another instrument 107
Solving Logic Analysis Problems 108
To test the logic analyzer hardware 108
Saving and Loading Logic Analyzer Configurations 110
3 Reference
The Sampling Tab 115
Timing Mode 116 State Mode 117
The Format Tab 119
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Contents
Importing Netlist and ASCII Files 121
Exporting ASCII Files 123 Importing ASCII Files 123 Termination Adapter 125 E5346A High Density Adapter 126 Mapping Connector Names 127 Import the Net List File 127 Verify Net to Label Mapping 128 Select/Create Interface Labels 129 Pod Assignment Dialog 130 Sampling Positions Dialog 131
The Trigger Tab 146
Trigger Functions Subtab 147 Settings Subtab 154 Overview Subtab 155 Default Storing Subtab 156 Status Subtab 157 Save/Recall Subtab 157
The Symbols Tab 159
Symbols Selector Dialog 161 Symbol File Formats 163 General-Purpose ASCII (GPA) Symbol File Format 164
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Contents
Error Messages 170
Must assign Pod 1 on the master card to specify actions for flags 171 Branch expression is too complex 171 Cannot specify range on label with clock bits that span pod pairs 176 Counter value checked as an event, but no increment action specified 177 Goto action specifies an undefined level 177 Maximum of 32 Channels Per Label 177 Hardware Initialization Failed 178 Must assign another pod pair to specify actions for flags 178 No more Edge/Glitch resources available for this pod pair 178 No more Pattern resources available for this pod pair 179 No Trigger action found in the trace specification 179 Slow or Missing Clock 180 Timer value checked as an event, but no start action specified 180 Trigger function initialization failure 181 Trigger inhibited during timing prestore 182 Trigger Specification is too complex 182 Waiting for Trigger 184 Analyzer armed from another module contains no "Arm in from IMB" event 185
Specifications and Characteristics 186
Agilent 16750A/B Logic Analyzer Specifications 186 Agilent 16750A/B Logic Analyzer Characteristics 186 What is a Specification? 189 What is a Characteristic? 189
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Contents
4 Concepts
Understanding Logic Analyzer Triggering 192
The Conveyor Belt Analogy 192 Summary of Triggering Capabilities 194 Sequence Levels 194 Boolean Expressions 197 Branches 198 Edges 198 Ranges 198 Flags 199 Occurrence Counters and Global Counters 199 Timers 200 Storage Qualification 201 Strategies for Setting Up Triggers 203 Conclusions 207
Understanding State Mode Sampling Positions 208
Glossary
Index
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1

Getting Started

After you have connected the logic analyzer probes to your device under test (see “Step 1. Connect the logic analyzer to the device under test” on page 13), any measurement will have the following basic steps:
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Chapter 1: Getting Started
“Step 2. Choose the sampling mode” on page 14
“Step 3. Format labels for the probed signals” on page 17
“Step 4. Define the trigger condition” on page 20
“Step 5. Run the measurement” on page 21
“Step 6. Display the captured data” on page 22
If you have previously saved a logic analyzer setup to a configuration file, or if configuration files are included with an analysis probe, you can load the configuration file to set up the logic analyzer and define the trigger condition.
Once you have made a logic analyzer measurement, the measurement can be refined by repeating steps 4 - 6.
Next: “Step 1. Connect the logic analyzer to the device under test” on page 13
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Chapter 1: Getting Started

Step 1. Connect the logic analyzer to the device under test

Step 1. Connect the logic analyzer to the device under test
Before you begin setting up the logic analyzer for a measurement, you need to physically connect the logic analyzer to your device under test.
There are several ways to connect logic analyzer probes to the device under test:
• Using the general-purpose probes, the standard flying lead set, and grabbers to connect to pins and leads in the device under test.
• By designing connectors (headers) into the device under test so that logic analyzer probe cables and termination adapters can plug in directly.
By designing connectors (headers) and terminations into the device under test so that logic analyzer probe cables can plug in directly.
•Using an analysis probe to connect to microprocessors and standard buses.
When using an analysis probe, the Setup Assistant guides you through the connection and setup process for your particular logic analyzer and analysis probe.
When connecting logic analyzer probes to the device under test:
1. Attach the logic analyzer probes to the device under test in a way that keeps logically-related channels together.
2. Be sure to ground each pod.
Next: “Step 2. Choose the sampling mode” on page 14
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Chapter 1: Getting Started

Step 2. Choose the sampling mode

Step 2. Choose the sampling mode
There are two logic analyzer sampling modes to choose from: timing mode and state mode.
In timing mode, the logic analyzer samples asynchronously, based on an internal sampling clock signal.
In state mode, the logic analyzer samples synchronously, based on a sampling clock signal (or signals) from the device under test. Typically, the signal used for sampling in state mode is a state machine or microprocessor clock signal.
To choose the sampling mode
1. In the Sampling tab, choose Timing Mode or State Mode.
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Chapter 1: Getting Started
Step 2. Choose the sampling mode
If you chose Timing Mode
1. Select the timing analyzer full/half channel configuration.
Typically, you can choose a half-channel configuration with faster sampling and greater memory depth, but with half of the channels.
2. Set the sample period.
To capture signal level changes reliably, the sample period should be less than half (many engineers prefer one-fourth) of the period of the fastest signal you want to measure.
If you chose State Mode
1. Select the state analyzer speed configuration (if there is a configuration option).
2. In the Clock Setup, using the Master only mode, specify which clock signal edges from the device under test will be used as the sampling clock.
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Chapter 1: Getting Started
Step 2. Choose the sampling mode
You can also specify clock input signal levels (from the device under test) that will enable (qualify) the sampling clock.
In either sampling mode
1. Specify the trigger position.
The trigger is the event in the device under test that you want to capture data around.
Specify whether you want to look at data after the trigger (Start), before and after the trigger (Center), before the trigger (End), or use a percentage of the logic analyzer's memory for data after the trigger (User Defined).
2. Set the acquisition memory depth.
If you need less data and want measurements to run faster, you can limit the amount of trace memory that is filled with samples.
Next: “Step 3. Format labels for the probed signals” on page 17
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Chapter 1: Getting Started

Step 3. Format labels for the probed signals

Step 3. Format labels for the probed signals
When a logic analyzer probes hundreds of signals in a device under test, you need to be able to give those channels more meaningful names than "pod 1, channel 1".
The Format tab is mainly for assigning bus and signal names (from the device under test), to logic analyzer channels. These names are called labels. Labels are used when setting up triggers and displaying captured data.
The Format tab also lets you do things like assign pod pairs to one or two logic analyzers and specify the logic analyzer threshold voltage.
The Format tab has activity indicators that show whether the signal a channel is probing is above the threshold voltage (high), below the threshold voltage (low), or transitioning.
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Chapter 1: Getting Started
Step 3. Format labels for the probed signals
To assign pods to one or two logic analyzers
A logic analyzer's pod pairs can be assigned to one or two separate logic analyzers or they can be left unassigned.
1. In the Format tab, select the Pod Assignment button.
2. In the Pod Assignment dialog, drag a pod pair to the appropriate logic analyzer.
3. Select the Close button.
To specify threshold voltages
The threshold voltage is the voltage level that a signal must cross before the logic analyzer recognizes a change in logic levels.
1. In the Format tab, select the button under the pod name.
2. In the Pod threshold dialog, select the desired Standard or User Defined threshold voltage.
3. Select the Close button.
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Chapter 1: Getting Started
Step 3. Format labels for the probed signals
To assign names to logic analyzer channels
1. Select a label button, and either:
• Choose the Rename command, enter the label name, and select the OK button.
Or, choose the Insert before or Insert after command, enter the label name, and select the OK button.
2. In the label row, select the button of the pod that contains the channels you want to assign.
3. Either choose one of the standard label assignments--dots (.) mean the channel is unassigned, asterisks (*) mean the channel is assigned--or choose Individual.
If you chose Individual:
a. In the "label - pod" dialog, select the channels you want to assign/
unassign.
b. Select the OK button.
Next: “Step 4. Define the trigger condition” on page 20
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Chapter 1: Getting Started

Step 4. Define the trigger condition

Step 4. Define the trigger condition
The trigger is the event in the device under test that you want to capture data around.
1. In the Trigger tab, and in the Trigger Functions subtab, choose the type of trigger you want to specify, and select the Replace button.
2. In the Trigger Sequence portion of the Trigger tab, select the buttons to define the label values and/or other conditions you want to trigger on.
Next: “Step 5. Run the measurement” on page 21
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Chapter 1: Getting Started

Step 5. Run the measurement

Step 5. Run the measurement
Once the trigger condition has been defined, you can run the measurement.
1. Select the Run Single button .
When you run a measurement, the Stop button becomes available while the logic analyzer looks for the trigger condition.
Logic analyzers with deep acquisition memory take a noticeable amount of time to complete a run; however, messages like "Waiting in level 1" may indicate you need to stop the measurement and refine the trigger condition.
When the trigger condition is found, logic analyzer acquisition memory is filled, the captured data is processed to the display tools, and the Run Single button becomes available again.
Next: “Step 6. Display the captured data” on page 22
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Chapter 1: Getting Started

Step 6. Display the captured data

Step 6. Display the captured data
Once you have run a measurement and filled the logic analyzer's acquisition memory with captured data, you can display it with one of the display tools.
To open Waveform or Listing displays
Waveform displays are typically used when data is captured with the timing sampling mode, and Listing displays are used when data is captured with the state sampling mode.
1. From the Window menu, select your logic analyzer and choose the Waveform or Listing command.
To add display tools via the Workspace window
1. Select the Workspace button (or from the Window menu, select System and Workspace).
2. In the Workspace window, scroll down to the Display portion of the tool icon list.
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Chapter 1: Getting Started
Step 6. Display the captured data
3. Drag the display tool icon and drop it on the analyzer icon.
4. To open the display tool, select its icon and choose the Display command.
Next: “For More Information...” on page 24
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Chapter 1: Getting Started

For More Information...

For More Information...
On making measurements on the demo counter board:
On connecting the logic analyzer:
On choosing the sampling mode:
On formatting labels for probed signals:
On defining the trigger condition:
• “Example: Timing measurement on counter board” on page 26
• “Example: State measurement on counter board” on page 28
Making Basic Measurements for a self-paced tutorial
• “Probing the Device Under Test” on page 33
• Setup Assistant (see the Setup Assistant help volume) (when using analysis probes).
Logic Analysis System and Measurement Modules Installation Guide for probe pinout and circuit diagrams.
• “Choosing the Sampling Mode” on page 36
“The Sampling Tab” on page 115
“Formatting Labels for Logic Analyzer Probes” on page 57
• “The Format Tab” on page 119
• “Understanding Logic Analyzer Triggering” on page 192
• “Setting Up Triggers and Running Measurements” on page 64
• “The Trigger Tab” on page 146
On running measurements:
On displaying captured data:
• “Running Measurements” on page 86
• “Displaying Captured Data” on page 88
• Using the Waveform Display Tool (see the Waveform Display Tool help volume)
• Using the Listing Display Tool (see the Listing Display Tool help volume)
Working with Markers (see the Markers help volume)
Using the Chart Display Tool (see the Chart Display Tool help volume)
• Using the Distribution Display Tool (see the Distribution Display Tool
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Chapter 1: Getting Started
For More Information...
help volume)
• Using the Compare Analysis Tool (see the Compare Tool help volume)
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Chapter 1: Getting Started

Example: Timing measurement on counter board

Example: Timing measurement on counter board
This example uses the demo counter board that is supplied with the Making Basic Measurements kit as the device under test. The kit is supplied with every logic analysis system, or can be ordered from your Agilent Technologies Sales Office.
To connect the logic analyzer to the device under test
1. Connect Pod 1 of the logic analyzer to J1 on the demo counter board.
The demo counter board has built-in terminations and header connectors.
To choose the sampling mode
1. In the Sampling tab, choose Timing Mode.
2. Enter a sample period of 3.0 ns.
To format labels for the probed signals
1. In the Format tab, select the button under the pod 1.
2. In the Pod threshold dialog, select TTL; then, select the Close button.
3. Select a label button.
4. Choose the Rename command, enter the label name "TCOUNT", and select the OK button.
5. In the label row, select the button under pod 1.
6. Choose the "........********" standard label assignment to assign the lower 8
bits of pod 1 to the "TCOUNT" label.
To define the trigger condition
1. In the Trigger tab, and in the Trigger Functions subtab, choose the "Find edge" trigger function, and select the Replace button.
2. In the Trigger Sequence portion of the Trigger tab, select the Edge button and use the Specify Glitch/Edge dialog to specify the rising edge of bit 7 (and all other bits as "don't cares").
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Example: Timing measurement on counter board
To run the measurement
1. Select the Run Single button.
To display the captured data
1. From the Window menu, select your logic analyzer and choose the Waveform command.
See Also “For More Information...” on page 24
Chapter 1: Getting Started
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Chapter 1: Getting Started

Example: State measurement on counter board

Example: State measurement on counter board
This example uses the demo counter board that is supplied with the Making Basic Measurements kit as the device under test. The kit is supplied with every logic analysis system, or can be ordered from your Agilent Technologies Sales Office.
To connect the logic analyzer to the device under test
1. Connect Pod 1 of the logic analyzer to J1 on the demo counter board.
The demo counter board has built-in terminations and header connectors.
To choose the sampling mode
1. In the Sampling tab, choose State Mode.
2. In the Clock Setup, using the Master only mode, specify the rising edge of the J clock as the sampling clock.
To format labels for the probed signals
1. In the Format tab, select the button under the pod 1.
2. In the Pod threshold dialog, select TTL; then, select the Close button.
3. Select a label button.
4. Choose the Rename command, enter the label name "SCOUNT", and select the OK button.
5. In the label row, select the button under pod 1.
6. Choose the "........********" standard label assignment to assign the lower 8
bits of pod 1 to the "SCOUNT" label.
To define the trigger condition
1. In the Trigger tab, and in the Trigger Functions subtab, choose the "Find pattern n times" trigger function, and select the Replace button.
2. In the Trigger Sequence portion of the Trigger tab, enter "15" in the occurrence count field, and enter enter "FX" in the label value field.
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Example: State measurement on counter board
To run the measurement
1. Select the Run Single button.
To display the captured data
1. From the Window menu, select your logic analyzer and choose the Listing command.
See Also “For More Information...” on page 24
Chapter 1: Getting Started
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Chapter 1: Getting Started
Example: State measurement on counter board
30
2

Task Guide

• “Probing the Device Under Test” on page 33
• “Choosing the Sampling Mode” on page 36
• “Selecting the Timing Mode (Asynchronous Sampling)” on page 36
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Chapter 2: Task Guide
• “Selecting the State Mode (Synchronous Sampling)” on page 43
• “In Either Timing Mode or State Mode” on page 52
• “Using 2 GHz Timing Zoom” on page 54
“Formatting Labels for Logic Analyzer Probes” on page 57
• “Setting Up Triggers and Running Measurements” on page 64
“Using Trigger Functions” on page 65
“Using State Mode Trigger Features” on page 70
“Editing the Trigger Sequence” on page 72
• “Editing Advanced Trigger Functions” on page 78
• “Saving/Recalling Trigger Setups” on page 85
• “Running Measurements” on page 86
• “Displaying Captured Data” on page 88
“Using Symbols” on page 95
• “Printing/Exporting Captured Data” on page 104
• “Cross-Triggering” on page 106
“Solving Logic Analysis Problems” on page 108
• “Saving and Loading Logic Analyzer Configurations” on page 110
See Also Measurement Examples (see the Measurement Examples help volume)
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Probe Lead-to-Board Connection
Chapter 2: Task Guide

Probing the Device Under Test

Probing the Device Under Test
The figures below shows a variety of simple probing connections. The specific probe type, number of probes, and location on the device under test circuit depends on your particular measurement.
For equivalent circuit diagrams and pinouts, see the description of the probe type in the Logic Analysis System and Measurement Modules
Installation Guide. If you have misplaced the Logic Analysis System and Measurement Modules Installation Guide, you can download
the latest version from the world-wide web at:
http://www.cos.agilent.com/manuals/logic_analyzers.html#la_16700b
The standard lead set plugs directly into any .1-inch grid with 0.026 to
0.033-inch diameter round pins or 0.025-inch square pins. All probe
tips work with the Agilent Technologies 5059-4356 surface mount grabbers and the Agilent Technologies 5959-0288 through-hole grabbers.
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Adapter-to-Board Connection
Chapter 2: Task Guide
Probing the Device Under Test
Direct Pod-to-Board Connection
Pod-to-Analysis Probe Connection
Both the 01650-63203 and the E5346A adapters include termination for the logic analyzer. The 01650-63203 termination adapter plugs into a 2 x 10 pin header with 0.1 inch spacing. The E5346A high-density adapter connects to an AMP "Mictor 38" connector. If possible, use support shrouds around the Mictor connector to relieve strain and improve connections.
If you provide proper termination as part of the device under test board, you can plug the pod directly into the ©3M 2520-series, or similar alternative connector. Suggested termination is shown in the
Logic Analysis System and Measurement Modules Installation Guide.
Also use this termination with the Agilent Technologies E5351A high­density, non-terminated adapter.
Analysis probes (formerly called preprocessors) are microprocessor­specific interfaces that make it easier to probe buses. Generally, analysis probes consist of a circuit board that attaches to the microprocessor (possibly through an adapter) and a configuration file. The configuration file sets up the logic analyzer's clocks and labels
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Chapter 2: Task Guide
Probing the Device Under Test
correctly, and may include an inverse assembler. The circuit board provides access to logical groups of pins through headers designed to connect directly to the logic analyzer.
The easiest way to set up a measurement with an analysis probe is the Setup Assistant (see the Setup Assistant help volume). The Setup Assistant asks you questions about your measurement and then shows you just the information you need to set up the probe correctly. It also loads the proper configuration files.
See Also http://www.agilent.com/find/Laaccessories/ for more information on
Agilent logic analyzer probing accessories.
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Chapter 2: Task Guide

Choosing the Sampling Mode

Choosing the Sampling Mode
There are two logic analyzer sampling modes to choose from: timing mode and state mode.
In timing mode, the logic analyzer samples asynchronously, based on an internal sampling clock signal.
In state mode, the logic analyzer samples synchronously, based on a sampling clock signal (or signals) from the device under test. Typically, the signal used for sampling in state mode is a state machine or microprocessor clock signal.
• “Selecting the Timing Mode (Asynchronous Sampling)” on page 36
• “Selecting the State Mode (Synchronous Sampling)” on page 43
• “In Either Timing Mode or State Mode” on page 52
• “Using 2 GHz Timing Zoom” on page 54
Selecting the Timing Mode (Asynchronous Sampling)
In timing mode, the logic analyzer samples asynchronously, based on an internal sampling clock signal.
“To select the timing mode” on page 40
• “To select the full/half channel configuration” on page 41
“To select transitional timing or store qualified” on page 37
• “To specify the sample period” on page 42
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Chapter 2: Task Guide

To select transitional timing or store qualified

To select transitional timing or store qualified
1. In the Sampling tab with Timing Mode selected, select the Transitional Timing with Store Qualification configuration.
Transitional Timing
In Conventional Timing Acquisition mode, the analyzer stores measurement data at each sampling interval. In Transitional Timing Acquisition mode, the timing analyzer samples data at regular intervals, but only stores data when there is a threshold level transition. Each time a level transition occurs on any of the bits, data on all channels is stored. A time tag is stored with each stored data sample so the measurement can be reconstructed and displayed later.
NOTE: Transitional timing or store qualified timing, requires time tags to recreate the
data. Time tags are either stored in the memory resources of an unused pod pair, or they are interleaved with the data in memory. If tags are interleaved with the data, available memory depth is reduced by half.
Store Qualified Timing
Store qualified timing allows you to specify what data is stored during the course of an acquisition. The level of data qualification can be simple (Store Anything or Store Nothing), or more complex (Custom).
For information on setting up store qualification, refer to To specify default storing (see page 71)
See Also
“More on Storing Transitions” on page 38
“Transitional Timing Considerations” on page 39
“Default Storing Subtab” on page 156
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To select transitional timing or store qualified
More on Store Qualification in Transitional Timing
When Transitions is selected on the Default Storing subtab, the default store qualification is setup to store data on all channels if an edge/transition occurs on any one channel. Only active channels (channels assigned to labels) are used. No further user action is required.
If certain channels have a high occurrence of transitions that are meaningless in the context of the measurement, they can be ignored with the following procedure.
1. Select Select Labels.
2. From the Transitions Label Select dialog that appears, highlight the desired label from the Available Labels list, then select the right-arrow to move the selection to the Ignore Edges On list.
3. Repeat as needed for additional labels.
4. Select OK to save the selection and close the dialog. Selecting Cancel, will undo any changes and close the dialog.
Unlike the Custom default storing mode, when Transitio ns is selected, no other qualifier events like patterns, ranges, etc., are available. Also, storing cannot be enabled or disabled in the sequence branch action lists.
NOTE: If you have a bit that is shared across multiple labels, all labels containing that
bit must be on the Ignore list before transitions on that bit will no longer cause a sample to be stored.
More on Storing Transitions
Minimum Transitions Stored
Normally, transitions have not occurred at each sample period. This is illustrated below with time-tags 2, 5, 7, and 14. When transitions
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To select transitional timing or store qualified
happen at this rate, two samples are stored (four at the fastest rate of
2.5 ns) for every transition. Therefore, with 2 K samples of memory, 1 K of transitions are stored. You must subtract one, which is necessary for a starting point, for a minimum of 1023 stored transitions.
Maximum Transitions Stored
If transitions occur at a fast rate, such that there is a transition at each sample point, only one sample is stored for each transition as shown by time tags 17 through 21 below. If this continues for the entire trace, the number of transitions stored is 2 K samples. Again, you must subtract the starting point sample, which then yields a maximum of 2047 stored transitions.
In most cases a transitional timing trace is stored by a mixture of the minimum and maximum cases. Therefore, in this example the actual number of transitions stored will be between 1023 and 2047.
Transitional Timing Considerations
Data Storage
When an edge is detected, two samples (four when sampling at 2.5 ns) are stored across all channels assigned to the timing analyzer. The need of two samples is to avoid loss of data if a second edge were to occur to soon after the first edge for the edge detectors to reset.
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To select transitional timing or store qualified
Sequence level branching
In transitional timing, only 2 branches are available per sequence level.
Global counters
In transitional timing, only one global counter is available.
Storing Time Tags
Transitional timing requires time tags to recreate the data. Time tags are either stored in the memory resources of an unused pod pair, or they are interleaved with the data in memory. If tags are interleaved in data, available memory depth is reduced by half.
Increasing Duration of Storage
Using the Transitional Label Select dialog to specify selected labels to ignore can increase usable memory depth and acquisition time by ignoring transitions on signals like clock or strobe that add little useful information to the measurement when no other signals are transitioning.
Invalid Data
The analyzer only looks for transitions on data lines on labels that are turned on. Data lines on labels that are turned off store data, but only when one of the lines that is turned on transitions. If the data line on a label is turned on after a run, or the data line is assigned to a new label, you would see data, but it is unlikely that every transition that occurred was captured.
Trigger Position
In transitional timing, no data prestore (samples acquired before trigger) is required. Therefore, much like state mode, the trigger position (start/center/end) will indicate the percentage of memory filled with samples after the trigger. The number of samples acquired/ displayed before trigger will vary between measurements.
To select the timing mode
1. Open the logic analyzer Setup window.
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To select transitional timing or store qualified
2. Select the Sampling tab.
3. Choose the Timing Mode option.
You can also select the timing sampling mode in the “Pod Assignment Dialog” on page 130.
To select the full/half channel configuration
1. In the Sampling tab, with Timing Mode selected, select the timing analyzer configuration. You can choose between:
• 4M Sample Full Channel 400 MHz
In this configuration, the total memory depth is 4M samples per channel, with data being sampled and stored as often as every 2.5 ns. You can set the sample rate to go slower with the Sample Period control.
NOTE: When the Sample Period is 2.5 ns, data is acquired at two times the trigger
sequencer rate. This means that data must be present for at least two samples before the trigger sequencer can reliably detect it. The trigger sequencer could miss data present for less than two sample periods.
The trigger sequencer treats the data as a group of two samples for each sequencer clock. This means that the trigger point indication could be off by one sample.
Although the trigger sequencer cannot detect all data, the analyzer will correctly capture all data present for at least one sample period.
• 8M Sample Half Channel 800 MHz
In this configuration, only one pod of each pod pair is available. Channels assigned to unavailable pods are ignored. You can specify which pod to use by toggling the Pod field in Format.
The total memory depth is 8M samples per channel. Data is sampled and stored every 1.25 ns; this rate cannot be changed.
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To select transitional timing or store qualified
NOTE: When the Sample Period is 1.25 ns, data is acquired at four times the trigger
sequencer rate. This, along with other half-channel mode characteristics, means that data must be present for at least five samples before the trigger sequencer can reliably detect it. The trigger sequencer cannot detect data present for less than two sample periods, and could miss data present for less than five sample periods.
The trigger sequencer treats the data as a group of four samples for each sequencer clock. This means that the trigger point indication could be off by up to three samples.
Although the trigger sequencer cannot detect all data, the analyzer will correctly capture all data present for at least one sample period.
2. If you chose the 800 MHz Half Channel 8M Sample configuration, select the Format tab and choose which pod of the pod pair will be used to sample data.
See Also “To specify the sample period” on page 42
To specify the sample period
When the logic analyzer is in timing (asynchronous sampling) mode, the Sample Period setting specifies how often the logic analyzer samples the signals from the device under test.
1. In the Sampling tab, with Timing Mode selected, enter the desired time between logic analyzer samples.
To capture signal level changes reliably, the sample period should be less than half (many engineers prefer one-fourth) of the period of the fastest signal you want to measure.
The sample rate is the inverse of the sample period.
NOTE: In conventional timing mode the sample rate is fixed at 1.25 ns.
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Selecting the State Mode (Synchronous Sampling)
In state mode, the logic analyzer samples synchronously, based on a sampling clock signal (or signals) from the device under test. Typically, the signal used for sampling in state mode is a state machine or microprocessor clock signal.
• “To select the state mode” on page 44
• “To select the 200 MHz/400 MHz state speed configuration” on page 44
“To change the sampling clock mode” on page 44
• “To set up the sampling clock” on page 46
State Mode Sampling Position
In order for a state mode logic analyzer to accurately capture data from a device under test, the logic analyzer's setup/hold time (window) must fit within the device under test's data valid window.
Because the location of the data valid window relative to the bus clock is different for different types of buses, the logic analyzer lets you adjust the sampling position in order to accurately capture data on high-speed buses (see “Understanding State Mode Sampling Positions” on page 208).
When the device under test's data valid window is less than 2.5 ns (roughly, for clock speeds >= 200 MHz), it's easiest to use eye finder to locate the stable and transitioning regions of signals and to automatically adjust sampling positions.
“To automatically adjust sampling positions” on page 47
When the device under test's data valid window is greater than 2.5 ns (roughly, for clock speeds < 200 MHz), it's easiest to adjust the sampling position manually, without using the logic analyzer to locate the stable and transitioning regions of signals.
“To manually adjust sampling positions” on page 50
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To select the state mode
1. Open the logic analyzer Setup window.
2. Select the Sampling tab.
3. Choose the State Mode option.
You can also select the state sampling mode in the “Pod Assignment Dialog” on page 130.
To select the 200 MHz/400 MHz state speed configuration
1. In the Sampling tab, with State Mode selected, select the state analyzer configuration. You can choose between:
• 200 MHz / 4M State
In this configuration, all pods are available.
Memory depth is 4M samples per channel. If time or state count is turned on in Trigger Settings, the total memory is split between data acquisition storage and time or state count storage. To maintain the full memory depth of 4M samples per channel, leave one pod pair unassigned. (To unassign a pod pair, select the Pod Assignment button in the Format tab, then drag a pod pair to unassigned.)
State clock speed matches your device under test's clock, up to 200 MHz.
• 400 MHz / 4M State
This configuration is similar to the 200 MHz State mode, except clocking is restricted to the J clock on Pod 1 of the master card of the module, and triggering is restricted to two trigger functions.
NOTE: When Store Qualification is performed in the 400 MHz State mode, there may
be the case where data occupying memory is further disqualified. As a result, you may see a non-contiguous listing of states as well as a reduction of usable memory.
To change the sampling clock mode
Normally, in the Master only sampling clock mode, there is one sampling clock signal. When a clock edge occurs, data is captured and
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saved into one sample of logic analyzer memory.
Two additional sampling clock modes let you capture data differently:
•In the Master/Slave mode, you can save data captured on different clock edges into the same sample of logic analyzer memory.
When the slave clock occurs, data captured on the pods that use the slave clock is saved in a slave latch. Then, when the master clock occurs, data captured on the pods that use the master clock, as well as the slave latch data, are saved into logic analyzer memory.
•In the Demultiplex mode, you can demultiplex data being probed by one pod into the logic analyzer memory that is normally used for two pods.
When the slave clock occurs, data captured on the pod is saved into the slave latch for the other pod in the pod pair. Then, when the master clock occurs, data captured on the pod, as well as the slave latch data, are saved in logic analyzer memory.
To set up the master sampling clock mode
1. In the Sampling tab, with State Mode selected, select the Master only mode in the Clock Setup area.
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To set up the master/slave sampling clock mode
1. In the Sampling tab, with State Mode selected, select the Master/Slave mode in the Clock Setup area.
2. In the Format tab, select Slave Clock for each pod that should use the slave clock, and select Master Clk for each pod that should use the master clock.
To set up the demultiplex sampling clock mode
1. In the Sampling tab, with State Mode selected, select the Demultiplex mode in the Clock Setup area.
2. In the Format tab, select Demultiplex for the pod pair that should use this mode.
To set up the sampling clock
1. In the Sampling tab, with the State Mode selected, make sure the Advanced Clocking box is unchecked.
2. For each clock input signal that will be used:
a. Select the pod's Master or Slave button (under the activity indicator).
b. If the signal edge will specify when to sample, choose Rising Edge,
Falling Edge, or Both Edges.
c. If the signal level will enable the sampling clock, choose Qualifier -
High or Qualifier - Low.
3. Make sure all unused clock inputs are turned Off.
To set up using advanced clocking
1. In the Sampling tab, with the State Mode selected, select the Advanced Clocking check box.
2. Select the Master Clock button. In the Master clock dialog, select the appropriate options for setting up the master clock.
3. If you have chosen the Master/Slave or Demultiplex clock mode, select the Slave Clock button. In the Slave clock dialog, select the appropriate options for setting up the slave clock.
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See Also “To change the sampling clock mode” on page 44
To automatically adjust sampling positions
When adjusting the state mode sampling position with eye finder, the logic analyzer looks at signals from the device under test, figures out the location of the data valid window in relation to the sampling clock, and automatically sets the sampling position.
Because eye finder automatically runs on individual channels, it can correct for the small delay effects caused by probe cables and circuit board traces. This makes the logic analyzer's setup/hold window smaller and lets you accurately capture data at higher clock speeds.
Eye finder requires:
At least 500 transitions on each signal during its run. (You can use the advanced eye finder settings to cause longer or shorter runs.)
• All devices which can drive each signal should contribute to the stimulus.
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• All device under test operating modes relevant to the eventual logic analysis measurement should contribute to the stimulus as well.
NOTE: Eye finder measurements and normal logic analyzer measurements cannot
run simultaneously.
To run eye finder
1. Probe the device under test by connecting the logic analyzer channels.
2. Select the state (synchronous sampling) mode (see “To select the state mode” on page 44).
3. Format labels for those logic analyzer channels.
4. Make sure that the device under test and the logic analyzer have warmed up to their normal operating temperatures.
5. In the Format tab, select the Setup/Hold button.
6. In the Sampling Positions dialog, select the Eye Finder option.
7. In the Eye Finder Setup tab, select the Use signals from Device Under Test option.
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The Use demo data (no probes required) option is for demonstration purposes only.
8. Choose the labels that you wish to run eye finder on.
You may want to run eye finder on channel subsets, for example, when certain bus signals transition in one operating mode (of the device under test) and other bus signals transition in a different operating mode.
9. Select the Run Eye Finder button.
For more information on run messages, see “Eye Finder Run Messages” on page 136.
When eye finder finds more than one stable region on a channel, it uses the current sampling position as a hint about which stable region it should suggest a position for.
If eye finder picks the wrong stable region, you can expand the label and drag the blue Sampling Position line into the correct stable region. The suggested sampling position for that region will be shown (see “How Selected/Suggested Positions Behave” on page 135).
10. If you have moved the sampling position and wish to return to the suggested positions, go to the Eye Finder Results tab, select a label button or the Results menu, and choose the "set to suggested" command.
For more information on informational messages in the Eye Finder Results tab, see “Eye Finder Info Messages” on page 139.
Eye finder finds optimal sampling positions for the actual specific conditions -- amplitude, offset, slew rates, and ambient temperature. Therefore, you will get the best results by running eye finder under the same conditions that will be present when logic analysis measurements are made.
To run eye finder repetitively
1. Select the Repetitive Run option in the Eye Finder Setup tab.
2. Select the Run Eye Finder (r) button.
In the Eye Finder Results tab, you can see how the stable and transitioning areas vary over time.
3. Select the Stop Eye Finder button.
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To view eye finder data as a bus composite
When you want a compressed, high-level view of the eye finder data:
1. In the Eye Finder Results tab, select the label button and choose the View as Bus Composite command.
Average sampling positions as well as stable and transitioning areas are displayed for the whole label. This is the default. Stable areas show positions where every channel in the label is stable.
To view eye finder data as a stack of channels
When you want more resolution in your view of the eye finder data:
1. In the Eye Finder Results tab, select the label button and choose the View as Stack of Channels command.
Individual sampling positions and stable and transitioning areas for all the channels in a label are shown.
To save/load eye finder data
While the eye finder sampling positions are saved with the logic analyzer configuration, eye finder measurement data is not; therefore, eye finder data must be saved and loaded separately.
1. In the File Info tab, select the Save As... or Load... buttons.
You can also choose the Save Eye Finder or Load Eye Finder command from the File menu.
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2. In the file browser dialog, name the file to be saved or select the file to be loaded.
For more information on save/load messages, see “Eye Finder Load/Save Messages” on page 141.
See Also “Understanding State Mode Sampling Positions” on page 208
“Eye Finder Advanced Settings Dialog” on page 133
“To manually adjust sampling positions” on page 50
To manually adjust sampling positions
To use the Eye Finder option
Although the Eye Finder option was intended for automatically adjusting state mode sampling positions, you can also use it to manually adjust sampling positions. You don't have to Run Eye Finder to locate stable and transitioning regions on signals, just go directly to the Eye Finder Results tab, and drag the sampling positions to the proper locations.
1. Select the state (synchronous sampling) mode (see “To select the state mode” on page 44).
2. In the Format tab, select the Setup/Hold button.
3. In the Sampling Positions dialog, select the Eye Finder option.
4. In the Eye Finder Results tab, drag the sampling positions to the proper locations.
You can select bus labels to expand or collapse the channels in the label.
When using the Eye Finder option to manually adjust state mode sampling positions, the sampling positions are saved with the logic analyzer configuration (see “Saving and Loading Logic Analyzer Configurations” on page 110).
To use the Manual Setup/Hold option
When adjusting the state mode sampling position with the Manual Setup/Hold option, you adjust the logic analyzer's setup/hold window
relative to the sampling clock signal from the device under test. The
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setup time is the front edge of the setup/hold window relative to the sampling clock, and the hold time is the back edge of the setup/hold window relative to the sampling clock.
1. Select the state (synchronous sampling) mode (see “To select the state mode” on page 44).
2. In the Format tab, select the Setup/Hold button.
3. In the Sampling Positions dialog, select the Manual Setup/Hold option.
4. For each label, enter setup/hold values. The values are adjustable in 100 ps increments, with a fixed window of 2.5 ns.
5. If you need to adjust bits individually:
a. Select a label containing the bit.
If a bit is used in more than one label, you will change its setup and hold value in all labels.
b. Select the Individual bits option.
Example
c. Enter the bit number you want to change.
d. Enter the setup/hold value.
6. Close the Sampling Positions dialog.
The Manual Setup/Hold sampling positions are saved and loaded along with the logic analyzer configuration file.
Suppose you're probing a bus in the device under test whose data valid window is 3 ns. Suppose also that the bus clock edge occurs 1 ns into the data valid window. To place the logic analyzer's setup/hold window within the data valid window, you could specify a setup value of 800 ps (and hold value of 1.7 ns).
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(The actual sampling position is in the middle of the setup/hold window.)
See Also “Understanding State Mode Sampling Positions” on page 208
“To automatically adjust sampling positions” on page 47
In Either Timing Mode or State Mode
“To specify the trigger position” on page 52
“To set acquisition memory depth” on page 53
• “To name an analyzer” on page 53
• “To turn an analyzer off or on” on page 53
To specify the trigger position
1. In the Sampling tab (or in the Settings subtab of the Trigger tab), select the trigger position.
Specify whether you want to look at data after the trigger (Start), before and after the trigger (Center), before the trigger (End), or use a percentage of the logic analyzer's memory for data after the trigger (User Defined).
In Conventional Timing Mode, when a Run is started, the analyzer will
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not look for a trigger until the specified percentage of pretrigger data has been stored. After a trigger has been detected, the specified percentage of posttrigger data is stored before the analyzer halts.
In State and Transitional Store Qualified modes, when a Run is started, the analyzer immediately looks for the trigger condition. In other words, the trigger position setting specifies the maximum amount of data that should be stored before the trigger.
To set acquisition memory depth
If you need less data and want measurements to run faster, you can limit the number of samples that are stored in logic analyzer acquisition memory.
1. In the Sampling tab (or in the Settings subtab of the Trigger tab), select the acquisition depth.
The number of samples that can be chosen for the Acquisition Depth are approximations. The combination of count tags, pod assignments, and configuration modes affect what choices are available.
To name an analyzer
You can give more descriptive names to a logic analyzer.
1. In the Sampling tab, select the Analyzer Name field.
2. Enter the new name.
The name now appears below the instrument tool icon in the workspace.
You can also name analyzers in the “Pod Assignment Dialog” on page 130.
To turn an analyzer off or on
You may want to turn an analyzer off if you don't want it to be included in further measurements.
To turn an analyzer off
1. In the Sampling tab, select the On box that is checked.
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2. In the Analyzer Shutdown Options dialog, choose either:
• Soft -- This will leave the logic analyzer window but turn off most options.
Hard -- This will remove the logic analyzer and its display tools from the Workspace.
You can also turn an analyzer off in the “Pod Assignment Dialog” on page 130.
To turn an analyzer back on
1. If you used the Soft option when turning the logic analyzer off, you can turn it on again by selecting the Off check box.
2. If you used the Hard option when turning the logic analyzer off, you can turn it on again by selecting the Setup button in the System window or by dragging the analyzer's instrument tool icon to the workspace in the Workspace window.
Using 2 GHz Timing Zoom
Timing Zoom collects additional high-speed timing data around the trigger of the logic analyzer. It uses a 16K-sample, 2 GHz timing analyzer to sample data as closely as every 500 ps on all channels.
The Timing Zoom settings are accessed through the Timing Zoom button under Sampling.
• “To turn Timing Zoom on or off” on page 54
“To set the Timing Zoom trigger position” on page 55
“To specify which analyzer has Timing Zoom” on page 56
• “To set the Timing Zoom sample period” on page 56
To turn Timing Zoom on or off
If you are not interested in the Timing Zoom data for a measurement, you can turn off Timing Zoom and improve logic analyzer performance.
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To select transitional timing or store qualified
1. In the Sampling tab, select the Timing Zoom button.
2. In the Timing Zoom controls dialog, select the On/Off checkbox.
To set the Timing Zoom trigger position
1. In the Sampling tab, select the Timing Zoom button.
2. In the Timing Zoom controls dialog, select the trigger position.
Specify whether you want to look at Timing Zoom data after the trigger (Start), before and after the trigger (Center), before the trigger (End), or use a percentage of the logic analyzer's memory for data after the trigger (User Defined).
NOTE: When in 333 MHz State mode (16717,18,19), the 400 MHz State mode
(16750,51,52), or the 600 MHz State mode (16753, 54, 55, 56), the start of Timing Zoom data may occur after the actual trigger point. The reason for this data mis-alignment is due to how the trigger sequencer functions when in this mode.
The analyzer sequencer works on Pairs of samples. It will not evaluate the first sample of the pair until the second sample has entered the sequencer. If for example the trigger point is determined to be on the first sample, the analyzer displays the Timing Zoom data relative to the evaluation of the second sample. What ever time difference is seen between the two samples (of the pair) is reflected in the data display between the trigger point and the start of the Timing Zoom data.
This time difference can be noticeable if your measurement is using bursted clocks and the first sample (actual trigger point) is clocked on the last clock signal of a burst, and the second sample (of the pair) is clocked with the first clock of the next burst. The time difference between the clock bursts is reflected as a mis-alignment between the trigger point and the start of the Timing Zoom data.
The best thing to do to help mitigate this situation is to set the Timing Zoom to "Trigger Position End" to capture as much data near the first sample as possible.
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To specify which analyzer has Timing Zoom
NOTE: If you have both analyzers of the module turned on, you need to specify which
analyzer you want to use Timing Zoom with.
1. In the Sampling tab, select the Timing Zoom button.
2. In the Timing Zoom controls dialog, select the analyzer that Timing Zoom will work with.
To set the Timing Zoom sample period
If you want to see more or less sampling resolution around the trigger, you can adjust the Timing Zoom sample period.
1. In the Sampling tab, select the Timing Zoom button.
2. In the Timing Zoom controls dialog, select the sample period.
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Formatting Labels for Logic Analyzer Probes

Formatting Labels for Logic Analyzer Probes
The Format tab is mainly for assigning bus and signal names (from the device under test) to logic analyzer channels. These names are called labels. Labels are used when setting up triggers and displaying captured data.
The Format tab also lets you do things like assign pod pairs to one or two logic analyzers, specify the logic analyzer threshold voltage, change the label polarity, reorder bits in a label, and turn labels off or on.
The Format tab has activity indicators that show signal levels.
• “To assign pods to one or two analyzers” on page 57
• “To set pod threshold voltages” on page 58
“To assign probe channels to labels” on page 59
“To change the label polarity” on page 61
“To reorder bits in a label” on page 61
• “To turn labels off or on” on page 62
To assign pods to one or two analyzers
A logic analyzer's pod pairs can be assigned to one or two separate logic analyzers or they can be left unassigned.
1. In the Format tab, select the Pod Assignment button.
2. In the Pod Assignment dialog, drag a pod pair to the appropriate logic analyzer.
3. Select the Close button.
When all pods are assigned and state or time counts are saved with the captured data, logic analyzer acquisition memory is halved to 2M samples.
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When using a multi-card logic analyzer:
• When both analyzers are turned on, pods 1/2 and 3/4 of the master card cannot be assigned to the same analyzer.
• Each pod pair has two clock channels, but only the clock channels of pods on the master card can be used in the analyzer's clocking setup. (The master card's pods needn't be assigned in order to use their clock channels).
To turn on an analyzer that is off
1. Select Off and choose State or Timing.
(Only one analyzer at a time can be set to Timing.)
A second analyzer window appears after a pause for setup.
You can also turn on an analyzer that is off by opening the Workspace window and dragging the instrument tool icon onto the workspace.
See Also “Pod Assignment Dialog” on page 130
To set pod threshold voltages
The threshold voltage is the voltage level that a signal must cross before the logic analyzer recognizes a change in logic levels. In addition to a user defined choice, you can also select a predefined level from the standard choices.
Standard
1. In the Format tab, select the threshold button located just below the pod name.
2. In the Pod threshold dialog, choose one of the standard threshold options:
• TTL -- The threshold level is +1.50 volts.
• LVTTL -- The threshold level is +1.40 volts.
SSTL2 -- The threshold level is +1.50 volts.
SSTL3 -- The threshold level is +1.25 volts.
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LVCMOS 1.5v -- The threshold level is +0.75 volts.
LVCMOS 1.8v -- The threshold level is +0.90 volts.
LVCMOS 2.5v -- The threshold level is +1.25 volts.
LVCMOS 3.3v -- The threshold level is +1.65 volts.
• CMOS 5.0v -- The threshold level is +2.50 volts.
ECL -- The threshold level is -1.3 volts.
LVPECL -- The threshold level is 2.00 volts.
3. If you don't want the change to apply to all pods, deselect the checked box next to Apply settings to all pods.
4. Select the Close button.
User Defined
When User Defined is selected, the threshold level is selectable from -
6.0 volts to +6.0 volts.
NOTE: The logic analyzer requires a minimum voltage swing of 500 mV at the probe
tip to recognize changes in logic levels.
NOTE: The threshold voltage specified also applies to the pod's clock input.
To assign probe channels to labels
The logic analyzer lets you assign names (labels) to logic analyzer channels so that it's easier to set up triggers and interpret the captured data when displayed.
Typically, you give labels the names of the buses and signals in the device under test that are are being probed.
1. In the Format tab, select a label button, and either:
• Choose the Rename command, enter the label name, and select the OK
button.
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Or, choose the Insert before or Insert after command, enter the label name, and select the OK button.
2. In the label row, select the button of the pod that contains the channels you want to assign.
3. Either choose one of the standard label assignments or choose Individual.
( * ) (asterisk) indicates an assigned bit.
( . ) (period) indicates an unassigned bit.
( R ) indicates an assigned bit in a reordered label.
If you chose Individual:
a. In the "label - pod" dialog, select the channels you want to assign/
unassign.
b. Select the OK button.
A maximum of 32 channels can be assigned to a label. In the Format tab, least significant pod channels (bit 0) are on the right
and most significant pod channels (bit 15) are on the left. (The bit numbers are shown just below the activity indicators.)
Labels can contain bits that are not consecutive; however, bits are always numbered consecutively within a label.
A label can include data and clock channels from more than one pod, but this places restrictions on the complexity of the trigger later.
To delete labels
1. Select the label name that you want to delete.
2. Choose Delete.
If only one label is defined, it cannot be deleted.
When you delete labels, their bit assignments are not saved. However, you can make a label inactive and save its bit assignments by turning the label off.
See Also “To reorder bits in a label” on page 61
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“To turn labels off or on” on page 62
“To change the label polarity” on page 61
To change the label polarity
While negative logic is rare in circuits (the main exception at this time is RAMBUS), you can change the label polarity if the device under test uses negative logic.
1. In the Format tab, select the polarity button (next to the label button) to toggle between positive (+) and negative (-) polarity.
Positive polarity means that a high voltage is a logic "1".
Negative polarity means that a high voltage is a logic "0".
Changing the label polarity will have the following effects:
"1" and "0" values flip in the trigger condition.
• Waveforms and bus values (where shown) invert in the Waveform display tool.
"1" and "0" values flip in the Listing display tool.
Changing the label polarity does not affect:
• Edge definitions for clock setup and edge terms.
• Symbol definitions for the logic analyzer.
• Activity indicators.
To reorder bits in a label
In cases where buses in the device under test haven't been probed with consecutive logic analyzer channels, you can reorder the bits in a label.
1. In the Format tab, select the label button whose bits you want to reorder.
2. Choose Reorder bits.
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3. In the Change Bit Order dialog:
• To reorder the bits individually, enter the bit that the probe channel should be mapped to.
• To swap the high and low order bytes or words, select the button Big Endian to Little Endian at the bottom of the dialog.
• To return to sequentially ordered bits, select the button Default Order at the bottom of the dialog.
4. Select the OK button.
The label now shows an "R" to indicate that the assigned bit has been reordered.
NOTE: Labels with reordered bits cannot be used as range terms or <, <=,>, >= in
triggers.
To turn labels off or on
When you temporarily want to remove a label and its data, you can turn off the label. The label name and its bit assignments are preserved.
To turn a label off
1. In the Format tab, select the label button that you want to turn off.
2. Choose Label [ON] to toggle it off.
At least one label must remain on.
To turn a label on
1. In the Format tab, select the label button that you want to turn on.
2. Choose Label [OFF] to toggle it on.
To display a label that was off
1. Turn on the label.
2. At the bottom of the window, select the Apply button.
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The label's data appears in the display windows.
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Setting Up Triggers and Running Measurements

Setting Up Triggers and Running Measurements
The following information is a generic discussion about triggering in logic analyzers. Depending on the logic analyzer type, and the state or timing mode being used, some functionality may not be available.
“Using Trigger Functions” on page 65
“Using State Mode Trigger Features” on page 70
“Editing the Trigger Sequence” on page 72
• “Editing Advanced Trigger Functions” on page 78
• “Saving/Recalling Trigger Setups” on page 85
• “Running Measurements” on page 86
In General...
Timing Analyzer Tr ig ge rs
State Analyzer Tr ig ge rs
Use trigger functions for basic measurements.
For more complicated measurements, where no trigger function exists, start with a trigger function that's similar to the measurement you want to make. Then, break down the trigger function and edit the advanced trigger sequence levels.
Everything that looks like a button in the trigger definition gives you a way to modify the trigger setup.
For example, to look for a edge instead of a pattern, select the button that equates a label with a pattern and choose an edge comparison instead.
For every state analysis sample, a logic analyzer needs to know two things:
1. Should some action (like a trigger) be taken as a result of this sample?
2. What should be done with this sample? That is, should it be stored in logic analyzer memory or should it be discarded? (This question doesn't need to be asked when using a timing analyzer because all samples are stored.)
State analysis trigger definitions are made simpler with a default storage qualifier. This makes it possible to ignore, at all trigger
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sequence levels, the question about what to do with the captured data samples.
Of course, sometimes it's useful to specify storage qualifiers at certain levels in the trigger sequence. For this, you can insert storage actions in the trigger sequence before trigger or goto actions. Storage actions in the trigger sequence override the default storage qualifier for the samples that cause the trigger or goto actions to occur. Storage actions can also be used to turn on or off the default storing.
Using Trigger Functions
Many common measurement setups are provided with the logic analyzer. These setups are called trigger functions, and you can use them for quick measurement setup.
For more complicated measurements, where no trigger function exists, start with a trigger function that's similar to the measurement you want to make. Then, break down the trigger function and edit the advanced trigger specification.
• “To select a trigger function” on page 65
“To specify a label pattern event” on page 66
“To specify a label edge event” on page 66
• “To break down a trigger function” on page 67
“To create a trigger function library” on page 68
To select a trigger function
1. In the Trigger tab's Trigger Functions subtab, select the appropriate trigger function.
A picture describing the trigger function is shown.
2. Select the Replace button (or Insert before or Insert after button) to move it to the Trigger Sequence below.
3. In the Trigger Sequence, select and/or enter the appropriate labels, values,
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and options.
To specify a label pattern event
Label pattern events let you specify patterns or ranges on a bus.
1. Select the label name button and choose the label that you want to look for a pattern on.
You can also insert other label events if you want to look for multiple patterns on multiple labels. Once another label event is inserted, you can choose And if both label events must occur in the same sample or Or if only one of the label events must occur.
2. Select the operator button and choose the appropriate operator.
The In range and Not in range operators consider the values you enter to be inside the range. Ranges cannot be set on labels whose bits have been reordered.
3. Select the number base button, and choose the number base that you want.
If the number base is changed in one window, the number base in other windows may not change accordingly. For example, the number base assigned to symbols is unique, as is the number base assigned in the Listing window.
4. Enter the label value.
Xs mean you don't care about the value on the specified bits. Xs are not allowed in ranges.
If you chose the Symbols or Line #s number base, select the Absolute XXXX button, and use the Symbol Selector dialog to choose the symbol or line number value.
See Also “To specify a label edge event” on page 66
“To enter symbolic label values” on page 99
“Symbols Selector Dialog” on page 161
To specify a label edge event
Label edge events let you specify edges and glitches on a bus. Label
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edge events are only available in certain timing mode trigger functions.
1. Select the label name button and choose the label that you want to look for a pattern on.
You can also insert other label events if you want to look for multiple patterns on multiple labels. Once another label event is inserted, you can choose And if both label events must occur in the same sample or Or if only one of the label events must occur.
2. Select the edge assignment button.
3. In the Specify Edge/Glitch dialog, select the edges or glitches that you're looking for on particular logic analyzer channels.
When you select multiple edges or glitches, they are ORed together, and any one of the edges or glitches in a sample will satisfy the label edge event. If you want to AND edges or glitches on a label, insert multiple label edge events and AND them together.
4. Select the OK button.
See Also “To specify a label pattern event” on page 66
To break down a trigger function
When a trigger function doesn't quite let you set up the trigger you want, you can break it down and edit the resulting advanced trigger function.
1. In the Trigger tab, select the number button of the trigger sequence level whose trigger function you want to break down.
2. Choose Break down function.
Breaking down the trigger function will be permanent (although you can choose the Undo command from the Edit menu if no other editing has taken place).
If you only want to look the advanced trigger function, without editing it, you can expand the trigger function.
3. Select OK in the confirmation dialog.
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To expand a trigger function
1. In the Trigger tab, select the number button of the trigger sequence level whose trigger function you want to expand.
2. Choose Expand function.
To compress a trigger function
Expanded trigger functions can be compressed back into their original form.
1. In the Trigger tab, select the number button of the trigger sequence level whose trigger function you want to compress.
2. Choose Compress function.
See Also “Editing Advanced Trigger Functions” on page 78 for information on
editing trigger functions that are broken down.
To create a trigger function library
You can create your own libraries of trigger functions that are separate from logic analyzer configuration files (unlike saved/recalled trigger setups).
1. In the Trigger tab's Trigger Functions subtab, select the Trigger function libraries button.
2. In the Trigger function libraries dialog, select the Create button.
3. In the Create User Library dialog, enter the library name and description, and select OK.
4. In the Edit Trigger Function Library dialog, choose the Add function button.
5. In the Create User Function dialog, enter the function name and description, and select the levels from the current trigger sequence that be the trigger function; then, select OK.
Once you have created a trigger function library with trigger functions, you can:
• Load or unload the trigger function library.
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Insert and break down trigger functions from the loaded library just like normal trigger functions.
• Copy trigger function libraries to other logic analysis systems and load them into other logic analyzers that have trigger function library capability.
• Edit the trigger function library, adding or deleting functions, or delete the library.
NOTE: If a trigger sequence or configuration file uses a trigger function library that
has been deleted, or a trigger function that has been deleted from a library, the logic analyzer replaces the missing function with the default trigger function.
To load/unload trigger function libraries
1. In the Trigger tab's Trigger Functions subtab, select the Trigger function libraries button.
2. Select the library from the list.
Only libraries created in the same sampling mode are available.
3. Select the Load (or Unload) button.
All of the library's trigger functions are added to (or removed from) the list of trigger functions.
To copy trigger function libraries between systems
1. Connect your logic analysis system to the network. (see the Agilent Technologies 16700A/B-Series Logic Analysis System help volume)
2. Using a computer on your network, copy the appropriate files from the / logic/trigger_functions/ directory to a central location, or
directly to other logic analyzers on the network.
See Also “To break down a trigger function” on page 67
“Saving/Recalling Trigger Setups” on page 85
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Using State Mode Trigger Features
When the logic analyzer sampling mode is state, you can specify whether a state or time count is stored with samples and you can set up the default storing options.
• “To count states or time” on page 70
• “To Specify Default Storing” on page 71
“To specify whether default storing is initially on or off” on page 72
To count states or time
When the logic analyzer sampling mode is state, you can specify whether a state or time count is stored with samples.
1. In the Trigger tab's Settings subtab, select the Count option button and choose either Off, Time, or States.
2. If you chose States:
a. Select the Define button.
b. In the State count qualify dialog, select the Count if or Count if NOT
option.
c. Specify events that identify the states to be counted or not counted.
d. If you would like to specify the evaluation order of the event list, select
Group events. Then, in the Group Events dialog, either select the Add parens button to group events or select the Remove parens button to
ungroup events. When you're done grouping events, select the OK button.
When time or state counts are turned on and all pods are assigned, logic analyzer acquisition memory is halved to 2M samples for the 16750A/B logic analyzer. Leaving one pod pair unassigned gives you full memory depth.
See Also “To assign pods to one or two analyzers” on page 57
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To Specify Default Storing
You can set up default storing so that only the data samples you're interested in are saved in logic analyzer acquisition memory.
NOTE: Default storing in both state and timing modes require time tags to
reconstruct the data. These time tags will be stored either in the memory resources of an unused pod pair, or interleaved in the data.
1. In the Trigger tab's Default Storing subtab, select the store by default option button and choose either Anything, Nothing, Custom, or
Transitions.
Anything means all samples are stored. Nothing means that no samples
are stored. Custom lets you specify which samples are stored. Tr ansitions lets you specify which transitions to store on a per label basis.
2. If you chose Custom:
a. Select the Store if or Store if NOT option.
b. Specify events that identify the states to be stored or not stored.
c. If you would like to specify the evaluation order of the event list, select
Group events. Then, in the Group Events dialog, either select the Add parens button to group events or select the Remove parens button to
ungroup events. When you're done grouping events, select the OK button.
3. If you chose Transitions (Timing mode only).
Transitional timing is a subset of store qualified timing. In transitional timing, the store qualification is set to look for edges (transitions) on all active channels. Active channels are those that have been assigned to a label in the Format tab. Samples are stored for all channels whenever a transition occurs. No other store qualification events are allowed.
For more information on store qualification in transitional timing mode, refer to More on Store Qualification in Transitional Timing. (see page 38)
In the trigger sequence, you can override default storing for the samples that cause actions to occur, or you can turn default storing on or off, by inserting store actions.
The Agilent Technologies 16750A/B logic analyzer does not use the
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"Branches taken" feature of past logic analyzers. The best way to store only the states that cause sequence level branches is by setting up default storing to Nothing, inserting a Store sample action in each sequence level, and inserting a Turn off default storing action in the level that triggers.
NOTE: When store qualification is performed in the 400 MHz State mode, there may
be the case where data occupying memory is further disqualified. As a result, you may see a non-contiguous listing of states as well as a reduction of usable memory.
To clear default storing changes
1. When the Trigger tab is displayed, select Clear Default Store from the Clear menu.
See Also “Storage Qualification” on page 201 in “Understanding Logic Analyzer
Triggering” on page 192
“To insert a store action (state mode)” on page 79
“To specify whether default storing is initially on or off” on page 72
To specify whether default storing is initially on or off
In the state sampling mode, you can specify whether the default storing is initially on or off.
1. In the Trigger tab's Default Storing subtab, select the At start of acquisition option button and choose either On or Off.
See Also “Storage Qualification” on page 201 in “Understanding Logic Analyzer
Triggering” on page 192
“To insert a store action (state mode)” on page 79
“To Specify Default Storing” on page 71
Editing the Trigger Sequence
When you want to trigger on several events in the device under test
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that follow one another, you need to use multiple levels in the trigger sequence.
For example, multiple levels in the trigger sequence let you trigger on a particular function calling sequence or capture only the execution within a particular program loop.
“To insert/replace/delete sequence levels” on page 73
• “To cut/copy-and-paste sequence levels” on page 74
• “To specify a level's goto or trigger action” on page 74
• “To send e-mail when the trigger occurs” on page 75
• “To view a picture of the trigger sequence” on page 77
• “To clear the trigger sequence” on page 77
See Also “Sequence Levels” on page 194 in “Understanding Logic Analyzer
Triggering” on page 192
To insert/replace/delete sequence levels
To insert sequence levels
1. In the Trigger tab's Trigger Sequence area, select the level that you want to insert before or after.
A yellow box appears around the level.
2. In the Trigger Functions subtab, select the trigger function you want to insert.
A picture describing the trigger function is shown.
3. Select the Insert before or Insert after button, or select the level button and choose Insert LEVEL before or Insert LEVEL after.
To replace sequence levels
1. In the Trigger tab's Trigger Sequence area, select the level that you want to replace.
A yellow box appears around the level.
2. In the Trigger Functions subtab, select the trigger function you want to
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insert.
A picture describing the trigger function is shown.
3. Select the Replace button, or select the level button and choose Replace LEVEL.
To delete sequence levels
1. In the Trigger tab's Trigger Sequence area, select the level that you want to delete.
A yellow box appears around the level.
2. Select the Delete button, or select the level button and choose Delete LEVEL.
See Also “To cut/copy-and-paste sequence levels” on page 74
To cut/copy-and-paste sequence levels
You can change the order of levels in the trigger sequence by cutting­and-pasting or you can copy levels by copying-and-pasting.
1. In the Trigger tab's Trigger Sequence area, select the level that you want to cut or copy.
A yellow box appears around the level.
2. Select Cut level or Copy level from the Edit menu, or select the level button and choose Cut LEVEL or Copy LEVEL.
3. Select the level that you want to paste before or after.
4. Select Paste level before or Paste level after from the Edit menu, or select the level button and choose Paste LEVEL before or Paste LEVEL after.
See Also “To insert/replace/delete sequence levels” on page 73
To specify a level's goto or trigger action
When using multiple levels in the trigger sequence, you specify the event search order by setting the goto or trigger action in each sequence level.
1. In the Trigger tab's Trigger Sequence area, select the level whose goto or
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trigger action you want to specify.
A yellow box appears around the level.
2. Select the Trigger or Goto button and choose the appropriate Goto or Trigger action.
3. If you chose the Goto or Trigger and goto action, select the level button and choose the appropriate level.
Searching for events that trigger the analyzer always starts at the first level. Searching stops after one of the Trigger and fill memory actions.
One level can branch to one of several other levels depending on the evaluation of the sample. You can set up multi-way branches using advanced trigger functions or by selecting an If button and choosing Insert BRANCH.
NOTE: When you want to test a single sample for multiple conditions and take
different actions based on which is true, use branches within a trigger sequence level. When you want to test different samples, use different sequence levels.
See Also “Understanding Logic Analyzer Triggering” on page 192
“To view a picture of the trigger sequence” on page 77
“Advanced Trigger Functions” on page 153
To send e-mail when the trigger occurs
You can set up the logic analyzer to send e-mail when the trigger occurs. This is useful when triggering on an event that rarely occurs, when you may not be around the logic analyzer to see that it triggered.
1. In the Trigger tab's Trigger Sequence area, select the level whose trigger you want to send e-mail on.
A yellow box appears around the level.
2. Select the Trigger or Goto button and choose the Trigger, send e-mail, and fill memory action.
3. Select the E-mail Setup button.
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4. In the E-mail Setup dialog, enter the name of the SMTP (see page 76) mail server (if you don't know this, contact your System Administrator), the recipient's e-mail address (use spaces to separate multiple addresses), and the text of the message.
If you want e-mail to be sent on each trigger of a repetitive run, select the Send e-mail on repetitive run check box.
5. Select the OK button.
Note that the e-mail is sent when the trigger occurs and not after the logic analyzer's acquisition memory is full.
You only need to specify one send e-mail action per trigger sequence. As long as one trigger action sends e-mail, any trigger in the sequence will result in e-mail being sent. (You cannot specify different send e- mail setups in a trigger sequence.)
If the SMTP server has a problem with the default sender address
Message Format
• You may need to specify a sender address that is recognizable by the server. A possible address might be the one specified in the To : field.
The automatically generated text is shown as follows: Example: system14 : Slot C : Analyzer C has triggered
Where system14 is the analysis system IP address or alias you have assigned to it; Slot C is the frame slot the module is in; Analyzer C identifies the specific analyzer module from others when configured in a multi-module frame configuration.
Any text you add in the text entry area of the e-mail setup dialog will appear after the automatically generated text.
What is SMTP? SMTP (Simple Mail Transfer Protocol) is a TCP/IP protocol used in sending and receiving e-mail. A protocol is the special set of rules for communicating the end points in a telecommunication connection as they send signals back and forth.
Protocols exist at several levels in a telecommunication connection. There are hardware telephone protocols. There are protocols between the end points in communicating programs within the same computer or at different locations. Both end points must recognize and observe
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the protocol.
On the Internet, there are the following TCP/IP protocols:
• TCP (Transmission Control Protocol), which uses a set of rules to exchange messages with other Internet points at the information packet level.
• IP (Internet Protocol), which uses a set of rules to send and receive messages at the Internet address level.
• HTTP, FTP, SMTP and other protocols, each with defined sets of rules to use with other Internet points relative to a defined set of capabilities.
To view a picture of the trigger sequence
1. In the Trigger tab, select the Overview subtab.
A picture of the trigger sequence is shown.
See Also “Editing the Trigger Sequence” on page 72
Chapter 2: Task Guide
To clear the trigger sequence
1. When the Trigger tab is displayed, select Trigger Sequence or All from the Clear menu.
Selecting Trigger Sequence restores the default trigger sequence for the selected sampling mode.
Selecting All restores the default trigger sequence, trigger settings, and default storing if in the state sampling mode.
To restore default trigger settings
1. When the Trigger tab is displayed, select Settings from the Clear menu.
Settings (acquisition depth and trigger position) are returned to their defaults. In the state sampling mode, time tags are turned back on. In the timing sampling mode, the sample period returns to its fastest setting.
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Editing Advanced Trigger Functions
After you break down a trigger function (if it didn't quite provide the trigger capability you need), or after you select one of the advanced trigger functions, you're ready to edit the advanced trigger function.
All trigger functions look for events and, if those events are found, take actions.
Most often, the event is something that occurs on the probed signals (label events), and the action is to trigger the logic analyzer. However, events can also test timer, counter, and/or flag values that are set up in the logic analyzer, and actions can include setting up timers, counters, and flags as well as specifying special store actions.
“To specify a duration or occurrence count for events (timing mode)” on page 78
• “To insert a store action (state mode)” on page 79
• “To insert timer actions/events” on page 79
• “To insert counter actions/events” on page 80
• “To insert flag actions/events” on page 81
• “To insert a "reset occurrence counter" action” on page 83
“To group events” on page 83
• “To use named events” on page 84
To specify a duration or occurrence count for events (timing mode)
When working with advanced trigger functions or when you break down other trigger functions, you can specify that an event be present for a certain amount of time, or occur in a certain number of samples, before the associated action is taken.
To specify a time duration for events
1. In the Trigger tab's Trigger Sequence area, if the present for > button is not present, select the occurs button and choose present for >.
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2. Enter a time duration value.
The event must be present for the specified period of time before the action is taken.
To specify a < duration, break down the Find pattern present for < duration trigger function. (It actually uses occurrence counts and four sequence levels.)
To specify an occurrence count for events
1. In the Trigger tab's Trigger Sequence area, if the occurs button is not present, select the present for > button and choose occurs.
2. Enter an occurrence count value.
3. If the occurrence count is greater than 1, select whether the event should occur consecutively or eventually.
The event must occur the specified number of times before the action is taken.
To insert a store action (state mode)
You can insert store actions to override the default storage qualifier for the samples that cause actions to occur, and you can insert store actions to turn default storing on or off.
1. In the Trigger tab's Trigger Sequence area, select one of the action buttons (for example, Trigger or Goto), choose Insert ACTION, choose Store, and choose either Store sample, Don't store sample, Turn on default storing, or Turn off default storing.
You can use store actions to set up sequence level storage qualification.
See Also “Storage Qualification” on page 201 in “Understanding Logic Analyzer
Triggering” on page 192
“To Specify Default Storing” on page 71
“To specify whether default storing is initially on or off” on page 72
To insert timer actions/events
Timers are like stopwatches. You can insert actions to start (from
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zero), stop (and reset), pause, or resume a timer. You can insert timer events in a different sequence level to test the value of a timer.
NOTE: No timer is available for the first pod pair assigned to a logic analyzer. For
each additional pod pair assigned to the analyzer, an additional timer is available.
To insert a timer action
1. In the Trigger tab's Trigger Sequence area, select one of the action buttons (for example, Trigger or Goto), choose Insert ACTION, choose Timer, and choose either Start from reset, Stop and reset, Pause, or Resume.
To insert a timer event
Timer events are like other events in that they evaluate to either true or false.
1. In the Trigger tab's Trigger Sequence area, select one of the existing event buttons (for example, a label name, Anything, Timer, Counter, or Flag) and choose to insert or replace a Timer.
2. Select the timer number button and choose the number of the timer you want to test.
3. Select the operator button and choose either >= or <.
4. Enter the time value.
The minimum value you can test a timer for depends on the timing/state analyzer configuration.
See Also “To assign pods to one or two analyzers” on page 57
To insert counter actions/events
Global counters are available in the trigger sequence. You can insert actions to reset or increment a counter. You can insert counter events in a different sequence level to test the value of a counter.
To insert a counter action
1. In the Trigger tab's Trigger Sequence area, select one of the action buttons (for example, Trigger or Goto), choose Insert ACTION, choose Counter,
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and choose either Reset or Increment.
To insert a counter event
Counter events are like other events in that they evaluate to either true or false.
1. In the Trigger tab's Trigger Sequence area, select one of the existing event buttons (for example, a label name, Anything, Timer, Counter, or Flag) and choose to insert or replace a Counter.
2. Select the counter number button and choose the number of the counter you want to test.
3. Select the operator button and choose either >= or <.
4. Enter the counter value.
To insert flag actions/events
Flags can be used to signal between modules in the logic analysis system mainframe, an expansion frame, or in multiple frames connected with the multiframe module.
There are 4 flags that are shared across all connected logic analysis system frames. A flag may be driven or received by multiple modules.
Using flags, logic analyzer modules can communicate back and forth with each other multiple times during a data acquisition, both before and after their trigger events occur. (By comparison, the Intermodule window lets one module arm another module one time when its trigger occurs.)
By default, flags are cleared. You can insert actions to set, clear, pulse set, or pulse clear a flag. You can insert flag events in different logic analyzer modules to test whether a flag is set or clear.
NOTE: In all but the slowest state speed, the logic analyzer can check flags by
inserting an event, but cannot change flag status with an action. Flag actions are not available when not using the slowest state speed.
A flag that is set by a module remains set until that module clears it. If multiple modules set the same flag, all of those modules must clear the flag before it becomes clear.
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Flags can also be used to drive the logic analysis system's Port Out signal.
To insert a flag action
You can use the Set/clear/pulse flag trigger function to insert a flag action. When editing advanced trigger functions, follow these steps to insert a flag action:
1. In the Trigger tab's Trigger Sequence area, select one of the action buttons (for example, Trigger or Goto), choose Insert ACTION, choose Flag, and choose either Set, Clear, Pulse set, or Pulse clear.
Flags in Pulse mode sit in the opposite state when not being pulsed. If you insert a Pulse set action for a flag in one analyzer, you cannot insert a Pulse clear action for the same flag in a different analyzer.
NOTE: Within an analyzer, the same flag cannot be used in both Pulse and Level (Set/
Clear) modes. If a flag action is inserted or modified with a different mode than other actions for the same flag, all actions for that flag will change to match the new mode.
2. If you chose Pulse set or Pulse clear, enter the width of the pulse.
Pulse width is settable from 50 ns to 1.275 us in 5 ns steps.
NOTE: Within an analyzer, a flag's pulse width must be the same in every action for
that flag. Whenever the pulse width is changed in a flag action, it changes in all other actions for that flag.
3. Select the flag number button and choose the number of the flag you want the action to occur on.
To insert a flag event
Flag events are like other events in that they evaluate to either true or false.
You can use the Wait for flag trigger function to insert a flag event. When editing advanced trigger functions, follow these steps to insert a flag event:
1. In the Trigger tab's Trigger Sequence area, select one of the existing event buttons (for example, a label name, Anything, Timer, Counter, or Flag) and
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choose to insert or replace a Flag.
2. Select the flag number button and choose the number of the flag you want to test.
3. Select whether you're testing if the flag is Set or Clear.
There is approximately 100 ns of delay before a flag action can be seen by a flag event.
To drive the Port Out signal with a flag
1. In the main logic analysis system window, select the Port Out button.
2. In the Port Out dialog, select the Type, Polarity, and Output options.
When driving the Port Out signal with a flag, you can select the Feedthrough type to pass the current state of the flag (set or clear) directly to Port Out.
3. For the Armed by option, select the flag that will drive the Port Out signal.
4. Close the Port Out dialog.
5. Insert a flag action in one of the logic analyzer modules to drive the flag.
There is approximately 100 ns of delay between a flag action and the signal on Port Out.
To insert a "reset occurrence counter" action
You can reset an occurrence counter if some event occurs by inserting a "reset occurrence counter" action.
1. In the Trigger tab's Trigger Sequence area, select one of the action buttons (for example, Trigger or Goto), choose Insert ACTION, and choose Reset occurrence counter.
See Also “To specify a duration or occurrence count for events (timing mode)” on
page 78
To group events
When you are working with advanced trigger functions (or when you break down other trigger functions) and there are multiple events in an
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event list, you can specify their evaluation order by grouping the events.
1. In the Trigger tab's Trigger Sequence area, select the If, If not, Else if, or Else if not button, and choose Group events.
2. In the Group Events dialog, either select the Add parens button to group events or select the Remove parens button to ungroup events.
3. Select the OK button.
To use named events
When you are working with advanced trigger functions (or when you break down other trigger functions), you can name an event list and use it later when inserting or replacing events.
To give an event list a name
1. In the Trigger tab's Trigger Sequence area, select the If, If not, Else if, or Else if not button, and choose Name event list.
2. In the Name Event List dialog, enter the name and select the OK button.
To insert a named event
1. In the Trigger tab's Trigger Sequence area, select a label name button and choose to insert or replace a Named event.
2. In the Named Event selection dialog, select the named event, and select the OK button.
To edit a named event
1. In the Trigger tab's Trigger Sequence area, select the named event button and choose Edit locally or Edit globally.
Locally means to edit (and rename) this instance of the named event. Globally means to edit all instances of the named event.
2. In the Edit dialog, edit the event list as you would edit it in the Trigger tab's Trigger Sequence area.
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Saving/Recalling Trigger Setups
You can save a trigger setup within a session by using trigger save/ recall.
“To save a trigger setup” on page 85
“To recall a trigger setup” on page 85
• “To clear the trigger save/recall list” on page 85
See Also “Save/Recall Subtab” on page 157
To save a trigger setup
1. Set up the trigger.
2. In the Trigger tab's Save/Recall subtab, select the Save button.
Chapter 2: Task Guide
3. Select a memory location to store the trigger setup in.
4. In the Buffer Name dialog, enter a descriptive name for the trigger setup.
To recall a trigger setup
1. In the Trigger tab's Save/Recall subtab, select the Recall button.
2. Choose the trigger setup from one of the previous measurements or one of the save/recall memories.
Recalling a trigger setup changes the trigger arming, memory depth, and trigger position as well as the trigger sequence. Recalling a trigger setup will not change the sampling mode configuration.
If one of the settings in the recalled trigger setup conflicts with the sampling mode configuration, it will be set to the closest setting.
Also, if the trigger setup uses a trigger function library that does not exist on this mainframe, it will not load correctly.
To clear the trigger save/recall list
1. When the Trigger tab is displayed, select Save/Recall Memories from the Clear menu.
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Running Measurements
After you set up a trigger, you're ready to run the logic analyzer measurement.
• “To start/stop measurements” on page 86
• “If nothing happens when you start a measurement” on page 86
• “To view the trigger status” on page 87
To start/stop measurements
To start measurements
1. Select the Run Single , Run Repetitive , Group Run Single ,
Group Run Repetitive, or Run All button.
Run starts only the instrument you are using. Single runs gather data until the logic analyzer memory is full, and then stop.
Repetitive runs keep repeating the same measurement and are useful for gathering statistics.
Group Run (or repetitive group run) starts all instruments attached to group run in the Intermodule window.
Run All starts all instruments currently placed in the workspace.
To stop a measurement
1. Select the Stop or Stop All button.
If nothing happens when you start a measurement
• Analyzers with deep memory take a noticeable amount of time to complete a run. Because data is not displayed until acquisition completes, it may look like nothing is happening. Check the Run Status window to see if the
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logic analyzer is still running.
• Messages such as "Waiting in level 1" may indicate you need to refine your trigger.
If the status shows as "Stopped", the analyzer either finished the acquisition, or was unable to run. The cause of the problem is listed in the bottom half of the Run Status window.
• Look for an error message in the message bar at the top of the window. Common messages are "slow or missing clock" and "Waiting for trigger".
• If Run briefly changed to Stop or Cancel, select the Window menu, choose the logic analyzer's slot, then choose the Waveform or Listing display.
See Also “Slow or Missing Clock” on page 180
“Waiting for Trigger” on page 184
“Error Messages” on page 170
Chapter 2: Task Guide
To view the trigger status
While a logic analyzer measurement is running, you can view the trigger status to see the sequence level that is evaluating captured data, occurrence and global counter values, and flag values.
1. In the Trigger tab, select the Status subtab.
See Also Run status (in the system help volume).
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Displaying Captured Data

Displaying Captured Data
Once you have run a measurement and filled the logic analyzer's acquisition memory with captured data, you can display the captured data with one of the display tools.
You can use analysis tools to filter data and compare data sets. You can also analyze captured data with toolsets like the Serial Analysis
Toolset and the System Performance Analysis Toolset.
“To open Waveform or Listing displays” on page 88
• “To display Timing Zoom data” on page 89
• “To use other display tools” on page 90
• “If the captured data doesn't look correct” on page 92
“If there are filtered data holes in display memory” on page 92
“To display symbols for data values” on page 93
• “To cancel the display processing of captured data” on page 94
To open Waveform or Listing displays
Waveform displays are typically used when data is captured with the timing sampling mode, and Listing displays are used when data is captured with the state sampling mode.
1. From the Window menu, select your logic analyzer and choose the Waveform or Listing command.
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Waveform and Listing (and other) display tools provide global markers that can be used to correlate data that is captured by different instrument modules or displayed differently in other display tool windows.
The Waveform and Listing display tools also give you the ability to search for particular data values captured on labels.
Listing displays let you load inverse assemblers that will decode captured data into assembly language mnemonics. From the Listing display, you can also open Source Correlation Toolset (Source Viewer) windows that can display the high-level language source code that is associated with captured data.
See Also Using the Digital Waveform Display Tool (see the Waveform Display Tool
help volume)
Using the Listing Display Tool (see the Listing Display Tool help volume)
Working with Markers (see the Markers help volume)
To display Timing Zoom data
1. From the Window menu, select your logic analyzer and choose the TimingZoom command.
Tips for interpreting Timing Zoom Data
•In a state measurement, Timing Zoom data may appear to be slightly off from standard data. This is because the Timing Zoom data is asynchronous to the clock signal, whereas the standard data is not sampled until after the setup period.
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In Waveform displays, Timing Zoom and the regular data are in different windows. To view them together, select Edit -> Insert from the menu bar.
• In Waveform displays, if Timing Zoom and regular data do not correspond, check that the display is set to Seconds/div. Because Timing Zoom has a smaller sample period, when the display is set to Samples/div the data become more divergent the farther from the trigger you scroll.
To use other display tools
You can add display tools to your logic analyzer via the Workspace window.
1. Select the Workspace button (or from the Window menu, select System and Workspace).
2. In the Workspace window, scroll down to the Display portion of the tool icon list.
3. Drag the display tool icon and drop it on the analyzer icon.
4. To open the display tool, select its icon and choose the Display command.
You can use the Chart display tool to chart the data on a label over
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time. For example, if you use storage qualification (in the state sampling mode) or the Pattern Filter analysis tool, you can chart variable values.
You can use the Distribution display tool to show how often different values (among the possible values) are captured on a label.
You can use the Compare analysis tool to show the differences between two measurement data sets. For example, you can run a measurement on one circuit board, then run the same measurement on a different circuit board (or on the same circuit board in different environmental conditions), and compare the results.
You can use the Pattern Filter analysis tool to remove samples from a measurement data set before displaying or exporting the data. This lets you look at selected samples without having to re-capture data.
You can use the Serial Analysis toolset to convert streams of serial data into parallel words which are easier to view and analyze.
You can use the System Performance Analysis toolset to do things like: isolate the root cause of performance bottlenecks, measure function execution times, view the occurrence rate of an event, analyze bus occupation and bandwidth, analyze bus stability, analyze jitter or time dispersion, etc.
See Also Using the Chart Display Tool (see the Chart Display Tool help volume)
Using the Distribution Display Tool (see the Distribution Display Tool help volume)
Using the Compare Analysis Tool (see the Compare Tool help volume)
Using the Pattern Filter Analysis Tool (see the Pattern Filter Tool help volume)
Using the Serial Analysis Tool (see the Serial Analysis Tool help volume)
Using the System Performance Analyzer (see the System Performance Analyzer help volume)
Measurement Examples (see the Measurement Examples help volume)
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If the captured data doesn't look correct
Intermittent Data Errors
Unwanted Triggers
Capacitive Loading on the Device Under Test
Check for poor connections, incorrect signal levels on the hardware, incorrect logic levels under the logic analyzer's Config tab, or marginal timing for signals.
If you are using an inverse assembler or a pipeline, triggers can be caused by instructions that were fetched but not executed. To fix, add the prefetch queue or pipeline depth to the trigger address.
The depth of the prefetch queue depends on the processor that you are analyzing, and can be quite deep.
Another solution which is sometimes preferred with very deep prefetch queues is to add writes to dummy variables to your software. Put the instruction just before the area you want to trigger on, then trigger on the actual write to this variable. Although the instruction is prefetched, the analyzer can be set to only trigger when the write is executed.
Excessive capacitive loading can degrade signals, resulting in suspicious data or even system lockup. All analysis probes add capacitive loading, as can custom probes you design for your device under test. To reduce loading, remove as many pin protectors, extenders, and adapters as possible.
Careful layout of your device under test can minimize loading problems and result in better margins for your design. This is especially important for systems running at frequencies greater than 50 MHz.
If there are filtered data holes in display memory
When an analyzer measurement occurs, acquisition memory is filled with data that is then transferred to the display memory of the analysis or display tools you are using, as needed by those tools. In normal use, this demand driven data approach saves time by not transferring unnecessary data.
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Since acquisition memory is cleared at the beginning of a measurement, stopping a run may create a discrepancy between acquisition memory and the memory buffer of connected tools. Without a complete trace of acquisition memory, the display memory will appear to have 'holes' in it which appear as filtered data.
This situation will occur in these cases:
• If you stop a repetitive measurement after analyzer data has been cleared and before the measurement is complete.
• If a trigger is not found by the analyzer and the run must be stopped to regain control.
To make sure all of the data in a repetitive run is available for viewing:
1. In the workspace, attach a Filter tool to the output of the analyzer.
2. In the Filter, select "Pass Matching Data"
3. In the filter terms, assure the default pattern of all "Don't Cares" (Xs).
This configuration will always transfer all data from acquisition memory. While this configuration will increase the time of each run, it will guarantee that repetitive run data is available regardless of when it is stopped.
To display symbols for data values
You can display data in symbolic form in some of the display tools, such as the Listing display and the Waveform display.
To view symbolic values in a waveform display
1. Select the label name where you want to display symbolic values.
2. Select Properties....
3. In the Properties dialog:
• Set ShowValue to On.
•Set Base to Symbols or Line#.
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• Select the OK button.
The symbolic names for the values now appear in the overlaid bus waveform.
To view symbolic values in a listing display
1. Select the numeric base of the label where you want to display symbolic values.
2. Set the numeric base to Symbols or Line#.
The symbolic names for the values now appear instead of numeric data.
See Also “Using Symbols” on page 95
To cancel the display processing of captured data
You can cancel the processing of captured data if it is taking too long.
1. Select the Cancel button.
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Using Symbols

Using Symbols
You can use symbol names in place of data values when:
Setting up triggers
• Displaying captured data
• Searching for patterns in Listing displays
• Setting up pattern filters
• Setting up ranges in the System Performance Analyzer
Symbol names can be: variable names, procedure names, function names, source file line numbers, etc.
You can load symbol name definitions into the logic analyzer from a program's object file or from a general-purpose ASCII format symbol file, or you can define symbol names in the logic analyzer.
• “To load object file symbols” on page 96
• “To adjust symbol values for relocated code” on page 97
• “To create user-defined symbols” on page 98
“To enter symbolic label values” on page 99
“To create an ASCII symbol file” on page 100
• “To create a readers.ini file” on page 101
See Also To go to a pattern in the Listing (see the Listing Display Tool help
volume)
To modify the Source Viewer trace setup (see the Listing Display Tool help volume)
To define System Performance Analyzer state interval ranges (see the System Performance Analyzer help volume)
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To load object file symbols
Object files are created by your compiler/linker or other software development tools.
1. Generate an object file with symbolic information using your software development tools.
2. If your language tools cannot generate object file formats that are supported by the logic analyzer, create an ASCII symbol file (see page 100).
3. Select the Symbol tab and then the Object File tab.
4. Select the label name you want to load object file symbols for.
In most cases you will select the label representing the address bus of the processor you are analyzing.
5. Specify the directory to contain the symbol database file (.ns) in the field under, Create Symbol File (.ns) in This Directory. Select Browse... if you wish to find an existing directory name.
6. In the Load This Object/Symbol File For Label field, enter the object file name containing the symbols. Select Browse... to find the object file and select Load in the Browser dialog.
If your logic analyzer is NFS mounted to a network, you can select object files from other servers.
7. If your program relocates code, see “To adjust symbol values for relocated code” on page 97.
The name of the current object file is saved when a configuration file is saved. The object file will be reloaded when the configuration is loaded.
To reload object file symbols
1. Select the object file/symbol file to reload from the Object Files with Symbols Loaded For Label field.
2. Select the Reload button.
The values of the object file symbols being used in the trigger sequence or in SPA state-interval ranges will be updated automatically each time
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To delete object file symbol files
1. Select the Symbol tab, and then the Object File tab.
2. Select the file name you want to delete in the text box labeled, Object Files with Symbols Loaded For Label.
3. Select Unload.
See Also “Symbol File Formats” on page 163
To adjust symbol values for relocated code
Use this option to add offset values to the symbols in an object file. You will need this if some of the sections or segments of your code are relocated in memory at run-time. This can occur if your system dynamically loads parts of your code so that the memory addresses that the code is loaded into are not fixed.
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Using Symbols
To adjust symbol values for a single section of code
1. Select the Symbol tab and then the Object File tab.
2. In the Object Files with Symbols Loaded For Label list, select the file whose symbols you wish to relocate.
3. Select the Relocate Sections... button.
4. In the Section Relocation dialog, select the field you wish to edit in the section list.
5. Enter the new value for that field and press Enter on your keyboard.
6. Repeat steps 4 through 6 above for any other sections to be relocated.
7. Select Close.
To adjust all symbol values
1. Select the Symbol tab and then the Object File tab.
2. In the Object Files with Symbols Loaded For Label list, select the file
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whose symbols you wish to relocate.
3. Select the Relocate Sections... button.
4. Enter the desired offset in the Offset all sections by field. The offset is applied from the linked address or segment.
5. Select Apply Offset.
6. Select Close.
To create user-defined symbols
1. Under the Symbol tab, select the User Defined tab.
2. Select the label name you want to define symbols for.
3. At the bottom of the User Defined tab, enter a symbol name in the entry field.
4. Select a numeric base.
5. Select Pattern or Range type for the symbol.
6. Enter values for the pattern or range the symbol will represent.
7. Select Add.
8. Repeat steps 3 through 7 for additional symbols.
9. You can edit your list of symbols by replacing or deleting them, if desired.
To replace user-defined symbols
1. Under the Symbol tab, select the User Defined tab.
2. Select the label you want to replace symbols for.
3. Select the symbol to replace.
4. At the bottom of the User Defined tab, modify the symbol name, numeric base, Pattern/Range type, and value, as desired.
5. Select the Replace button.
6. Repeat steps 3 through 5 to replace other symbols, if desired.
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To delete user-defined symbols
1. Under the Symbol tab, select the User Defined tab.
2. Select the label you want to delete symbols from.
3. Select the symbol to delete.
4. Select the Delete button.
5. Repeat steps 3 and 4 to delete other symbols, if desired.
To load user-defined symbols
If you have already saved a configuration file, and the configuration included user-defined symbols, load the file with its symbols, as follows:
1. In the menu bar of your analyzer window, select File and then Load
Configuration....
2. In the Load Configuration dialog, select the directory and filename to be loaded.
3. Select the target of the load operation.
4. Select Load.
User-defined symbols that were resident in the logic analyzer when the configuration was saved are now loaded and ready to use.
To enter symbolic label values
When entering label values in the trigger sequence:
1. Choose the Symbols or Line #s number base.
2. Select the Absolute XXXX button.
3. In the Symbol Selector dialog, select the symbol you want to use. All of your symbols for the current label, regardless of type, will be available in the dialog.
• Use the Search Pattern (see page 162) field to filter the list of symbols
by name. You can use the Recall button to recall a desired Search
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Pattern.
Use the Find Symbols of Type selections to filter the symbols by type.
4. Select the symbol you want to use from the list of Matching Symbols.
5. If you are using object file symbols, you may need to:
•Set Offset By (see page 162) to compensate for microprocessor prefetches.
• Set Align to x Byte (see page 163) to trigger on odd-byte boundaries.
6. Select the Beginning, End, or Range of the symbol.
7. Select the OK button.
The name of your symbol now appears as the value of the label.
8. Select the Cancel button to exit the Symbol Selector dialog without selecting a symbol.
NOTE: When you use symbolic label values in trigger sequences, information about
the symbols is saved with the logic analyzer configuration (and in the trigger Save/Recall buffer). If you re-compile your program and reload the logic analyzer configuration (or reload symbols and recall a trigger), the symbol values are automatically re-calculated.
Triggers set up by the Source Viewer now use symbolic values and are re­calculated in the same way.
See Also “To specify a label pattern event” on page 66
“Symbols Selector Dialog” on page 161
To create an ASCII symbol file
General-purpose ASCII symbol files are created with text editing/ processing tools.
See Also “General-Purpose ASCII (GPA) Symbol File Format” on page 164
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