Agilent Technologies 16700 User Manual
16700 Series
Logic Analysis System
Product Overview
Debugging today's digital systems
is tougher than ever. Increased
product requirements, complex
software, and innovative hardware
technologies make it difficult to
meet your time-to-market goals.
The Agilent Technologies
16700 Series logic analysis systems
provide the simplicity and power you
need to conquer complex systems
by combining state/timing analysis,
oscilloscopes, pattern generators,
post-processing tool sets, and
emulation in one integrated system.
2
Table of Contents
System Overview
Modular Design page 3
Features and Benefits page 4
Selecting the Right System page 6
Mainframes
Display page 7
Back Panel page 8
System Screens page 9
IntuiLink page 12
Probing Solutions
Criteria for Selection page 13
Technologies page 14
Data Acquisition and Stimulus
State/Timing Modules page 17
Oscilloscope Modules page 30
Pattern Generation Modules page 33
Emulation Modules page 37
Post-Processing and Analysis Tool Sets
Software Tool Sets page 39
Source Correlation page 41
Data Communications page 45
System Performance Analysis page 54
Serial Analysis page 61
Tool Development Kit page 67
Licensing Information page 73
Time Correlation with Agilent Infiniium Oscilloscopes
E5850A Logic Analyzer - Oscilloscope Time Correlation Fixture page 74
Technical Specifications and Characteristics
Mainframe page 75
Probing Solutions page 83
State/Timing Modules page 85
Oscilloscope Modules page 101
Pattern Generation Modules page 104
Trade-In, Trade-Up page 115
Ordering Information page 116
Third-Party Solutions page 123
Support, Warranty and Related Literature page 124
Sales Offices Information page 125
3
Modular Design Protects Your
Long-Term Investment
Modularity is the key to the Agilent
16700 Series logic analysis systems'
long term value. You purchase only
the capability you need now, then
expand as your needs evolve. All
modules are tightly integrated to
provide time-correlated, cross
domain measurements.
Module Choices User Benefits
State/Timing Agilent offers a wide variety of state/timing modules for a range
of applications, from high-speed glitch capture to multi-channel
bus analysis.
High-Speed Timing Precisely characterize setup/hold times over a wide channel
count. Capture data over many clock cycles while retaining the
highest multi-channel accuracy.
Oscilloscopes Identify signal integrity issues and characterize signals quickly
with automatic measurements of rise time, voltage, pulse width,
and frequency.
Pattern Generation Use stimulus to substitute for missing system components or to
provide a stimulus-response test environment.
Emulation An emulation module connects to the debug port (BDM or JTAG)
on your target. You have full access to processor execution
control features of the module through the built-in emulation
control interface or a third-party debugger.
External Ports
Target Control Port Use the target control port to force a reset of your target or
activate a target interrupt.
Port-in/Port-out A BNC connector allows you to trigger or arm external devices
or to receive signals that can be used to arm acquisition
modules within your logic analyzer.
System Overview
Modular Design
Figure 1.1. The system boot up screen shows you
what modules are configured into your logic
analysis system.
Help
enables you to
access the online
user’s guide and
measurement
examples.
4
System Overview
Features and Benefits
System Capability
NEW Touch Screen Interface The Agilent 16702B mainframe supports a large, 12.1 inch LCD touch screen and redesigned front panel
controls for an easy-to-operate, self-contained unit requiring minimal bench space and offering simple
portability.
NEW Multiframe Configuration By connecting up to eight mainframes and expanders you can simultaneously view time-correlated traces for
all buses in a large channel count, multibus system.
NEW Enhanced Mainframe Hardware Mainframe now includes a 40X CD-ROM drive, a 9 GB hard disk drive, 100BaseT-X LAN, and 128 MB of
internal system RAM (optional 256 MB total).
Scalable System
• State/timing analyzers • Select the optimum combination of performance, features, and price that you need for your specific
• High-speed timing application today, with the flexibility to add to your system as your measurement needs change.
• Oscilloscopes • View system activity from signals to source code.
• Pattern generators
• Emulation modules
Measurement Modules/Interfaces
The Agilent 16760A With up to 1.5 Gb/s state speed, the 16760A lets you debug today’s and tomorrow’s ultra-high-speed
State/Timing Module digital buses. NEW Eye scan gives a rapid comprehensive overview of signal integrity on hundreds of
channels simultaneously
The Agilent 16750A, 16751A, With up to 400 MHz state speed and up to 32 MBytes of trace depth these modules help you address today’s
and 16752A State/Timing Modules high-performance measurement requirements. (See page 19)
The Agilent 16720A With up to 16 MVectors depth and 300 MVectors/sec operation and up to 240 channels[1] of stimulus, the
Pattern Generator 16720A provides a new level of capability that makes complex device substitution a reality. Supports TTL,
CMOS, 3.3V, 1.8V, LVDS, 3-state, ECL, PECL, and LVPECL.
High-Speed Bus Measurements Agilent’s eye finder technology automatically adjusts the setup and hold on every channel, eliminating the
Made Simple with Eye Finder need for manual adjustment and ensuring accurate state measurements on high-speed buses.
Technology
Timing Zoom Technology Simultaneously acquire data at up to 2 GHz timing and 400 MHz state through the same connection. Timing
Zoom is available across all channels, all the time. (See page 23)
VisiTrigger Technology • Use graphical views and sentence-like structure to help you define a trace event.
• Select trigger functions as individual trigger conditions or as building blocks to easily customize a trigger
for your specific task.
Processor and Bus Support • Get control over your microprocessor’s internal and external data.
• Quickly and reliably connect to the device under test. (See page 36)
Direct Links to Industry Standard • Debuggers provide visibility into software execution for systems running software written in C and C++ as
Debuggers and High-Level well as active microprocessor execution control (run control).
Language Tools • Import symbol files created by your language tool. Symbols allow you to set up trigger conditions and review
waveform and state listings in easily recognized terms that relate directly to the names used for signals on
your target and the functions and variables in your code.
Direct Links to EDA Tools • Use captured logic analysis waveforms to generate simulation test vectors.
• Easily find problems by comparing captured waveforms with simulated waveforms.
[1] 240 channel system consists of five 16720A pattern generator modules with 48 channels per module. Full channel mode runs at 180 MVectors/s and 8 MVectors depth.
300 MVectors/s and 16 MVectors depth are offered in half channel mode.
5
System Overview
Features and Benefits
Data Transfer, Documentation, and Remote Programming
Direct Link to Microsoft®Excel via • Automatically move your data from the logic analyzer into Microsoft Excel with just a click of the mouse.
Agilent IntuiLink (See page 12)
• Use Microsoft Excel’s powerful functions to post-process captured trace data to get the insight you need.
Transfer Data for Offline Analysis - • Fast binary (compressed binary) from the FileOut tool provides highest performance transfer rate.
Data Export • ASCII format provides same format as listing display, including inverse-assembled data.
Transparent File System Access • Access, transfer, and archive files.
• Stay synchronized with your source code by mapping shared directories and file systems from your
Windows 95/98/NT-based PC directly onto the logic analyzer and vice versa.
• Move data files to and from the logic analyzer for archiving or use elsewhere.
Documentation Capability • Save graphics in standard TIFF, PCX, and EPS formats.
• Print screen shots and trace listings to a local or networked printer.
• Save your lab notes and trace data in the same file by entering relevant information in the Comments tab of
the display.
Remote Programming with • Perform pass/fail analysis, stimulus response tests, data acquisition for offline analysis, and system
Microsoft’s COM Using verification and characterization tests.
Microsoft Visual Basic or • Powerful-yet-efficient command set focuses on your programming tasks, resulting in a shorter learning
Visual C++ curve while maintaining necessary functionality.
System Software Features
Post-Processing Analysis Tools Rapidly consolidate large amounts of data into displays that provide insight into your system’s behavior.
(See page 38)
Setup Assistant Quickly configure the logic analysis system for your target microprocessor. (See page 9)
Tabbed Interface • Groups like tasks together so you can quickly find and complete the task you want to perform.
• Spend your time solving problems, not setting up a measurement.
Multi-Windowed View of • View your cross-domain measurements, time-corrected on the same screen. (See page 10)
Target System Activity • Debug faster because you can view system activity at a glance.
Global Markers Track a symptom in one domain (e.g., timing) to its cause in another domain (e.g., analog).
Resizable Windows and Data Views • Magnify your view or zoom in on a boxed area of interest.
• Resize waveforms and data or quickly change colors to highlight areas of interest.
Web-Enabled System • Directly access the instrument’s web page from your web browser. (See page 11)
• Remotely check the instrument’s measurement status without disturbing the acquisition.
• Remotely access, monitor and control your logic analysis system.
Network Security • Protect your networked assets and comply with your company’s security requirements with individual user
logins that provide system integrity.
NEW Time Correlation with • Make time-correlated measurements using an Agilent 16700 Series logic analyzer and an
Infiniium 54800 Series Oscilloscopes Agilent Infiniium 54800 Series oscilloscope.
• View Infiniium oscilloscope waveforms in the 16700 logic analyzer’s waveform display.
• Use the 16700 logic analyzer’s global markers to measure time between any domain in the 16700 and voltage
waveforms acquired by the Infiniium oscilloscope.
6
System Overview
Selecting the Right System
Select a mainframe (page 7)
Choose a system based on your needs:
• Self-contained unit or a unit with
external mouse, keyboard, and monitor
• Expander frame for large channel count
requirements
Selecting a system for your application
Determine your probing requirements (page 13)
• Are you analyzing a microprocessor?
• Do you need to probe a specific package type?
Select the measurement modules to meet your
application needs
• State/Timing Logic Analyzers (page 17)
• Oscilloscopes (page 29)
• Pattern Generation (page 32)
• Emulation (page 36)
Add post-processing tool sets for analysis and
insight (page 38)
• Source correlation
• Data communications
• System performance analysis
• Serial analysis
• Tool development kit
Support, services, and assistance (page 123)
• Training classes
• Consulting
• On-line support
• Warranty extension
7
12.1" LCD display with touch screen on
the 16702B makes it easy to view a large
number of waveforms or states.
Dedicated hot keys give instant access to
the most frequently used menus, displays,
and on-line help.
"Touch Off" button disables the touch
screen and allows you to point out a
nomalies to a colleague without altering
the display settings.
Dedicated knobs for horizontal and vertical
scaling and scrolling. Adjust the display to
get just the information you need to solve
your problem.
Mainframes
Display
Select a modifiable variable by touching
it, then turn the knob to quickly step
through values for the variable.
Figure 2.1. The Agilent 16702B quickly tracks down problems in your design while saving precious bench space.
Dedicated knobs for global markers help
track down tough problems. A symptom
seen in one domain (e.g., timing) can be
tied to its cause in another domain
(e.g., analog).
8
Connection for optional monitor.
(Up to 1600x1200 video
resolution with option 003)
10/100BaseT LAN - autosensing
Parallel printer port SCSI-II connection for an
external 18 GByte data drive or
external removable hard drive
Expander frame connection provides an
additional five slots for measurement
modules.
Built-in 40x CD-ROM drive makes it easy
to install or update system software,
processor support, or tool sets.
Option slot for an emulation module or
for a multiframe module. Multiframe
option allows up to eight mainframes
and expanders to be combined so that
you can see all the buses in a complex
target system.
Mainframes
Back Panel
Figure 2.2. The mainframe and expander frame provide advanced capabilities for debugging complex target systems.
Five slots for
measurement
modules
9
Mainframes
System Screens
Figure 2.4. Setup Assistant gets you up and
running quickly.
System Admin
allows you to quickly set up the instrument on your network, configure
print servers, set up
user accounts for
security or install
software updates.
Demo Center
provides simple
demos of the most
commonly used
features.
Setup Assistant
is a guided menu
system that helps
you configure the
logic analysis system for your target
microprocessor or
bus. Online information guides you
through the setup.
(See figure 2.4)
Figure 2.3. Icons in the power-up screen give you
quick access to common tasks.
10
Mainframes
System Screens
See the Big Picture of Your
Prototype System's Behavior
A large external display (option 001)
with multiple, resizable windows
allows you to see at a glance more of
your target system's operation. A
built-in, flat-panel display in the
16702B fits in environments with
limited space. Color lets you highlight
critical information so you can find
it quickly.
Use one system to examine target
operation from different perspectives. Multiple time-correlated views
of data let you confirm both signal
integrity and software execution
flow. These views are invaluable in
solving cross-domain problems.
Figure 2.5. You can quickly isolate the root cause of system problems by examining target operation across a wide
analysis domain, from signals to source code.
...access Agilent's Web site for the latest
online manuals and technical information
...install Agilent IntuiLink to seamlessly
transfer data from the system to a PC
11
Mainframes
System Screens
Expanding Possibilities with
Network Connectivity
Web-enabled instrumentation gives
you the freedom to access the
system—anywhere, anytime. Have
you ever needed to check on a
measurement's status while you were
in a remote location? Now you can.
Figure 2.6. Your logic analyzer is its own web site. From the Home Page, you can perform multiple remote functions.
With a Web Enabled Logic
Analysis System You Can...
...access the logic analysis
system's Web page from
your browser by using the
instrument's hostname as
a URL
...access the system’s user
interface directly from within your browser, giving you
full control of all analysis
functions
...remotely check current
measurement status to find
out if the system has
triggered
...quickly check instrument
status to determine if the
system is available for use
12
Programming
IntuiLink also includes an Active-X
automation server to provide
programmatic control of the logic
analysis system from an external
environment, such as LabVIEW or the
Microsoft VisualStudio environment
of Visual Basic and Visual C++ tools.
The instrument's Remote
Programming Interface (or RPI) also
allows you to write Perl or other
scripts to control the logic analyzer.
Use the sample programs provided
to assist you in creating your own
custom programs.
Mainframes
IntuiLink
Figure 2.7. Transfer data into Microsoft Excel with just a click of the mouse.
Agilent IntuiLink Moves Your
Data Automatically into
Microsoft
®
Excel for
Advanced Offline Analysis
IntuiLink is shipped with each logic
analysis system and can be downloaded to your PC from the system’s
own web page. Use the Agilent
IntuiLink tool bar to connect to a
logic analysis system. Select from
the available labels and specify
the destination cell location in
Microsoft Excel.
Use Microsoft Excel's powerful
functions to post-process captured
trace data for the insight you need.
Import data from a current
acquisition or data previously saved
to a file via the File Out tool.
13
Probing Solutions
Criteria for Selection
Why is Probing Important?
Your debugging tools perform three
important tasks: probing your target
system, acquiring data, and analyzing
data. Data acquisition and analysis
tools are only as effective as the
physical interface to your target
system. Use the following criteria to
see how your probing measures up.
How to Determine Your
Requirements
To determine what probing method
is best to use you need to take the
following into consideration:
• The number of signals to be
probed
• The ability to design probing
connectors on the target PC board
itself
• Mechanical probing clearance
requirements
• Signal loading effects
• Ease of attachment
• Package type to be probed
DIP Dual In-line Package
PGA Pin Grid Array
BGA Ball Grid Array
PLCC Plastic Leaded Chip
Carrier
PQFP Plastic Quad Flat Pack
TQFP Thin Quad Flat Pack
SOP Small Outline Package
TSOP Thin Small Outline
Package
• Package Pin Pitch (distance
between pin centers)
Immunity to Noise EMF noise is everywhere and can corrupt your data. Active
attenuator probing can be particularly susceptible to noise effects.
Agilent Technologies designs probing solutions with high immunity to
transient noise.
Impedance High input impedance will minimize the effect of probing on your
circuit. Although many probes are acceptable for lower frequencies,
capacitive loading dominates at higher frequencies.
Ruggedness A flimsy probe will give you unintended open circuits. Agilent
Technologies' probes are mechanically designed to relieve strain and
ensure a rugged and reliable connection.
Connectivity A multitude of device packages exist in the digital electronics industry.
Check our large selection of probing solutions designed for specific
chip packages or buses. As an alternative, we offer reliable
termination adapters that work with standard on-target connectors.
Figure 3.1. A rugged connection lets you focus on debugging your target, not your probe.
14
Probing Solutions
Technologies
Choose the Optimum Probing
Strategy for Your Application
Advantages Limitations
Most flexible method. Can be time-consuming to connect a large
Flying-lead probes are included with logic number of channels. Least space-efficient
analyzer module (except 16760A). method.
Figure 3.2.
Figure 3.4. Surface mount IC clip.
5090-4356 (20 clips).
Figure 3.5. 0.5 mm IC clip.
10467-68701 (4 clips).
Figure 3.6. Wedge adapters connect to multiple
pins of 0.5 mm or 0.65 mm QFP ICs. Refer to
“Probing Solutions for Agilent Technologies
Logic Analysis Systems,” publication number
5968-4632E, for specific part numbers.
Connecting to individual test
points with flying leads
Advantages Limitations
Rapid access to all pins of fine-pitch Requires minimal keepout area.
QFP package.
Very reliable connections.
Figure 3.7.
Refer to “Probing Solutions for
Agilent Technologies Logic Analysis
Systems,” publication number
5968-4632E, for specific solutions.
Connecting to all the pins of a
quad flat pack (QFP) package
NEW Figure 3.3. The E5382A single-ended flying lead
probe set provides connections for 17 channels of
the 16760A logic analyzer.
15
Probing Solutions
Technologies
Advantages Limitations
Very reliable connections. Requires advance planning in the design stage.
Saves time in making multiple connections. Requires some dedicated board space.
Moderate incremental cost.
Figure 3.8.
High-density probing solutions
Model Description Requires kit of 5 connectors Usable with
number and 5 shrouds logic analyzers
E5385A 100-pin probe with built-in isolation networks for the logic analyzer 16760-68701 All except 16517A,
16518A,16760A
E5346A 34-channel, 38-pin probe with built-in E5346-68701 All except 16517A,
isolation networks for the logic analyzer. 16518A, 16760A
E5351A 34-channel 38-pin adapter cable, requires logic analyzer E5346-68701 All except 16517A,
isolation networks on the target. 16518A, 16760A
E5339A 34-channel 38-pin low-voltage probe with E5346-68701 All except 16517A,
built-in isolation networks for the logic analyzer. Designed for signals 16518A, 16760A
with peak-to-peak amplitude as small as 250 mV.
E5378A 34-channel 100-pin single-ended probe for 16760A 16760-68701 16760A only
E5379A 17-channel 100-pin differential probe for 16760A 16760-68701 16760A only
E5380A 34-channel 38-pin single-ended probe for 16760A E5346-68701 16760A only
Designing connectors into
the target system
Moderate-density probing solutions
The Agilent 01650-63203 isolation
adapter contains the termination
networks for the logic analyzer. The
01650-63203 connects to a 3M 20-pin
connector on the target PC board.
Refer to "Probing Solutions for
Agilent Technologies Logic Analysis
Systems," publication number
5968-4632E, for design guidelines
and part numbers for mating
connectors.
You may also add the isolation
networks to the target PC board and
connect the logic analyzer cable
directly to a 40-pin 3M connector on
the PC board. Refer to "Probing
Solutions for Agilent Technologies
Logic Analysis Systems," publication
number 5968-4632E, for design
guidelines in addition to part numbers for mating connectors and
isolation networks.
Figure 3.9. 01650-63203 termination adapter.
16
Probing Solutions
Technologies
Advantages Limitations
Easiest and fastest connection to supported Moderate to significant incremental cost.
processors and buses. Only useable for the specific processor or bus.
May require moderate clearance around
processor or bus.
Figure 3.10.
Refer to “Processor and Bus Support
for Agilent Technologies Logic
Analyzers,” publication number
5966-4365E, for specific solutions.
Using a processor- or bus-specific
analysis probe
17
Data Acquisition and Stimulus
State/Timing Modules
Selecting the Correct Modules
to Meet Your Needs
Selecting the proper logic analyzer
modules for your needs requires a
series of choices concerning
performance, cost, and the amount of
data you will be able to capture. The
following table explains these factors
in greater detail.
Considerations for Choosing Modules
Microprocessor/ Will you be using an analysis probe for a particular processor or bus? If so, a good starting point is the document Processor
Bus Support and Bus Support for Agilent Technologies Logic Analyzers, publication number 5966-4365E, available on the worldwide web
at www.agilent.com/find/logicanalyzer. This document provides the number of channels and state speed required for any
particular analysis probe. It also indicates which analysis modules are supported and how many are required.
State Speed • State analysis uses a clock or strobe signal from your system under test to determine when to sample. Because state
analysis samples are synchronous with the system under test, they provide a view of how your system is executing. You can
use state analysis to capture bus cycles from a microprocessor or I/0 bus and convert the data into processor mnemonics
or bus transactions using an Agilent Technologies inverse assembler.
• Select a state acquisition system that provides the speed and headroom you need without breaking your budget. Remember
that a microprocessor will have an internal core frequency that is normally 2X-5X the speed of the external bus.
Headroom You may realize a better return on your investment if you consider possible future needs when purchasing analysis modules.
The things to consider are primarily state speed and memory depth.
Setup/Hold • Logic analyzers require time for the data at the inputs to become valid (setup time), and time to capture the data (hold time).
A lengthy setup and hold can make the difference between capturing valid data or data in transition.
• Your device under test will ensure that data is valid on the bus for a defined length of time. This is known as the data valid
window. Your target's data valid window must be large enough to meet the setup/hold specifications of the logic analyzer.
The data valid window of most devices is generally less than half of the clock period. Don't be fooled by "typical" setup and
hold specifications for logic analyzers.
• As bus speeds increase, the time window during which data is stable decreases. Jitter, skew, and pattern-dependent ISI
add more uncertainty and consume a greater portion of the data-valid window at high speeds. A logic analyzer with
adjustable setup/hold with fine position resolution provides unparalleled measurement accuracy at high frequencies.
Timing Resolution Timing analysis uses the logic analyzer's internal clock to determine when to sample. Since timing analysis samples
asynchronously to the system under test, you should consider what accuracy you will need to verify your system.
Accuracy is made up of two elements: sample speed and channel-to-channel skew. Remember to evaluate both of these
elements and be careful of logic analyzers that have a fast sample speed with a large channel-to-channel skew.
Transitional Timing If your system has bursts of activity followed by times with little activity, you can use transitional timing to capture a longer
trace. In transitional timing, the analyzer samples data at regular intervals, but only stores the data when there is a transition
on one of the signals.
18
Data Acquisition and Stimulus
State/Timing Modules
Considerations for Choosing Modules (continued)
Channel Count Determine the number of signals you want to analyze on your system under test. You will need this number of channels in
your logic analyzer. Even if you have enough channels to view all the signals in your system today, you should consider logic
analysis systems that allow you to add more channels for your future application needs.
Memory Depth • Complex architectures and bus protocols make your debugging job increasingly challenging. Split transactions, multiple
outstanding transactions, pipelining, out-of-order execution, and deep FIFOs, all mean that the flow of data related to a
problem can be distributed over thousands or millions of bus cycles.
• The keys to useful insight are the combination of deep memory with responsive display refresh, search, rescaling, and
scrolling to help you find information and answers quickly. Hardware-assisted memory management in the Agilent
16740A, 16741A, 16742A, 16750A, 16751A, 16752A, and 16760A state and timing analysis modules makes quick work of
refreshing the display, rescaling, scrolling, and searching. It takes only a few seconds to refresh, rescale, or scroll a 32M
sample record. Agilent Technologies offers a range of state and timing analyzer modules with memory depths up to 128M
samples, at prices to meet your budget.
Triggering • The logic analyzer memory system is similar to a circular buffer. When the acquisition is started, the analyzer continuously
gathers data samples and stores them in memory. When memory becomes full, it simply wraps around and stores each new
sample in the place of the sample that has been in memory the longest. This process will continue until the logic analyzer
finds the trigger point. The logic analyzer trigger stops the acquisition at the point you specify and provides a view into the
system under test. The primary responsibility of the trigger is to stop the acquisition, but it can also be used to control the
selective storage of data. Consider a logic analyzer with the trigger resources you need to quickly set up your
measurements.
• After memory depth, triggering is the most important aspect of a logic analyzer to consider. On the one hand, powerful
triggering resources and algorithms will allow you to focus on potential problem sources without using up valuable memory.
On the other hand, to be useful, the trigger must be easy to set up.
Other In addition to the measurements made with an analysis probe, consider whether you need to monitor other signals. Be sure to
Measurements allow enough channels to make those measurements. For state measurements, the state speed of the analyzer must be at least
as high as the clock speed of your circuit. You may want to test the margin in your circuit by operating it at higher than the
nominal clock speed to determine if the analyzer has sufficient clock speed. For timing measurements, the timing analyzer rate
should be from 2-10X the clock speed of your target.
19
Data Acquisition and Stimulus
State/Timing Modules
Key Features of Agilent’s
State/Timing Modules
• Memory depth up to 128M
samples at a price to meet your
budget
• State analysis up to 1.5 Gb/s
• Timing analysis up to 2 GHz
• VisiTrigger combines powerful
functionality with an intuitive
user interface
• Timing Zoom 2-GHz timing on
all channels
• Eye finder for automatic setup
and hold on all channels
Multichannel Eye scan allows you to make eye diagram measurements, quickly and easily,
Eye measurements on hundreds of channels simultaneously (16760A only)
Triggering for the VisiTrigger combines powerful trigger functionality with a user interface
most elusive that is easy to understand and use. Capturing complex sequences of
problems events is as simple as pointing to the function you want to use and filling in
the blanks to customize it to your specific situation.
Reliable Eye finder automatically adjusts the setup and hold on every channel,
measurements eliminating the need for manual adjustment and ensuring the highest
on high-speed confidence in accurate state measurements on high-speed buses.
buses
High-speed Timing Zoom provides the data acquisition speed you need for high-speed
timing on microprocessors and buses.
all channels
Choose the Logic Analyzer and Measurement Modules that Best Fit Your Application
State/Timing General- 8/16 Bit 32/64 Bit High- Timing Deep trace High- Analysis of
Modules purpose processor processor speed margin capture speed data intensive
hardware debug debug or bus analysis or with timing computer systems and
debug channel analysis characterize or state debug performance
intensive setup/hold analysis
systems
16710A √√
16711A √√
16712A √√
16715A √√√
16716A √√√√√
16717A √√√√√
16740A √√√√√√
16741A √√√√√√
16742A √√√√√√
16750A √√√√√√
16751A √√√√√√
16752A √√√√√√
16760A √√√
A variety of measurement modules allow you to select the optimum combination of performance, features, and price to meet your specific needs now and in the future.
20
Data Acquisition and Stimulus
State/Timing Modules
Improve Your Productivity with an
Intuitive User Interface
Agilent Technologies has made the
user interface easy to understand
and use. Now you can spend more
time making measurements and less
time setting up the logic analyzer.
Measurement configuration and
data files can be loaded directly into
the logic analyzer
Menu tabs provide a logical
progression through the setup of
your measurement.
State and timing mode selections
specify how data is sampled.
Single location for access to all state
acquisition options.
Convenient color coding helps you
identify the signals in the interface
with the physical connection to your
device under test.
Clocking for state measurements
can be quickly defined using the
clock setup menu.
Sampling defines how the logic
analyzer will acquire the data.
Format allows you to
group signals into buses.
Trigger defines what
data is acquired.
Timing Zoom provides 2 GSa/s timing
analysis simultaneous with state or
conventional timing analysis on all
channels. Sampling rate and position
relative to trigger are adjustable
(16716A, 16717A, 16740A, 16741A
16742A, 16750A, 16751A, and
16752A only).
Figure 4.1. Setting up your logic analyzer has never been this easy.
21
Data Acquisition and Stimulus
State/Timing Modules
VisiTrigger Quickly Locates
Your Most Elusive Problems
VisiTrigger technology is a breakthrough in logic analysis usability. It
combines increased trigger functionality with a user interface that is easy
to understand and use. Now with
VisiTrigger, capturing complex events
is as simple as pointing to the trigger
function and filling-in-the-blanks.
Features and Applications
VisiTrigger • Use graphical views and sentence-like structures to help you
(available in the 16715A, define a trace event.
16716A, 16717A, 16740A, • Select trigger functions as individual trigger conditions or as
16741A, 16742A, 16750A building blocks to easily customize a trigger for your specific task.
16751A, 16752A, and • Set global counters to count events such as the number of times a
16760A state/timing function executes, or the number of accesses to an l/O port.
modules) • Set, clear or evaluate flags by any module in the frame. Flags allow
you to set up a trigger that is dependent on activity from more than
one bus in the system.
• Specify four-way arbitrary IF/THEN/ELSE branching.
Examples of Problems that Can be Captured Easily with VisiTrigger
Description Typical Applications Graphic
Pulse too narrow or too wide • Line hangs at wrong level (high or low).
• Asynchronous input (for example, an interrupt) persists too long.
• Strobe width is too narrow or too wide.
Time between two edges is • Excessive delay in responding to a bus grant request.
longer than specified • Excessive delay in responding to a data valid with a data
acknowledged.
Pattern lasts longer than a • A bus hangs up at a given value.
specified time
Pattern two exists within a • An incorrect response to a read or write.
specified time after pattern • An incorrect output from a FIFO or bridge.
one is detected
A pattern exists for less • A driver is not holding a bus value long enough for a receiver to
than a specified time respond.
Pulse too narrow
Pulse too wide
Min width
Max width
OR
time
edge 1 edge 2
pattern
time
pattern 1
pattern 2
time
pattern
time
22
Data Acquisition and Stimulus
State/Timing Modules
Save and recall up to ten of your
custom trigger setups without loading
a new configuration file.
View current information on the state of
the timers, counters, flags, and the trigger
sequence level.
VisiTrigger
Your most commonly used triggers are
just a mouse click away with the built-in
trigger functions. VisiTrigger’s graphical
representation shows you how the
trigger condition will be defined. You can
use trigger functions as building blocks
to easily customize a trigger for your
specific task.
Sequence levels allow you to develop a
sequence of analyzer instructions to
specify a trigger point or to qualify data
and store only the information that
interests you. Each step in the sequence
contains an "IF/THEN/ELSE" structure
that can evaluate up to four logic
events. Each event can specify a
combination of actions such as: store
sample, increment counters, reset
timers, trigger, or go to another step
in the sequence level.
Ranges provide a way to monitor
program and data accesses within a
specified area in memory.
Global counters can count events such
as the number of times a function
executes or accesses an I/O port.
Timers can be set up to evaluate when
one event happens too late or too soon
with respect to another event.
In timing mode, edge terms let you
trigger on a rising edge, falling edge,
either edge, or a glitch.
Patterns and their logical combinations
let you identify which states to store,
when to branch and when to trigger.
Flags can be set, cleared and evaluated by
any 16715A/16A/17A/40A/41A/42A/50A/
51A/52A/60A module in the frame. This
allows you to set up a trigger that is dependent on activity from more than one bus in the
system.
Values can be easily entered directly into
the trigger description.
Figure 4.2. Set up your trigger in terms of the measurements you want to make.
23
Data Acquisition and Stimulus
State/Timing Modules
2 GHz Timing Zoom Provides HighSpeed Timing Analysis Across All
Channels, All the Time
When you're pushing the speed
envelope, you may run into elusive
hardware problems. Capturing
glitches and verifying that your
design meets critical setup/hold
times can be difficult without the
proper tools. With Timing Zoom you
have access to the industry's most
powerful tool for high-speed
digital debug.
Features and Applications
Timing Zoom • Simultaneously acquire up to 16K of data at 2 GHz timing and
(available in the 16716A, 400 MHz state across all channels, all the time, through the same
16717A, 16740A, 16741A, connection
16742A, 16750A, 16751A • Vary the Timing Zoom sample rate from 250 MHz to 2 GHz
and 16752A state/timing • Vary the placement of Timing Zoom data around the trigger point
modules) • Efficiently characterize hardware with 500 ps resolution
Now it’s easy to capture simultaneous
2 GHz timing and high-speed state
information through a single connection.
Use the global
markers to
time-correlate
events across
multiple displays.
Timing Zoom labels are automatically
created and marked with an _TZ extension.
Figure 4.3. Verifying critical edge timing in your system is easy with Agilent Technologies' 2 GHz Timing Zoom technology.
24
Data Acquisition and Stimulus
State/Timing Modules
Eye Finder
Agilent’s eye finder examines the
signals coming from the circuit under
test and automatically adjusts the
logic analyzer’s setup and hold
window on each channel. Eye finder,
combined with 100 ps adjustment
resolution (10 ps on 16760A) on
Agilent’s logic analyzer modules,
yields the highest confidence in
accurate state measurements on
high-speed buses.
It takes less than a minute to run
eye finder. No special setup or
additional equipment is required.
You only need to run eye finder
once, when the logic analyzer is set
up and connected to the target.
Figure 4.4. The eye finder display.
Gray shading indicates
regions where
transitions are detected.
Blue bars indicate
the sampling point
selected by eye finder.
The eye finder display shows:
• Regions of transitions that were
discovered on all channels
selected
• The sampling point selected by eye
finder
If you want to select a different
sample point on any individual
channel, just drag and drop the blue
"sample" bar at the desired point.
Times in the eye finder display are
referenced to the incoming clock
transitions. The center of the display
(labeled "0 ns") corresponds to the
clock transitions.
25
Data Acquisition and Stimulus
State/Timing Modules
Eye Finder as an Analytical Tool
Eye finder is very useful as a firstpass screening test for data valid
windows. Because eye finder quickly
examines all channels, it is
considerably faster than examining
each channel with an oscilloscope.
After running eye finder, you may
want to use an oscilloscope to
examine only those signals that are
close to your desired specifications
for setup and hold.
Eye finder also can quickly provide
useful diagnostic or troubleshooting
information. If a channel has an
unexpectedly small data valid
window, or an anomalous offset
relative to clock, this could be an
indication of a problem, or could be
used to validate the cause of an
intermittent timing problem.
Differences in the position of the
stable region from one signal to
another on a bus indicate skew. An
indication of excessive skew on eye
finder can help isolate which
channels you want to check with an
oscilloscope, or with the Timing
Zoom 2 GHz timing analysis mode
in your logic analyzer.
When Do You Need Eye Finder?
Eye finder becomes critical when
the data valid window is <2.5 ns. If
you’re unsure where your clock edge
is relative to the data valid window,
you can run eye finder for maximum
confidence. If the clock in your
system runs at 100 MHz or slower,
and the clock transitions are approximately centered in the data valid
window, you may not see any transition zones indicated in the eye finder
display. This is because eye finder
only examines a time span of 10 ns
(16760A: 6 ns) centered about the
clock.
Examples of When to Run Eye Finder
You should use eye finder in the
following situations:
Probing a new target, or probing
different signals in the same target
• Because eye finder examines the
actual signals in the circuit under
test, you should run it whenever
you probe a different bus or a
different target.
Significant change of target
temperature
• The propagation delays and signal
levels in your target system may
vary with temperature. If, for
example, you place your target
system in a controlled temperature chamber to evaluate its operation over a range of temperatures
or to trouble-shoot a problem that
only occurs at high or low temperatures, you should run eye finder
after the target system stabilizes
at the new ambient temperature.
26
Data Acquisition and Stimulus
State/Timing Modules
Features Supported in Agilent State and Timing Analysis Modules
Agilent Module Number 16710A, 16711A, 16715A 16716A, 16717A, 16760A
16712A 16740A, 16741A,
16742A, 16750A
16751A, 16752A
Eye finder √√√
Visitrigger √√√
Timing Zoom √
Transitional timing √√√√
Context Store √
Eye Scan √
27
Data Acquisition and Stimulus
State/Timing Modules
Agilent 16760A: Extending Logic
Analysis to New Realms
• Differential inputs (single-ended
probes also available).
• State analysis up to 1.5 Gb/s.
• Setup-and-hold time of 500 ps.
• Input signal amplitude as low as
200 mV p-p.
Logic analysis at state speeds up to
1.5 Gb/s imposes a stringent set of
criteria for a logic analyzer.
• Probing
Agilent’s 16760A uses an innovative
probing system with only 1.5 pF of
probe tip capacitance, including the
connector. The connector is a joint
design between Agilent and Samtec,
optimized especially for logic analysis
measurements.
Ground pins located between every
pair of signal pins provide excellent
channel-to-channel isolation at high
speeds.
• Setup and hold
As state speeds go up, the data valid
window shrinks. To make reliable
measurements, a logic analyzer’s
combined setup and hold window
must be smaller than the data valid
window of the signals it is acquiring.
Agilent’s 16760A has a combined
setup and hold time of 500 ps to
match the data valid window of
very high-speed buses.
To position the analyzer’s setup-andhold window inside the data valid
window requires very fine adjustment resolution. The 16760A gives
you the ability to position the setupand-hold window with 10 ps resolution.
• Small-amplitude signals
Many high-speed designs use small
signal amplitudes to limit slew rates
and reduce power. Agilent’s 16760A
can make reliable measurements on
signals as small as 200 mV p-p.
• Differential signals
Many high-speed designs use differential signaling to minimize simultaneous switching noise and to provide
immunity to crosstalk and noise. The
Agilent 16760A has differential inputs
to allow you to acquire differential
signals with complete confidence.
Single-ended probes are also available.
Agilent helps you get started in the
design stage.
To probe high-speed signals with a
logic analyzer, you need to design the
probe in when you are designing your
PC board. The following document
from Agilent will help you design your
system to take maximum advantage
of the capabilities of the 16760A logic
analyzer:
• Logic signal standards supported
TTL LVTTL
HSTL Class I & II HSTL CLass III & IV
SSTL2 SSTL3
AGP-2X LVCMOS 1.5V
LVCMOS 1.8V LVCMOS 2.5V
LVCMOS3.3V CMOS 5V
ECL LVPECL
PECL
User defined from -3V to +5V in 10mV
increments
Publication Title Description Publication Number
User’s Guide, Agilent Technologies E5378A, E5379A, and Mechanical drawings, electrical models, 16760-97007
E5380A Probes for the 16760A Logic Analyzer general information on probes for the 16760A
Designing High-Speed Digital Systems for Guidelines and design examples for designing 5988-2989EN
Logic Analyzer Probing logic analyzers probing into your target system
28
Data Acquisition and Stimulus
State/Timing Modules
Eye scan
In the eye scan mode, the Agilent
16760A scans all incoming signals for
activity in a time range centered on
the clock and over the entire voltage
range of the signal. The results are
displayed in a graph similar to an eye
diagram as seen on an oscilloscope.
As timing and voltage margins
continue to shrink, confidence in
signal integrity becomes an
increasingly vital requirement of the
design verification process. Eye scan
lets you acquire comprehensive signal
integrity information on all the buses
in your design, under a wide variety
of operating conditions, in minimum
time.
Qualified eye scan
In the qualified eye scan mode, a
single qualifier input defines what
clock cycles are to be acquired and
what cycles are to be ignored in the
eye scan acquisition. For example,
you may wish to examine the eye
diagram for read cycles only,
ignoring write cycles.
Cursors
Two manually positioned cursors are
available. The readout indicates the
time and voltage coordinates of each
cursor.
Eye limit
The eye limit tool is a single point
cursor that can be positioned manually. The readout indicates the inner
eye limits detected at the time and
voltage coordinates of the cursor.
Histogram
The histogram tool indicates the relative number of transitions along a
selected line. The time range and
voltage levels of the histogram are
selected by manually positioning a
pair of cursors. The cursors indicate
the voltage level and the beginning
and end times of the histogram.
Polygon
A 4-point or 6-point polygon can be
defined manually.
Slope
The slope tool indicates DV/DT
between two manually - positions
cursors.
Eye scan allows the user to set the
following variables:
• The number of clock cycles to be
evaluated at each time and voltage
region
• The display mode
• Color graded
• Intensity shaded
• Solid color
• Aspect ratio of the display
• Time/division
• Time offset
• Volts/division
• Voltage offset
• Time resolution of measurement
• Voltage resolution of
measurement
Results can be viewed for each
individual channel. A composite
display of multiple channels and/or
multiple labels is also available.
Individual channels can be highlighted in the composite view
Eye scan data can be stored and
recalled for later comparison or
analysis.
29
Probing solutions to match the
measurement capabilities
Three probing options are available
for the Agilent 16760A. Each probe
can be ordered by its individual
model number or as an option to the
16760A. The following table indicates
both the model number and the
option number.
Probes are not supplied as part of the
standard 16760A. Probes must be
ordered separately, either as options
to the 16760A or individually by their
respective model numbers.
Data Acquisition and Stimulus
State/Timing Modules
Agilent Model Number 16760A Option Number Description Notes
E5378A 010 100-pin single-ended probe Requires a kit of mating connectors and shrouds
(see the next table) to connect to target system.
E5379A 011 100-pin differential probe Two E5379A (or two option 011 on the 16760A) are
required to support all 34 channels on a 16760A.
Requires a kit of mating connectors and shrouds
(see the next table) to connect to target system.
E5380A 012 38-pin single-ended probe, compatible Maximum state analysis speed is 600 Mb/s.
with target systems designed for the Minimum input amplitude is 300 mV p-p.
Agilent E5346A Mictor adapter cable Requires a kit of mating connectors and shrouds
(see the next table) to connect to target system.
E5382A 013 17-channel, single-ended flying lead Two E5382A are required to support all the channels
probe set for the 16760A of a 16760A.
Connector and shroud kits for probes for the 16760A logic analyzer
For probe model number For PC board thickness Probing connector kit part number
(each contains 5 mating connectors and 5 support shrouds)
E5378A Up to 1.57 mm (0.062") 16760-68702
Up to 3.05 mm (0.120") 16760-68703
E5379A Up to 1.57 mm (0.062") 16760-68702
Up to 3.05 mm (0.120") 16760-68703
E5380A Up to 1.57 mm (0.062") E5346-68701
Up to 3.18 mm (0.125") E5346-68700
30
Data Acquisition and Stimulus
Oscilloscope Modules
When integrated into the 16700
Series logic analysis systems, the
oscilloscope modules make powerful
measurement and analysis more
accessible, so you can find the
answers to tough debugging problems
in less time. Oscilloscope controls are
easy to find and use.
Scope controls
and waveform
display are integrated into a
single window,
making interactive adjustment
easy.
Time and voltage
markers allow you
to measure signal
details precisely.
Multiple Views of Target Behavior
Isolate Problems Quicker
Frequently a problem is detected in
one measurement domain, while the
clues to the cause of the problem are
found in another. That’s why the ability to view your prototype's behavior
from all angles simultaneously—from
software execution to analog signals—
is essential for quickly gaining insight
into problems.
For example, using a state analyzer
you may observe a failed bus cycle. A
timing problem caused by a reflection
on an incorrectly terminated line
may be causing the bus cycle to fail.
By triggering an oscilloscope from the
state analyzer, you can quickly identify the cause. The ability to cross-trigger and time-correlate state, timing,
and analog measurements can help
you in solving these tough problems.
Figure 4.5. All primary oscilloscope control settings, including scale factors and trigger settings, are visible
simultaneously.
Trigger icon
indicates trigger
level, making it
easy for you to
adjust trigger
level.
Ground icon
always shows
you where ground
is relative
to signal.
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