Acer Aspire VN7-792G Schematic

5
Dr-Bios.com
D D
4
3
2
1
Newgate
C C
Schematics Document
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
A A
Title
Title
Title
Cover Page
Cover Page
Cover Page
Newgate
Newgate
Newgate
2
5
4
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A
A
A
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 105
1 105
1 105
1
1M
1M
1M
5
Dr-Bios.com
4
3
2
1
D D
Newgate Board Block Diagram
HDMI
eDP re-driver (8330B)
PEG x 16 (Gen3_8 Gb/s)
76~80
Level shifter
PS8201
eDP x 4
55
DDI
57
Intel CPU
Skylake-H BGA1440 45W GT2
DDR4-RS 1867/2133 Channel A
DDR4 / 1.2V
DDR4-RS 1867/2133 Channel B
3~11
SO-DIMM1 DDR4-RS
SO-DIMM2 DDR4-RS
GDDR3*8
81~84
LCD
eDP x 4
55
Nvidia N16S-GX (945) N16P-GT (950)
HDMI 1.4b
Project code : 4PD06A010001 PCB NO : 15205 Revision : 1M
12
13
DMI Gen3 x4 8 GT/s
C C
B B
USB Type C Control TPS25810
AMP ALC1001
DMIC
Headphone
MIC-IN
A A
5
CC
73
SD
2CH SPEAKER
28
(DB)
38
29
29
USB Type C
USB3.0 x 1
38
CardReader RTS5170
USB2.0x1
USB3.0
USB3.0
USB2.0
HD Audio Codec ALC255
4
DB(66)DB
DB(66)
27
USB3.0 x 2 USB2.0 x 1
73
USB3.0 re-driver3D CAMERA x 1
USB Charger G3703
35
35
SPI Flash
8MB
FAN
PCIe x 1 / USB2.0 x 1
USB3.0 x 1
Intel PCH
38
USB2.0 x 1
USB2.0x1
36
USB3.0x1
USB3.0 x 1
USB2.0 x 1
HDA
25
SPI
SPI
PCH-H HM170
USB 3.0 (8) / 2.0 ports (14)
ETHERNET (10/100/1000Mb)
High Definition Audio
TPM
91
SATA ports (6) PCIe ports (16)
LPC I/F ACPI 4.0a
LPC BUS
KBC
KB9038QA
15~23
Debug port
PCIe x 1
24
SATA x 1
SATA x 1
PCIe x 4
SATA x 1
SMBus
I2C
68
PS/2
Wi-Fi
WLAN + BT
LAN
RTL8111HRealtek
ODD
HDD
mSATA (NGFF)
G-SENSOR
Touch PAD (PTP) 65
61
31
60
60
63
69
RJ45
32
SMBus
Thermal
THEM Resistor
Charger
HPA02224
26
Int. KB
44
65
FAN
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev C
C
C
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Block Diagram
Block Diagram
Newgate
Newgate
Newgate
1
2 105
2 105
2 105
1M
1M
1M
5
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Dr-Bios.com
4
3
2
1
Royee 20150205 REVERSE PEG BUS for layout issue
SSID = CPU
SKYLAKE_HALO
SKYLAKE_HALO
CPU1D
CPU1D
HDMI_DATA_CPU_P2<57>
HDMI_DATA_CPU_N2<57>
HDMI_DATA_CPU_P1<57>
HDMI
D D
LAB2 0401 change
C C
B B
HDMI_DATA_CPU_N1<57>
HDMI_DATA_CPU_P0<57>
HDMI_DATA_CPU_N0<57>
HDMI_DATA_CPU_P3<57>
HDMI_DATA_CPU_N3<57>
K36 K37
J35
J34 H37 H36
J37
J38 D27
E27 H34
H33 F37 G38 F34 F35 E37 E36
F26 E26
C34 D34 B36 B34 F33 E33 C33 B33
A27 B27
DDI1_TXP0 DDI1_TXN0 DDI1_TXP1 DDI1_TXN1 DDI1_TXP2 DDI1_TXN2 DDI1_TXP3 DDI1_TXN3
DDI1_AUXP DDI1_AUXN
DDI2_TXP0 DDI2_TXN0 DDI2_TXP1 DDI2_TXN1 DDI2_TXP2 DDI2_TXN2 DDI2_TXP3 DDI2_TXN3
DDI2_AUXP DDI2_AUXN
DDI3_TXP0 DDI3_TXN0 DDI3_TXP1 DDI3_TXN1 DDI3_TXP2 DDI3_TXN2 DDI3_TXP3 DDI3_TXN3
DDI3_AUXP DDI3_AUXN
SKYLAKE-3-GP
SKYLAKE-3-GP
BGA1440
BGA1440
4 OF 14
4 OF 14
EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 EDP_TXP2 EDP_TXN2 EDP_TXP3 EDP_TXN3
EDP_AUXP EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
D29 E29 F28 E28 A29 B29 C28 B28
C26 B26
A33
EDP_RCOMP
D37
AUD_AZACPU_SCLK
G27 G25
AUD_AZACPU_SDI_R
G29
eDP_TX_CPU_P0 <55> eDP_TX_CPU_N0 <55> eDP_TX_CPU_P1 <55> eDP_TX_CPU_N1 <55> eDP_TX_CPU_P2 <55> eDP_TX_CPU_N2 <55> eDP_TX_CPU_P3 <55> eDP_TX_CPU_N3 <55>
eDP_AUX_CPU_P <55>
eDP_AUX_CPU_N <55>
R301 24D9R2F-L-GPR301 24D9R2F-L-GP
12
R302 0R0402-PADR302 0R0402-PAD
1 2
PD 0622 change
Layout Note: Trace Width:12 (mils) Spacing: 20 (mils) Max Length: 100 (mils)
0D95V_VCCIO
AUD_AZACPU_SCLK <17> AUD_AZACPU_SDO <17> AUD_AZACPU_SDI <17>
Layout Note: Trace Width:12 (mils) Spacing: 15 (mils) Max Length: 400 (mils)
0D95V_VCCIO
R303
R303
24D9R2F-L-GP
24D9R2F-L-GP
PEG_RX_CPU_P15<76> PEG_RX_CPU_N15<76>
PEG_RX_CPU_P14<76> PEG_RX_CPU_N14<76>
PEG_RX_CPU_P13<76> PEG_RX_CPU_N13<76>
PEG_RX_CPU_P12<76> PEG_RX_CPU_N12<76>
PEG_RX_CPU_P11<76> PEG_RX_CPU_N11<76>
PEG_RX_CPU_P10<76> PEG_RX_CPU_N10<76>
PEG_RX_CPU_P9<76>
PEG_RX_CPU_N9<76>
PEG_RX_CPU_P8<76>
PEG_RX_CPU_N8<76>
PEG_RX_CPU_P7<76>
PEG_RX_CPU_N7<76>
PEG_RX_CPU_P6<76>
PEG_RX_CPU_N6<76>
PEG_RX_CPU_P5<76>
PEG_RX_CPU_N5<76>
PEG_RX_CPU_P4<76>
PEG_RX_CPU_N4<76>
PEG_RX_CPU_P3<76>
PEG_RX_CPU_N3<76>
PEG_RX_CPU_P2<76>
PEG_RX_CPU_N2<76>
PEG_RX_CPU_P1<76>
PEG_RX_CPU_N1<76>
PEG_RX_CPU_P0<76>
PEG_RX_CPU_N0<76>
12
DMI_RX_CPU_P0<15> DMI_RX_CPU_N0<15>
DMI_RX_CPU_P1<15> DMI_RX_CPU_N1<15>
DMI_RX_CPU_P2<15> DMI_RX_CPU_N2<15>
DMI_RX_CPU_P3<15> DMI_RX_CPU_N3<15>
PEG_RCOMPO
DMI_RX_CPU_P0 DMI_RX_CPU_N0
DMI_RX_CPU_P1 DMI_RX_CPU_N1
DMI_RX_CPU_P2 DMI_RX_CPU_N2
DMI_RX_CPU_P3 DMI_RX_CPU_N3
E25 D25
E24 F24
E23 D23
E22 F22
E21 D21
E20 F20
E19 D19
E18 F18
D17 E17
F16 E16
D15 E15
F14 E14
D13 E13
F12 E12
D11 E11
F10 E10
G2
D8
D5
E8 E6
F6
E5 J8
J9
CPU1C
CPU1C
PEG_RXP0 PEG_RXN0
PEG_RXP1 PEG_RXN1
PEG_RXP2 PEG_RXN2
PEG_RXP3 PEG_RXN3
PEG_RXP4 PEG_RXN4
PEG_RXP5 PEG_RXN5
PEG_RXP6 PEG_RXN6
PEG_RXP7 PEG_RXN7
PEG_RXP8 PEG_RXN8
PEG_RXP9 PEG_RXN9
PEG_RXP10 PEG_RXN10
PEG_RXP11 PEG_RXN11
PEG_RXP12 PEG_RXN12
PEG_RXP13 PEG_RXN13
PEG_RXP14 PEG_RXN14
PEG_RXP15 PEG_RXN15
PEG_RCOMP
DMI_RXP0 DMI_RXN0
DMI_RXP1 DMI_RXN1
DMI_RXP2 DMI_RXN2
DMI_RXP3 DMI_RXN3
SKYLAKE-3-GP
SKYLAKE-3-GP
SKYLAKE_HALO
SKYLAKE_HALO
BGA1440
BGA1440
3 OF 14
3 OF 14
PEG_TXP0 PEG_TXN0
PEG_TXP1 PEG_TXN1
PEG_TXP2 PEG_TXN2
PEG_TXP3 PEG_TXN3
PEG_TXP4 PEG_TXN4
PEG_TXP5 PEG_TXN5
PEG_TXP6 PEG_TXN6
PEG_TXP7 PEG_TXN7
PEG_TXP8 PEG_TXN8
PEG_TXP9 PEG_TXN9
PEG_TXP10 PEG_TXN10
PEG_TXP11 PEG_TXN11
PEG_TXP12 PEG_TXN12
PEG_TXP13 PEG_TXN13
PEG_TXP14 PEG_TXN14
PEG_TXP15 PEG_TXN15
DMI_TXP0 DMI_TXN0
DMI_TXP1 DMI_TXN1
DMI_TXP2 DMI_TXN2
DMI_TXP3 DMI_TXN3
B25 A25
B24 C24
B23 A23
B22 C22
B21 A21
B20 C20
B19 A19
B18 C18
A17 B17
C16 B16
A15 B15
C14 B14
A13 B13
C12 B12
A11 B11
C10 B10
B8 A8
C6 B6
B5 A5
D4 B4
PEG_TX_CPU_P15 PEG_TX_CPU_N15
PEG_TX_CPU_P14 PEG_TX_CPU_N14
PEG_TX_CPU_P13 PEG_TX_CPU_N13
PEG_TX_CPU_P12 PEG_TX_CPU_N12
PEG_TX_CPU_P11 PEG_TX_CPU_N11
PEG_TX_CPU_P10 PEG_TX_CPU_N10
PEG_TX_CPU_P9 PEG_TX_CPU_N9
PEG_TX_CPU_P8 PEG_TX_CPU_N8
PEG_TX_CPU_P7 PEG_TX_CPU_N7
PEG_TX_CPU_P6 PEG_TX_CPU_N6
PEG_TX_CPU_P5 PEG_TX_CPU_N5
PEG_TX_CPU_P4 PEG_TX_CPU_N4
PEG_TX_CPU_P3 PEG_TX_CPU_N3
PEG_TX_CPU_P2 PEG_TX_CPU_N2
PEG_TX_CPU_P1 PEG_TX_CPU_N1
PEG_TX_CPU_P0 PEG_TX_CPU_N0
DMI_TX_CPU_P0 DMI_TX_CPU_N0
DMI_TX_CPU_P1 DMI_TX_CPU_N1
DMI_TX_CPU_P2 DMI_TX_CPU_N2
DMI_TX_CPU_P3 DMI_TX_CPU_N3
C339 SCD22U10V2KX-1GP
C339 SCD22U10V2KX-1GP
1 2
C340 SCD22U10V2KX-1GP
C340 SCD22U10V2KX-1GP
1 2
C337 SCD22U10V2KX-1GP
C337 SCD22U10V2KX-1GP
1 2
C338 SCD22U10V2KX-1GP
C338 SCD22U10V2KX-1GP
1 2
C335 SCD22U10V2KX-1GP
C335 SCD22U10V2KX-1GP
1 2
C336 SCD22U10V2KX-1GP
C336 SCD22U10V2KX-1GP
1 2
C333 SCD22U10V2KX-1GP
C333 SCD22U10V2KX-1GP
1 2
C334 SCD22U10V2KX-1GP
C334 SCD22U10V2KX-1GP
1 2
C331 SCD22U10V2KX-1GP
C331 SCD22U10V2KX-1GP
1 2
C332 SCD22U10V2KX-1GP
C332 SCD22U10V2KX-1GP
1 2
C329 SCD22U10V2KX-1GP
C329 SCD22U10V2KX-1GP
1 2
C330 SCD22U10V2KX-1GP
C330 SCD22U10V2KX-1GP
1 2
C327 SCD22U10V2KX-1GP
C327 SCD22U10V2KX-1GP
1 2
C328 SCD22U10V2KX-1GP
C328 SCD22U10V2KX-1GP
1 2
C325 SCD22U10V2KX-1GP
C325 SCD22U10V2KX-1GP
1 2
C326 SCD22U10V2KX-1GP
C326 SCD22U10V2KX-1GP
1 2
C323 SCD22U10V2KX-1GP
C323 SCD22U10V2KX-1GP
1 2
C324 SCD22U10V2KX-1GP
C324 SCD22U10V2KX-1GP
1 2
C321 SCD22U10V2KX-1GP
C321 SCD22U10V2KX-1GP
1 2
C322 SCD22U10V2KX-1GP
C322 SCD22U10V2KX-1GP
1 2
C318 SCD22U10V2KX-1GP
C318 SCD22U10V2KX-1GP
1 2
C320 SCD22U10V2KX-1GP
C320 SCD22U10V2KX-1GP
1 2
C307 SCD22U10V2KX-1GP
C307 SCD22U10V2KX-1GP
1 2
C316 SCD22U10V2KX-1GP
C316 SCD22U10V2KX-1GP
1 2
C314 SCD22U10V2KX-1GP
C314 SCD22U10V2KX-1GP
1 2
C304 SCD22U10V2KX-1GP
C304 SCD22U10V2KX-1GP
1 2
C303 SCD22U10V2KX-1GP
C303 SCD22U10V2KX-1GP
1 2
C313 SCD22U10V2KX-1GP
C313 SCD22U10V2KX-1GP
1 2
C312 SCD22U10V2KX-1GP
C312 SCD22U10V2KX-1GP
1 2
C302 SCD22U10V2KX-1GP
C302 SCD22U10V2KX-1GP
1 2
C310 SCD22U10V2KX-1GP
C310 SCD22U10V2KX-1GP
1 2
C311 SCD22U10V2KX-1GP
C311 SCD22U10V2KX-1GP
1 2
DMI_TX_CPU_P0 <15> DMI_TX_CPU_N0 <15>
DMI_TX_CPU_P1 <15> DMI_TX_CPU_N1 <15>
DMI_TX_CPU_P2 <15> DMI_TX_CPU_N2 <15>
DMI_TX_CPU_P3 <15> DMI_TX_CPU_N3 <15>
Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless Muxless
Muxless
PEG_TX_CON_P15 <76> PEG_TX_CON_N15 <76>
PEG_TX_CON_P14 <76> PEG_TX_CON_N14 <76>
PEG_TX_CON_P13 <76> PEG_TX_CON_N13 <76>
PEG_TX_CON_P12 <76> PEG_TX_CON_N12 <76>
PEG_TX_CON_P11 <76> PEG_TX_CON_N11 <76>
PEG_TX_CON_P10 <76> PEG_TX_CON_N10 <76>
PEG_TX_CON_P9 <76> PEG_TX_CON_N9 <76>
PEG_TX_CON_P8 <76> PEG_TX_CON_N8 <76>
PEG_TX_CON_P7 <76> PEG_TX_CON_N7 <76>
PEG_TX_CON_P6 <76> PEG_TX_CON_N6 <76>
PEG_TX_CON_P5 <76> PEG_TX_CON_N5 <76>
PEG_TX_CON_P4 <76> PEG_TX_CON_N4 <76>
PEG_TX_CON_P3 <76> PEG_TX_CON_N3 <76>
PEG_TX_CON_P2 <76> PEG_TX_CON_N2 <76>
PEG_TX_CON_P1 <76> PEG_TX_CON_N1 <76>
PEG_TX_CON_P0 <76> PEG_TX_CON_N0 <76>
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
Newgate
Newgate
Newgate
1
3 105
3 105
3 105
1M
1M
1M
5
Dr-Bios.com
D D
C C
B B
M_A_DQ0<12> M_A_CLK0 <12> M_A_DQ1<12> M_A_DQ2<12> M_A_DQ3<12> M_A_DQ4<12> M_A_DQ5<12> M_A_DQ6<12> M_A_DQ7<12> M_A_DQ8<12> M_A_DQ9<12> M_A_DQ10<12> M_A_DQ11<12> M_A_DQ12<12> M_A_DQ13<12> M_A_DQ14<12> M_A_DQ15<12> M_A_DQ16<12> M_A_DQ17<12> M_A_DQ18<12> M_A_DQ19<12> M_A_DQ20<12> M_A_DQ21<12> M_A_DQ22<12> M_A_DQ23<12> M_A_DQ24<12> M_A_DQ25<12> M_A_DQ26<12> M_A_DQ27<12> M_A_DQ28<12> M_A_DQ29<12> M_A_DQ30<12> M_A_DQ31<12> M_A_DQ32<12> M_A_DQ33<12> M_A_DQ34<12> M_A_DQ35<12> M_A_DQ36<12> M_A_DQ37<12> M_A_DQ38<12> M_A_DQ39<12> M_A_DQ40<12> M_A_DQ41<12> M_A_DQ42<12> M_A_DQ43<12> M_A_DQ44<12> M_A_DQ45<12> M_A_DQ46<12> M_A_DQ47<12> M_A_DQ48<12> M_A_DQ49<12> M_A_DQ50<12> M_A_DQ51<12> M_A_DQ52<12> M_A_DQ53<12> M_A_DQ54<12> M_A_DQ55<12> M_A_DQ56<12> M_A_DQ57<12> M_A_DQ58<12> M_A_DQ59<12> M_A_DQ60<12> M_A_DQ61<12> M_A_DQ62<12> M_A_DQ63<12>
4
BR6
BT6
BP3 BR3 BN5
BP6
BP2 BN3
BL4
BL5
BL2 BM1
BK4
BK5
BK1
BK2 BG4 BG5
BF4
BF5 BG2 BG1
BF1
BF2 BD2 BD1 BC4 BC5 BD5 BD4 BC1 BC2
AB1
AB2
AA4
AA5
AB5
AB4
AA2
AA1
V5 V2
U1
U2 V1
V4 U5 U4 R2
P5 R4
P4 R5
P2
R1
P1 M4 M1
L4
L2 M5 M2
L5
L1
BA2 BA1 AY4 AY5 BA5 BA4 AY1 AY2
CPU1A
CPU1A
DDR0_DQ0 DDR0_DQ1 DDR0_DQ2 DDR0_DQ3 DDR0_DQ4 DDR0_DQ5 DDR0_DQ6 DDR0_DQ7 DDR0_DQ8 DDR0_DQ9 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15 DDR0_DQ16/DDR0_DQ32 DDR0_DQ17/DDR0_DQ33 DDR0_DQ18/DDR0_DQ34 DDR0_DQ19/DDR0_DQ35 DDR0_DQ20/DDR0_DQ36 DDR0_DQ21/DDR0_DQ37 DDR0_DQ22/DDR0_DQ38 DDR0_DQ23/DDR0_DQ39 DDR0_DQ24/DDR0_DQ40 DDR0_DQ25/DDR0_DQ41 DDR0_DQ26/DDR0_DQ42 DDR0_DQ27/DDR0_DQ43 DDR0_DQ28/DDR0_DQ44 DDR0_DQ29/DDR0_DQ45 DDR0_DQ30/DDR0_DQ46 DDR0_DQ31/DDR0_DQ47 DDR0_DQ32/DDR1_DQ0 DDR0_DQ33/DDR1_DQ1 DDR0_DQ34/DDR1_DQ2 DDR0_DQ35/DDR1_DQ3 DDR0_DQ36/DDR1_DQ4 DDR0_DQ37/DDR1_DQ5 DDR0_DQ38/DDR1_DQ6 DDR0_DQ39/DDR1_DQ7 DDR0_DQ40/DDR1_DQ8 DDR0_DQ41/DDR1_DQ9 DDR0_DQ42/DDR1_DQ10 DDR0_DQ43/DDR1_DQ11 DDR0_DQ44/DDR1_DQ12 DDR0_DQ45/DDR1_DQ13 DDR0_DQ46/DDR1_DQ14 DDR0_DQ47/DDR1_DQ15 DDR0_DQ48/DDR1_DQ32 DDR0_DQ49/DDR1_DQ33 DDR0_DQ50/DDR1_DQ34 DDR0_DQ51/DDR1_DQ35 DDR0_DQ52/DDR1_DQ36 DDR0_DQ53/DDR1_DQ37 DDR0_DQ54/DDR1_DQ38 DDR0_DQ55/DDR1_DQ39 DDR0_DQ56/DDR1_DQ40 DDR0_DQ57/DDR1_DQ41 DDR0_DQ58/DDR1_DQ42 DDR0_DQ59/DDR1_DQ43 DDR0_DQ60/DDR1_DQ44 DDR0_DQ61/DDR1_DQ45 DDR0_DQ62/DDR1_DQ46 DDR0_DQ63/DDR1_DQ47
DDR0_ECC0 DDR0_ECC1 DDR0_ECC2 DDR0_ECC3 DDR0_ECC4 DDR0_ECC5 DDR0_ECC6 DDR0_ECC7
SKYLAKE_HALO
SKYLAKE_HALO
BGA1440
BGA1440
DDR0_BA0/DDR0_CAB4/DDR0_BA0 DDR0_BA1/DDR0_CAB6/DDR0_BA1 DDR0_BA2/DDR0_CAA5/DDR0_BG0
DDR0_RAS#/DDR0_CAB3/DDR0_MA16
DDR0_WE#/DDR0_CAB2/DDR0_MA14
DDR0_CAS#/DDR0_CAB1/DDR0_MA15
DDR0_MA0/DDR0_CAB9/DDR0_MA0 DDR0_MA1/DDR0_CAB8/DDR0_MA1 DDR0_MA2/DDR0_CAB5/DDR0_MA2
DDR0_MA5/DDR0_CAA0/DDR0_MA5 DDR0_MA6/DDR0_CAA2/DDR0_MA6 DDR0_MA7/DDR0_CAA4/DDR0_MA7 DDR0_MA8/DDR0_CAA3/DDR0_MA8
DDR0_MA9/DDR0_CAA1/DDR0_MA9 DDR0_MA10/DDR0_CAB7/DDR0_MA10 DDR0_MA11/DDR0_CAA7/DDR0_MA11 DDR0_MA12/DDR0_CAA6/DDR0_MA12 DDR0_MA13/DDR0_CAB0/DDR0_MA13
DDR0_MA14/DDR0_CAA9/DDR0_BG1
DDR0_MA15/DDR0_CAA8/DDR0_ACT#
DDR0_DQSN2/DDR0_DQSN4 DDR0_DQSN3/DDR0_DQSN5
DDR0_DQSN4/DDR1_DQSN0 DDR0_DQSN5/DDR1_DQSN1 DDR0_DQSN6/DDR1_DQSN4 DDR0_DQSN7/DDR1_DQSN5
3
1 OF 14
1 OF 14
DDR0_CKP0
DDR0_CKN0
DDR0_CKP1
DDR0_CKN1 DDR0_CLKP2 DDR0_CLKN2 DDR0_CLKP3 DDR0_CLKN3
DDR0_CKE0 DDR0_CKE1 DDR0_CKE2 DDR0_CKE3
DDR0_CS0# DDR0_CS1# DDR0_CS2# DDR0_CS3#
DDR0_ODT0
DDR0_ODT1
DDR0_ODT2
DDR0_ODT3
DDR0_MA3 DDR0_MA4
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN0 DDR0_DQSN1
DDR0_DQSP4/DDR1_DQSP0 DDR0_DQSP5/DDR1_DQSP1 DDR0_DQSP6/DDR1_DQSP4 DDR0_DQSP7/DDR1_DQSP5
DDR0_DQSP0
DDR0_DQSP2/DDR0_DQSP4 DDR0_DQSP3/DDR0_DQSP5
DDR0_DQSP1
DDR0_DQSP8 DDR0_DQSN8
AG1 AG2 AK2 AK1 AL3 AK3 AL2 AL1
AT1 AT2 AT3 AT5
AD5 AE2 AD2 AE5
AD3 AE4 AE1 AD4
AH5 AH1 AU1
AH4 AG4 AD1
AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3
AG3 AU5
BR5 BL3 BG3 BD3 AB3 V3 R3 M3
BP5 BK3 BF3 BC3 AA3 U3 P3 L3
AY3 BA3
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
M_A_ACT_N
M_A_DQS_DN0 M_A_DQS_DN1 M_A_DQS_DN2 M_A_DQS_DN3 M_A_DQS_DP4 M_A_DQS_DP5 M_A_DQS_DP6 M_A_DQS_DP7
M_A_DQS_DP0 M_A_DQS_DP1 M_A_DQS_DP2 M_A_DQS_DP3 M_A_DQS_DN4 M_A_DQS_DN5 M_A_DQS_DN6 M_A_DQS_DN7
M_A_CLK#0 <12> M_A_CLK1 <12> M_A_CLK#1 <12>
M_A_CKE0 <12> M_A_CKE1 <12>
M_A_CS#0 <12> M_A_CS#1 <12>
M_A_ODT0 <12> M_A_ODT1 <12>
M_A_A10 <12> M_A_A11 <12> M_A_A12 <12> M_A_A13 <12>
M_A_ACT_N <12>
M_A_PARITY <12> M_A_ALERT_N <12>
M_A_DQS_DN0 <12> M_A_DQS_DN1 <12> M_A_DQS_DN2 <12> M_A_DQS_DN3 <12>
M_A_DQS_DP0 <12> M_A_DQS_DP1 <12> M_A_DQS_DP2 <12> M_A_DQS_DP3 <12>
M_A_A16 <12> M_A_A14 <12> M_A_A15 <12>
M_A_A0 <12> M_A_A1 <12> M_A_A2 <12> M_A_A3 <12> M_A_A4 <12> M_A_A5 <12> M_A_A6 <12> M_A_A7 <12> M_A_A8 <12> M_A_A9 <12>
JJ 20150127
M_A_DQS_DP4 <12> M_A_DQS_DP5 <12> M_A_DQS_DP6 <12> M_A_DQS_DP7 <12>
M_A_DQS_DN4 <12> M_A_DQS_DN5 <12> M_A_DQS_DN6 <12> M_A_DQS_DN7 <12>
2
M_A_BA0 <12> M_A_BA1 <12> M_A_BG0 <12>
M_A_BG1 <12>
1
DDR CHANNEL A
DDR CHANNEL A
SKYLAKE-3-GP
SKYLAKE-3-GP
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU_DDR_CHA
CPU_DDR_CHA
CPU_DDR_CHA
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
1
4 105
4 105
4 105
1M
1M
1M
5
Dr-Bios.com
4
3
2
1
SSID = CPU
SKYLAKE_HALO
CPU1B
CPU1B
M_B_DQ0<13>
D D
C C
B B
M_B_DQ1<13> M_B_DQ2<13> M_B_DQ3<13> M_B_DQ4<13> M_B_DQ5<13> M_B_DQ6<13> M_B_DQ7<13> M_B_DQ8<13> M_B_DQ9<13> M_B_DQ10<13> M_B_DQ11<13> M_B_DQ12<13> M_B_DQ13<13> M_B_DQ14<13> M_B_DQ15<13> M_B_DQ16<13> M_B_DQ17<13> M_B_DQ18<13> M_B_DQ19<13> M_B_DQ20<13> M_B_DQ21<13> M_B_DQ22<13> M_B_DQ23<13> M_B_DQ24<13> M_B_DQ25<13> M_B_DQ26<13> M_B_DQ27<13> M_B_DQ28<13> M_B_DQ29<13> M_B_DQ30<13> M_B_DQ31<13> M_B_DQ32<13> M_B_DQ33<13> M_B_DQ34<13> M_B_DQ35<13> M_B_DQ36<13> M_B_DQ37<13> M_B_DQ38<13> M_B_DQ39<13> M_B_DQ40<13> M_B_DQ41<13> M_B_DQ42<13> M_B_DQ43<13> M_B_DQ44<13> M_B_DQ45<13> M_B_DQ46<13> M_B_DQ47<13> M_B_DQ48<13> M_B_DQ49<13> M_B_DQ50<13> M_B_DQ51<13> M_B_DQ52<13> M_B_DQ53<13> M_B_DQ54<13> M_B_DQ55<13> M_B_DQ56<13> M_B_DQ57<13> M_B_DQ58<13> M_B_DQ59<13> M_B_DQ60<13> M_B_DQ61<13> M_B_DQ62<13> M_B_DQ63<13>
R501121R2F-GP R501121R2F-GP R50275R2F-L1-GP R50275R2F-L1-GP
1 2
R503100R2F-L3-GP R503100R2F-L3-GP
12 12
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
BT11
DDR1_DQ0/DDR0_DQ16
BR11
DDR1_DQ1/DDR0_DQ17
BT8
DDR1_DQ2/DDR0_DQ18
BR8
DDR1_DQ3/DDR0_DQ19
BP11
DDR1_DQ4/DDR0_DQ20
BN11
DDR1_DQ5/DDR0_DQ21
BP8
DDR1_DQ6/DDR0_DQ22
BN8
DDR1_DQ7/DDR0_DQ23
BL12
DDR1_DQ8/DDR0_DQ24
BL11
DDR1_DQ9/DDR0_DQ25
BL8
DDR1_DQ10/DDR0_DQ26
BJ8
DDR1_DQ11/DDR0_DQ27
BJ11
DDR1_DQ12/DDR0_DQ28
BJ10
DDR1_DQ13/DDR0_DQ29
BL7
DDR1_DQ14/DDR0_DQ30
BJ7
DDR1_DQ15/DDR0_DQ31
BG11
DDR1_DQ16/DDR0_DQ48
BG10
DDR1_DQ17/DDR0_DQ49
BG8
DDR1_DQ18/DDR0_DQ50
BF8
DDR1_DQ19/DDR0_DQ51
BF11
DDR1_DQ20/DDR0_DQ52
BF10
DDR1_DQ21/DDR0_DQ53
BG7
DDR1_DQ22/DDR0_DQ54
BF7
DDR1_DQ23/DDR0_DQ55
BB11
DDR1_DQ24/DDR0_DQ56
BC11
DDR1_DQ25/DDR0_DQ57
BB8
DDR1_DQ26/DDR0_DQ58
BC8
DDR1_DQ27/DDR0_DQ59
BC10
DDR1_DQ28/DDR0_DQ60
BB10
DDR1_DQ29/DDR0_DQ61
BC7
DDR1_DQ30/DDR0_DQ62
BB7
DDR1_DQ31/DDR0_DQ63
AA11
DDR1_DQ32/DDR1_DQ16
AA10
DDR1_DQ33/DDR1_DQ17
AC11
DDR1_DQ34/DDR1_DQ18
AC10
DDR1_DQ35/DDR1_DQ19
AA7
DDR1_DQ36/DDR1_DQ20
AA8
DDR1_DQ37/DDR1_DQ21
AC8
DDR1_DQ38/DDR1_DQ22
AC7
DDR1_DQ39/DDR1_DQ23
W8
DDR1_DQ40/DDR1_DQ24
W7
DDR1_DQ41/DDR1_DQ25
V10
DDR1_DQ42/DDR1_DQ26
V11
DDR1_DQ43/DDR1_DQ27
W11
DDR1_DQ44/DDR1_DQ28
W10
DDR1_DQ45/DDR1_DQ29
V7
DDR1_DQ46/DDR1_DQ30
V8
DDR1_DQ47/DDR1_DQ31
R11
DDR1_DQ48
P11
DDR1_DQ49
P7
DDR1_DQ50
R8
DDR1_DQ51
R10
DDR1_DQ52
P10
DDR1_DQ53
R7
DDR1_DQ54
P8
DDR1_DQ55
L11
DDR1_DQ56
M11
DDR1_DQ57
L7
DDR1_DQ58
M8
DDR1_DQ59
L10
DDR1_DQ60
M10
DDR1_DQ61
M7
DDR1_DQ62
L8
DDR1_DQ63
AW11
DDR1_ECC0
AY11
DDR1_ECC1
AY8
DDR1_ECC2
AW8
DDR1_ECC3
AY10
DDR1_ECC4
AW10
DDR1_ECC5
AY7
DDR1_ECC6
AW7
DDR1_ECC7
G1
DDR_RCOMP0
H1
DDR_RCOMP1
J2
DDR_RCOMP2
SKYLAKE-3-GP
SKYLAKE-3-GP
DDR CHANNEL B
DDR CHANNEL B
SKYLAKE_HALO
BGA1440
BGA1440
DDR1_RAS#/DDR1_CAB3/DDR1_MA16
DDR1_WE#/DDR1_CAB2/DDR1_MA14
DDR1_CAS#/DDR1_CAB1/DDR1_MA15
DDR1_BA0/DDR1_CAB4/DDR1_BA0 DDR1_BA1/DDR1_CAB6/DDR1_BA1 DDR1_BA2/DDR1_CAA5/DDR1_BG0
DDR1_MA0/DDR1_CAB9/DDR1_MA0 DDR1_MA1/DDR1_CAB8/DDR1_MA1 DDR1_MA2/DDR1_CAB5/DDR1_MA2
DDR1_MA5/DDR1_CAA0/DDR1_MA5 DDR1_MA6/DDR1_CAA2/DDR1_MA6 DDR1_MA7/DDR1_CAA4/DDR1_MA7 DDR1_MA8/DDR1_CAA3/DDR1_MA8
DDR1_MA9/DDR1_CAA1/DDR1_MA9 DDR1_MA10/DDR1_CAB7/DDR1_MA10 DDR1_MA11/DDR1_CAA7/DDR1_MA11 DDR1_MA12/DDR1_CAA6/DDR1_MA12 DDR1_MA13/DDR1_CAB0/DDR1_MA13
DDR1_MA14/DDR1_CAA9/DDR1_BG1
DDR1_MA15/DDR1_CAA8/DDR1_ACT#
DDR1_DQSN0/DDR0_DQSN2 DDR1_DQSN1/DDR0_DQSN3 DDR1_DQSN2/DDR0_DQSN6 DDR1_DQSN3/DDR0_DQSN7 DDR1_DQSN4/DDR1_DQSN2 DDR1_DQSN5/DDR1_DQSN3
DDR1_DQSP0/DDR0_DQSP2 DDR1_DQSP1/DDR0_DQSP3 DDR1_DQSP2/DDR0_DQSP6 DDR1_DQSP3/DDR0_DQSP7 DDR1_DQSP4/DDR1_DQSP2 DDR1_DQSP5/DDR1_DQSP3
2 OF 14
2 OF 14
DDR1_CKP0 DDR1_CKN0 DDR1_CKP1
DDR1_CKN1 DDR1_CLKP2 DDR1_CLKN2 DDR1_CLKP3 DDR1_CLKN3
DDR1_CKE0
DDR1_CKE1
DDR1_CKE2
DDR1_CKE3
DDR1_CS0# DDR1_CS1# DDR1_CS2# DDR1_CS3#
DDR1_ODT0
DDR1_ODT1
DDR1_ODT2
DDR1_ODT3
DDR1_MA3 DDR1_MA4
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN6 DDR1_DQSN7
DDR1_DQSP6 DDR1_DQSP7
DDR1_DQSP8
DDR1_DQSN8
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
AM9 AN9 AM7 AM8 AM11 AM10 AJ10 AJ11
AT8 AT10 AT7 AT11
AF11 AE7 AF10 AE10
AF7 AE8 AE9 AE11
AH10 AH11 AF8
AH8 AH9 AR9
AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10 AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9
AJ7 AR8
BP9 BL9 BG9 BC9 AC9 W9 R9 M9
BR9 BJ9 BF9 BB9 AA9 V9 P9 L9
AW9 AY9
BN13 BP13 BR13
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_BG1 M_B_ACT_N
M_B_DQS_DN0 M_B_DQS_DN1 M_B_DQS_DN2 M_B_DQS_DN3 M_B_DQS_DN4 M_B_DQS_DN5 M_B_DQS_DN6 M_B_DQS_DN7
M_B_DQS_DP0 M_B_DQS_DP1 M_B_DQS_DP2 M_B_DQS_DP3 M_B_DQS_DP4 M_B_DQS_DP5 M_B_DQS_DP6 M_B_DQS_DP7
M_B_CLK0 <13> M_B_CLK#0 <13> M_B_CLK1 <13> M_B_CLK#1 <13>
M_B_CKE0 <13> M_B_CKE1 <13>
M_B_CS#0 <13> M_B_CS#1 <13>
M_B_ODT0 <13> M_B_ODT1 <13>
M_B_A16 <13> M_B_A14 <13> M_B_A15 <13>
M_B_A0 <13> M_B_A1 <13> M_B_A2 <13> M_B_A3 <13> M_B_A4 <13> M_B_A5 <13> M_B_A6 <13> M_B_A7 <13> M_B_A8 <13>
M_B_A9 <13> M_B_A10 <13> M_B_A11 <13> M_B_A12 <13> M_B_A13 <13>
M_B_ACT_N <13>
M_B_PARITY <13> M_B_ALERT_N <13>
V_SM_VREF_CNTA <12> V_SM_VREF_CNTB <13>
M_B_BA0 <13> M_B_BA1 <13> M_B_BG0 <13>
M_B_BG1 <13>
M_B_DQS_DN0 <13> M_B_DQS_DN1 <13> M_B_DQS_DN2 <13> M_B_DQS_DN3 <13> M_B_DQS_DN4 <13> M_B_DQS_DN5 <13> M_B_DQS_DN6 <13> M_B_DQS_DN7 <13>
M_B_DQS_DP0 <13> M_B_DQS_DP1 <13> M_B_DQS_DP2 <13> M_B_DQS_DP3 <13> M_B_DQS_DP4 <13> M_B_DQS_DP5 <13> M_B_DQS_DP6 <13> M_B_DQS_DP7 <13>
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
CPU_DDR_CHB
CPU_DDR_CHB
CPU_DDR_CHB
Newgate
Newgate
Newgate
5 105
5 105
5 105
1
1M
1M
1M
5
Dr-Bios.com
SSID = CPU
D D
SM_PGCNTL
C C
AROUND_CPU
1V_VCCST
1V_VCCST
ALL_SYS_PWRG D<24,40>
R601 100R2F-L3-GPR601 100R2F-L3-GP
1 2
R602 56D2R2F-GPR602 56D2R2F-GP
1 2
R603 1KR2F-L1-GPR603 1KR2F-L1-GP
1 2
G
Q602
Q602 DMN5L06K-7-G P
DMN5L06K-7-G P
84.05067.031
84.05067.031
VIDSOUT_CPU VIDALERT#_CPU
PROCHOT #_CPU
VIDALERT#_CPU<46> VIDSCK_CPU<46> VIDSOUT_CPU<46>
PROCHOT #_CPU<24,44,46>
H_PWRG D<17,89> PLTRST#<16> H_PM_SYNC<16>
H_PM_DOW N<16>
PCH_PECI<16>
H_THERMT RIP#<16>
3D3V_S01D2V_S3
12
R610
R610 220KR2F-GP
220KR2F-GP
DS
Q601
Q601
D
DY
DY
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.2N702.W31
3rd = 84.2N702.W31
VIDALERT#_CPU VIDSCK_CPU VIDSOUT_CPU
DDR_PG_OU T <51>
1V_VCCST
3D3V_S0
DY
G
S
DY
VCCST_PW RGD_S VCCST_PW RGD
12
R612
R612 1KR2F-L1-GP
1KR2F-L1-GP
1 2
PCH_CPU_P CIBCLK_R_DP<18> PCH_CPU_P CIBCLK_R_DN<18>
PCH_CPU_N SSC_CLK_DP<18> PCH_CPU_N SSC_CLK_DN<18>
R613
R613 0R2J-L-GP
0R2J-L-GP
DY
DY
4
PCH_CPU_B CLK_DP<18> PCH_CPU_B CLK_DN<18>
R604 220R3F-1-GPR604 220R3F -1-GP
1 2
R605 499R2F-2-GPR605 499R2F -2-GP
1 2
R607 20R2F-GPR607 20R2F-GP
1 2
R608 13R2F-GP
R608 13R2F-GP
12
DY
DY
H_PECI<24>
SKYLAKE_HALO
SKYLAKE_HALO
CPU1E
CPU1E
BGA1440
BCLKP BCLKN
PCI_BCLKP PCI_BCLKN
CLK24P CLK24N
VIDALERT# VIDSCK VIDSOUT PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD PROCPWRGD
RESET# PM_SYNC PM_DOWN PECI THERMTRIP#
SKTOCC# PROC_SELECT#
CATERR#
SKYLAKE-3-GP
SKYLAKE-3-GP
BGA1440
RN601
RN601
1 2 3 4 5
SRN10KJ-6-G P
SRN10KJ-6-G P
PROC_TDO PROC_TMS
PROC_TCK
PROC_TRST# PROC_PREQ# PROC_PRDY#
CFG_RCOMP
8 7 6
B31 A32
D35 C36
E31 D31
CPU_VIDALERT _N
PROCHOT #_CPU_R SM_PGCNTL
VCCST_PW RGD
H_PM_DOW N_R H_PECI
BH31 BH32 BH29 BR30
BT13
H13
BT31 BP35 BM34 BP31 BT34
J31
BR33
BN1
BM30
ALL_SYS_PWRG D VCC ST_PWR GD
3
5 OF 14
5 OF 14
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
CFG16 CFG17 CFG18 CFG19
BPM0# BPM1# BPM2# BPM3#
PROC_TDI
BN25 BN27 BN26 BN28 BR20 BM20 BT20 BP20 BR23 BR22 BT23 BT22 BM19 BR19 BP19 BT19
BP23 BN23 BN22 BP22
BR27 BT27 BM31 BT30
BT28 BL32 BP28 BR28
BP30 BL30 BP27
BT25
CFG2 CFG3 CFG4 CFG5 CFG6 CFG7
CFG_RCOM P
DY
DY
12
C601
C601
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
R609
R609 49D9R2F-L1-G P
49D9R2F-L1-G P
1 2
CFG3 <99>
PROC_JTAG X_TCK
R611
R611 51R2J-L1-GP
51R2J-L1-GP
DY
DY
1 2
PROC_JTAG _TDO <17,99> PROC_JTAG _TDI < 17,99> PROC_JTAG _TMS <17,99>
PROC_JTAG X_TCK <17>
PROC_TRST # <23,99> XDP_PREQ# <23,99>
XDP_PRDY# <23,99>
2
1
B B
PEG Static Lane Reversal
1: Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
CFG2
12
R614
R614 1KR2J-L2-GP
1KR2J-L2-GP
eDP Enable
CFG4
1:Disable
0:Enable
12
R615
R615 1KR2J-L2-GP
1KR2J-L2-GP
CFG4
ENG 0428 change
PEG Training
1:(default) PEG Train immediately following RESET# de assertion.
CFG7
0 = PEG Wait for BIOS for training.
CFG7
12
R616
R616 1KR2J-L2-GP
1KR2J-L2-GP
DY
DY
PCIE Port Bifurcation Straps
CFG[6:5]
11: x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
A A
5
12
DY
DY
R617
R617 1KR2J-L2-GP
1KR2J-L2-GP
CFG5
CFG6
12
R618
R618 1KR2J-L2-GP
1KR2J-L2-GP
DY
DY
4
3
2
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
Title
Title
Title
Size Do cument Numb er Rev
Size Do cument Numb er Rev
Size Do cument Numb er Rev A2
A2
A2
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C .
CPU_CFG_CFG STRAP
CPU_CFG_CFG STRAP
CPU_CFG_CFG STRAP
Newgate
Newgate
Newgate
1
6 105
6 105
6 105
1M
1M
1M
5
Dr-Bios.com
SKYLAKE_HALO
SKYLAKE_HALO
CPU1G
CPU1G
BGA1440
AA13 AA31
D D
C C
B B
A A
AA32 AA33 AA34 AA35 AA36 AA37 AA38 AB29 AB30 AB31 AB32 AB35 AB36 AB37 AB38 AC13 AC14 AC29 AC30 AC31 AC32 AC33 AC34 AC35 AC36 AD13 AD14 AD31 AD32 AD33 AD34 AD35 AD36 AD37 AD38 AE13 AE14 AE30 AE31 AE32 AE35 AE36 AE37 AE38 AF35 AF36 AF37 AF38
K13 K14 L13 N13 N14 N30 N31 N32 N35 N36 N37 N38 P13
5
BGA1440
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
SKYLAKE-3-GP
SKYLAKE-3-GP
7 OF 14
7 OF 14
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC_SENSE
VSS_SENSE
V32 V33 V34 V35 V36 V37 V38 W13 W14 W29 W30 W31 W32 W35 W36 W37 W38 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Y36 L14 P29 P30 P31 P32 P33 P34 P35 P36 R13 R31 R32 R33 R34 R35 R36 R37 R38 T29 T30 T31 T32 T35 T36 T37 T38 U29 U30 U31 U32 U33 U34 U35 U36 V13 V14 V31 P14
AG37 AG38
1V_CPU_CORE1V_CPU_CORE
4
VCCCORE_SENSE <46> VSSCORE_SENSE <46>
4
JJ 20150130
3
BJ17 BJ19 BJ20 BK17 BK19 BK20 BL16 BL17 BL18 BL19 BL20
BL21 BM17 BN17
BJ23
BJ26
BJ27
BK23
BK26
BK27
BL23
BL24
BL25
BL26
BL27
BL28 BM24
BL15 BM16
BL22 BM22
BP15 BR15
BT15
BP16 BR16
BT16
BN15 BM15
BP17 BN16
BM14
BL14
BJ35
BJ36
AT13
AW13
AU13
AY13
BT29 BR25
BP25
3
CPU1J
CPU1J
SKYLAKE-3-GP
SKYLAKE-3-GP
SKYLAKE_HALO
SKYLAKE_HALO
BGA1440
BGA1440
VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC
RSVD#BJ23 RSVD#BJ26 RSVD#BJ27 RSVD#BK23 RSVD#BK26 RSVD#BK27 RSVD#BL23 RSVD#BL24 RSVD#BL25 RSVD#BL26 RSVD#BL27 RSVD#BL28 RSVD#BM24
VCCOPC_SENSE VSSOPC_SENSE
RSVD#BL22 RSVD#BM22
VCCEOPIO VCCEOPIO VCCEOPIO
RSVD#BP16 RSVD#BR16 RSVD#BT16
VCCEOPIO_SENSE VSSEOPIO_SENSE
RSVD#BP17 RSVD#BN16
VCC_OPC_1P8 VCC_OPC_1P8
RSVD#BJ35 RSVD#BJ36
ZVM# MSM#
ZVM2# MSM2#
OPC_RCOMP OPCE_RCOMP OPCE_RCOMP2
10 OF 14
10 OF 14
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_POWER1 (ASIC Power Bolck)
CPU_POWER1 (ASIC Power Bolck)
CPU_POWER1 (ASIC Power Bolck)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Newgate
Newgate
Newgate
1
7 105
7 105
7 105
1
1M
1M
1M
5
Dr-Bios.com
4
3
2
1
SSID = CPU
1V_VCCSA
SKYLAKE_HALO
SKYLAKE_HALO
CPU1I
CPU1I
J30
D D
0D95V_VCCIO
Imax :5.35(A)
C C
B B
K29 K30 K31 K32 K33 K34 K35
M29 M30 M31 M32 M33 M34 M35 M36
AG12
G15 G17 G19 G21 H15 H16 H17 H19 H20 H21 H26 H27
L31 L32 L35 L36 L37 L38
J15 J16 J17 J19 J20 J21 J26 J27
SKYLAKE-3-GP
SKYLAKE-3-GP
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
BGA1440
BGA1440
1 2
VCCPLL_OC VCCPLL_OC
VCCSA_SENSE
VSSSA_SENSE VCCIO_SENSE
VSSIO_SENSE
R801
R801
0R0603-PAD
0R0603-PAD
VDDQC
VCCSTG VCCSTG
VCCPLL VCCPLL
1D2V_VDDQ_CPUCLK1D2V_S3
9 OF 14
9 OF 14
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VCCST
Imax :12(A)
AA6 AE12 AF5 AF6 AG5 AG9 AJ12 AL11 AP6 AP7 AR12 AR6 AT12 AW6 AY6 J5 J6 K12 K6 L12 L6 R6 T6 W6
Y12 BH13
G11
Imax :0.06(A)
H30 H29 G30 H28
J28
M38 M37
H14 J14
1D2V_S3
1D2V_VDDQ_CPUCLK
1V_VCCST
1V_VCCSTG
Imax :0.06(A)
Imax :0.12(A)
Imax :0.26(A)
1V_VCCST
VCCSA_SENSE <46> VSSSA_SENSE <46>
R808
R808 0R2J-L-GP
0R2J-L-GP
1 2
DY
DY
1D2V_VCCSFR_OC
1D2V_VCCSFR_OC1D2V_S3
PCH_2_CPU_TRIGGER<23>
CPU_2_PCH_TRIGGER<23>
R809
R809
1 2
0R0402-PAD
0R0402-PAD
PD 0622 change
SA
󵦠󴪒
1V_VCCST1V_VCCSTG
R802
R802
1 2
30R2J-1-GP
30R2J-1-GP
CPU_2_PCH_TRIGGER_R
JJ 20150130
BR1
BT2
BN35
H24 BN33 BL34
N29
R14 AE29 AA14
A36
A37
H23
F30
E30
B30
C30
BR35 BR31 BH30
D1 E1 E3 E2
J24
J23
G3
J3
CPU1K
CPU1K
RSVD_TP#D1 RSVD_TP#E1 RSVD_TP#E3 RSVD_TP#E2
RSVD_TP#BR1 RSVD_TP#BT2
RSVD#BN35 RSVD#J24
RSVD#H24 RSVD#BN33 RSVD#BL34
RSVD#N29 RSVD#R14 RSVD#AE29 RSVD#AA14
RSVD#A36 RSVD#A37
PROC_TRIGIN PROC_TRIGOUT
RSVD#F30 RSVD#E30
RSVD#B30 RSVD#C30
RSVD#G3 RSVD#J3
RSVD#BR35 RSVD#BR31 RSVD#BH30
SKYLAKE-3-GP
SKYLAKE-3-GP
PD 0622 change
SKYLAKE_HALO
SKYLAKE_HALO
BGA1440
BGA1440
11 OF 14
11 OF 14
RSVD_TP#BM33
RSVD_TP#BL33
RSVD_TP#BJ14 RSVD_TP#BJ13
RSVD#BK28 RSVD#BJ28
VSS
RSVD_TP#BJ16
RSVD_TP#BK16
RSVD_TP#BK24
RSVD_TP#BJ24
RSVD#BK21 RSVD#BJ21
RSVD#BT17 RSVD#BR17
VSS
RSVD_TP#BJ34 RSVD_TP#BJ33
RSVD#G13
RSVD#AJ8
RSVD#BL31
NCTF#B2 NCTF#B38 NCTF#BP1 NCTF#BR2
NCTF#C1 NCTF#C38
BM33 BL33
BJ14 BJ13
BK28 BJ28
BJ18 BJ16
BK16
BK24 BJ24
BK21 BJ21
BT17 BR17
BK18 BJ34
BJ33
G13 AJ8 BL31
B2 B38 BP1 BR2 C1 C38
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_POWER2(ASIC Power Bolck)
CPU_POWER2(ASIC Power Bolck)
CPU_POWER2(ASIC Power Bolck)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
8 105
8 105
8 105
1
1M
1M
1M
5
Dr-Bios.com
4
3
2
1
SSID = CPU
SKYLAKE_HALO
BT32 BT26 BT24 BT21 BT18 BT14 BT12
BR36 BR34 BR29 BR26 BR24 BR21 BR18 BR14 BR12
BP34 BP33 BP29 BP26 BP24 BP21 BP18 BP14 BP12
BN34 BN31 BN30 BN29 BN24 BN21 BN20 BN19 BN18 BN14 BN12
BM38 BM35 BM28 BM27 BM26 BM23 BM21 BM13 BM12
BL29 BK29 BK15 BK14
BH14 BH12
BG38 BG13 BG12 BF33 BF12 BE29
BC34 BC12 BB12
C17 C13
BT9 BT5
BR7
BP7
BN9 BN7 BN4 BN2
BM9 BM6 BM2
BJ32 BJ31 BJ25 BJ22
BH9 BH8 BH5 BH4 BH1
BE6 BD9
CPU1L
CPU1L
C9
SKYLAKE-3-GP
SKYLAKE-3-GP
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKYLAKE_HALO
BGA1440
BGA1440
12 OF 14
12 OF 14
NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS
C25
VSS
C23
VSS
C21
VSS
C19
VSS
C15
VSS
C11
VSS
C8
VSS
C5
VSS
BM29
VSS
BM25
VSS
BM18
VSS
BM11
VSS
BM8
VSS
BM7
VSS
BM5
VSS
BM3
VSS
BL38
VSS
BL35
VSS
BL13
VSS
BL6
VSS
BK25
VSS
BK22
VSS
BK13
VSS
BK6
VSS
BJ30
VSS
BJ29
VSS
BJ15
VSS
BJ12
VSS
BH11
VSS
BH10
VSS
BH7
VSS
BH6
VSS
BH3
VSS
BH2
VSS
BG37
VSS
BG14
VSS
BG6
VSS
BF34
VSS
BF6
VSS
BE30
VSS
BE5
VSS
BE4
VSS
BE3
VSS
BE2
VSS
BE1
VSS
BD38
VSS
BD37
VSS
BD12
VSS
BD11
VSS
BD10
VSS
BD8
VSS
BD7
VSS
BD6
VSS
BC33
VSS
BC14
VSS
BC13
VSS
BC6
VSS
BB30
VSS
BB29
VSS
BB6
VSS
BB5
VSS
C2 BT36 BT35 BT4 BT3 BR38
13 OF 14
SKYLAKE_HALO
SKYLAKE_HALO
CPU1M
CPU1M
BGA1440
BGA1440
BB4
VSS
BB3
VSS
BB2
VSS
BB1
VSS
BA38
VSS
BA37
VSS
BA12
VSS
BA11
VSS
BA10
VSS
BA9
VSS
BA8
VSS
BA7
D D
C C
AW30 AW29 AW12
AM38 AM37 AM12
AY34 AY33 AY14 AY12
AV38 AV37 AU34 AU33 AU12 AU11 AU10
AT30 AT29
AR38 AR37 AR14 AR13
AP34 AP33 AP12 AP11 AP10
AN30 AN29 AN12
AL34 AL33 AL14 AL12 AL10
AW5 AW4 AW3 AW2 AW1
AM5 AM4 AM3 AM2 AM1
BA6
B9
AU9 AU8 AU7 AU6
AT6
AR5 AR4 AR3 AR2 AR1
AP9 AP8
AN6 AN5
AL9 AL8 AL7 AL4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKYLAKE-3-GP
SKYLAKE-3-GP
13 OF 14
NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS
AK30
VSS
AK29
VSS
AK4
VSS
AJ38
VSS
AJ37
VSS
AJ6
VSS
AJ5
VSS
AJ4
VSS
AJ3
VSS
AJ2
VSS
AJ1
VSS
AH34
VSS
AH33
VSS
AH12
VSS
AH6
VSS
AG30
VSS
AG29
VSS
AG11
VSS
AG10
VSS
AG8
VSS
AG7
VSS
AG6
VSS
AF14
VSS
AF13
VSS
AF12
VSS
AF4
VSS
AF3
VSS
AF2
VSS
AF1
VSS
AE34
VSS
AE33
VSS
AE6
VSS
AD30
VSS
AD29
VSS
AD12
VSS
AD11
VSS
AD10
VSS
AD9
VSS
AD8
VSS
AD7
VSS
AD6
VSS
AC38
VSS
AC37
VSS
AC12
VSS
AC6
VSS
AC5
VSS
AC4
VSS
AC3
VSS
AC2
VSS
AC1
VSS
AB34
VSS
AB33
VSS
AB6
VSS
AA30
VSS
AA29
VSS
AA12
VSS
A30
VSS
A28
VSS
A26
VSS
A24
VSS
A22
VSS
A20
VSS
A18
VSS
A16
VSS
A14
VSS
A12
VSS
A10
VSS
A9
VSS
A6
VSS
B37 B3 A34 A4 A3
Y38 Y37 Y14 Y13 Y11 Y10
Y9
Y8
Y7 W34 W33 W12
W5 W4 W3 W2 W1 V30 V29 V12
V6 U38 U37
U6 T34 T33 T14 T13 T12 T11 T10
T9
T8
T7
T5
T4
T3
T2
T1 R30 R29 R12 P38 P37 P12
P6 N34 N33 N12 N11 N10
N9
N8
N7
N6
N5
N4
N3
N2
N1
M14 M13 M12
M6 L34 L33 L30 L29 K38 K11 K10
K9
K8
K7
K5
K4
K3 K2
SKYLAKE_HALO
SKYLAKE_HALO
CPU1F
CPU1F
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKYLAKE-3-GP
SKYLAKE-3-GP
BGA1440
BGA1440
6 OF 14
6 OF 14
NCTFVSS
K1
VSS
J36
VSS
J33
VSS
J32
VSS
J25
VSS
J22
VSS
J18
VSS
J10
VSS
J7
VSS
J4
VSS
H35
VSS
H32
VSS
H25
VSS
H22
VSS
H18
VSS
H12
VSS
H11
VSS
G28
VSS
G26
VSS
G24
VSS
G23
VSS
G22
VSS
G20
VSS
G18
VSS
G16
VSS
G14
VSS
G12
VSS
G10
VSS
G9
VSS
G8
VSS
G6
VSS
G5
VSS
G4
VSS
F36
VSS
F31
VSS
F29
VSS
F27
VSS
F25
VSS
F23
VSS
F21
VSS
F19
VSS
F17
VSS
F15
VSS
F13
VSS
F11
VSS
F9
VSS
F8
VSS
F5
VSS
F4
VSS
F3
VSS
F2
VSS
E38
VSS
E35
VSS
E34
VSS
E9
VSS
E4
VSS
D33
VSS
D30
VSS
D28
VSS
D26
VSS
D24
VSS
D22
VSS
D20
VSS
D18
VSS
D16
VSS
D14
VSS
D12
VSS
D10
VSS
D9
VSS
D6
VSS
D3
VSS
C37
VSS
C31
VSS
C29
VSS
C27
VSS
D38
1V_VCCGT 1V_VCCGT
BM36 BM37 BN36 BN37 BN38 BP37 BP38 BR37
BE38
BG29 BG30 BG31 BG32 BG33
BE37
BG34 BG35 BG36 BH33 BH34 BH35 BH36 BH37 BH38 BJ37 BJ38 BL36 BL37
BT37 BF13
BF14 BF29 BF30 BF31 BF32 BF35 BF36 BF37 BF38
BC36 BC37 BC38 BD13 BD14 BD29 BD30 BD31 BD32 BD33 BD34 BD35 BD36 BE31 BE32
SKYLAKE_HALO
SKYLAKE_HALO
CPU1H
CPU1H
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
SKYLAKE-3-GP
SKYLAKE-3-GP
BGA1440
BGA1440
8 OF 14
8 OF 14
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
AV29 AV30 AV31 AV32 AV33 AV34 AV35 AV36 AW14 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38 AY29 AY30 AY31 AY32 AY35 AY36 AY37 AY38 BA13 BA14 BA29 BA30 BA31 BA32 BA33 BA34 BA35 BA36 BB13 BB14 BB31 BB32 BB33 BB34 BB35 BB36 BB37 BB38 BC29 BC30 BC31 BC32 BC35 BE33 BE34 BE35 BE36
1V_VCCGT
AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AL13 AL29 AL30 AL31 AL32 AL35 AL36 AL37 AL38 AM13 AM14 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AN13 AN14 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AP13 AP14 AP29 AP30 AP31 AP32 AP35 AP36 AP37 AP38 AR29 AR30 AR31 AR32 AR33 AR34 AR35 AR36 AT14 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AU14 AU29 AU30 AU31 AU32 AU35 AU36 AU37 AU38
AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 AJ36
CPU1N
CPU1N
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
SKYLAKE-3-GP
SKYLAKE-3-GP
SKYLAKE_HALO
SKYLAKE_HALO
BGA1440
BGA1440
14 OF 14
14 OF 14
VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX
VCCGT_SENSE VSSGT_SENSE
VCCGTX_SENSE
VSSGTX_SENSE
AF29 AF30 AF31 AF32 AF33 AF34 AG13 AG14 AG31 AG32 AG33 AG34 AG35 AG36 AH13 AH14 AH29 AH30 AH31 AH32 AJ13 AJ14
AH38 AH37
AH36 AH35
VCCGT_SEN SE <46> VSSGT_SENSE <46>
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
Newgate
Newgate
Newgate
1
9 105
9 105
9 105
1M
1M
1M
5
4
3
Title
Title
Title
CPU_POWER3(ASIC Power Bolck)
CPU_POWER3(ASIC Power Bolck)
CPU_POWER3(ASIC Power Bolck)
Size D ocument Num ber Rev
Size D ocument Num ber Rev
Size D ocument Num ber Rev A2
A2
A2
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
5
Dr-Bios.com
4
3
2
1
VDDQ 4x 22uF 0603 10x 10uF 0402
1D2V_S3 1D2V_S3
12
12
C1014
1V_CPU_CORE
D D
PC1011
12
PC1001
PC1001
12
PC1002
PC1002
12
PC1003
PC1003
12
PC1004
PC1004
12
PC1005
PC1005
12
PC1006
PC1006
12
PC1007
PC1007
12
PC1008
PC1008
PC1009
PC1009
12
12
PC1010
PC1010
12
PC1011
12
PC1012
PC1012
C1014
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1015
C1015
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
C1016
C1016
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
C1017
C1017
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VccIO 3x 10uF 0402
0D95V_VCCIO
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1022
PC1022
12
SC22U6D3V5MX-L3-GP
PC1023
PC1023
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1024
PC1024
12
C1005
C1005
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1006
C1006
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1007
C1007
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1013
PC1013
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1014
PC1014
DY
DY
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1015
PC1015
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1016
PC1016
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1017
PC1017
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1018
PC1018
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1019
PC1019
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1020
PC1020
DY
DY
PC1021
PC1021
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
DY
DY
12
12
C1018
C1018
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1019
C1019
12
C1020
C1020
C1021
C1021
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VccIO 2x 47uF 0805
0D95V_VCCIO
12
12
C1001
C1001
12
C1002
C1002
C1003
C1003
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
C1022
C1022
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1004
C1004
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
12
12
C1025
C1025
C1024
C1024
C1023
C1023
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VDDQC 1x 10uF 0402
1D2V_VDDQ_CPUCLK
12
C1026
C1026
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1008
C1008
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1027
C1027
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VccST 1x 1uF 0201
1V_VCCST
12
C1013
C1013
SC1U10V2KX-1GP
SC1U10V2KX-1GP
near CPU H30
C C
SC22U6D3V5MX-L3-GP
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1028
PC1028
DY
DY
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change
PC1029
PC1029
PC1025
PC1025
12
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1027
PC1027
DY
DY
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1030
PC1030
12
SC22U6D3V5MX-L3-GP
PC1026
PC1026
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
VccPLL 1x 1uF 0201 VccPLL_OC 2x 1uF 0201
1V_VCCST
12
C1011
C1011
SC1U10V2KX-1GP
SC1U10V2KX-1GP
near CPU H28 , J28
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
VR: +/-5% or +/-50mV Place close to VR output
1D2V_VCCSFR_OC
12
12
C1009
C1009
C1010
C1010
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VccSTG 1x 1uF 0201
1V_VCCSTG
12
C1012
C1012
SC1U10V2KX-1GP
SC1U10V2KX-1GP
near CPU H29 , G30
JJ 20150130
ENG 0521 change ENG 0521 change
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
010_CPU (Power CAP1)
010_CPU (Power CAP1)
010_CPU (Power CAP1)
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
10 105
10 105
10 105
1
1M
1M
1M
A A
Dr-Bios.com
DY
DY
12
PC1127
5
4
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1127
DY
DY
12
PC1128
PC1128
DY
DY
12
PC1129
PC1129
DY
DY
12
PC1130
PC1130
DY
DY
12
PC1131
PC1131
DY
DY
12
PC1132
PC1132
B B
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1121
PC1121
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
DY
DY
12
PC1122
PC1122
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1123
PC1123
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1124
PC1124
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1125
PC1125
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1126
PC1126
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
C C
12
PC1111
PC1111
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1112
PC1112
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1113
PC1113
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1114
PC1114
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change
DY
12
PC1115
PC1115
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1116
PC1116
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
DY
D D
1V_VCCGT
12
PC1101
PC1101
12
PC1102
PC1102
12
PC1103
PC1103
12
PC1104
PC1104
12
PC1105
PC1105
12
PC1106
PC1106
5
4
12
PC1117
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
3
SC22U6D3V5MX-L3-GP
DY
DY
PC1117
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1118
PC1118
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1119
PC1119
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change
12
PC1120
PC1120
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 change ENG 0521 change
12
PC1157
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
Title
Size Document Number Rev
Date: Sheet of
A4
A4
A4
Title
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Title
Size Document Number Rev
<Core Design>
<Core Design>
<Core Design>
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1157
DY
DY
12
PC1153
PC1153
DY
DY
12
PC1154
PC1154
12
PC1155
PC1155
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
ENG 0521 changeENG 0521 change
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1107
PC1107
12
PC1108
PC1108
12
PC1109
PC1109
DY
DY
12
PC1110
PC1110
3
1V_VCCSA
DY
DY
12
PC1148
PC1148
12
PC1149
PC1149
12
PC1150
PC1150
DY
DY
12
PC1151
PC1151
2
CPU (Power CAP2)
CPU (Power CAP2)
CPU (Power CAP2)
Newgate
Newgate
Newgate
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
11 105
11 105
11 105
1
1M
1M
1M
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1156
PC1156
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1152
PC1152
1
5
Dr-Bios.com
M_A_A16<4> M_A_A15<4> M_A_A14<4> M_A_A13<4> M_A_A12<4> M_A_A11<4> M_A_A10<4> M_A_A9<4> M_A_A8<4> M_A_A7<4>
M_A_ALERT_N<4> M_A_ACT_N<4>
M_A_A6<4> M_A_A5<4> M_A_A4<4> M_A_A3<4> M_A_A2<4> M_A_A1<4> M_A_A0<4>
M_A_BA1<4>
M_A_BA0<4>
M_A_BG1<4>
M_A_BG0<4>
M_A_CLK#1<4> M_A_CLK#0<4>
M_A_CKE1<4> M_A_CKE0<4>
M_A_ODT1<4> M_A_ODT0<4>
M_A_PARITY<4>
DDR4_DRAMRST#<13,17>
M_A_CLK1<4> M_A_CLK0<4>
M_A_CS#1<4> M_A_CS#0<4>
TS#_DIMM0_1
PCH_SMBDATA<13,17,69>
PCH_SMBCLK<13,17,69>
SA2_CHA_DIM0 SA1_CHA_DIM0 SA0_CHA_DIM0
D D
C C
1D2V_S33D3V_S0
R1215 240R2F-1-GP
R1215 240R2F-1-GP
1 2
DY
DY
12
12
DY
DY
B B
C1228
C1228
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
R1216
R1216
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
M_VREF_CA_DIMMA
12
C1229
C1229
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
152 156 151 158 119 120 146 121 125 122 127 126 128 131 132 133 144
145 150 113 115
138 140 137 139
157 149
110 109
161 155
165 162
104 100
105 101
143 108
134 116 114 255
166 260 256
254 253 164
4
DM1A
DM1A
RAS#/A16 CAS#/A15 WE#/A14 A13 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA1 BA0 BG1 BG0
CK1_T/NF CK1_C/NF CK0_T CK0_C
CS1# CS0#
CKE1 CKE0
ODT1 ODT0
C1/CS3#/NC#165 C0/CS2#/NC#162
CB7/NC#104 CB6/NC#100
87
CB5/NC#87
88
CB4/NC#88 CB3/NC#105 CB2/NC#101
91
CB1/NC#91
92
CB0/NC#92 PARITY
RESET# EVENT#/NF
ALERT# ACT# VDDSPD
SA2 SA1 SA0
SDA SCL VREFCA
DDR4-260P-10-GP
DDR4-260P-10-GP
062.10011.00I1
062.10011.00I1
2nd = 062.10011.00L1
2nd = 062.10011.00L1
1 OF 4
1 OF 4
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
246 245 233 232 250 249 236 237 225 224 212 211 229 228 215 216 204 203 190 191 208 207 194 195 182 183 169 170 186 187 173 174 80 79 67 66 84 83 71 70 59 58 45 46 63 62 49 50 37 38 25 24 42 41 29 28 17 16 3 4 21 20 7 8
DDR4 SWAP 0212
M_A_DQ62 <4> M_A_DQ60 <4> M_A_DQ61 <4> M_A_DQ63 <4> M_A_DQ58 <4> M_A_DQ56 <4> M_A_DQ57 <4> M_A_DQ59 <4> M_A_DQ54 <4> M_A_DQ49 <4> M_A_DQ52 <4> M_A_DQ48 <4> M_A_DQ53 <4> M_A_DQ51 <4> M_A_DQ55 <4> M_A_DQ50 <4> M_A_DQ42 <4> M_A_DQ41 <4> M_A_DQ45 <4> M_A_DQ47 <4> M_A_DQ43 <4> M_A_DQ44 <4> M_A_DQ40 <4> M_A_DQ46 <4> M_A_DQ35 <4> M_A_DQ36 <4> M_A_DQ38 <4> M_A_DQ33 <4> M_A_DQ34 <4> M_A_DQ37 <4> M_A_DQ39 <4> M_A_DQ32 <4> M_A_DQ25 <4> M_A_DQ30 <4> M_A_DQ27 <4> M_A_DQ28 <4> M_A_DQ24 <4> M_A_DQ31 <4> M_A_DQ26 <4> M_A_DQ29 <4> M_A_DQ20 <4> M_A_DQ23 <4> M_A_DQ16 <4> M_A_DQ18 <4> M_A_DQ22 <4> M_A_DQ21 <4> M_A_DQ17 <4> M_A_DQ19 <4> M_A_DQ10 <4> M_A_DQ14 <4> M_A_DQ11 <4> M_A_DQ12 <4> M_A_DQ8 <4> M_A_DQ15 <4> M_A_DQ9 <4> M_A_DQ13 <4> M_A_DQ2 <4> M_A_DQ7 <4> M_A_DQ5 <4> M_A_DQ4 <4> M_A_DQ3 <4> M_A_DQ6 <4> M_A_DQ1 <4> M_A_DQ0 <4>
3
0D6V_S0
2 OF 4
DM1B
DM1B
DDR4-260P-10-GP
DDR4-260P-10-GP
2 OF 4
DQS8_T DQS8_C DQS7_T DQS7_C DQS6_T DQS6_C DQS5_T DQS5_C DQS4_T DQS4_C DQS3_T DQS3_C DQS2_T DQS2_C DQS1_T DQS1_C DQS0_T DQS0_C
DM8#/DBI#/NC#96
DM7#/DBI7# DM6#/DBI6# DM5#/DBI5# DM4#/DBI4# DM3#/DBI3# DM2#/DBI2#
DM1#/DBI#
DM0#/DBI0#
1D2V_S3
2D5V_S3
97 95 242 240 221 219 200 198 179 177 76 74 55 53 34 32 13 11
96 241 220 199 178 75 54 33 12
1D2V_S3
DM1C
DM1C
111
VDD
117
VDD
123
VDD
129
VDD
135
VDD
141
VDD
147
VDD
153
VDD
159
VDD
112
VDD
118
VDD
124
VDD
130
VDD
136
VDD
142
VDD
148
VDD
154
VDD
160
VDD
163
VDD
257
VPP
259
VPP
258
VTT
DDR4-260P-10-GP
DDR4-260P-10-GP
3 OF 4
3 OF 4
261 262
NP1 NP2
M_A_DQS_DP7 <4> M_A_DQS_DN7 <4> M_A_DQS_DP6 <4> M_A_DQS_DN6 <4> M_A_DQS_DP5 <4> M_A_DQS_DN5 <4> M_A_DQS_DP4 <4> M_A_DQS_DN4 <4> M_A_DQS_DP3 <4> M_A_DQS_DN3 <4> M_A_DQS_DP2 <4> M_A_DQS_DN2 <4> M_A_DQS_DP1 <4> M_A_DQS_DN1 <4> M_A_DQS_DP0 <4> M_A_DQS_DN0 <4>
261 262
NP1 NP2
2
DM1D
DM1D
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
1D2V_S3
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
DDR4-260P-10-GP
DDR4-260P-10-GP
4 OF 4
4 OF 4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
99 102 103 106 107 167 168 171 172 175 176 180 181 184 185 188 189 192 193 196 197 201 202 205 206 209 210 213 214 217 218 222 223 226 227 230 231 234 235 238 239 243 244 247 248 251 252
UN 0225
12
C1223
C1223
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
0D6V_S00D6V_S0
12
C1224
C1224
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
0D6V_S0
12
C1225
C1225
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1226
C1226
SC1U10V2KX-1GP
SC1U10V2KX-1GP
󴴨sw󳠃󴧖
12
12
12
1D2V_S3
RN1201
RN1201
1
4
2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
A A
M_VREF_CA_DIMMA
R1206
R1206
1 2
2R2F-GP
2R2F-GP
12
C1222
C1222
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
+V_VREF_PATH1
12
R1209
R1209
24D9R2F-L-GP
24D9R2F-L-GP
V_SM_VREF_CNTA <5>
3D3V_S0
3D3V_S0
3D3V_S0
R1204 10KR2F-L1-GP
R1204 10KR2F-L1-GP
12
DY
DY
R1205
R1205
12
0R0402-PAD
0R0402-PAD
PD 0622 change
R1208 10KR2F-L1-GP
R1208 10KR2F-L1-GP
12
DY
DY
R1210
R1210
12
0R0402-PAD
0R0402-PAD
PD 0622 change
R1211 10KR2F-L1-GP
R1211 10KR2F-L1-GP
12
DY
DY
R1212
R1212
12
0R0402-PAD
0R0402-PAD
SA0_CHA_DIM0
SA1_CHA_DIM0
SA2_CHA_DIM0
12
C1208
C1208
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1214
C1214
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1202
C1202
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1215
C1215
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1209
C1209
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1216
C1216
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PD 0622 change
5
4
3
C1203
C1203
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1217
C1217
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
12
C1204
C1204
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1218
C1218
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1205
C1205
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1219
C1219
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
C1206
C1206
C1210
C1210
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
C1220
C1220
C1221
C1221
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
Date: Sheet of
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
2D5V_S3
12
12
12
C1211
C1211
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
C1207
C1207
C1212
C1212
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
12 105
12 105
12 105
1
12
DY
DY
C1213
C1213
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
1M
1M
1M
5
Dr-Bios.com
DM2A DDR4-260P-9-GP
DM2A DDR4-260P-9-GP
M_B_A0<5> M_B_A1<5> M_B_A2<5> M_B_A3<5> M_B_A4<5> M_B_A5<5> M_B_A6<5> M_B_A7<5> M_B_A8<5>
D D
C C
PCH_SMBDATA<12,17,69>
PCH_SMBCLK<12,17,69>
1D2V_S3
R1312
R1312
1 2
DY
DY
B B
1D2V_S3
RN1301
RN1301
1 2 3
A A
SRN1KJ-7-GP
SRN1KJ-7-GP
4
M_B_A9<5> M_B_A10<5> M_B_A11<5> M_B_A12<5> M_B_A13<5> M_B_A14<5> M_B_A15<5> M_B_A16<5>
DDR4_DRAMRST#<12,17>
M_B_ACT_N<5> M_B_ALERT_N<5>
240R2F-1-GP
240R2F-1-GP
M_B_PARITY<5>
M_VREF_CA_DIMMB
M_B_BA0<5>
M_B_BA1<5>
M_B_BG0<5>
M_B_BG1<5>
M_B_CLK0<5>
M_B_CLK#0<5>
M_B_CLK1<5>
M_B_CLK#1<5>
M_B_CS#0<5> M_B_CS#1<5>
M_B_ODT0<5> M_B_ODT1<5>
M_B_CKE0<5> M_B_CKE1<5>
1 2
2R2F-GP
2R2F-GP
SA0_CHB_DIM0 SA1_CHB_DIM0 SA2_CHB_DIM0
TS#_DIMM1_1
M_VREF_CA_DIMMB
12
C1301
C1301
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R1305
R1305
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
WE#/A14
156
CAS#/A15
152
RAS#/A16
150
BA0
145
BA1
115
BG0
113
BG1
92
CB0/NC
91
CB1/NC
101
CB2/NC
105
CB3/NC
88
CB4/NC
87
CB5/NC
100
CB6/NC
104
CB7/NC
137
CK0_T
139
CK0_C
138
CK1_T/NF
140
CK1_C/NF
109
CKE0
110
CKE1
149
CS0#
157
CS1#
162
C0/CS2#/NC
165
C1/CS3#/NC
155
ODT0
161
ODT1
256
SA0
260
SA1
166
SA2
254
SDA
253
SCL
108
RESET#
114
ACT#
116
ALERT#
134
EVENT#/NF
143
PARITY
164
VREFCA
062.10011.00J1
062.10011.00J1
2nd = 062.10011.00K1
2nd = 062.10011.00K1
12
C1323
C1323
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
+V_VREF_PATH2
12
R1309
R1309
24D9R2F-L-GP
24D9R2F-L-GP
5
4
1 OF 4
1 OF 4
8
DQ0
7
DQ1
20
DQ2
21
DQ3
4
DQ4
3
DQ5
16
DQ6
17
DQ7
28
DQ8
29
DQ9
41
DQ10
42
DQ11
24
DQ12
25
DQ13
38
DQ14
37
DQ15
50
DQ16
49
DQ17
62
DQ18
63
DQ19
46
DQ20
45
DQ21
58
DQ22
59
DQ23
70
DQ24
71
DQ25
83
DQ26
84
DQ27
66
DQ28
67
DQ29
79
DQ30
80
DQ31
174
DQ32
173
DQ33
187
DQ34
186
DQ35
170
DQ36
169
DQ37
183
DQ38
182
DQ39
195
DQ40
194
DQ41
207
DQ42
208
DQ43
191
DQ44
190
DQ45
203
DQ46
204
DQ47
216
DQ48
215
DQ49
228
DQ50
229
DQ51
211
DQ52
212
DQ53
224
DQ54
225
DQ55
237
DQ56
236
DQ57
249
DQ58
250
DQ59
232
DQ60
233
DQ61
245
DQ62
246
DQ63
V_SM_VREF_CNTB <5>
4
3D3V_S0
3D3V_S0
3D3V_S0
M_B_DQ0 <5> M_B_DQ1 <5> M_B_DQ2 <5> M_B_DQ3 <5> M_B_DQ4 <5> M_B_DQ5 <5> M_B_DQ6 <5> M_B_DQ7 <5> M_B_DQ8 <5>
M_B_DQ9 <5> M_B_DQ15 <5> M_B_DQ14 <5> M_B_DQ12 <5> M_B_DQ13 <5> M_B_DQ10 <5> M_B_DQ11 <5> M_B_DQ22 <5> M_B_DQ17 <5> M_B_DQ21 <5> M_B_DQ19 <5> M_B_DQ18 <5> M_B_DQ16 <5> M_B_DQ20 <5> M_B_DQ23 <5> M_B_DQ30 <5> M_B_DQ27 <5> M_B_DQ29 <5> M_B_DQ31 <5> M_B_DQ25 <5> M_B_DQ28 <5> M_B_DQ24 <5> M_B_DQ26 <5> M_B_DQ35 <5> M_B_DQ38 <5> M_B_DQ36 <5> M_B_DQ37 <5> M_B_DQ34 <5> M_B_DQ39 <5> M_B_DQ32 <5> M_B_DQ33 <5> M_B_DQ40 <5> M_B_DQ41 <5> M_B_DQ42 <5> M_B_DQ43 <5> M_B_DQ44 <5> M_B_DQ45 <5> M_B_DQ47 <5> M_B_DQ46 <5> M_B_DQ48 <5> M_B_DQ51 <5> M_B_DQ55 <5> M_B_DQ49 <5> M_B_DQ52 <5> M_B_DQ54 <5> M_B_DQ50 <5> M_B_DQ53 <5> M_B_DQ63 <5> M_B_DQ62 <5> M_B_DQ56 <5> M_B_DQ60 <5> M_B_DQ58 <5> M_B_DQ59 <5> M_B_DQ57 <5> M_B_DQ61 <5>
DDR4 SWAP 0212
󴴨sw󳠃󴧖
DY
DY
R1302 10KR2F-L1-GP
R1302 10KR2F-L1-GP
12
R1303
R1303
12
0R0402-PAD
0R0402-PAD
PD 0622 change
R1306 10KR2F-L1-GPR1306 10KR2F-L1-GP
12
R1307 0R2J-L-GP
R1307 0R2J-L-GP
12
DY
DY
DY
DY
R1310 10KR2F-L1-GP
R1310 10KR2F-L1-GP
12
R1311
R1311
12
0R0402-PAD
0R0402-PAD
PD 0622 change
SA0_CHB_DIM0
SA1_CHB_DIM0
SA2_CHB_DIM0
3
3
1D2V_S3
DM2B
DM2B
DDR4-260P-9-GP
DDR4-260P-9-GP
1D2V_S3
DM2C
DM2C
111 112 117 118 123 124 129 130 135 136 141 142 147 148 153 154 159 160 163
DDR4-260P-9-GP
DDR4-260P-9-GP
DM0#/DBI0#
DM1#/DBI# DM2#/DBI2# DM3#/DBI3# DM4#/DBI4# DM5#/DBI5# DM6#/DBI6# DM7#/DBI7#
DM8#/DBI#/NC
12
C1303
C1303
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1315
C1315
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
2 OF 4
2 OF 4
DQS0_C DQS0_T DQS1_C DQS1_T DQS2_C DQS2_T DQS3_C DQS3_T DQS4_C DQS4_T DQS5_C DQS5_T DQS6_C DQS6_T DQS7_C DQS7_T DQS8_C DQS8_T
12
C1304
C1304
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1316
C1316
SC1U10V2KX-1GP
SC1U10V2KX-1GP
11 13 32 34 53 55 74 76 177 179 198 200 219 221 240 242 95 97
12 33 54 75 178 199 220 241 96
12
C1305
C1305
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1317
C1317
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3 OF 4
3 OF 4
VDDSPD
VPP VPP
VTT
NP1 NP2
261 262
12
C1306
C1306
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1318
C1318
SC1U10V2KX-1GP
SC1U10V2KX-1GP
255
257 259
258
261 262
NP1 NP2
12
C1307
C1307
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1319
C1319
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
2D5V_S3
0D6V_S0
M_B_DQS_DN0 <5> M_B_DQS_DP0 <5> M_B_DQS_DN1 <5> M_B_DQS_DP1 <5> M_B_DQS_DN2 <5> M_B_DQS_DP2 <5> M_B_DQS_DN3 <5> M_B_DQS_DP3 <5> M_B_DQS_DN4 <5> M_B_DQS_DP4 <5> M_B_DQS_DN5 <5> M_B_DQS_DP5 <5> M_B_DQS_DN6 <5> M_B_DQS_DP6 <5> M_B_DQS_DN7 <5> M_B_DQS_DP7 <5>
12
C1308
C1308
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1320
C1320
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1309
C1309
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1321
C1321
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D2V_S3
2
C1329
C1329
12
C1310
C1310
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1322
C1322
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1
3D3V_S0
DM2D
DM2D
1
VSS
2
VSS
5
VSS
12
12
C1328
C1328
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
DY
DY
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
DDR4-260P-9-GP
DDR4-260P-9-GP
4 OF 4
4 OF 4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
99 102 103 106 107 167 168 171 172 175 176 180 181 184 185 188 189 192 193 196 197 201 202 205 206 209 210 213 214 217 218 222 223 226 227 230 231 234 235 238 239 243 244 247 248 251 252
UN 0225
2D5V_S30D6V_S0 0D6V_S0 0D6V_S0
12
C1311
12
12
C1324
C1324
C1325
C1325
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
12
12
C1327
C1327
C1326
C1326
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
C1311
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
1
12
12
C1312
C1312
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
13 105
13 105
13 105
C1313
C1313
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
DY
DY
C1314
C1314
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
1M
1M
1M
5
Dr-Bios.com
Royee 20150204
SPI_SI_CPU<22>
SPI_SO_CPU<22>
D D
SPI_SI_ROM<24,25>
SPI_SO_ROM<24,25>
R1401 0R0402-PADR1401 0R0402-PAD
1 2
R1402 0R0402-PADR1402 0R0402-PAD
1 2
PD 0622 change
SPI_CS_CPU_N0<24,25>
SPI_CLK_ROM<24,25>
SPI_IO2_ROM<22,25> SPI_IO3_ROM<22,25>
R1403 15R2F-2-GPR1403 15R2F-2-GP
1 2
R1404 0R0402-PADR1404 0R0402-PAD
1 2
R1405 0R0402-PADR1405 0R0402-PAD
1 2
PD 0622 change
C C
R1408
R1408
10KR2F-L1-GP
10KR2F-L1-GP
delete 0225
4
SPI_SI_CPU
SPI_SO_CPU SPI_CLK_CPU
SPI_IO2_CPU SPI_IO3_CPU
12
BD17
GPP_A11/PME#
AG15
RSVD_AG15
AG14
RSVD_AG14
AF17
RSVD_AF17
AE17
RSVD_AE17
AR19
TP5
AN17
TP4
BB29
SPI0_MOSI
BE30
SPI0_MISO
BD31
SPI0_CS0#
BC31
SPI0_CLK
AW31
SPI0_CS1#
BC29
SPI0_IO2
BD30
SPI0_IO3
AT31
SPI0_CS2#
AN36
GPP_D1/SPI1_CLK
AL39
GPP_D0/SPI1_CS#
AN41
GPP_D3/SPI1_MOSI
AN38
GPP_D2/SPI1_MISO
AH43
GPP_D22/SPI1_IO3
AG44
GPP_D21/SPI1_IO2
SUNRISE-1-GP
SUNRISE-1-GP
DGPU_HOLD_RST#
3
SPL PCH-H
SPL PCH-H
Strap
Strap
Strap
SM_INTRUDER#
1 OF 12PCH1A
1 OF 12PCH1A
GPP_B13/PLTRST#
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
INTRUDER#
R1406
R1406 1MR2F-L-GP
1MR2F-L-GP
BB27
P43 R39 R36 R42 R41
AF41 AE44 BC23 BD24
BC36 BE34 BD39 BB36 BA35 BC35 BD35 AW35 BD34
BE11
12
2
LAB2 0401 change
SM_INTRUDER#
3D3V_RTC_AUX
PLT_RST# <24,31,61,63,68,89,91>
change 0227
EC_SMI# <24>
TP_IN# <65>
DGPU_HOLD_RST# <76,79>
1
3D3V_S0
R1407
B B
TP_IN#
R1407 10KR2F-L1-GP
10KR2F-L1-GP
12
DY
DY
change 0227
12
3D3V_S0
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH_GPP1
PCH_GPP1
PCH_GPP1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
A4
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Newgate
Newgate
Newgate
14 105
14 105
14 105
1
1M
1M
1M
CHECK NEED PULL HIGH?
EC_SMI#
A A
R1409 10KR2F-L1-GPR1409 10KR2F-L1-GP
5
4
3
5
Dr-Bios.com
D D
4
3
2
1
PCH1B
SSID = PCH
C C
Delete WIGIG 0204
DMI_TX_CPU_N0<3>
DMI_TX_CPU_P0<3> DMI_RX_CPU_N0<3> DMI_RX_CPU_P0<3>
DMI_TX_CPU_N1<3>
DMI_TX_CPU_P1<3> DMI_RX_CPU_N1<3> DMI_RX_CPU_P1<3>
DMI_TX_CPU_N2<3>
DMI_TX_CPU_P2<3> DMI_RX_CPU_N2<3> DMI_RX_CPU_P2<3>
DMI_TX_CPU_N3<3>
DMI_TX_CPU_P3<3> DMI_RX_CPU_N3<3> DMI_RX_CPU_P3<3>
1 2
R1504
R1504 100R2F-L3-GP
100R2F-L3-GP
PEG_RCOMPN_CPU PEG_RCOMPP_CPU
WIGIG
PCIE_RX_PCH_N3<61,89>
WIFI
LAN
B B
PCIE_RX_PCH_P3<61,89> PCIE_TX_PCH_N3<61> PCIE_TX_PCH_P3<61> PCIE_RX_PCH_N4<31> PCIE_RX_PCH_P4<31> PCIE_TX_PCH_N4<31> PCIE_TX_PCH_P4<31>
PCH1B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SUNRISE-1-GP
SUNRISE-1-GP
SPL PCH-H
SPL PCH-H
DMI
DMI
PCIe/USB 3
PCIe/USB 3
USB 2.0
USB 2.0
GPP_F15/USB2_OCB_4 GPP_F16/USB2_OCB_5 GPP_F17/USB2_OCB_6 GPP_F18/USB2_OCB_7
LAB2 0401 change
2 OF 12
2 OF 12
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9 USB2N_10 USB2P_10 USB2N_11 USB2P_11 USB2N_12 USB2P_12 USB2N_13 USB2P_13 USB2N_14 USB2P_14
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSVD
AF5 AG7 AD5 AD7 AG8 AG10 AE1 AE2 AC2 AC3 AF2 AF3 AB3 AB2 AL8 AL7 AA1 AA2 AJ8 AJ7 W2 W3 AD3 AD2 V2 V1 AJ11 AJ13
AD43 AD42 AD39 AC44 Y43 Y41 W44 W43
AG3 AD10 AB13 AG2
BD14
USB2_OC
USBCOMP
USB2_VBUSSENSE
USB2_ID
USB_PCH_PN1 <36> USB_PCH_PP1 <36> USB_PCH_PN2 <35> USB_PCH_PP2 <35>
USB_PCH_PN5 <73> USB_PCH_PP5 <73> USB_PCH_PN6 <66> USB_PCH_PP6 <66> USB_PCH_PN7 <61,89> USB_PCH_PP7 <61,89>
USB_PCH_PN9 <38> USB_PCH_PP9 <38> USB_PCH_PN10 <66> USB_PCH_PP10 <66>
3D3V_S5
R1510
R1510 10KR2F-L1-GP
10KR2F-L1-GP
1 2
R1509
R1509 113R2F-GP
113R2F-GP
1 2
USB3.0 Port 1 USB Charger USB3.0 Port 2(USB2.0)
USB3.1 (type C) USB2.0 (DB) Bluetooth
LAB2 0401 change
CCD Card reader
JJ 2015/01/27
USB2_VBUSSENSE USB2_ID
RN1501
RN1501
1 2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
USB Table
Pair
1 2 3 4 5
Device
USB3.0 Port 1(USB2.0) Charger
USB3.0 Port 2(USB2.0)
USB2.0
4
6 7
Bluetooth
8
Touch Screen
9
CCD
10
Card reader
11
Finger Printer
12 13 14
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH_PCIE_DMI_USB
PCH_PCIE_DMI_USB
PCH_PCIE_DMI_USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
1
15 105
15 105
15 105
1M
1M
1M
5
Dr-Bios.com
SSID = PCH
D D
C C
B B
Delete WIGIG 0204
PCIE_TX_PCH_P11<63> PCIE_TX_PCH_N11<63>
MSATA
MSATA
PCIE_RX_PCH_P11<63> PCIE_RX_PCH_N11<63>
PCIE_TX_PCH_P12<63>
PCIE_TX_PCH_N12<63> PCIE_RX_PCH_P12<63> PCIE_RX_PCH_N12<63>
UN 0225
change 0227
EC_SCI#<24>
FW_GPIO<38>
4
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP
K44
PCIE20_TXN
N38
PCIE20_RXP
N39
PCIE20_RXN
H44
PCIE19_TXP
H43
PCIE19_TXN
L39
PCIE19_RXP
L37
PCIE19_RXN
SUNRISE-1-GP
SUNRISE-1-GP
1V_VCCST
CLINK
CLINK
FAN
FAN
3
SPL PCH-H
SPL PCH-H
HOST
HOST
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIe/SATA
PCIe/SATA
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2 GPP_F0/SATAXPCIE3/SATAGP3 GPP_F1/SATAXPCIE4/SATAGP4 GPP_F2/SATAXPCIE5/SATAGP5 GPP_F3/SATAXPCIE6/SATAGP6 GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
THERMTRIP#
PM_SYNC
PLTRST_CPU#
PM_DOWN
change 0227
CHECK NEED PULL HIGH?
3 OF 12PCH1C
3 OF 12PCH1C
PECI
3D3V_S0
G31 H31 C31 B31
G29 E29 C32 B32
F41 E41 B39 A39
D43 E42 A41 A40
H42 H40 E45 F45
K37 G37 G45 G44
AD44 AG36
AG35 AG39 AD35 AD31 AD38 AC43 AB44
W36 W35 W42
AJ3 AL3
H_PM_SYNC_R
AJ4 AK2 AH2
2
SATA_LED#
PCH_THERMTRIP#
SATA_RX_PCH_N0 <63>
SATA_RX_PCH_P0 <63> SATA_TX_PCH_N0 <63> SATA_TX_PCH_P0 <63>
PCIE_RX_PCH_N10 <63>
PCIE_RX_PCH_P10 <63> PCIE_TX_PCH_N10 <63> PCIE_TX_PCH_P10 <63>
SATA_RX_CPU_N2 <60>
SATA_RX_CPU_P2 <60> SATA_TX_CPU_N2 <60>
SATA_TX_CPU_P2 <60>
SATA_RX_CPU_N3 <60>
SATA_RX_CPU_P3 <60> SATA_TX_CPU_N3 <60>
SATA_TX_CPU_P3 <60>
SATAGP0 SATA_LED#
SATAGP0 <63>
eDP_BLCTRL_CPU <55> eDP_BLEN_CPU <24> eDP_VDDEN_CPU <55>
R1603 30R2J-1-GPR1603 30R2J-1-GP
12
eDP_BLEN_CPU eDP_BLCTRL_CPU
MSATA
HDD
ODD
RN1601
RN1601
1 2 3
SRN10KJ-L-GP
SRN10KJ-L-GP
eDP
PCH_PECI <6>
H_PM_SYNC <6>
PLTRST# <6> H_PM_DOWN <6>
RN1602
RN1602
1 2 3
SRN100KJ-6-GP
SRN100KJ-6-GP
1
3D3V_S0
4
4
12
R1601
R1601 1KR2F-L1-GP
1KR2F-L1-GP
A A
PCH_THERMTRIP#
R1602
R1602
620R2F-GP
620R2F-GP
12
EC_SCI#
H_THERMTRIP# <6>
AROUND PCH
5
4
3
R1604
R1604
12
10KR2F-L1-GP
10KR2F-L1-GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
A4
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
PCH_PCIE_SATA
PCH_PCIE_SATA
PCH_PCIE_SATA
Newgate
Newgate
Newgate
16 105
16 105
16 105
1
1M
1M
1M
5
Dr-Bios.com
4
3
2
1
SM_DRAMRST #
GC6_FB_EN_MC P
BB17 AW22
AR15 AV13 BC14
BD23 AL27 AR27 N44 AN24 AY1
BC13 BC15 AV15 BC26 AW15 BD15 BA13
AN15 BD13 BB19 BD19
BD11 BB15 BB13 AT13 AW1 BD26 AM3
AT2 AR3 AR2 AP1 AP2 AN3
RTCRST_O N<24>
1D2V_S3
SM_DRAMRST #
EXT_PWR _GATE#
BATLOW# PM_SUSACK#
PM_SUSACK#
GPD2/LAN_W AKE#
SYS_RESET#
100KR2F-L3-GP
100KR2F-L3-GP
12
R1702
R1702 470R2F-GP
470R2F-GP
R1705
R1705
1 2
0R0402-PAD
0R0402-PAD
PD 0622 change
R1706
R1706
12
0R0402-PAD
0R0402-PAD
PD 0622 change
For AFR
12
R1701
R1701
DDR4_DR AMRST# <12,13>
GC6_FB_EN <78,79,86>
PM_CLKRUN #_EC <24,91>
DGPU_PW ROK <2 4,85,86>
SYS_PWROK <24> PCIE_WAKE# <31,61,63>
PM_SLP_S3# <24,40,53> PM_SLP_S4# <24,40,51>
SUS_CLK_CPU <6 3>
AC_PRESENT <24>
PM_PWRBT N# <24,89>
HDA_SPKR <27> H_PWRG D <6,89>
ITP_PMODE <99> PROC_JTAG X_TCK <6> PROC_JTAG _TMS <6,99> PROC_JTAG _TDO <6 ,99> PROC_JTAG _TDI < 6,99> H_TCK <99>
RTC_RST#_ R
12
R1703
R1703 2K2R2J-L1-GP
2K2R2J-L1-GP
G
RTC_RST#
D
S
EXT_PWR _GATE#
PM_CLKRUN #_EC SYS_RESET#
AC_PRESENT PCIE_WAKE# BATLOW# PM_SUSACK#
GPD2/LAN_W AKE# PM_PWRBT N#
PROC_JTAG _TDO
Q1703
Q1703 2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.2N702.W31
3rd = 84.2N702.W31
3D3V_S5
DY
12
R173420KR2J-L2-GPDYR173420KR2J-L2-GP
3D3V_S0
RN1703
RN1703
1
4
2 3
SRN10KJ-L-G P
SRN10KJ-L-G P
3D3V_S5
RN1704
RN1704
1
8
2
7
3
6
45
SRN10KJ-6-G P
SRN10KJ-6-G P
RN1706
RN1706
1
4
2 3
SRN10KJ-L-G P
SRN10KJ-L-G P
ENG 0428 change
1V_VCCST
R1715
R1715 51R2J-L1-GP
51R2J-L1-GP
1 2
DY
DY
SSID = PCH
HDA_BITCLK_C ODEC<27>
AUD_AZACP U_SCLK<3>
D D
RTC Reset
3D3V_RTC_AU X
RN1705
RN1705
1 2 3
SRN20KJ-1-G P
SRN20KJ-1-G P
C C
B B
3D3V_S5
4
SRTC_RST #
12
SMB_DATA
SMB_CLK
RTC_RST#
12
C1701
C1701
C1703
C1703
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
RN1707
RN1707
8 7 6
SRN2K2J-4-G P
SRN2K2J-4-G P
3D3V_S0
21
G1701
G1701
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
GAP-OPEN
GAP-OPEN
SML1_CLK
1
SMB_DATA
2
SMB_CLK
3
SML1_DATA
45
RN1702
RN1702 SRN2K2J-1-G P
SRN2K2J-1-G P
1 2 3
6
2nd = 75.00601.07C
2nd = 75.00601.07C
3rd = 075.01660.007C
3rd = 075.01660.007C
Q1701
Q1701
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
HDA_SDOU T_CODEC<27>
DM1 & 2 G-SENSOR
EC & GPU
4
1 2345
RN1708
RN1708 SRN33J-5-G P-U
SRN33J-5-G P-U
1 2 3
HDA_RST#_C ODEC<27,28>
HDA_SDIN0_CP U<27>
ME_UNLOCK<24>
HDA_SYNC_C ODEC<27>
AUD_AZACP U_SDO<3>
AUD_AZACP U_SDI<3>
PCH_PW ROK<40>
SML1_CLK<24, 79>
SML1_DATA<24,79>
PCH_SMBDAT A <12,13,69>
PCH_SMBCLK <12,13,69>
4
GPP_C2<22>
GPP_B23<22>
HDA_BITCLK_C PU
AUD_AZAPC H_SCLK
R1713 0R0402-PADR 1713 0R0402-PAD
1 2
PD 0622 change
PD 0622 change
R1711
R1711
1 2
0R0402-PAD
0R0402-PAD
R1727 1KR2F-L1-GPR1727 1KR2F-L 1-GP
1 2
R1712
R1712
1 2
0R0402-PAD
0R0402-PAD
PD 0622 change
DMIC_PCH_DA TA<38> DMIC_CLK_CON _R<38>
SMB_CLK SMB_DATA
R1714
R1714
0R0402-PAD
0R0402-PAD
1 2
3D3V_AUX_S5
R1729
R1729 10KR2F-L1-GP
10KR2F-L1-GP
1 2
1 2
3V_5V_POK_#
HDA_SDOU T_CPU
HDA_BITCLK_C PU HDA_RST#_C PU
HDA_SDOU T_CPU HDA_SYNC_C PU
AUD_AZAPC H_SDO AUD_AZAPC H_SCLK
R1704
R1704 33R2F-L-GP
33R2F-L-GP
PM_RSMRST#
1 2
DMIC_PCH_CLK
R1728
R1728 100KR2F-L3-GP
100KR2F-L3-GP
Q1702
Q1702
6
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
3rd = 075.01660.007C
3rd = 075.01660.007C
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/SSP0_SCLK
AN42
GPP_D7/SSP0_RXD
AM43
GPP_D6/SSP0_TXD
AJ33
GPP_D5/SSP0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PWROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SUNRISE-1-G P
SUNRISE-1-G P
PM_RSMRST# 3V_5V_POK_C
2345 1
PM_RSMRST#
Strap
AUDIO
AUDIO
Strap
Strap
1 2
PD 0622 change
R1733
R1733 10KR2F-L1-GP
10KR2F-L1-GP
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
SPL PCH-H
SPL PCH-H
GPP_G17/ADR_COMPLETE
GPP_A13/SUSWARN#/SUSPWRDNACK
SMBUS
SMBUS
Strap
JTAG
JTAG
Strap
R1731
R1731 1KR2F-L1-GP
1KR2F-L1-GP
12
R1732 0R0402-PADR 1732 0R0402-PAD
12
RSMRST#_KBC <24>
3V_5V_POK <45,52>
4 OF 12PCH1D
4 OF 12PCH1D
GPP_A8/CLKRUN# GPD11/LANPHYPC GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1 GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3# GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAGX JTAG_TMS JTAG_TDO
JTAG_TDI
JTAG_TCK
A A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
PCH_HDA_GPP1_JTAG
PCH_HDA_GPP1_JTAG
PCH_HDA_GPP1_JTAG
Newgate
Newgate
Newgate
1
17 105
17 105
17 105
1M
1M
1M
5
4
3
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size D ocument Num ber Rev
Size D ocument Num ber Rev
Size D ocument Num ber Rev A2
A2
A2
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SSID = PCH
Dr-Bios.com
5
4
3
2
1
6 OF 12PCH1F
MP 0807 change
D D
MP 0807 change
C C
3D3V_S0
R1801
R1801
1 2
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
3D3V_S0 1D0V_S5
RN1802
RN1802
1
8
2
7
3
6
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
RN1805
RN1805
1
4
B B
2 3
SRN10KJ-L-GP
SRN10KJ-L-GP
USB30_TX_CPU_N2<35> USB30_TX_CPU_P2<35> USB30_RX_CPU_N2<35> USB30_RX_CPU_P2<35>
USB30_TX_CPU_N1<35> USB30_TX_CPU_P1<35> USB30_RX_CPU_N1<35> USB30_RX_CPU_P1<35>
USB30_TX_CPU_N5<38> USB30_TX_CPU_P5<38> USB30_RX_CPU_N5<38> USB30_RX_CPU_P5<38>
USB30_TX_CPU_P3<73> USB30_TX_CPU_N3<73> USB30_RX_CPU_P3<73> USB30_RX_CPU_N3<73>
USB30_TX_CPU_P4<73> USB30_TX_CPU_N4<73> USB30_RX_CPU_P4<73> USB30_RX_CPU_N4<73>
PIRQA#
WLAN_CLKREQ_CPU# LAN_CLKREQ_CPU# MSATA_CLKREQ_CPU#
PEG_CLKREQ_CPU# TBT_CLKREQ_CPU#
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SUNRISE-1-GP
SUNRISE-1-GP
LAB2 0401 change
PCH_CPU_NSSC_CLK_DP<6> PCH_CPU_NSSC_CLK_DN<6>
WLAN_CLKREQ_CPU#<61,89>
MSATA_CLKREQ_CPU#<63>
LPC/eSPI
LPC/eSPI
SPL PCH-H
SPL PCH-H
USB
USB
SATA
SATA
PCH_CPU_BCLK_DP<6> PCH_CPU_BCLK_DN<6>
R1806
R1806 2K7R2F-GP
2K7R2F-GP
12
PEG_CLKREQ_CPU#<76>
LAN_CLKREQ_CPU#<31>
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
CPU_XTAL_24M_OUT CPU_XTAL_24M_IN
XCLK_BIASREF XTL_32K_X1_CPU
XTL_32K_X2_CPU
TBT_CLKREQ_CPU#
CHECK WITH SW( VGA)
LAB2 0401 change
C1803
C1803 SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
12
X1802
X1802
NC#2
1 2 3
INPUT/OUTPUT#1 INPUT/OUTPUT#3
XTAL-24MHZ-135-GP
XTAL-24MHZ-135-GP
082.30006.0041
082.30006.0041
C1804
C1804 SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
12
A A
ENG 0417 change
CPU_XTAL_24M_IN
12
R1808
R1808 1MR2F-L-GP
1MR2F-L-GP
CPU_XTAL_24M_OUT
R1807
R1807 10MR2J-L-GP
10MR2J-L-GP
1 2
X1801
X1801
41
12
C1801
C1801
SC4D7P50V2BN-GP
SC4D7P50V2BN-GP
2 3
XTAL-32D768KHZ-6-GP
XTAL-32D768KHZ-6-GP
82.30001.B21
82.30001.B21
XTL_32K_X1_CPU
XTL_32K_X2_CPU
12
C1802
C1802
SC4D7P50V2BN-GP
SC4D7P50V2BN-GP
6 OF 12PCH1F
GPP_A6/SERIRQ
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2 GPP_E5/DEVSLP1 GPP_E4/DEVSLP0 GPP_F9/DEVSLP7 GPP_F8/DEVSLP6 GPP_F7/DEVSLP5 GPP_F6/DEVSLP4 GPP_F5/DEVSLP3
AT22 AV22 AT19 BD16
BE16 BA17
PIRQA#
AW17 AT17 BC18
LPC_CLK_CPU_P0
BC17
LPC_CLK_CPU_P1
AV19 M45
N43
AE45 AG43 AG42 AB39 AB36 AB43 AB42 AB41
AR17
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC#
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK#
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SUNRISE-1-GP
SUNRISE-1-GP
LAB2 0410 change
5
4
3
GPIO REVIEW CHECK
LPC_AD_CPU_P0 <24,68,91> LPC_AD_CPU_P1 <24,68,91> LPC_AD_CPU_P2 <24,68,91> LPC_AD_CPU_P3 <24,68,91>
LPC_FRAME#_CPU <24,68,91> INT_SERIRQ <24,91>
H_RCIN# <24> PM_SUS_STAT# <91>
GPIO REVIEW CHECK
DEVSLP_PCH <63>
SPL PCH-H
SPL PCH-H
CLKOUT_CPUPCIBCLK#
CLKOUT_CPUPCIBCLK_P
7 OF 12PCH1G
7 OF 12PCH1G
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5
CLKOUT_PCIE_N6 CLKOUT_PCIE_P6
CLKOUT_PCIE_N7 CLKOUT_PCIE_P7
CLKOUT_PCIE_N8 CLKOUT_PCIE_P8
CLKOUT_PCIE_N9 CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
LPC_CLK_CPU_P0
LPC_CLK_CPU_P1
L1 L2
J1 J2
N7 N8
L7 L5
D3 F2
E5 G4
D5 E6
D8 D7
R8 R7
U5 U7
W10 W11
N3 N2
P3 P2
R3 R4
2
3D3V_S0
RN1806
INT_SERIRQ H_RCIN#
RN1806
1
4
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
R1809 22R2J-L1-GPR1809 22R2J-L1-GP
12
R1810 22R2J-L1-GPR1810 22R2J-L1-GP
12
LPC_CLK_KBC <24> LPC_CLK_DBG <68>
ENG 0417 change
R1805
R1805 22R2J-L1-GP
22R2J-L1-GP
TPM
TPM
12
LPC_CLK_TPM <91>
ENG 0417 change
PEG CLOCK CHECK WITH SW
CHECK P and N
PCH_CPU_PCIBCLK_R_DN <6> PCH_CPU_PCIBCLK_R_DP <6>
PEG_CLK_CPU# <76> PEG_CLK_CPU <76>
WLAN_CLK_CPU# <61,89> WLAN_CLK_CPU <61,89>
LAN_CLK_CPU# <31> LAN_CLK_CPU <31>
LAB2 0401 change
MSATA_CLK_CPU# <63> MSATA_CLK_CPU <63>
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH_USB3_CLOCK
PCH_USB3_CLOCK
PCH_USB3_CLOCK
Tuesday, August 18, 2015
Tuesday, August 18, 2015
Tuesday, August 18, 2015
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
1
18 105
18 105
18 105
1M
1M
1M
5
Dr-Bios.com
SSID = PCH
D D
eDP_HPD_CPU<55>
R1904
R1904
1 2
10KR2F-L1-GP
10KR2F-L1-GP
3D3V_S5
RN1904
RN1904
1 2 3
SRN10KJ-L-GP
C C
3D3V_S0
SRN10KJ-L-GP
RN1901
RN1901
4
SRN2K2J-5-GP
SRN2K2J-5-GP
DGPU_PW R_EN#
RTC_DET#
4
GPU_EVENT#
23 1
I2C1_CLK_CPU I2C1_DATA_CPU
PSW_CLR#
21
Pass Word Clear
G1901
G1901 GAP-OPEN
GAP-OPEN
GPP_B22/GSPI1_MOSI<22>
GPP_B18/GSPI0_MOSI<22>
GPU_EVENT#<79>
TOUCH PAD
B B
3D3V_S0
R1903 49K9R2F-L-GP
R1903 49K9R2F-L-GP
1 2
R1909 49K9R2F-L-GP
R1909 49K9R2F-L-GP
1 2
R1910 49K9R2F-L-GP
R1910 49K9R2F-L-GP
1 2
R1911 49K9R2F-L-GP
R1911 49K9R2F-L-GP
1 2
DEBUG
DEBUG DEBUG
DEBUG DEBUG
DEBUG DEBUG
DEBUG
AW4
GPP_I0/DDPB_HPD0
AY2
GPP_I1/DDPC_HPD1
AV4
GPP_I2/DDPD_HPD2
BA4
GPP_I3/DDPE_HPD3
BD7
GPP_I4/EDP_HPD
SUNRISE-1-GP
SUNRISE-1-GP
DGPU_PW R_EN#<86> RTC_DET#<25>
CCD_PW R_EN<38>
LAB2 0323 change
ENG 0428 change
I2C1_CLK_CPU<65>
I2C1_DATA_CPU<65>
LPSS_UART2_CTS# LPSS_UART2_RTS# LPSS_UART2_TXD LPSS_UART2_RXD
4
PSW_CLR#
LPSS_UART2_CTS# LPSS_UART2_RTS# LPSS_UART2_TXD LPSS_UART2_RXD
SPL PCH-H
SPL PCH-H
Strap Strap Strap
AT29 AR29 AV29 BC27
BD28 BD27
AW27
AR24 AV44
BA41 AU44 AV43
AU41
AT44
AT43 AU43
AN43 AN44 AR39 AR45
AR41 AR44 AR38
AT42 AM44
AJ44
5 OF 12PCH1E
5 OF 12PCH1E
GPP_F14 GPP_F23 GPP_F22
GPP_G23 GPP_G22 GPP_G21 GPP_G20 GPP_H23
BB3 BD6 BA5 BC4 BE5 BE6
Y44 V44 W39
L43 L44 U35 R35 BD36
Strap
Strap
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
GPP_B22/GSPI1_MOSI GPP_B21/GSPI1_MISO GPP_B20/GSPI1_CLK GPP_B19/GSPI1_CS#
GPP_B18/GSPI0_MOSI GPP_B17/GSPI0_MISO GPP_B16/GSPI0_CLK GPP_B15/GSPI0_CS#
GPP_C9/UART0_TXD GPP_C8/UART0_RXD GPP_C11/UART0_CTS# GPP_C10/UART0_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C23/UART2_CTS# GPP_C22/UART2_RTS# GPP_C21/UART2_TXD GPP_C20/UART2_RXD
GPP_C19/I2C1_SCL GPP_C18/I2C1_SDA GPP_C17/I2C0_SCL GPP_C16/I2C0_SDA
GPP_D4/ISH_I2C2_SDA GPP_D23/ISH_I2C2_SCL
SUNRISE-1-GP
SUNRISE-1-GP
SPL PCH-H
SPL PCH-H
3
3D3V_S0
4
RN1902
RN1902 SRN2K2J-5-GP
SRN2K2J-5-GP
1
2 3
11 OF 12PCH1K
11 OF 12PCH1K
GPP_D9 GPP_D10 GPP_D11 GPP_D12
GPP_D16/ISH_UART0_CTS# GPP_D15/ISH_UART0_RTS#
GPP_D14/ISH_UART0_TXD GPP_D13/ISH_UART0_RXD
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5 GPP_A22/ISH_GP4 GPP_A21/ISH_GP3 GPP_A20/ISH_GP2 GPP_A19/ISH_GP1 GPP_A18/ISH_GP0 GPP_A17/ISH_GP7
DDI2_TBT_DATA_CPU <22>HDMI_DET_CPU<57> HDMI_CLK_CPU <57> HDMI_DATA_CPU <57>
DDPD_DATA_CPU <22>
LAB2 0401 change
AL44 AL36 AL35 AJ39
AJ43 AL43 AK44 AK45
BC38 BB38
BD38 BE39
BC22 BD18 BE21 BD22 BD21 BB22
TBT_PRESENT#
BC19
2
GSENSOR_INT# <69>
LAB2 0407 change
PSW_CLR#
R1906
R1906
1 2
10KR2F-L1-GP
10KR2F-L1-GP
TBT_PRESENT#
3D3V_S0
3D3V_S5
R1908
R1908 10KR2J-3-GP
10KR2J-3-GP
1 2
R1907
R1907 10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
LAB2 0407 change
1
5V_S5
LPSS_UART2_TXD LPSS_UART2_RXD
A A
ACES-CON4-37-GP
ACES-CON4-37-GP
5
DEBUG2
DEBUG2
1 2
3 4
56
20.F1897.004
20.F1897.004
DEBUG
DEBUG
ENG 0505 change
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
PCH_GPP2_GPP3
PCH_GPP2_GPP3
PCH_GPP2_GPP3
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Taipei Hsien 221, Taiwan, R.O.C.
Newgate
Newgate
Newgate
1
19 105
19 105
19 105
1M
1M
1M
5
Dr-Bios.com
SSID = PCH
4
3
2
1
AL22 BA24
BA31 BC42
BD40 AJ41 AL41 AD41 AN5
AD15 AD13 BA20 BA22 BA26
AJ20 AJ21 AJ23 AJ25
BE41 BE43 BE42
BC44 BA45 BC45 BB45
BD3 BE3 BE4
1D0V_S5
3D3V_S5
1D0V_S5
3D3V_S0
3D3V_S5
3D3V_RTC_AUX
DCPRTC
1D0V_S5
3D3V_S5
3D3V_S5
1D0V_S5
D D
AA23
VCCPRIM_1P0_AA23
AA26
VCCPRIM_1P0_AA26
AA28
VCCPRIM_1P0_AA28
AC23
VCCPRIM_1P0_AC23
AC26
VCCPRIM_1P0_AC26
AC28
1V_DCPDSW
1D0V_S5
C C
3D3V_S5
B B
VCCPRIM_1P0_AC28
AE23
VCCPRIM_1P0_AE23
AE26
VCCPRIM_1P0_AE26
Y23
VCCPRIM_1P0_Y23
Y25
VCCPRIM_1P0_Y25
BA29
DCPDSW_1P0
N17
VCCCLK1
R19
VCCCLK3
U20
VCCCLK4
V17
VCCCLK2
R17
VCCCLK6
K2
VCCCLK5_K2
K3
VCCCLK5_K3
U21
VCCMPHY_1P0_U21
U23
VCCMPHY_1P0_U23
U25
VCCMPHY_1P0_U25
U26
VCCMPHY_1P0_U26
V26
VCCMPHY_1P0_V26
A43
VCCMPHYPLL_1P0_A43
B43
VCCMPHYPLL_1P0_B43
C44
VCCPCIE3PLL_1P0_C44
C45
VCCPCIE3PLL_1P0_C45
V28
VCCAPLLEBB_1P0
AC17
VCCPRIM_1P0_AC17
AJ5
VCCUSB2PLL_1P0_AJ5
AL5
VCCUSB2PLL_1P0_AL5
AN19
VCCHDAPLL_1P0
BA15
VCCHDA
W15
VCCDSW_3P3_W15
SUNRISE-1-GP
SUNRISE-1-GP
SPL PCH-H
SPL PCH-H
CORE
CORE
MPHY
MPHY
USB
USB
VCCPRIM_1P0_AL22 VCCDSW_3P3_BA24
VCCGPIO
VCCGPIO
VCCPGPPBH_BC42 VCCPGPPBH_BD40
VCCPGPPEF_AJ41 VCCPGPPEF_AL41
VCCPRIM_3P3_AN5
VCCPRIM_1P0_AD15
VCCRTCPRIM_3P3
VCCPRIM_1P0_AJ20 VCCPRIM_1P0_AJ21 VCCPRIM_1P0_AJ23 VCCPRIM_1P0_AJ25
VCCPGPPCD_BC44 VCCPGPPCD_BA45 VCCPGPPCD_BC45 VCCPGPPCD_BB45
VCCPRIM_3P3_BD3
VCCPRIM_3P3_BE3 VCCPRIM_3P3_BE4
8 OF 12PCH1H
8 OF 12PCH1H
VCCPGPPA
VCCPGPPG
VCCATS VCCRTC
DCPRTC
VCCSPI_BE41 VCCSPI_BE43 VCCSPI_BE42
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
PCH_POWER_VCCPRIM_VCCMPHY
PCH_POWER_VCCPRIM_VCCMPHY
PCH_POWER_VCCPRIM_VCCMPHY
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
5
4
A4
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Newgate
Newgate
Newgate
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1M
1M
20 105
20 105
20 105
1
1M
5
Dr-Bios.com
SSID = PCH
4
3
2
1
DcpDSW
D D
1x 1uF
12
C2101
C2101
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C C
VccMPHYPLL / VccPCIE3PLL 1x1 uF
1D0V_S5
12
C2103
C2103
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
12
C2102
C2102
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
VccRTC 1x1 uF 1x0.1 uF
3D3V_RTC_AUX DCPRTC1V_DCPDSW
12
C2106
C2106
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
near BA22
VccATS 1x1 uF
3D3V_S0
12
C2110
C2110
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C2107
C2107
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VccRTCPRIM 1x1 uF 1x0.1 uF
3D3V_S5
12
12
C2108
C2108
C2109
C2109
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
near BA20
VccMPHY / VccPRIM / VccAPLLEBB 1x1 uF 1x22 uF
1D0V_S5
12
C2104
C2104
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C2105
C2105
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DcpRTC 1x 0.1uF
near BA26near BA29
VccDSW 1x 1uF
3D3V_S5
DY
DY
12
C2111
C2111
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C2112
C2112
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
B B
near A43near K2
near AD13
near U21
near W15
VccPGPPBCH / VccPGPPEF / VccPGPPG / VccPRIM 4x 0.1 uF
3D3V_S5
12
C2113
C2113
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
A A
DY
near BC42 near AD41
12
C2114
C2114
DY
DY
near AJ41
5
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
12
DY
DY
C2115
C2115
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
12
C2116
C2116
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
near AN5
4
3
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
A4
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Wednesday, August 12, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
PCH_POWER_CAP1
PCH_POWER_CAP1
PCH_POWER_CAP1
Newgate
Newgate
Newgate
21 105
21 105
21 105
1
1M
1M
1M
SSID = PCH
Dr-Bios.com
5
4
3
2
1
D D
Description
GPIO GPP_B22
Display Port B Detected
GPP_I6
Pull up at p.71 RN7101
Schematic
High
Low
C C
Description
GPIO
Detected
Not Detected
internal pull-down internal pull-down internal pull-down internal pull-down internal pull-down
Top Swap Override
GPP_B14
Schematic
B B
Display Port C Detected
GPP_I8
3D3V_S0
R2208
R2208 2K2R2J-L1-GP
2K2R2J-L1-GP
DY
DY
1 2
LAB2 0401 change
DDI2_TBT_DAT A_CPU <19>
Detected
Not Detected
eSPI or LPC
GPP_C5
Display Port D Detected
GPP_I10
3D3V_S0 3D3V_S0 3D3V_S5
R2201
R2201 2K2R2J-L1-GP
2K2R2J-L1-GP
DY
DY
1 2
DDPD_DAT A_CPU <19> GPP_B18/GSPI0_MOSI <19> GPP_B22/GSPI1_MOSI <19>
Detected
Not Detected
No reboot
GPP_B18
12
R2202
R2202 4K7R2J-L-GP
4K7R2J-L-GP
DY
DY
Enable
Disable
internal pull-down
3D3V_S5
12
R2204
R2204 4K7R2J-L-GP
4K7R2J-L-GP
DY
DY
TLS Confi­dentiality
GPP_C2
GPP_C2 <17> SPI_SI_CPU <14> SPI_SO_CPU <14>
Reserved
SPI0_IO3
3D3V_S5
RN2201
RN2201
1 2 3
SRN1KJ-7-G P
SRN1KJ-7-G P
PD 0703 change
4
Boot BIOS strap bit BBS
12
R2203
R2203 4K7R2J-L-GP
4K7R2J-L-GP
DY
DY
Reserved
SPI0_IO2
SPI_IO3_ROM <14,25> SPI_IO2_ROM <14,25>
Flash descriptor security override
LPC
SPI
Reserved
SPI0_MOSI
3D3V_S5 3D3V_S5
R2205
R2205 20KR2F-L-GP
20KR2F-L-GP
DY
DY
1 2
HDA_SDO
Disable
Enable
R2206
R2206 20KR2F-L-GP
20KR2F-L-GP
1 2
Reserved
SPI0_MISO
DY
DY
ESPI FLASH SHARING MODE
GPP_H12
1:SLAVE ATTACEHD FLASH SHARING ESPI FLASH SHARING MODE
0: MASTER ATTACHED FLASH SHARING
internal pull-down
Reserved
GPP_B23
3D3V_S5
12
R2207
R2207 4K7R2J-L-GP
4K7R2J-L-GP
DY
DY
GPP_B23 <17>
High
Low
Enable
Disable
internal pull-down
A A
5
eSPI
LPC
internal pull-down
4
Enable
Disable
internal pull-down
internal pull-up internal pull-up
3
internal pull-up internal pull-up
2
internal pull-down
Wistron Confidential document, Anyone can not
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size D ocument Num ber Rev
Size D ocument Num ber Rev
Size D ocument Num ber Rev A2
A2
A2 Date: Sheet of
Date: Sheet of
Date: Sheet of
Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
Taipei Hsie n 221, Taiwan, R.O.C .
PCH_STRAP
PCH_STRAP
PCH_STRAP
Newgate
Newgate
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Thursday, Augus t 13, 2015
Newgate
1
22 105
22 105
22 105
1M
1M
1M
5
Dr-Bios.com
4
3
2
1
SSID = PCH
9 OF 12PCH1I
9 OF 12PCH1I
SPL PCH-H
AN4
BE9 C10
C2 C28 C37
J7 K10 K27 K33 K36
K4 K42 K43
L12 L13 L15
L4
L41
L8 M35 M42 N10 N15 N19 N22 N24 N35 N36
N4
N41
N5 P17 P19 P22 P45 R10 R14 R22 R29 R33 R38
R5
T1 T2
T4 Y18 Y20 Y21 Y26 Y28 Y29
A18 A25 A32 A37
AA4
SUNRISE-1-GP
SUNRISE-1-GP
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SPL PCH-H
AR5
VSS
AR7
VSS
U15
VSS
AL4
VSS
AE29
VSS
AE4
VSS
AE42
VSS
AF18
VSS
AF20
VSS
AF21
VSS
AF23
VSS
AF25
VSS
AF26
VSS
AF28
VSS
AF29
VSS
AG11
VSS
AG13
VSS
AG31
VSS
AG32
VSS
AG33
VSS
AG38
VSS
AG4
VSS
AH1
VSS
AH17
VSS
AH18
VSS
AH20
VSS
AH21
VSS
AH23
VSS
AH25
VSS
AH26
VSS
AH28
VSS
AH29
VSS
AH45
VSS
AJ10
VSS
AJ14
VSS
AJ15
VSS
AJ17
VSS
AJ18
VSS
AJ26
VSS
AJ28
VSS
AJ29
VSS
AJ31
VSS
AJ32
VSS
AJ36
VSS
AK4
VSS
AK42
VSS
AU7
VSS
AV17
VSS
AV24
VSS
AV27
VSS
AV31
VSS
AV33
VSS
AV6
VSS
AW13
VSS
AW19
VSS
AW29
VSS
AW37
VSS
AW9
VSS
AY38
VSS
AY45
VSS
B25
VSS
B3
VSS
B37
VSS
B40
VSS
B6
VSS
BA1
VSS
BB11
VSS
BB16
VSS
BB21
VSS
BB25
VSS
BB30
VSS
BB34
VSS
BC2
VSS
BD43
VSS
5
C42 D10 D12 D15 D16 D17 D19 D21 D24 D25 D27 D29 D30 D31 D33 D35 D36 E13 E15 E31 E33 F44
G42 H17
H19 H22 H24 H27 H29
H35
T42 U10 U11 U14 U17 U18 U28 U29 U31 U32 U33 U38
V18 V20 V21 V23 V25 V29
V45 W14 W31 W32 W33 W38
Y17
J10 J11
J39
W4 W8
F8
G9
H3
J3 J5
U4 U8
V3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SUNRISE-1-GP
SUNRISE-1-GP
4
AC18
D D
C C
B B
A A
AN10 BE14 BE18 BE23 BE28 BE32 BE37 BE40
AA17 AA18 AA20 AA21 AA25 AA29
AA42 AB10
SPL PCH-H
SPL PCH-H
12 OF 12PCH1L
12 OF 12PCH1L
AB11
VSS
AB7
VSS
AB14
VSS
AB31
VSS
AB32
VSS
AB38
VSS
AB4
VSS
AB5
VSS
AC1
VSS
AC20
VSS
AC21
VSS
AC25
VSS
AC29
VSS
AC45
VSS
AB8
VSS
AD11
VSS
AD14
VSS
AB15
VSS
AD32
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AD33 AD36 AD4 AD8 AE18 AE20 AE21 AE25 AE28 AL10 AL11 AL13 AL17 AL19 AL24 AL29 AL32 AL33 AL38 AM15 AM17 AM19 AM22 AM24 AM27 AM29 AM45 AN11 AN22 AN27 AN31 AN39 AN7 AN8 AP11 AP4 AR33 AR34 AR42 AR9 AT10 AT15 AT36 AT9 AU1 AU35 AU36 AU39 AU45 C4
SPL PCH-H
SPL PCH-H
BD2
VSS_BD2
BD45
VSS_BD45
BD44
VSS_BD44
BE44
VSS_BE44
D45
VSS_D45
A42
VSS_A42
B45
VSS_B45
B44
VSS_B44
A4
VSS_A4
A3
VSS_A3
B2
VSS_B2
A2
VSS_A2
B1
VSS_B1
BB1
VSS_BB1
BC1
VSS_BC1
A44
VSS_A44
C1
RSVD_C1
D1
RSVD_D1
SUNRISE-1-GP
SUNRISE-1-GP
3
10 OF 12PCH1J
10 OF 12PCH1J
RSVD_AR22
RSVD_W13
RSVD_U13 RSVD_P31
RSVD_N31 RSVD_P27
RSVD_R27 RSVD_N29 RSVD_P29
RSVD_AN29
RSVD_R24 RSVD_P24
PREQ# PRDY#
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
AR22 W13 U13
P31 N31
P27 R27 N29 P29 AN29 R24 P24
AT3 AT4 AY5
PCH_2_CPU_TRIGGER_R
AL2 AK1
2
XDP_PREQ# <6,99> XDP_PRDY# <6,99>
R2301
R2301
12
30R2J-1-GP
30R2J-1-GP
SA
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev B
B
B
Thursday, August 13, 2015
Thursday, August 13, 2015
Thursday, August 13, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
󵦠󴪒
PCH_RSVD_VSS
PCH_RSVD_VSS
PCH_RSVD_VSS
Newgate
Newgate
Newgate
PROC_TRST# <6,99>
PCH_2_CPU_TRIGGER <8>
CPU_2_PCH_TRIGGER <8>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
23 105
23 105
23 105
1
1M
1M
1M
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