1
2
3
4
5
6
7
8
ZGQ CFL-H/K +1070 MAX-P SYSTEM DIAGRAM
SODIMM0
Max. 16GB
A A
RVS H9.2
SODIMM1
Max. 16GB
RVS H5.2
SODIMM0
Max. 16GB
RVS H4.0 or 5.2
2400MT/s
DDR4
Channel A
2400MT/s
DDR4
Channel B
INTEL
Coffee Lake H
Processor : 6+2
Power : 45 (Watt)
Package : BGA1440
Size : 42 x 28 x 1.5 (mm)
PEG
X16 Lanes
NVIDIA N17E-G2
Package 37.5 x 37.5mm
115W/125W
VRAM GDDR5 * 8 pcs -- N17E-G2
27MHz
HDMI2.0
Display port
01
SODIMM1
Max. 16GB
STD H4.0 or 5.2
PCI-E x 1
B
LAN
Killer E2500
Port14
Port15
WLAN +BT
USB 2.0
CNVI
CNL PCH
Cable
HDD
NGFF SSD #1
SATA/PCIE SSD
C C
NGFF SSD #2
PCIE SSD
TP
Power / Battery LED
Macro Key LED
KBC
ITE IT8987E/BX
MCU PWM/LED Driver
ENE 6K5130
ROM
SATA 6GB/s
PCIE x 4
SATA 6GB/s
PCIE x 4
SATA 6GB/s
SPI
LPC
CPU FAN
GPU FAN
DMI
Package : FCBGA837
Size : 23 x 23 (mm)
AUDIO
CODEC
ALC299
eDP re-driver IC
TUSB546-DCI
USB2.0
DP re-driver
TUSB546-DCI*2
PCIE 4 Lanes
DSL6540-SLL44
TBT(Apline Ridge)
USB 3.0
USB 2.0
Azalia
USB3.0 Ports
X1
BC1.2
SLGC55544CVTR
PORT1,2,3
USB3.0 Ports
CIO_TX_RX (DP/USB3.1)
I2C
AUX /LS/SPI
Webcam
PORT6
PORT4
Tobii
X2
SubWoofer
ALC105
Speaker
17.3
eDP Panel FHD/UHD
USB type C PD
TI
TPS65982*2
Metal
Keyboard
PORT7
CC1/CC2
SBU1/SBU2
XBOX
USB TypeC X2
PORT8
Speaker
HP AMP
D D
PWM IC for LED
P2501NHC0
MIC
RGB/Daul KB
1
2
3
4
SV3H715+SV3S700A
HP
Daughter board
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
5
6
Date: Sheet
7
PROJECT :
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
ZGQ
ZGQ
ZGQ
8
1A
1A
17 3 Monday, March 12, 2018
17 3 Monday, March 12, 2018
17 3 Monday, March 12, 2018
1A
of
of
B
5
R884
*4.7K_1%_4
Q90A
*PJX138K
R813
R809 *0_4
*Short_0402
R855
R853 220/F_4
5
2
*Short_0402
*Short_0402
+3V
R880
*360_1%_6
2
1
6 1
LED1
*WHITE
Q90B
*PJX138K
+VCCST
+VCCST
+VCCST
3
5
4
PCH_PECI 11
EC_PECI 49
modify 8/9
R854
*54.9/F_4
R856
56.2/F_4
C1185
*0.1U/16V_4
R851
100/F_4
R852
PROCPWRGD
+VCCST +3V_DEEP_SUS
R817
4.7K/F_4
6 1
2
Q84A
PJX138K
PROCPWRGD (50ohm)
Trace Length: 1~11.25 inches
PM_SYNC (50ohm)
Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
Close to CPU
SVID CLK
VR_SVID_CLK 61
Close to CPU
SVID ALERT
VR_SVID_ALERT# 61
Close to CPU
SVID DATA
*Short_0402
VR_SVID_DATA 61
C1396
220p/50V_4
modify 8/9
R810
1K/F_4
H_VCCST_PWRGD
Q84B
PJX138K
For debug only remove from MV
+3V
D D
CATERR#
C C
CPU CORE SVID
Layout note:
1.Need routing together
2.ALERT need between CLK and DATA.
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
B B
CLOSE TO CPU
PLACE THE PU RESISTORS
CLOSE TO CPU
PLACE THE PU RESISTORS
A A
5
HWPG 49
PECI
VR_SVID_CLK_R
H_CPU_SVIDALRT#
3 4
+VCCIO
R863 13/F_4
R379
H_CPU_SVIDDAT
4
CLK_CPU_BCLKP 11
CLK_CPU_BCLKN 11
CPU_PCI_BCLKP 11
CPU_PCI_BCLKN 11
CLK_DPLL_NSCCLKP 11
Host CLK:
Trace length < 11000 mils
Trace spacing = 15 / 20 mils, Impendence 85 ohm
CLK_DPLL_NSCCLKN 11
EMI RESERVE
VCCST_PWRGD
EC7 *10P/50V/C0G_4
R814 60.4/F_4
CPU_PLTRST#R 11
PM_SYNC 11
H_PM_DOWN 11
C1082
0.1U/16V_4
SKTOCC_N_R 13
THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches
IMVP_P WRGD 10,61
SYS_SHDN# 49,58,64
PM_THRMTRIP# 11,17,18,19,20,50
PROCPWRGD 10
R859 20_4
SKTOCC_N_R
R864
TP64
+VCCST
R825 *100K_1%_4
R821
1K/F_4
Ra Not install in SKL-H
+VCCST
Ra
R878
*10K/F_4
PROC_SEL#
R870
*0_4
4
3
CFL-H Processor (CLK,MISC,JTAG)
CLK_CPU_BCLKP
CLK_CPU_BCLKN
CPU_PCI_BCLKP
CPU_PCI_BCLKN
CLK_DPLL_NSCCLKP
CLK_DPLL_NSCCLKN
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_PROCHOT#_CPU
DDR_PG_CNTL
VCCST_PWRGD
PROCPWRGD
CPU_PLTRST#R
H_PM_DOWN_R
PECI
THERM TRIP#
SKTOCC_N
*Short_0402
PROC_SEL#
CATERR#
R874 49.9_1 %_6
modify 8/9
+VCCST
3
Q85
2
DMG301NU-7
1
R822
1K/F_4
2
Q86
1 3
THERM TRIP#
METR3904-G
R823
*Short_0402
U22E
B31
BCLKP
A32
BCLKN
D35
PCI_BCLKP
C36
PCI_BCLKN
E31
CLK24P
D31
CLK24N
BH31
VIDALERT#
BH32
VIDSCK
BH29
VIDSOUT
BR30
PROCHOT#
BT13
DDR_VTT_CNTL
H13
VCCST_PWRGD
BT31
PROCPWRGD
BP35
RESET#
BM34
PM_SYNC
BP31
PM_DOWN
BT34
PECI
J31
THERMTRIP#
BR33
SKTOCC#
BN1
PROC_SELECT#
BM30
CATERR#
AT13
ZVM#
AW13
MSM#
AU13
RSVD#AU13
AY13
RSVD#AY13
CPU_CFL-H_1440P
Note: please keep plane is enough for VDDQ 2.8A
Placement cl ose to CPU.
+1.2VSUS
DDR_PG_CNTL
PROCHOT# (50ohm)
Trace Length <11 inches
Cb need placment near VR
modify 8/9
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
5 OF 13
C255 0.1u/16V_4
C256 *0.1U/ 16V_4
R868 10K/F_4
+VCCSTG
H_PROCHOT# 49,57,61
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_17
CFG_16
CFG_19
CFG_18
BPM#_0
BPM#_1
BPM#_2
BPM#_3
EMI RESERVE
EC8 *10P/50V/C0G_4
3
BN25
CFG0
BN27
CFG1
BN26
CFG2
BN28
CFG3
BR20
CFG4
BM20
CFG5
BT20
CFG6
BP20
CFG7
BR23
CFG8
BR22
CFG9
BT23
CFG10
BT22
CFG11
BM19
CFG12
BR19
CFG13
BP19
CFG14
BT19
CFG15
BN23
CFG17
BP23
CFG16
BP22
CFG19
BN22
CFG18
XDP_BPM0
BR27
XDP_BPM1
BT27
XDP_BPM2
BM31
XDP_BPM3
BT30
H_TDO
BT28
H_TDI
BL32
H_TMS
BP28
H_TCK
BR28
H_TRST#
BP30
H_PREQ#
BL30
H_PRDY#
BP27
CFG_RCOMP
BT25
Design Note(CFG_RCOMP):
DEFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)
+3V_DEEP_SUS
R888
10K/F_4
3
2
Q88
METR3904-G
1
R869
100K/F_4
R873 1K/F_4
CFG0 16
CFG1 16
CFG2 16
CFG3 16
CFG4 16
CFG5 16
CFG6 16
CFG7 16
CFG8 16
CFG9 16
CFG10 16
CFG11 16
CFG12 16
CFG13 16
CFG14 16
CFG15 16
CFG17 16
CFG16 16
CFG19 16
CFG18 16
XDP_BPM0 16
XDP_BPM1 16
TP63
TP65
H_TDO 10,16
H_TDI 10,16
H_TMS 10,16
H_TCK 10,16
H_TRST# 15,16
H_PREQ# 15,16
H_PRDY# 15,16
R858 49.9/F_4
+3V_DEEP_SUS
3
2
1
R857 499/F_4
R879
10K/F_4
Q91
2N7002KTB
Modify 8/10
H_PROCHOT#_CPU
C1184
0.1u/16V_4
2
R877
100K_1%_4
H_PROCHOT#_CPU
2
The CFG signals have a default value of '1' if not terminated on the board.
DDR_VTTT_PG_CTRL 60
1
Processor pull-up (CPU)
H_TDO
R872 100/F_4
H_TMS
R860 51_4
H_TDI
R882 51_4
H_PREQ#
R883 *56.2/F_4
H_TCK
R871 51_4
H_TRST#
R865 *51_4
Processor Strapping
CFG2
R861 1K/F_4
CFG4
R866 *1K/F_4
CFG5
R862 *1K/F_4
CFG6
R867 *1K/F_4
Contiguration Signals: The CFG signals
have a default value of '1' if not
terminated
on the board. Refer to the appropriate
platform design guide for pull-down
recommendations when a logic low is
desired.
Intel recommends placing test points on
the
board for CFG pins.
. CFG[0]:Stall reset sequence after PCU
PLL lock until de-asserted:
-1=(Default) Normal Operation;
No stall.
-0=Stall.
.CFG[1]:Reserved configuration lane.
.CFG[2]:PCI Express*Static x16 Lane
Numbering Reversal.
-1=Normal operation
-0=Lane numbers reversed.
.CFG[3]:Reserved configuration lane.
.CFG[4]:eDP enable:
-1=Disabled.
-0=Enabled.
.CFG[6:5]:PCI Express* Bifurcation
-00=1x8,2x4 PCI Express*
-01=reserved
-10=2x8 PCI Express*
-11=1x16 PCI Express*
.CFG[7]:PEG Training:
-1=(default) PEG Train
immediately following RESET# de
assertion.
-0=PEG Wait for BIOS for
assertion.
.CFG[19:8]:Reserved configuration
lanes.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT :
CFL 1/7 (JTAG/MISC)
CFL 1/7 (JTAG/MISC)
CFL 1/7 (JTAG/MISC)
1
+VCCST
modify 8/9
ZGQ
ZGQ
ZGQ
27 3 Monday, March 12, 2018
27 3 Monday, March 12, 2018
27 3 Monday, March 12, 2018
02
of
1A
1A
1A
5
4
3
2
1
CFL Processor (DMI,PEG,FDI)
U22C
PEG_RXP15 21
D D
C C
B B
+VCCIO
DMI RX
PEG_RXN15 21
PEG_RXP14 21
PEG_RXN14 21
PEG_RXP13 21
PEG_RXN13 21
PEG_RXP12 21
PEG_RXN12 21
PEG_RXP11 21
PEG_RXN11 21
PEG_RXP10 21
PEG_RXN10 21
PEG_RXP9 21
PEG_RXN9 21
PEG_RXP8 21
PEG_RXN8 21
PEG_RXP7 21
PEG_RXN7 21
PEG_RXP6 21
PEG_RXN6 21
PEG_RXP5 21
PEG_RXN5 21
PEG_RXP4 21
PEG_RXN4 21
PEG_RXP3 21
PEG_RXN3 21
PEG_RXP2 21
PEG_RXN2 21
PEG_RXP1 21
PEG_RXN1 21
PEG_RXP0 21
PEG_RXN0 21
R828 24.9/F_4
DMI_RXP0 9
DMI_RXN0 9
DMI_RXP1 9
DMI_RXN1 9
DMI_RXP2 9
DMI_RXN2 9
DMI_RXP3 9
DMI_RXN3 9
PEG_COMP
E25
PEG_RXP_0
D25
PEG_RXN_0
E24
PEG_RXP_1
F24
PEG_RXN_1
E23
PEG_RXP_2
D23
PEG_RXN_2
E22
PEG_RXP_3
F22
PEG_RXN_3
E21
PEG_RXP_4
D21
PEG_RXN_4
E20
PEG_RXP_5
F20
PEG_RXN_5
E19
PEG_RXP_6
D19
PEG_RXN_6
E18
PEG_RXP_7
F18
PEG_RXN_7
D17
PEG_RXP_8
E17
PEG_RXN_8
F16
PEG_RXP_9
E16
PEG_RXN_9
D15
PEG_RXP_10
E15
PEG_RXN_10
F14
PEG_RXP_11
E14
PEG_RXN_11
D13
PEG_RXP_12
E13
PEG_RXN_12
F12
PEG_RXP_13
E12
PEG_RXN_13
D11
PEG_RXP_14
E11
PEG_RXN_14
F10
PEG_RXP_15
E10
PEG_RXN_15
G2
PEG_RCOMP
D8
DMI_RXP_0
E8
DMI_RXN_0
E6
DMI_RXP_1
F6
DMI_RXN_1
D5
DMI_RXP_2
E5
DMI_RXN_2
J8
DMI_RXP_3
J9
DMI_RXN_3
CPU_CFL-H_1440P
PEG_TXN_0
PEG_TXN_1
PEG_TXN_2
PEG_TXN_3
PEG_TXN_4
PEG_TXN_5
PEG_TXN_6
PEG_TXN_7
PEG_TXN_8
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
3 OF 13
PEG_TXP_0
PEG_TXP_1
PEG_TXP_2
PEG_TXP_3
PEG_TXP_4
PEG_TXP_5
PEG_TXP_6
PEG_TXP_7
PEG_TXP_8
PEG_TXP_9
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
B25
A25
B24
C24
B23
A23
B22
C22
B21
A21
B20
C20
B19
A19
B18
C18
A17
B17
C16
B16
A15
B15
C14
B14
A13
B13
C12
B12
A11
B11
C10
B10
B8
A8
C6
B6
B5
A5
D4
B4
C_PEG_TXP15
C_PEG_TXN15
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP13
C_PEG_TXN13
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP11
C_PEG_TXN11
C_PEG_TXP10
C_PEG_TXN10
C_PEG_TXP9
C_PEG_TXN9
C_PEG_TXP8
C_PEG_TXN8
C_PEG_TXP7
C_PEG_TXN7
C_PEG_TXP6
C_PEG_TXN6
C_PEG_TXP5
C_PEG_TXN5
C_PEG_TXP4
C_PEG_TXN4
C_PEG_TXP3
C_PEG_TXN3
C_PEG_TXP2
C_PEG_TXN2
C_PEG_TXP1
C_PEG_TXN1
C_PEG_TXP0
C_PEG_TXN0
C1114 0.22u/6.3V/X5R_2
C1113 0.22u/6.3V/X5R_2
C1095 0.22u/6.3V/X5R_2
C1096 0.22u/6.3V/X5R_2
C1112 0.22u/6.3V/X5R_2
C1111 0.22u/6.3V/X5R_2
C1097 0.22u/6.3V/X5R_2
C1098 0.22u/6.3V/X5R_2
C1116 0.22u/6.3V/X5R_2
C1115 0.22u/6.3V/X5R_2
C1099 0.22u/6.3V/X5R_2
C1100 0.22u/6.3V/X5R_2
C1118 0.22u/6.3V/X5R_2
C1117 0.22u/6.3V/X5R_2
C1101 0.22u/6.3V/X5R_2
C1102 0.22u/6.3V/X5R_2
C1119 0.22u/6.3V/X5R_2
C1120 0.22u/6.3V/X5R_2
C1104 0.22u/6.3V/X5R_2
C1103 0.22u/6.3V/X5R_2
C1121 0.22u/6.3V/X5R_2
C1122 0.22u/6.3V/X5R_2
C1106 0.22u/6.3V/X5R_2
C1105 0.22u/6.3V/X5R_2
C1123 0.22u/6.3V/X5R_2
C1124 0.22u/6.3V/X5R_2
C1110 0.22u/6.3V/X5R_2
C1107 0.22u/6.3V/X5R_2
C1125 0.22u/6.3V/X5R_2
C1126 0.22u/6.3V/X5R_2
C1109 0.22u/6.3V/X5R_2
C1108 0.22u/6.3V/X5R_2
DMI_TXP0 9
DMI_TXN0 9
DMI_TXP1 9
DMI_TXN1 9
DMI_TXP2 9
DMI_TXN2 9
DMI_TXP3 9
DMI_TXN3 9
PEG_TXP15 21
PEG_TXN15 21
PEG_TXP14 21
PEG_TXN14 21
PEG_TXP13 21
PEG_TXN13 21
PEG_TXP12 21
PEG_TXN12 21
PEG_TXP11 21
PEG_TXN11 21
PEG_TXP10 21
PEG_TXN10 21
PEG_TXP9 21
PEG_TXN9 21
PEG_TXP8 21
PEG_TXN8 21
PEG_TXP7 21
PEG_TXN7 21
PEG_TXP6 21
PEG_TXN6 21
PEG_TXP5 21
PEG_TXN5 21
PEG_TXP4 21
PEG_TXN4 21
PEG_TXP3 21
PEG_TXN3 21
PEG_TXP2 21
PEG_TXN2 21
PEG_TXP1 21
PEG_TXN1 21
PEG_TXP0 21
PEG_TXN0 21
DMI TX
U22D
K36
DDI1_TXP_0
K37
DDI1_TXN_0
J35
DDI1_TXP_1
J34
DDI1_TXN_1
H37
DDI1_TXP_2
H36
DDI1_TXN_2
J37
DDI1_TXP_3
J38
DDI1_TXN_3
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP_0
H33
DDI2_TXN_0
F37
DDI2_TXP_1
G38
DDI2_TXN_1
F34
DDI2_TXP_2
F35
DDI2_TXN_2
E37
DDI2_TXP_3
E36
DDI2_TXN_3
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP_0
D34
DDI3_TXN_0
B36
DDI3_TXP_1
B34
DDI3_TXN_1
F33
DDI3_TXP_2
E33
DDI3_TXN_2
C33
DDI3_TXP_3
B33
DDI3_TXN_3
A27
DDI3_AUXP
B27
DDI3_AUXN
CPU_CFL-H_1440P
DP & PEG Compensation
y
eDP_RCOMP
Trace length < 100 Mils
Trace Width 5 Mils Trace Spacing 25 Mils
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedanc e <25 mohms
EDP_DISP_UTIL
DISP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
4 of 13
EDP_TXP_0
EDP_TXN_0
EDP_TXP_1
EDP_TXN_1
EDP_TXP_2
EDP_TXN_2
EDP_TXP_3
EDP_TXN_3
EDP_AUXP
EDP_AUXN
D29
E29
F28
E28
A29
B29
C28
B28
C26
B26
EDP_DISP_UTIL
A33
EDP_RCOMP
D37
AUD_AZACPU_SCLK
G27
AUD_AZACPU_SDO_R
G25
AUD_AZACPU_SDI_R
G29
TP52
R829 24.9/F_4
R811 20_4
+VCCIO
03
AUD_AZACPU_SCLK 10
AUD_AZACPU_SDO_R 10
AUD_AZACPU_SDI 10
PEG_RCOMP
Trace length < 400 MILS
A A
Trace width = 12 MILS
Trace spacing = 15 MILS
5
4
+1.2VSUS 2,6,10,14,17,18,19,20,60,71
+3V 2,9,10,11,13,17,18,19,20,26,35,36,37,38,39,40,44,45,46,47,48,49,5 0,51,52,56,58,59,60,61,6 4,69,70,71
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
2
Date: Sheet of
PROJECT :
CFL 2/7 (DMI/EDP/PEG)
CFL 2/7 (DMI/EDP/PEG)
CFL 2/7 (DMI/EDP/PEG)
ZGQ
ZGQ
ZGQ
1A
1A
1A
of
37 3 Monday, March 12, 2018
37 3 Monday, March 12, 2018
37 3 Monday, March 12, 2018
1
5
4
3
2
1
M_A_DQ[15:0] 17,19
M_A_DQ[31:16] 17,19
M_A_DQ[47:32] 17,19
M_A_DQ[63:48] 17,19
D D
C C
B B
M_A_CB0 17,19
M_A_CB1 17,19
M_A_CB2 17,19
M_A_CB3 17,19
M_A_CB4 17,19
M_A_CB5 17,19
M_A_CB6 17,19
M_A_CB7 17,19
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
Interleave / Non-Interleave
U22A
BR6
DDR0_DQ_0/DDR0_DQ_0
BT6
DDR0_DQ_1/DDR0_DQ_1
BP3
DDR0_DQ_2/DDR0_DQ_2
BR3
DDR0_DQ_3/DDR0_DQ_3
BN5
DDR0_DQ_4/DDR0_DQ_4
BP6
DDR0_DQ_5/DDR0_DQ_5
BP2
DDR0_DQ_6/DDR0_DQ_6
BN3
DDR0_DQ_7/DDR0_DQ_7
BL4
DDR0_DQ_8/DDR0_DQ_8
BL5
DDR0_DQ_9/DDR0_DQ_9
BL2
DDR0_DQ_10/DDR0_DQ_10
BM1
DDR0_DQ_11/DDR0_DQ_11
BK4
DDR0_DQ_12/DDR0_DQ_12
BK5
DDR0_DQ_13/DDR0_DQ_13
BK1
DDR0_DQ_14/DDR0_DQ_14
BK2
DDR0_DQ_15/DDR0_DQ_15
BG4
DDR0_DQ_16/DDR0_DQ_32
BG5
DDR0_DQ_17/DDR0_DQ_33
BF4
DDR0_DQ_18/DDR0_DQ_34
BF5
DDR0_DQ_19/DDR0_DQ_35
BG2
DDR0_DQ_20/DDR0_DQ_36
BG1
DDR0_DQ_21/DDR0_DQ_37
BF1
DDR0_DQ_22/DDR0_DQ_38
BF2
DDR0_DQ_23/DDR0_DQ_39
BD2
DDR0_DQ_24/DDR0_DQ_40
BD1
DDR0_DQ_25/DDR0_DQ_41
BC4
DDR0_DQ_26/DDR0_DQ_42
BC5
DDR0_DQ_27/DDR0_DQ_43
BD5
DDR0_DQ_28/DDR0_DQ_44
BD4
DDR0_DQ_29/DDR0_DQ_45
BC1
DDR0_DQ_30/DDR0_DQ_46
BC2
DDR0_DQ_31/DDR0_DQ_47
AB1
DDR0_DQ_32/DDR1_DQ_0
AB2
DDR0_DQ_33/DDR1_DQ_1
AA4
DDR0_DQ_34/DDR1_DQ_2
AA5
DDR0_DQ_35/DDR1_DQ_3
AB5
DDR0_DQ_36/DDR1_DQ_4
AB4
DDR0_DQ_37/DDR1_DQ_5
AA2
DDR0_DQ_38/DDR1_DQ_6
AA1
DDR0_DQ_39/DDR1_DQ_7
V5
DDR0_DQ_40/DDR1_DQ_8
V2
DDR0_DQ_41/DDR1_DQ_9
U1
DDR0_DQ_42/DDR1_DQ_10
U2
DDR0_DQ_43/DDR1_DQ_11
V1
DDR0_DQ_44/DDR1_DQ_12
V4
DDR0_DQ_45/DDR1_DQ_13
U5
DDR0_DQ_46/DDR1_DQ_14
U4
DDR0_DQ_47/DDR1_DQ_15
R2
DDR0_DQ_48/DDR1_DQ_32
P5
DDR0_DQ_49/DDR1_DQ_33
R4
DDR0_DQ_50/DDR1_DQ_34
P4
DDR0_DQ_51/DDR1_DQ_35
R5
DDR0_DQ_52/DDR1_DQ_36
P2
DDR0_DQ_53/DDR1_DQ_37
R1
DDR0_DQ_54/DDR1_DQ_38
P1
DDR0_DQ_55/DDR1_DQ_39
M4
DDR0_DQ_56/DDR1_DQ_40
M1
DDR0_DQ_57/DDR1_DQ_41
L4
DDR0_DQ_58/DDR1_DQ_42
L2
DDR0_DQ_59/DDR1_DQ_43
M5
DDR0_DQ_60/DDR1_DQ_44
M2
DDR0_DQ_61/DDR1_DQ_45
L5
DDR0_DQ_62/DDR1_DQ_46
L1
DDR0_DQ_63/DDR1_DQ_47
BA2
NC/DDR0 _ECC_0
BA1
NC/DDR0 _ECC_1
AY4
NC/DDR0 _ECC_2
AY5
NC/DDR0 _ECC_3
BA5
NC/DDR0 _ECC_4
BA4
NC/DDR0 _ECC_5
AY1
NC/DDR0 _ECC_6
AY2
NC/DDR0 _ECC_7
CPU_CFL-H_1440P
1 OF 13
DDR CHANNEL A
DDR0_DQSN_0/DDR0_DQSN_0
DDR0_DQSN_1/DDR0_DQSN_1
DDR0_DQSN_2/DDR0_DQSN_4
DDR0_DQSN_3/DDR0_DQSN_5
DDR0_DQSN_4/DDR1_DQSN_0
DDR0_DQSN_5/DDR1_DQSN_1
DDR0_DQSN_6/DDR1_DQSN_4
DDR0_DQSN_7/DDR1_DQSN_5
DDR0_DQSP_0/DDR0_DQSP_0
DDR0_DQSP_1/DDR0_DQSP_1
DDR0_DQSP_2/DDR0_DQSP_4
DDR0_DQSP_3/DDR0_DQSP_5
DDR0_DQSP_4/DDR1_DQSP_0
DDR0_DQSP_5/DDR1_DQSP_1
DDR0_DQSP_6/DDR1_DQSP_4
DDR0_DQSP_7/DDR1_DQSP_5
DDR0_DQSP_8/DDR0_DQSP_8
DDR0_DQSN_8/DDR0_DQSN_8
DDR0_CKP_0/DDR0_CKP_0
DDR0_CKN_0/DDR0_CKN_0
DDR0_CKP_1/DDR0_CKP_1
DDR0_CKN_1/DDR0_CKN_1
DDR0_CKE_0/DDR0_CKE_0
DDR0_CKE_1/DDR0_CKE_1
DDR0_CKE_2/DDR0_CKE_2
DDR0_CKE_3/DDR0_CKE_3
DDR0_CS#_0/DDR0_CS#_0
DDR0_CS#_1/DDR0_CS#_1
DDR0_ODT_0/DDR0_ODT_0
DDR0_CAB_4/DDR0_BA_0
DDR0_CAB_6/DDR0_BA_1
DDR0_CAA_5/DDR0_BG_0
DDR0_CAB_3/DDR0_MA_16
DDR0_CAB_2/DDR0_MA_14
DDR0_CAB_1/DDR0_MA_15
DDR0_CAB_9/DDR0_MA_0
DDR0_CAB_8/DDR0_MA_1
DDR0_CAB_5/DDR0_MA_2
DDR0_CAA_0/DDR0_MA_5
DDR0_CAA_2/DDR0_MA_6
DDR0_CAA_4/DDR0_MA_7
DDR0_CAA_3/DDR0_MA_8
DDR0_CAA_1/DDR0_MA_9
DDR0_CAB_7/DDR0_MA_10
DDR0_CAA_7/DDR0_MA_11
DDR0_CAA_6/DDR0_MA_12
DDR0_CAB_0/DDR0_MA_13
DDR0_CAA_9/DDR0_BG_1
DDR0_CAA_8/DDR0_ACT#
CFL Processor (DDR4)
NC/DDR0 _CKP_2
NC/DDR0 _CKN_2
NC/DDR0 _CKP_3
NC/DDR0 _CKN_3
NC/DDR0 _CS#_2
NC/DDR0 _CS#_3
NC/DDR0 _ODT_1
NC/DDR0 _ODT_2
NC/DDR0 _ODT_3
NC/DDR0 _MA_3
NC/DDR0 _MA_4
NC/DDR0 _PAR
NC/DDR0 _ALERT#
AG1
AG2
AK2
AK1
AL3
AK3
AL2
AL1
AT1
AT2
AT3
AT5
AD5
AE2
AD2
AE5
AD3
AE4
AE1
AD4
AH5
AH1
AU1
M_A_A16
AH4
M_A_A14
AG4
M_A_A15
AD1
M_A_A0
AH3
M_A_A1
AP4
M_A_A2
AN4
M_A_A3
AP5
M_A_A4
AP2
M_A_A5
AP1
M_A_A6
AP3
M_A_A7
AN1
M_A_A8
AN3
M_A_A9
AT4
M_A_A10
AH2
M_A_A11
AN2
M_A_A12
AU4
M_A_A13
AE3
AU2
AU3
AG3
AU5
M_A_DQSN0
BR5
M_A_DQSN1
BL3
M_A_DQSN2
BG3
M_A_DQSN3
BD3
M_A_DQSN4
AA3
M_A_DQSN5 M_B_DQSP0
U3
M_A_DQSN6
P3
M_A_DQSN7
L3
M_A_DQSP0
BP5
M_A_DQSP1
BK3
M_A_DQSP2
BF3
M_A_DQSP3
BC3
M_A_DQSP4
AB3
M_A_DQSP5
V3
M_A_DQSP6
R3
M_A_DQSP7
M3
M_A_DQSP8
AY3
M_A_DQSN8
BA3
M_A_DIM0_CLKP0 17
M_A_DIM0_CLKN0 17
M_A_DIM0_CLKP1 17
M_A_DIM0_CLKN1 17
M_A_DIM1_CLKP0 19
M_A_DIM1_CLKN0 19
M_A_DIM1_CLKP1 19
M_A_DIM1_CLKN1 19
M_A_CKE0 17
M_A_CKE1 17
M_A_CKE2 19
M_A_CKE3 19
M_A_CS#0 17
M_A_CS#1 17
M_A_CS#2 19
M_A_CS#3 19
M_A_ODT0 17
M_A_ODT1 17
M_A_ODT2 19
M_A_ODT3 19
M_A_BS#0 17,19
M_A_BS#1 17,19
M_A_BG#0 17,19
M_A_A[16:0] 17,19
M_A_BG#1 17,19
DDRA_ACT# 17,19
DDR0_PAR 17,19
DDR0_ALERT# 17,19
M_A_DQSN0 17,19
M_A_DQSN1 17,19
M_A_DQSN2 17,19
M_A_DQSN3 17,19
M_A_DQSN4 17,19
M_A_DQSN5 17,19 M_B_DQSP0 18,20
M_A_DQSN6 17,19
M_A_DQSN7 17,19
M_A_DQSP0 17,19
M_A_DQSP1 17,19
M_A_DQSP2 17,19
M_A_DQSP3 17,19
M_A_DQSP4 17,19
M_A_DQSP5 17,19
M_A_DQSP6 17,19
M_A_DQSP7 17,19
M_A_DQSP8 17,19
M_A_DQSN8 17,19
M_B_DQ[15:0] 18,20
M_B_DQ[31:16] 18,20
M_B_DQ[47:32] 18,20
M_B_DQ[48:63] 18,20
M_B_CB0 18,20
M_B_CB1 18,20
M_B_CB2 18,20
M_B_CB3 18,20
M_B_CB4 18,20
M_B_CB5 18,20
M_B_CB6 18,20
M_B_CB7 18,20
R818 121/F_4
R816 75/F_4
R815 100/F_4
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
U22B
BT11
DDR1_DQ_0/DDR0_DQ_16
BR11
DDR1_DQ_1/DDR0_DQ_17
BT9
DDR1_DQ_2/DDR0_DQ_18
BR8
DDR1_DQ_3/DDR0_DQ_19
BP11
DDR1_DQ_4/DDR0_DQ_20
BN11
DDR1_DQ_5/DDR0_DQ_21
BP8
DDR1_DQ_6/DDR0_DQ_22
BN8
DDR1_DQ_7/DDR0_DQ_23
BL12
DDR1_DQ_8/DDR0_DQ_24
BL11
DDR1_DQ_9/DDR0_DQ_25
BL8
DDR1_DQ_10/DDR0_DQ_26
BJ8
DDR1_DQ_11/DDR0_DQ_27
BJ11
DDR1_DQ_12/DDR0_DQ_28
BJ10
DDR1_DQ_13/DDR0_DQ_29
BL7
DDR1_DQ_14/DDR0_DQ_30
BJ7
DDR1_DQ_15/DDR0_DQ_31
BG11
DDR1_DQ_16/DDR0_DQ_48
BG10
DDR1_DQ_17/DDR0_DQ_49
BG8
DDR1_DQ_18/DDR0_DQ_50
BF8
DDR1_DQ_19/DDR0_DQ_51
BF11
DDR1_DQ_20/DDR0_DQ_52
BF10
DDR1_DQ_21/DDR0_DQ_53
BG7
DDR1_DQ_22/DDR0_DQ_54
BF7
DDR1_DQ_23/DDR0_DQ_55
BB11
DDR1_DQ_24/DDR0_DQ_56
BC11
DDR1_DQ_25/DDR0_DQ_57
BB8
DDR1_DQ_26/DDR0_DQ_58
BC8
DDR1_DQ_27/DDR0_DQ_59
BC10
DDR1_DQ_28/DDR0_DQ_60
BB10
DDR1_DQ_29/DDR0_DQ_61
BC7
DDR1_DQ_30/DDR0_DQ_62
BB7
DDR1_DQ_31/DDR0_DQ_63
AA11
DDR1_DQ_32/DDR1_DQ_16
AA10
DDR1_DQ_33/DDR1_DQ_17
AC11
DDR1_DQ_34/DDR1_DQ_18
AC10
DDR1_DQ_35/DDR1_DQ_19
AA7
DDR1_DQ_36/DDR1_DQ_20
AA8
DDR1_DQ_37/DDR1_DQ_21
AC8
DDR1_DQ_38/DDR1_DQ_22
AC7
DDR1_DQ_39/DDR1_DQ_23
W8
DDR1_DQ_40/DDR1_DQ_24
W7
DDR1_DQ_41/DDR1_DQ_25
V10
DDR1_DQ_42/DDR1_DQ_26
V11
DDR1_DQ_43/DDR1_DQ_27
W11
DDR1_DQ_44/DDR1_DQ_28
W10
DDR1_DQ_45/DDR1_DQ_29
V7
DDR1_DQ_46/DDR1_DQ_30
V8
DDR1_DQ_47/DDR1_DQ_31
R11
DDR1_DQ_48/DDR1_DQ_48
P11
DDR1_DQ_49/DDR1_DQ_49
P7
DDR1_DQ_50/DDR1_DQ_50
R8
DDR1_DQ_51/DDR1_DQ_51
R10
DDR1_DQ_52/DDR1_DQ_52
P10
DDR1_DQ_53/DDR1_DQ_53
R7
DDR1_DQ_54/DDR1_DQ_54
P8
DDR1_DQ_55/DDR1_DQ_55
L11
DDR1_DQ_56/DDR1_DQ_56
M11
DDR1_DQ_57/DDR1_DQ_57
L7
DDR1_DQ_58/DDR1_DQ_58
M8
DDR1_DQ_59/DDR1_DQ_59
L10
DDR1_DQ_60/DDR1_DQ_60
M10
DDR1_DQ_61/DDR1_DQ_61
M7
DDR1_DQ_62/DDR1_DQ_62
L8
DDR1_DQ_63/DDR1_DQ_63
AW11
NC/DDR1 _ECC_0
AY11
NC/DDR1 _ECC_1
AY8
NC/DDR1 _ECC_2
AW8
NC/DDR1 _ECC_3
AY10
NC/DDR1 _ECC_4
AW10
NC/DDR1 _ECC_5
AY7
NC/DDR1 _ECC_6
AW7
NC/DDR1 _ECC_7
G1
DDR_RCOMP_0
H1
DDR_RCOMP_1
J2
DDR_RCOMP_2
CPU_CFL-H_1440P
2 OF 13
DDR CHANNEL B
DDR1_CKP_0/DDR1_CKP_0
DDR1_CKN_0/DDR1_CKN_0
DDR1_CKP_1/DDR1_CKP_1
DDR1_CKN_1/DDR1_CKN_1
NC/DDR1 _CKP_2
NC/DDR1 _CKN_2
NC/DDR1 _CKP_3
NC/DDR1 _CKN_3
DDR1_CKE_0/DDR1_CKE_0
DDR1_CKE_1/DDR1_CKE_1
DDR1_CKE_2/DDR1_CKE_2
DDR1_CKE_3/DDR1_CKE_3
DDR1_CS#_0/DDR1_CS#_0
DDR1_CS#_1/DDR1_CS#_1
NC/DDR1 _CS#_2
NC/DDR1 _CS#_3
DDR1_ODT_0/DDR1_ODT_0
NC/DDR1 _ODT_1
NC/DDR1 _ODT_2
NC/DDR1 _ODT_3
DDR1_CAB_3/DDR1_MA_16
DDR1_CAB_2/DDR1_MA_14
DDR1_CAB_1/DDR1_MA_15
DDR1_CAB_4/DDR1_BA_0
DDR1_CAB_6/DDR1_BA_1
DDR1_CAA_5/DDR1_BG_0
DDR1_CAB_9/DDR1_MA_0
DDR1_CAB_8/DDR1_MA_1
DDR1_CAB_5/DDR1_MA_2
NC/DDR1 _MA_3
NC/DDR1 _MA_4
DDR1_CAA_0/DDR1_MA_5
DDR1_CAA_2/DDR1_MA_6
DDR1_CAA_4/DDR1_MA_7
DDR1_CAA_3/DDR1_MA_8
DDR1_CAA_1/DDR1_MA_9
DDR1_CAB_7/DDR1_MA_10
DDR1_CAA_7/DDR1_MA_11
DDR1_CAA_6/DDR1_MA_12
DDR1_CAB_0/DDR1_MA_13
DDR1_CAA_9/DDR1_BG_1
DDR1_CAA_8/DDR1_ACT#
NC/DDR1 _PAR
NC/DDR1 _ALERT#
DDR1_DQSN_0/DDR0_DQSN_2
DDR1_DQSN_1/DDR0_DQSN_3
DDR1_DQSN_2/DDR0_DQSN_6
DDR1_DQSN_3/DDR0_DQSN_7
DDR1_DQSN_4/DDR1_DQSN_2
DDR1_DQSN_5/DDR1_DQSN_3
DDR1_DQSN_6/DDR1_DQSN_6
DDR1_DQSN_7/DDR1_DQSN_7
DDR1_DQSP_0/DDR0_DQSP_2
DDR1_DQSP_1/DDR0_DQSP_3
DDR1_DQSP_2/DDR0_DQSP_6
DDR1_DQSP_3/DDR0_DQSP_7
DDR1_DQSP_4/DDR1_DQSP_2
DDR1_DQSP_5/DDR1_DQSP_3
DDR1_DQSP_6/DDR1_DQSP_6
DDR1_DQSP_7/DDR1_DQSP_7
DDR1_DQSP_8/DDR1_DQSP_8
DDR1_DQSN_8/DDR1_DQSN_8
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
AM9
AN9
AM7
AM8
AM11
AM10
AJ10
AJ11
AT8
AT10
AT7
AT11
AF11
AE7
AF10
AE10
AF7
AE8
AE9
AE11
M_B_A16
AH10
M_B_A14
AH11
M_B_A15
AF8
AH8
AH9
AR9
M_B_A0
AJ9
M_B_A1
AK6
M_B_A2
AK5
M_B_A3
AL5
M_B_A4
AL6
M_B_A5
AM6
M_B_A6
AN7
M_B_A7
AN10
M_B_A8
AN8
M_B_A9
AR11
M_B_A10
AH7
M_B_A11
AN11
M_B_A12
AR10
M_B_A13
AF9
AR7
AT9
AJ7
AR8
M_B_DQSN0
BN9
M_B_DQSN1
BL9
M_B_DQSN2
BG9
M_B_DQSN3
BC9
M_B_DQSN4
AC9
M_B_DQSN5
W9
M_B_DQSN6
R9
M_B_DQSN7
M9
BP9
M_B_DQSP1
BJ9
M_B_DQSP2
BF9
M_B_DQSP3
BB9
M_B_DQSP4
AA9
M_B_DQSP5
V9
M_B_DQSP6
P9
M_B_DQSP7
L9
M_B_DQSP8
AW9
M_B_DQSN8
AY9
SMDDR_VREF_CA
BN13
SMDDR_VREF_DQ0_M3
BP13
SMDDR_VREF_DQ1_M3
BR13
M_B_DIM0_CLKP0 18
M_B_DIM0_CLKN0 18
M_B_DIM0_CLKP1 18
M_B_DIM0_CLKN1 18
M_B_DIM1_CLKP0 20
M_B_DIM1_CLKN0 20
M_B_DIM1_CLKP1 20
M_B_DIM1_CLKN1 20
M_B_CKE0 18
M_B_CKE1 18
M_B_CKE2 20
M_B_CKE3 20
M_B_CS#0 18
M_B_CS#1 18
M_B_CS#2 20
M_B_CS#3 20
M_B_ODT0 18
M_B_ODT1 18
M_B_ODT2 20
M_B_ODT3 20
M_B_A16 18,20
M_B_A14 18,20
M_B_A15 18,20
M_B_BS#0 18,20
M_B_BS#1 18,20
M_B_BG#0 18,20
M_B_A[13:0] 18,20
M_B_BG#1 18,20
DDRB_ACT# 18,20
DDR1_PAR 18,20
DDR1_ALERT# 18,20
M_B_DQSN0 18,20
M_B_DQSN1 18,20
M_B_DQSN2 18,20
M_B_DQSN3 18,20
M_B_DQSN4 18,20
M_B_DQSN5 18,20
M_B_DQSN6 18,20
M_B_DQSN7 18,20
M_B_DQSP1 18,20
M_B_DQSP2 18,20
M_B_DQSP3 18,20
M_B_DQSP4 18,20
M_B_DQSP5 18,20
M_B_DQSP6 18,20
M_B_DQSP7 18,20
M_B_DQSP8 18,20
M_B_DQSN8 18,20
SMDDR_VREF_CA 17
TP60
SMDDR_VREF_DQ1_M3 18
04
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT :
CFL 3/7 (DDR4 I/F)
CFL 3/7 (DDR4 I/F)
CFL 3/7 (DDR4 I/F)
ZGQ
ZGQ
ZGQ
47 3 Monday, March 12, 2018
47 3 Monday, March 12, 2018
47 3 Monday, March 12, 2018
1
1A
1A
1A
of
5
4
3
2
1
VCCGT
Edge cap
4x 47uF 0805
7x 22uF 0603
Backside cap
10x 10uF 0402
D D
12x 1uF 0201
C C
B B
R436
Close CPU
+VCC_GT
*Short_0805
Modify 8/15
A A
CFL Processor (POWER)
+VCC_GT +VCC_GT
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BP37
BP38
BR15
BR16
BR17
U22K
VCCGT1
VCCGT2
VCCGT3
VCCGT4
VCCGT5
VCCGT6
VCCGT7
VCCGT8
VCCGT9
VCCGT10
VCCGT11
VCCGT12
VCCGT13
VCCGT14
VCCGT15
VCCGT16
VCCGT17
VCCGT18
VCCGT19
VCCGT20
VCCGT21
VCCGT22
VCCGT23
VCCGT24
VCCGT25
VCCGT26
VCCGT27
VCCGT28
VCCGT29
VCCGT30
VCCGT31
VCCGT32
VCCGT33
VCCGT34
VCCGT35
VCCGT36
VCCGT37
VCCGT38
VCCGT39
VCCGT40
VCCGT41
VCCGT42
VCCGT43
VCCGT44
VCCGT45
VCCGT46
VCCGT47
VCCGT48
VCCGT49
VCCGT50
VCCGT51
VCCGT52
VCCGT53
VCCGT54
VCCGT55
VCCGT56
VCCGT57
VCCGT58
VCCGT59
VCCGT60
VCCGT61
VCCGT62
VCCGT63
VCCGT64
VCCGT65
VCCGT66
VCCGT67
VCCGT68
VCCGT69
VCCGT70
VCCGT71
VCCGT72
VCCGT73
VCCGT74
VCCGT75
VCCGT76
VCCGT77
VCCGT78
VCCGT79
VCCGT159
VCCGT160
VCCGT161
VCCGT162
VCCGT163
11 OF 13
CPU_CFL-H_1440P
VCCGT80
VCCGT81
VCCGT82
VCCGT83
VCCGT84
VCCGT85
VCCGT86
VCCGT87
VCCGT88
VCCGT89
VCCGT90
VCCGT91
VCCGT92
VCCGT93
VCCGT94
VCCGT95
VCCGT96
VCCGT97
VCCGT98
VCCGT99
VCCGT100
VCCGT101
VCCGT102
VCCGT103
VCCGT104
VCCGT105
VCCGT106
VCCGT107
VCCGT108
VCCGT109
VCCGT110
VCCGT111
VCCGT112
VCCGT113
VCCGT114
VCCGT115
VCCGT116
VCCGT117
VCCGT118
VCCGT119
VCCGT120
VCCGT121
VCCGT122
VCCGT123
VCCGT124
VCCGT125
VCCGT126
VCCGT127
VCCGT128
VCCGT129
VCCGT130
VCCGT131
VCCGT132
VCCGT133
VCCGT134
VCCGT135
VCCGT136
VCCGT137
VCCGT138
VCCGT139
VCCGT140
VCCGT141
VCCGT142
VCCGT143
VCCGT144
VCCGT145
VCCGT146
VCCGT147
VCCGT148
VCCGT149
VCCGT150
VCCGT151
VCCGT152
VCCGT153
VCCGT154
VCCGT155
VCCGT156
VCCGT157
VCCGT158
VCCGT164
VCCGT165
VCCGT166
VCCGT167
VCCGT168
VSSGT_SENSE
VCCGT_SENSE
BD35
BD36
BE31
BE32
BE33
BE34
BE35
BE36
BE37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BJ16
BJ17
BJ19
BJ20
BJ21
BJ23
BJ24
BJ26
BJ27
BJ37
BJ38
BK16
BK17
BK19
BK20
BK21
BK23
BK24
BK26
BK27
BL15
BL16
BL17
BL23
BL24
BL25
BL26
BL27
BL28
BL36
BL37
BM15
BM16
BM17
BM36
BM37
BN15
BN16
BN17
BN36
BN37
BN38
BP15
BP16
BP17
BR37
BT15
BT16
BT17
BT37
AH37
AH38
VGT_VSSSENSE
VGT_VCCSENSE
TP57
TP58
05
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT :
CFL 4/7 (POWER)
CFL 4/7 (POWER)
CFL 4/7 (POWER)
ZGQ
ZGQ
ZGQ
57 3 Monday, Marc h 12, 2018
57 3 Monday, Marc h 12, 2018
57 3 Monday, Marc h 12, 2018
1
1A
1A
1A
of
of
5
4
3
2
1
Follow CFL H EDS page 128 to 45W(GT2): VCCSA=11.1A
C349
22U/6.3V_6
C347
10u/6.3V_4
C356
1u/6.3V_4
C358
10u/6.3V_4
R461 *0_6
R462
modify 8/9
C249
1U/10V_2
Close CPU
C351
47U/6.3V_8
C345
10u/6.3V_4
C354
10u/6.3V_4
C364
10u/6.3V_4
Under CPU
*Short_0603
+VCCPLL_OC +VCCPLL +VCCIO
C362
1U/10V_2
+VCCIO
1u/6.3V_4
+VCC_SA
Edge cap
D D
2x 47uF 0805
2x 22uF 0805
Backside cap
7x 10uF 0402
C346
10u/6.3V_4
C348
22U/6.3V_6
C344
10u/6.3V_4
Under CPU
0621Bear
Follow CFL H EDS P128 to 45W:
VCCIO,
C C
+VCCIO = 6.4A
+VCC_IO
Backside cap
3x 10uF 0402
+VCCSTG
B B
+VCCSTG
C361
1U/10V_2
C250
22u/6.3V_6
C350
47U/6.3V_8
C353
10u/6.3V_4
C352
10u/6.3V_4
C363
10u/6.3V_4
+1V_SUS
+VCCIO
Under CPU
C365
+VCC_SA
C360
*1u/6.3V_4
U22L
J30
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34
M35
M36
AG12
G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27
J15
J16
J17
J19
J20
J21
J26
J27
CPU_CFL-H_1440P
C359
*1u/6.3V_4
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA9
VCCSA10
VCCSA11
VCCSA12
VCCSA13
VCCSA14
VCCSA15
VCCSA16
VCCSA17
VCCSA18
VCCSA19
VCCSA20
VCCSA21
VCCSA22
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
11.1 A
6.4 A
0.13 A
12 OF 13
C366
1U/10V_2
3.3 A
VCCPLL_OC1
VCCPLL_OC2
VCCPLL_OC3
0.06 A
0.02 A
0.15 A
VCCSA_SENSE
VSSSA_SENSE
VCCIO_SENSE
VSSIO_SENSE
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VCCST
VCCSTG2
VCCSTG1
VCCPLL1
VCCPLL2
C357
22u/6.3V_6
Follow CFL H EDS page 127 45W: VDDQ=3.3A (LPDDR4)
AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6
Y12
BH13
BJ13
G11
H30
H29
G30
H28
J28
M38
M37
H14
J14
+1.2VSUS
C251
22U/6.3V_6
C276
10u/6.3V_4
C240
10u/6.3V_4
VCCSA_VCCSENSE 61
VCCSA_VSSSENSE 61
VCCIO_VCCSENSE
VSSIO_VCCSENSE
modify 8/22
+VCCPLL_OC
+VCCSTG
+VCCPLL
R465
C230
22U/6.3V_6
C238
10u/6.3V_4
C310
10u/6.3V_4
*Short_0603
TP25
TP24
+VCCST
+VCCPLL_OC +1.2VSUS
C377
22U/6.3V_6
C254
10u/6.3V_4
C239
10u/6.3V_4
Under CPU
modify 8/9
C355
1U/10V_2
C380
22U/6.3V_6
C252
22U/6.3V_6
C290
10u/6.3V_4
C253
10u/6.3V_4
VDDQ
Backside cap
4x 22uF 0603
11x 10uF 0402
C373
10u/6.3V_4
C326
10u/6.3V_4
C375
10u/6.3V_4
VCC_PLL_OC
Backside cap
2x 1uF 0201
VCC_ST
Backside cap
1x 1uF 0201
VccSTG
Backside cap
1x 1uF 0201
VCC_PLL
Backside cap
4x 22uF 0603
11x 10uF 0404
06
modify 8/3
A A
5
4
+1V_SUS
3
R463
R464
*Short_0603
*Short_0603
+VCCST
modify 8/9
+VCCPLL
C379
22U/6.3V_6
C378
22U/6.3V_6
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
PROJECT :
CFL 5/7 (POWER&GND )
CFL 5/7 (POWER&GND )
CFL 5/7 (POWER&GND )
ZGQ
ZGQ
ZGQ
67 3 Monday, March 12, 2018
of
67 3 Monday, March 12, 2018
67 3 Monday, March 12, 2018
1
1A
1A
1A
5
4
3
2
1
W35
W36
W37
W38
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
07
Vcc (VCC_CORE)
Edge cap
8 x 47uF 0805
Backside cap
D D
12x 22uF 0603
42x 10uF 0402
48x 1uF 0201
24x 0201 (placeholder)
Follow CFL H EDS page 124 to 45W(GT2): VCC_CORE=96A
C269
C313
22U/6.3V_6
C266
22U/6.3V_6
C282
10u/6.3V_4
C318
10u/6.3V_4
C329
*10u/6.3V_4
47U/6.3V_8
C314
22U/6.3V_6
C299
22U/6.3V_6
C294
10u/6.3V_4
C280
10u/6.3V_4
modify 8/9
C332
10u/6.3V_4
Under CPU
C286
C265
22U/6.3V_6
22U/6.3V_6
C C
C284
C264
22U/6.3V_6
22U/6.3V_6
C279
C281
10u/6.3V_4
10u/6.3V_4
C273
C319
10u/6.3V_4
10u/6.3V_4
B B
C338
C336
*10u/6.3V_4
10u/6.3V_4
A A
C268
47U/6.3V_8
C300
22U/6.3V_6
C297
10u/6.3V_4
C262
10u/6.3V_4
C320
10u/6.3V_4
C335
*10u/6.3V_4
Close CPU
C288
47U/6.3V_8
C317
22U/6.3V_6
C293
10u/6.3V_4
C323
10u/6.3V_4
C283
10u/6.3V_4
C333
10u/6.3V_4
C302
47U/6.3V_8
C285
22U/6.3V_6
C296
10u/6.3V_4
C324
10u/6.3V_4
C321
10u/6.3V_4
C301
*47U/6.3V_8
+VCC_CORE +VCC_CORE
U22I
C315
47U/6.3V_8
C298
22U/6.3V_6
C295
10u/6.3V_4
C322
10u/6.3V_4
C274
10u/6.3V_4
C263
10u/6.3V_4
C287
*47U/6.3V_8
AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38
AF29
AF30
AF31
AF32
AF33
AF34
AF35
AF36
AF37
AF38
AG14
AG31
AG32
AG33
AG34
AG35
AG36
VCC#AA13
VCC#AA31
VCC#AA32
VCC#AA33
VCC#AA34
VCC#AA35
VCC#AA36
VCC#AA37
VCC#AA38
VCC#AB29
VCC#AB30
VCC#AB31
VCC#AB32
VCC#AB35
VCC#AB36
VCC#AB37
VCC#AB38
VCC#AC13
VCC#AC14
VCC#AC29
VCC#AC30
VCC#AC31
VCC#AC32
VCC#AC33
VCC#AC34
VCC#AC35
VCC#AC36
VCC#AD13
VCC#AD14
VCC#AD31
VCC#AD32
VCC#AD33
VCC#AD34
VCC#AD35
VCC#AD36
VCC#AD37
VCC#AD38
VCC#AE13
VCC#AE14
VCC#AE30
VCC#AE31
VCC#AE32
VCC#AE35
VCC#AE36
VCC#AE37
VCC#AE38
VCC#AF29
VCC#AF30
VCC#AF31
VCC#AF32
VCC#AF33
VCC#AF34
VCC#AF35
VCC#AF36
VCC#AF37
VCC#AF38
VCC#AG14
VCC#AG31
VCC#AG32
VCC#AG33
VCC#AG34
VCC#AG35
VCC#AG36
CPU_CFL-H_1440P
9 OF 13
VCC#AH13
VCC#AH14
VCC#AH29
VCC#AH30
VCC#AH31
VCC#AH32
VCC#AJ14
VCC#AJ29
VCC#AJ30
VCC#AJ31
VCC#AJ32
VCC#AJ33
VCC#AJ34
VCC#AJ35
VCC#AJ36
VCC#AK31
VCC#AK32
VCC#AK33
VCC#AK34
VCC#AK35
VCC#AK36
VCC#AK37
VCC#AK38
VCC#AL13
VCC#AL29
VCC#AL30
VCC#AL31
VCC#AL32
VCC#AL35
VCC#AL36
VCC#AL37
VCC#AL38
VCC#AM13
VCC#AM14
VCC#AM29
VCC#AM30
VCC#AM31
VCC#AM32
VCC#AM33
VCC#AM34
VCC#AM35
VCC#AM36
VCC#AN13
VCC#AN14
VCC#AN31
VCC#AN32
VCC#AN33
VCC#AN34
VCC#AN35
VCC#AN36
VCC#AN37
VCC#AN38
VCC#AP13
VCC#AP30
VCC#AP31
VCC#AP32
VCC#AP35
VCC#AP36
VCC#AP37
VCC#AP38
VCC#K13
VCC_SENSE
VSS_SENSE
AH13
AH14
AH29
AH30
AH31
AH32
AJ14
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP30
AP31
AP32
AP35
AP36
AP37
AP38
K13
AG37
AG38
VCCSENSE
VSSSENSE
Under CPU
C325
1U/10V_2
C292
1U/10V_2
C272
1U/10V_2
C331
*10u/6.3V_4
C1149
*1U/10V_2
C1174
*1U/10V_2
+VCC_CORE
C275
1U/10V_2
1U/10V_2
C260
C271
1U/10V_2
1U/10V_2
C341
C340
1U/10V_2
1U/10V_2
C328
*10u/6.3V_4
C1167
C307
*1U/10V_2
*1U/10V_2
C258
C1173
*1U/10V_2
*1U/10V_2
Sense resistor should be placed within 2
inches (50.8 mm ) of the processor socket
Trace Impendence 50 ohm
R836
100/F_4
VCCSENSE 61
VSSSENSE 61
R840
100/F_4
1U/10V_2
C261
1U/10V_2
C311
1U/10V_2
C334
*10u/6.3V_4
C1146
*1U/10V_2
C308
*1U/10V_2
modify 8/9
C304
1U/10V_2
C270
1U/10V_2
C259
1U/10V_2
C330
*10u/6.3V_4
C1142
*1U/10V_2
C1148
*1U/10V_2
+VCC_CORE 61,62
C303
C342
C277
1U/10V_2
C343
1U/10V_2
C291
1U/10V_2
C327
*10u/6.3V_4
C1144
*1U/10V_2
C1156
*1U/10V_2
C316
1U/10V_2
C278
1U/10V_2
C337
*10u/6.3V_4
C1153
*1U/10V_2
C1170
*1U/10V_2
C306
1U/10V_2
C339
1U/10V_2
C267
*10u/6.3V_4
C1151
*1U/10V_2
C257
*1U/10V_2
C289
1U/10V_2
C312
1U/10V_2
+VCC_CORE +VCC_CORE
U22J
K14
VCC#K14
L13
VCC#L13
L14
VCC#L14
N13
VCC#N13
N14
VCC#N14
N30
VCC#N30
N31
VCC#N31
N32
VCC#N32
N35
VCC#N35
N36
VCC#N36
N37
VCC#N37
N38
VCC#N38
P13
VCC#P13
P14
VCC#P14
P29
VCC#P29
P30
VCC#P30
P31
VCC#P31
P32
VCC#P32
P33
VCC#P33
P34
VCC#P34
P35
VCC#P35
P36
VCC#P36
R13
VCC#R13
R31
VCC#R31
R32
VCC#R32
R33
VCC#R33
R34
VCC#R34
R35
VCC#R35
R36
VCC#R36
R37
VCC#R37
R38
VCC#R38
T29
VCC#T29
T30
VCC#T30
T31
VCC#T31
T32
VCC#T32
T35
VCC#T35
T36
VCC#T36
T37
VCC#T37
T38
VCC#T38
U29
VCC#U29
U30
VCC#U30
U31
VCC#U31
U32
VCC#U32
U33
VCC#U33
U34
VCC#U34
U35
VCC#U35
U36
VCC#U36
V13
VCC#V13
V14
VCC#V14
V31
VCC#V31
V32
VCC#V32
V33
VCC#V33
V34
VCC#V34
V35
VCC#V35
V36
VCC#V36
V37
VCC#V37
V38
VCC#V38
W13
VCC#W13
W14
VCC#W14
W29
VCC#W29
W30
VCC#W30
W31
VCC#W31
W32
VCC#W32
CPU_CFL-H_1440P
Need to check/modify
10 OF 13
VCC#W35
VCC#W36
VCC#W37
VCC#W38
VCC#Y29
VCC#Y30
VCC#Y31
VCC#Y32
VCC#Y33
VCC#Y34
VCC#Y35
VCC#Y36
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT :
CFL 6/7 (POWER&GND )
CFL 6/7 (POWER&GND )
CFL 6/7 (POWER&GND )
ZGQ
ZGQ
ZGQ
77 3 Monday, March 12, 2018
77 3 Monday, March 12, 2018
1
77 3 Monday, March 12, 2018
1A
1A
1A
of
5
4
3
2
1
CFL-H Processor (GND)
U22F
A10
VSS_1
A12
VSS_2
A16
VSS_3
A18
VSS_4
A20
VSS_5
A22
VSS_6
A24
VSS_7
D D
C C
B B
A A
A26
VSS_8
A28
VSS_9
A30
VSS_10
A6
VSS_11
A9
VSS_12
AA12
VSS_13
AA29
VSS_14
AA30
VSS_15
AB33
VSS_16
AB34
VSS_17
AB6
VSS_18
AC1
VSS_19
AC12
VSS_20
AC2
VSS_21
AC3
VSS_22
AC37
VSS_23
AC38
VSS_24
AC4
VSS_25
AC5
VSS_26
AC6
VSS_27
AD10
VSS_28
AD11
VSS_29
AD12
VSS_30
AD29
VSS_31
AD30
VSS_32
AD6
VSS_33
AD8
VSS_34
AD9
VSS_35
AE33
VSS_36
AE34
VSS_37
AE6
VSS_38
AF1
VSS_39
AF12
VSS_40
AF13
VSS_41
AF14
VSS_42
AF2
VSS_43
AF3
VSS_44
AF4
VSS_45
AG10
VSS_46
AG11
VSS_47
AG13
VSS_48
AG29
VSS_49
AG30
VSS_50
AG6
VSS_51
AG7
VSS_52
AG8
VSS_53
AH12
VSS_54
AH33
VSS_55
AH34
VSS_56
AH35
VSS_57
AH36
VSS_58
AH6
VSS_59
AJ1
VSS_60
AJ13
VSS_61
AJ2
VSS_62
AJ3
VSS_63
AJ37
VSS_64
AJ38
VSS_65
AJ4
VSS_66
AJ5
VSS_67
AJ6
VSS_68
W4
VSS_69
W5
VSS_70
Y10
VSS_71
Y11
VSS_72
Y13
VSS_73
Y14
VSS_74
Y37
VSS_75
Y38
VSS_76
Y7
VSS_77
Y8
VSS_78
Y9
VSS_79
AK29
VSS_80
AK30
VSS_81
CPU_CFL-H_1440P
6 OF 13
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
AK4
AL10
AL12
AL14
AL33
AL34
AL4
AL7
AL8
AL9
AM1
AM12
AM2
AM3
AM37
AM38
AM4
AM5
AN12
AN29
AN30
AN5
AN6
AP10
AP11
AP12
AP33
AP34
AP8
AP9
AR1
AR13
AR14
AR2
AR29
AR3
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AR37
AR38
AR4
AR5
AT29
AT30
AT6
AU10
AU11
AU12
AU33
AU34
AU6
AU7
AU8
AU9
AV37
AV38
AW1
AW12
AW2
AW29
AW3
AW30
AW4
U6
V12
V29
V30
A14
AD7
V6
W1
W12
W2
W3
W33
W34
U22G
AW5
AY12
AY33
AY34
B9
BA10
BA11
BA12
BA37
BA38
BA6
BA7
BA8
BA9
BB1
BB12
BB2
BB29
BB3
BB30
BB4
BB5
BB6
BC12
BC13
BC14
BC33
BC34
BC6
BD10
BD11
BD12
BD37
BD6
BD7
BD8
BD9
BE1
BE2
BE29
BE3
BE30
BE4
BE5
BE6
BF12
BF33
BF34
BF6
BG12
BG13
BG14
BG37
BG38
BG6
BH1
BH10
BH11
BH12
BH14
BH2
BH3
BH4
BH5
BH6
BH7
BH8
BH9
T2
T3
T33
T34
T4
T5
T7
T8
T9
U37
U38
BJ12
BJ14
CPU_CFL-H_1440P
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
7 OF 13
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
BJ15
BJ18
BJ22
BJ25
BJ29
BJ30
BJ31
BJ32
BJ33
BJ34
BJ35
BJ36
BK13
BK14
BK15
BK18
BK22
BK25
BK29
BK6
BL13
BL14
BL18
BL19
BL20
BL21
BL22
BL29
BL33
BL35
BL38
BL6
BM11
BM12
BM13
BM14
BM18
BM2
BM21
BM22
BM23
BM24
BM25
BM26
BM27
BM28
BM29
BM3
BM33
BM35
BM38
BM5
BM6
BM7
BM8
BM9
BN12
BN14
BN18
BN19
BN2
BN20
BN21
BN24
BN29
BN30
BN31
BN34
P38
P6
R12
R29
AY14
BD38
R30
T1
T10
T11
T12
T13
T14
U22H
BN4
BN7
BP12
BP14
BP18
BP21
BP24
BP25
BP26
BP29
BP33
BP34
BP7
BR12
BR14
BR18
BR21
BR24
BR25
BR26
BR29
BR34
BR36
BR7
BT12
BT14
BT18
BT21
BT24
BT26
BT29
BT32
BT5
C11
C13
C15
C17
C19
C21
C23
C25
C27
C29
C31
C37
C5
C8
C9
D10
D12
D14
D16
D18
D20
D22
D24
D26
D28
D3
D30
D33
D6
D9
E34
E35
E38
E4
E9
N3
N33
N34
N4
N5
N6
N7
N8
N9
P12
P37
M14
M6
N1
F11
F13
CPU_CFL-H_1440P
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
8 OF 13
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
VSS_479
VSS_A3
VSS_A34
VSS_A4
VSS_B3
VSS_B37
VSS_BR38
VSS_BT3
VSS_BT35
VSS_BT36
VSS_BT4
VSS_C2
VSS_D38
F15
F17
F19
F2
F21
F23
F25
F27
F29
F3
F31
F36
F4
F5
F8
F9
G10
G12
G14
G16
G18
G20
G22
G23
G24
G26
G28
G4
G5
G6
G8
G9
H11
H12
H18
H22
H25
H32
H35
J10
J18
J22
J25
J32
J33
J36
J4
J7
K1
K10
K11
K2
K3
K38
K4
K5
K7
K8
K9
L29
L30
L33
L34
M12
M13
N10
N11
N12
N2
BT8
BR9
A3
A34
A4
B3
B37
BR38
BT3
BT35
BT36
BT4
C2
D38
Need to check
PCH_2_CPU_TRIG 15
CPU_2_PCH_TRIG 15
R826
R827
*Short_0402
*Short_0402
stuff it for CRB 9/20
Configuration Signals:
CFG[0] Stall reset sequence after PCU PLL
lock until de-asserted
CFG[2] PCI Express Static Lane Reversal
eDP enable
CFG[4]
CFG[6:5]
PCI Express Bifurcation
PEG defer training
CFG[7]
CFL-H Processor (RESERVED, CFG)
U22M
E2
E3
E1
D1
BR1
BT2
BN35
J24
H24
BN33
BL34
N29
R14
AE29
AA14
AP29
AP14
A36
A37
H23
J23
F30
E30
B30
C30
G3
J3
BR35
BR31
BH30
CPU_CFL-H_1440P
RSVD_TP5
IST_T RIG
RSVD_TP4
RSVD_TP3
RSVD_TP1
RSVD_TP2
RSVD15
RSVD28
RSVD27
RSVD14
RSVD13
RSVD30
RSVD31
RSVD#AE29
RSVD1
RSVD5
RSVD4
VSS_A36
VSS_A37
PROC_TRIGIN
PROC_TRIGOUT
RSVD24
RSVD23
RSVD7
RSVD21
RSVD26
RSVD29
RSVD19
RSVD18
RSVD9
13 OF 13
RSVD11
RSVD10
RSVD12
RSVD3
RSVD25
RSVD22
RSVD20
RSVD17
RSVD16
RSVD8
RSVD6
BK28
BJ28
BL31
AJ8
G13
C38
C1
BR2
BP1
B38
B2
R812
TPEV_ PEG_V IEW_ 2
TP59
TP62
CPU_2_PCH_TRIG_R
*Short_0402
TPEV_ PEG_V IEW_ 2 11
The CFG signals have a default value of '1' if not terminated on the board.
Note that some of the Intel reference designs board might connect CFG[0] to
HOOK[2]. This route is not needed on a OxM board.
x1 = Nor mal operation
x0 = Lan e numbers revers ed
x1 = Dis abled
x0 = En abled
x00 = 1 x8 & 2 x4 P CI Express
x01 = res erved
x10 = 2 x8 PCI Expres s
x11 = 1 x16 PCI Exp ress
x1 = PE G train follow R ESETB de- asseted
x0 = PE G wait for BIOS fro trainin g
08
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT :
CFL 7/7 (GND)
CFL 7/7 (GND)
CFL 7/7 (GND)
ZGQ
ZGQ
ZGQ
87 3 Monday, March 12, 2018
87 3 Monday, March 12, 2018
87 3 Monday, March 12, 2018
1
1A
1A
1A
of
of
5
4
3
2
1
+3V
+3V_DEEP_SUS
+3V
+3V_DEEP_SUS
ZGQ
ZGQ
ZGQ
97 3 Monday, March 12, 2018
97 3 Monday, March 12, 2018
97 3 Monday, March 12, 2018
09
of
of
1A
1A
1A
U24B
DMI_TXN0 3
DMI_RXN0 3
DMI_RXP0 3
DMI_RXN1 3
DMI_RXP1 3
DMI_RXN2 3
D D
C C
USB3.0 (DB/IO-1)
USB3.0 (DB/IO-2)
B B
USB3.0 (IO-3/Charger)
A A
5
DMI_RXP2 3
DMI_RXN3 3
DMI_RXP3 3
USB30_TX1- 56
USB30_TX1+ 56
USB30_RX1- 56
USB30_RX1+ 56
USB30_TX2- 56
USB30_TX2+ 56
USB30_RX2- 56
USB30_RX2+ 56
USB30_TX3+ 43
USB30_TX3- 43
USB30_RX3+ 43
USB30_RX3- 43
DMI_TXP0 3
DMI_TXN1 3
DMI_TXP1 3
DMI_TXN2 3
DMI_TXP2 3
DMI_TXN3 3
DMI_TXP3 3
K34
J35
C33
B33
G33
F34
C32
B32
K32
J32
C31
B31
G30
F30
C29
B29
A25
B25
P24
R24
C26
B26
F26
G26
B27
C27
L26
M26
D29
E28
K29
M29
G17
F16
A17
B17
R21
P21
B18
C18
K18
J18
B19
C19
N18
R18
D20
C20
F20
G20
B21
A22
K21
J21
D21
C21
B23
C23
J24
L24
F24
G24
B24
C24
U24F
F9
F7
D11
C11
C3
D4
B9
C9
C17
C16
G14
F14
C15
B15
J13
K13
G12
F11
C10
B10
C14
B14
J15
K16
PCH_CFL-H_874P
4
PCH_CFL-H_874P
USB31_1_TXN
USB31_1_TXP
USB31_1_RXN
USB31_1_RXP
USB31_2_TXN
USB31_2_TXP
USB31_2_RXN
USB31_2_RXP
USB31_6_TXN
USB31_6_TXP
USB31_6_RXN
USB31_6_RXP
USB31_5_TXN
USB31_5_TXP
USB31_5_RXN
USB31_5_RXP
USB31_3_TXP
USB31_3_TXN
USB31_3_RXP
USB31_3_RXN
USB31_4_TXP
USB31_4_TXN
USB31_4_RXP
USB31_4_RXN
DMI0_RXN
DMI0_RXP
DMI0_TXN
DMI0_TXP
DMI1_RXN
DMI1_RXP
DMI1_TXN
DMI1_TXP
DMI2_RXN
DMI2_RXP
DMI2_TXN
DMI2_TXP
DMI3_RXN
DMI3_RXP
DMI3_TXN
DMI3_TXP
DMI7_TXP
DMI7_TXN
DMI7_RXP
DMI7_RXN
DMI6_TXP
DMI6_TXN
DMI6_RXP
DMI6_RXN
DMI5_TXP
DMI5_TXN
DMI5_RXP
DMI5_RXN
DMI4_TXP
DMI4_TXN
DMI4_RXP
DMI4_RXN
PCIE1_RXN/USB31_7_RXN
PCIE1_RXP/USB31_7_RXP
PCIE1_TXN/USB31_7_TXN
PCIE1_TXP/USB31_7_TXP
PCIE2_RXN/USB31_8_RXN
PCIE2_RXP/USB31_8_RXP
PCIE2_TXN/USB31_8_TXN
PCIE2_TXP/USB31_8_TXP
PCIE3_RXN/USB31_9_RXN
PCIE3_RXP/USB31_9_RXP
PCIE3_TXN/USB31_9_TXN
PCIE3_TXP/USB31_9_TXP
PCIE4_RXN/USB31_10_RXN
PCIE4_RXP/USB31_10_RXP
PCIE4_TXN/USB31_10_TXN
PCIE4_TXP/USB31_10_TXP
PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP
PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP
PCIE7_TXP
PCIE7_TXN
PCIE7_RXP
PCIE7_RXN
PCIE8_RXN
PCIE8_RXP
PCIE8_TXN
PCIE8_TXP
2 OF 13
GPP_A5/LFRA ME#/ESPI_CS0#
GPP_A6/SER IRQ/ESPI_CS1#
GPP_A7/PIRQA# /ESPI_ALERT0#
GPP_A0/RCIN#/E SPI_ALERT1#
GPP_A14/SUS _STAT#/ESPI_RESE T#
GPP_A9/CLKOU T_LPC0/ESPI_CLK
6 OF 13
GPP_E9/USB 2_OC0#
GPP_E10/USB 2_OC1#
GPP_E11/USB 2_OC2#
GPP_E12/USB 2_OC3#
GPP_F15/USB 2_OC4#
GPP_F16/USB 2_OC5#
GPP_F17/USB 2_OC6#
GPP_F18/USB 2_OC7#
USB2_VBUSSENSE
GPP_A1/LAD0 /ESPI_IO0
GPP_A2/LAD1 /ESPI_IO1
GPP_A3/LAD2 /ESPI_IO2
GPP_A4/LAD3 /ESPI_IO3
GPP_A10/CLK OUT_LPC1
GPP_E6/SATA_ DEVSLP2
GPP_E5/SATA_ DEVSLP1
GPP_E4/SATA_ DEVSLP0
GPP_F9/SATA_D EVSLP7
GPP_F8/SATA_D EVSLP6
GPP_F7/SATA_D EVSLP5
GPP_F6/SATA_D EVSLP4
GPP_F5/SATA_D EVSLP3
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
USB2_COMP
USB2_ID
PCIE24_TXP
PCIE24_TXN
PCIE24_RXP
PCIE24_RXN
PCIE23_TXP
PCIE23_TXN
PCIE23_RXP
PCIE23_RXN
PCIE22_TXP
PCIE22_TXN
PCIE22_RXP
PCIE22_RXN
PCIE21_TXP
PCIE21_TXN
PCIE21_RXP
PCIE21_RXN
GPP_K19/SM I#
GPP_K18/NMI#
RSVD1
GPD7
J3
USBP1-
J2
USBP1+
N13
USBP2-
N15
USBP2+
K4
USBP3-
K3
USBP3+
M10
USBP4-
L9
USBP4+
M1
USBP5-
L2
USBP5+
K7
USBP6-
K6
USBP6+
L4
USBP7-
L3
USBP7+
G4
USBP8-
G5
USBP8+
M6
N8
H3
H2
R10
P9
G1
G2
N3
N2
change to BT to Port14 for CNVi 9/20
E5
F6
USB_OC0#
AH36
USB_OC1#
AL40
USB_OC2#
AJ44
USB_OC3#
AL41
USB_OC4#
AV47
USB_OC5#
AR35
USB_OC6#
AR37
USB_OC7#
AV43
USB2_COMP
F4
F3
U13
G3
PCH_GPD7
BE41
G45
G46
Y41
Y40
G48
G49
W44
W43
H48
H47
U41
U40
F46
G47
R44
T43
ESPI_EC_IO0
BB39
ESPI_EC_IO1
AW37
ESPI_EC_IO2
AV37
ESPI_EC_IO3
BA38
LPC_LFRAME#
BE38
AW35
SERIRQ
LPC_PIRQAB
BA36
SIO_RCIN#
BE39
EC_RST#
BF38
CLK_PCI_EC_R
BB36
CLK_PCI_LPC_R
BB34
EXT_SMI#
T48
T47
AH40
DEVSLP1_SSD1
AH35
DEVSLP0_HDD
AL48
AP47
DEVSLP7
AN37
AN46
DEVSLP4_SSD2
AR47
AP48
R928 113/F_4
R924 1K/F_4
R929 1K/F_4
TP14
R257 22_1%_4
R265 22_1%_4
TP75
TP7
Modify 8/10
3
USBP1- 56
USBP1+ 56
USBP2- 56
USBP2+ 56
USBP3- 43
USBP3+ 43
USBP4- 50
USBP4+ 50
TP78
TP79
USBP6- 35
USBP6+ 35
USBP7- 53
USBP7+ 53
USBP8- 50
USBP8+ 50
TBTA_U SB2_ D_N 42
TBTA_U SB2_ D_P 42
TBTB_U SB2_ D_N 42
TBTB_U SB2_ D_P 42
modify 12/29
USBP14- 46
USBP14+ 46
USB_OC0# 43
USB_OC1# 56
If OTG is not implemented on the platform,
then USB2_ID and should both be connected
to ground.
PCIE_TXP24_SSD 48
PCIE_TXN24_SSD 48
PCIE_RXP24_SSD 48
PCIE_RXN24_SSD 48
PCIE_TXP23_SSD 48
PCIE_TXN23_SSD 48
PCIE_RXP23_SSD 48
PCIE_RXN23_SSD 48
PCIE_TXP22_SSD 48
PCIE_TXN22_SSD 48
PCIE_RXP22_SSD 48
PCIE_RXN22_SSD 48
PCIE_TXP21_SSD 48
PCIE_TXN21_SSD 48
PCIE_RXP21_SSD 48
PCIE_RXN21_SSD 48
change PCIE port for RAID 2/1
modify 8/3
R226 33_5%_4
R247 33_5%_4
R236 33_5%_4
R238 33_5%_4
DEVSLP1_SSD1 47
DEVSLP0_HDD 47
DEVSLP4_SSD2 48
DB/IO-1
DB/IO-2
MB/IO-3
Tobii
CCD
Metal K B
XBOX
TypeC1
TypeC2
BT
LPC_LAD0 46,49
LPC_LAD1 46,49
LPC_LAD2 46,49
LPC_LAD3 46,49
LPC_LFRAME# 46,49
SERIRQ 49
SIO_RCIN# 49
C164 18p/50V_4
C167 18p/50V_4
SSD1
HDD
SSD2
SSD2 PCIE x4
(USBP1_TypeA-1)
(USBP2_TypeA-2)
(USBP3_TypeA-3)
(USBP4)
(USBP6)
(USBP7)
(USBP8)
(USBP9)
(USBP10)
(USBP14)
EMI RESERVE
EMI RESERVE
CLK_PCI_EC 49
CLK_PCI_LPC 46
This strap should sample HIGH.
USB 2.0 PORT
PORT1
USB2 DB-1
USB2 DB-2
PORT2
PORT3
USB2 MB-1
PORT4
NC
PORT5
CCD
PORT6
Metal K B
PORT7
PORT8
XBOX
PORT9
TypeC1
TypeC2
PORT10
PORT11
NC
PORT12
NC
PORT13
NC
BT( CNVi )
PORT14
+3V_DEEP_SUS 2,10,11,12,13,14,16,40
2
USB_OC0#
EC9 *10P/50V/C0G_4
CLK_PCI_EC
EC2 *10P/50V/C0G_4
R1005 *100K_1%_4
LPC_PIRQAB
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC2#
USB_OC0#
USB_OC1#
SERIRQ
SIO_RCIN#
DEVSLP0_HDD
DEVSLP1_SSD1
DEVSLP4_SSD2
EXT_SMI#
PCH_GPD7
R1019 100K_1%_4
USB 3.0 PORT
PORT1
PORT2
PORT3
PORT4
PORT7
PORT8~10 NC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet
R264 10K/F_4
modify 8/9
R237 10K/F_4
R229 10K/F_4
R228 10K/F_4
R227 10K/F_4
R196 10K/F_4
R221 10K/F_4
R230 10K/F_4
R195 10K/F_4
C166 *0.1u/10V_2
C162 0.1u/10V_2
C165 0.1u/10V_2
R411 10K/F_4
R993 10K/F_4
R1032 *100K/F_4
R1034 *100K/F_4
R206 *100K/F_4
R1021 *100K/F_4
R1011 *10K/F_4
+3VPCU
USB3 DB_TYPEA-1
USB3 DB_TYPEA-2
USB3 MB_TYPEA-1
NC Tobii
NC PORT5~6
NC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 1/7 (DM I/USB/PCIE)
PCH 1/7 (DM I/USB/PCIE)
PCH 1/7 (DM I/USB/PCIE)
1
5
ACZ_BCLK
*47p/50V_4
C1207
ACZ_BCLK
ACZ_SDIN0_R
ACZ_SDO
ACZ_SYNC
ACZ_RST#
AUD_AZACPU_SDO
AUD_AZACPU_SDI
AUD_AZACPU_SCLK_R
I2S2_S CLK
I2S2_RX D
MODEM_CLKREQ_C
CNV_RF_RESET#_C
RTC_RST#
SRTC_RST#
EC_PWROK_R
PCH_RSMRST#
DPWROK_R
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SML0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SMB1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
SYS_PWROK
PCH_RSMRST#
R936 33_4
R935 *Short_0402
R940 33_4
R941 33_4
R934 33_4
R908 30_4
R930 30_4
R399 *0_4
R423 *0_4
R211 *0_4
R371 *Short_0402
R240 *Short_0402
PCH_AZ_CODEC_BITCLK 44
PCH_AZ_CODEC_SDIN0 44
PCH_AZ_CODEC_SDOUT 44
PCH_AZ_CODEC_SYNC 44
Modify 8/10
modify 8/9
PCH_AZ_CODEC_RST# 44
AUD_AZACPU_SDO_R 3
AUD_AZACPU_SDI 3
AUD_AZACPU_SCLK 3
Add R1204 for CNVi 9/29
PCM_CLK 46
PCM_IN 46
RTC_RST# 16
RSMRST# 16,49
D D
C C
BD11
BE11
BF12
BG13
BE10
BF10
BE12
BD12
AM2
AN3
AM3
AV18
AW18
BA17
BE16
BF15
BD16
R1204 75K /F_4
AV16
AW15
BE47
BD46
AY42
BA47
AW41
BE25
BE26
BF26
BF24
BF25
BE24
BD33
BF27
BE27
4
U24D
HDA_BCLK/I2S0_SCLK
HDA_SDI0/I2S0_RXD
HDA_SDO/I2S0_TXD
HDA_SYNC/I2S0_SFRM
HDA_RST#/I2S1_SCLK
HDA_SDI1/I2S1_RXD
I2S1_TXD /SNDW 2_DA TA
I2S1_S FRM/SN DW2_ CLK
HDACPU_SDO
HDACPU_SDI
HDACPU_SCLK
GPP_D8/I2S2_S CLK
GPP_D7/I2S2_R XD
GPP_D6/I2S2_TXD /MODEM_CLKREQ
GPP_D5/I2S2_S FRM/CNV_RF_RES ET#
GPP_D20/DMIC_D ATA0/SNDW4 _DATA
GPP_D19/DMIC_C LK0/SNDW 4_CLK
GPP_D18/DMIC_D ATA1/SNDW3 _DATA
GPP_D17/DMIC_C LK1/SNDW 3_CLK
RTCRST#
SRTCRST#
PCH_PWROK
RSMRST#
DSW_PW ROK
GPP_C2/SMB ALERT#
GPP_C0/SMB CLK
GPP_C1/SMB DATA
GPP_C5/SML0 ALERT#
GPP_C3/SML0 CLK
GPP_C4/SML0 DATA
GPP_B23/SM L1ALERT#/PCHHOT#
GPP_C6/SML1 CLK
GPP_C7/SML1 DATA
PCH_CFL-H_874P
HDA Bus(CLG)
GPP_A12/BM _BUSY#/ISH_GP6/S X_EXIT_HOLDOFF#
GPP_B1/GSPI1_ CS1#/TIME_SYNC1
GPP_K17/ADR _COMPLETE
GPP_A13/SUS WARN#/S USPWRDNA CK
4 OF 13
GPP_A8/CLKR UN#
GPD11/LANPHYP C
GPD9/SLP_W LAN#
DRAM_RESET#
GPP_B2/VRA LERT#
GPP_B0/GSPI0_ CS1#
GPP_B11/I2S_ MCLK
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SL P_S0#
GPD4/SLP_S3 #
GPD5/SLP_S4 #
GPD10/SLP_S 5#
GPD8/SUSCLK
GPD0/BATLOW #
GPP_A15/SUS ACK#
GPD2/LAN_W AKE#
GPD1/ACPRES ENT
SLP_SUS#
GPD3/PW RBTN#
SYS_RESET#
GPP_B14/SP KR
CPUPWRGD
ITP_PMOD E
PCH_JTAGX
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK
3
BF36
AV32
CLKRUN#
LAN_DIS#
BF41
SLP_WLAN_N
BD42
DDR_DRAMRST#_L
BB46
GPP_B2
BE32
BF33
BE29
R47
MPHY_EXT_PWR_GATE
AP29
SYS_PWROK_R
AU3
PCH_WAKE#_L
BB47
SLP_A#_L
BE40
SLP_LAN#
BF40
PCH_SLP_S0ix#_L
BC28
SLP_S3#_L
BF42
SLP_S4#_L
BE42
SLP_S5#_L
BC42
BE45
SUSCLK32
BF44
BATLOW#
BE35
SUSACK#
BC37
SUSWARN#
LANWAKE_N
BG44
BG42
ACPRESENT
PCH_SLP_SUS#
BD39
BE46
DNBSWON#
XDP_DBRESET#
AU2
ACZ_SPKR
AW29
AE3
PROCPWRGD
ITP_PMOD E
AL3
PCH_JTAGX
AH4
PCH_TMS
AJ4
PCH_TDO
AH3
PCH_TDI
AH2
PCH_TCK
AJ3
TP11
TP10
R1020 *Short_0402
R984 *0_4
R210 *Short_0402
R1031 *Short_0402
R995 *Short_0402
R982 *Short_0402
R998 *Short_0402
R999 *Short_0402
R994 *Short_0402
R261 *0_4
R988 *Short_0402
R1002 *0_4
R903 *Short_0402
R906 *Short_0402
R904 *Short_0402
R920 *Short_0402
R921 51_4
PCH_TCK 16
SYS_PWROK
CLKRUN# 49
C1255 *0.1u/16V_4
DDR_DRAMRST# 17,18,19,20
UART_WAKE_N 4 6
Modify 8/10
TP19
modify 8/9
PCIE_WAKE# 39,46,55
SLP_A# 16
TP13
PCH_SLP_S0ix# 16
SUSB# 16,49
SUSC# 16,49
SLP_S5# 16
SUSCLK 46
BATLOW# 39
TP72
ACPRESENT 49
TP12
DNBSWON# 49
XDP_DBRESET# 16
ACZ_SPKR 44
PROCPWRGD 2
ITP_PMOD E 16
H_TCK 2,16
H_TMS 2,16
H_TDO 2,16
H_TDI 2,16
2
change BOM 9/4
modify 8/9
DDR_DRAMRST#
MPHY_EXT_PWR_GATE
PCH_WAKE#_L
GPP_B2
LANWAKE_N
SUSACK#
XDP_DBRESET#
SUSCLK32
SUSWARN#
BATLOW#
ACPRESENT
PCH_SLP_S0ix#_L
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_PCH_CLK
SMB_PCH_DAT
PCH_TDO
CLKRUN#
R837 470/F_4
R293 200K/F_4
R1007 4.7K/F_4
R985 4.7K/F_4
R1001 4.7K/F_4
R989 *10K/F_4
R931 10K/F_4
R258 *10K/F_4
R990 *10K/F_4
R1040 10K/F_4
R1000 100K/F_4
R975 100K/F_4
R967 2.2K_5%_4
R961 2.2K_5%_4
R973 2.2K_5%_4
R974 2.2K_5%_4
R972 2.2K_5%_4
R976 2.2K_5%_4
R919 *51_4
R310 10K/F_4
1
10
+1.2VSUS
+3V_DEEP_SUS
change R1007 to 4.7K for CNVi 9/29
change R985 to 4.7K for CNVi 9/29
+1.05V_DEEP_SUS
+3V
ME Lock
ME_WR# 49
B B
R939 1K/F_4
0 = *Enable security in the Flash
Description (iPD 20K)
1 = Disable Flash Descriptor Security (Override)
TLS CONFIDENTIALITY ENABLED
HIGH: Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.(CRB)
LOW: security measures defined in the Flash
Descriptor. (Default)
+3V_DEEP_SUS 2,9,11,12,13,14,16,40
RTC Circuitry(RTC)
RTC Power trace width 20mils.
R978 1.5K/_4
+3VPCU
R951 47K/F_4
+3V_RTC_0
+3V_RTC_0 +3V_RTC_1
R953 1K/F_4
A A
1
1
23
4
RTC_CONN
DFHS02FS032
CON3
Correct pin defined 9/20
2
ME_WR#
+3V_RTC_2
R947
3
Q95
METR3904-G
5
BAT54CW
ACZ_SDO
+3V_DEEP_SUS
D72
4.7K_1%_4
(20mils)
RTC_N03
modify 8/9
R353
*1K_1%_4
R354
*1K_1%_4
+3V_RTC
C1214
1u/6.3V_4
R945
30mils
+3V_RTC
CLR_CMOS 49
CLR_CMOS
R979
27K_4
R971
27K_4
4.7K_1%_4
EC reset RTC
R409
*100K_1%_4
3
2
1
RTC_RST#
C1217
1u/6.3V_4
SRTC_RST#
C1211
1u/6.3V_4
(20mils)
R969
68.1K_1%_4
R962
2
RTC_RST#
Q22
2N7002KTB
1
J1
*SOLDERJUMPER-2
2
150K_1%_4
3
Q20
*2N7002KTB
1
+5VPCU
4
SRTC_RST#
R1003 *4.7K/F_4
+3VPCU
2ND_MBDATA 41,45,49,50
PCH/EC
XDP/DDR
SYSPWOK
SYS_PWROK
EC_PWROK_R
SYS_PWROK_R EC_PWROK
DP_PWROK
2ND_MBCLK 41,45,49,50
PCH_SMBDATA 16,17,18,19,20
PCH_SMBCLK 16,17,18,19,20
+3VPCU
+3V
+3V
DPWROK_R
SYS_PWROK_R
PCH_RSMRST#
R1008 *4.7K/F_4
R403 4.7K/F_4
R417 4.7K/F_4
+3V_DEEP_SUS
4
R253
R239
R219 *Short_0402
R212 *0_5%_4
R216
R255 680K/F_4
R213 10K_1%_2
R248
modify 8/9
C163
3 5
*0_5%_4
0_5%_4
*0_5%_4
*10K_1%_2
Q96
4 3
1
2N7002KDW
Q33
4
1
2N7002KDW
*0.1u/10V_2
EC_PWROK
1
2
U8
*NL17SZ08DFT2G
3
+3V_DEEP_SUS
5
2
6
+3V
5
3
2
6
SMB_ME1_DAT
modify 8/9
SMB_ME1_CLK
SMB_PCH_DAT
modify 8/9
SMB_PCH_CLK
PCH_PWROK 49
CNVi
Modify the circuit 10/19
Add 10/18 Intel#571006
EC_PWROK 49
IMVP_P WRGD 2,61
R224
*10K_1%_2
CNV_RF_RESET#_C
MODEM_CLKREQ_C
+3V_DEEP_SUS +1.8V_DEEP_SUS
R1223
R1221
10K/F_4
4.7K/F_4
6
3 4
5
3
5
4
TOP SWAP OVERRIDE STRAP
HIGH:TOP SWAP ENABLED (CRB)
LOW:TOP SWAP DISABLED(DEFAULT)
This signal has an internal pull-down.
0 = Disable IntelR DCI-OOB (Default)
1 = Enable IntelR DCI-OOB
2
Q104A
PJX138K
R1222
10K/F_4
Q103A
PJX138K
2
+1.8V_DEEP_SUS +3V_DEEP_SUS
2
modify 8/9
Q104B
PJX138K
1
R1220
4.7K/F_4
6 1
Q103B
PJX138K
ACZ_SPKR
SMB1ALERT#
+3V_DEEP_SUS
CNV_RF_RESET# 46
GPP_C5/SML0ALERT#
0 = LPC is selected (for EC). (Default)
1 = eSPI is selected (for EC).
ESPI/LPC SELECT STRAP
HIGH:eSPI Is selected for EC.
LOW: LPC Is selected for EC. (Default)
MODEM_CLKREQ 46
SML0ALERT#
modify 8/9
TLS CONFIDENTIALITY ENABLED
HIGH:T Enable Intel ME Crypto Transport Layer Security
R276
20K/F_4
R277
150K/F_4
R279
*20K_1%_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
(TLS) cipher suite (with confidentiality). (CRB)
LOW: Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
SMBALERT#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 2/7 (HD A/SMBUS)
PCH 2/7 (HD A/SMBUS)
PCH 2/7 (HD A/SMBUS)
1
+3V_DEEP_SUS
+3V_DEEP_SUS
R966
4.7K_1%_4
R968
*20K_1%_4
ZGQ
ZGQ
ZGQ
10 73 Monday, March 12, 2018
10 73 Monday, March 12, 2018
10 73 Monday, March 12, 2018
R970
*4.7K_1%_4
R963
100K/F_4
of
1A
1A
1A
PLT_ID0
PLT_ID1
5
SSD1 PCIE x4
HDD SATA
SSD1 PCIE x4
modify it 9/20
TBT PCIE x4
R209 *100K/F_4
R218 100K/F_4
LAN
PCIE_TXP11_SSD 47
PCIE_TXN11_SSD 47
PCIE_RXP11_SSD 47
PCIE_RXN11_SSD 47
PCIE_TXN14_LAN 55
PCIE_TXP14_LAN 55
PCIE_RXN14_LAN 55
PCIE_RXP14_LAN 55
PCIE_TXP12_SSD 47
PCIE_TXN12_SSD 47
PCIE_RXP12_SSD 47
PCIE_RXN12_SSD 47
PCIE_TXP20_TBT 39
PCIE_TXN20_TBT 39
PCIE_RXP20_TBT 39
PCIE_RXN20_TBT 39
PCIE_TXP19_TBT 39
PCIE_TXN19_TBT 39
PCIE_RXP19_TBT 39
PCIE_RXN19_TBT 39
CLINK_CLK 46
CLINK_DATA 46
CLINK_RESET# 46
SATA_TXN0 47
SATA_TXP0 47
SATA_RXN0 47
SATA_RXP0 47
2/5 modify
Modify 8/10
HSIO MUX PORT
PCIE1-8
NC
PCIE9-12
SSD1 SATA/PCIE * 4
PCIE13
HDD (SATA2)
LAN PCIE14
WLAN
PCIE15
PCIE16 NC
PCIE17-20
Apline Ridg e
PCIE21-24
D D
+3V
C C
SSD2 PCIE * 4
PLT_ID0 PU for REVE PCB 2/1
R215 100K/F_4
R220 *100K/F_4
RESERVE
CLK_DPLL_NSCCLKP 2
CLK_DPLL_NSCCLKN 2
CLK_CPU_BCLKP 2
CLK_CPU_BCLKN 2
R932 60.4/F_4
Swap SSD2 and TBT REQ for PCIE SSD RAID 2/1
PCIE_CLKREQ_NGFF1# 47
PCIE_CLKREQ_VGA# 21
XTAL24_IN
XTAL24_OUT
PCIE_CLKREQ_LAN# 55
PCIE_CLKREQ_WLAN# 46
PCIE_CLKREQ_NGFF2# 48
PCIE_CLKREQ_TBT# 39
The 24 MHz (50 Ohm ESR) XTAL used for Skylake-H
needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL for
Cannonlake-H.
C213 27P/50V_4
B B
24MHZ/+-20PPM
Y3
C214 27P/50V_4
Crystal Components with Surrounding 10 mil Wide GND Shield Trace
Break Out:4-10 mil Wi de GND Shield Trace
XTAL24_IN_L
R374 33_5%_2
1
2
R381
1M/F_4
3
4
XTAL24_OUT_L
L13
4 3
2
1
*DLP0NSN900HL2L
R375 33_5%_2
RTC Clock 32.768KHz
C1242 18p/50V_4
Y5
32.768KHZ/20ppm
C1243 18p/50V_4
A A
R933 48.7_4
R917 48.7_4
R913 48.7_4
chang P/N to CS04872FB11
8/18
1 2
R1006
10M_4
CLKOUT_SRC_N15
CLKOUT_SRC_P15
R909 *0_4
TPEV_ PEG_ VIEW _2
5
RTC_X1
RTC_X2
TPEV_ PEG_ VIEW _2 8
CNV_PA_BLANKING 46
modify 10/20
CNV_BRI_DT 46
CNV_BRI_RSP 46
CNV_RGI_DT 46
CNV_RGI_RSP 46
CNV_MFUART2_RXD 46
CNV_MFUART2_TXD 46
HRESET 41
4
CNVi
R415
R426
R425
EMI RESERVE
CL_CLK
EC4 *10P/50V/C0G_4
C1222 0.1u/16V_4
C1223 0.1u/16V_4
C1247 0.22u/6.3V_2
C1246 0.22u/6.3V_2
C1251 0.22u/6.3V_2
C1252 0.22u/6.3V_2
TP17
GPP_G3
R424 *0_4
R1202 0_4
R1212 33_4
R1214 33_4
4
CL_CLK
*Short_0402
CL_DATA
*Short_0402
CL_RST#
*Short_0402
RS232_DET#
PLT_ID1
PLT_ID0
PCIE_TXN14_LAN_C
PCIE_TXP14_LAN_C
PCIE_TXP20_TBT_C
PCIE_TXN20_TBT_C
PCIE_TXP19_TBT_C
PCIE_TXN19_TBT_C
XTAL24_OUT
XTAL24_IN
XCLK_RBIAS
RTC_X1
RTC_X2
PCIE_CLKREQ_NGFF1#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ2#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_NGFF2#
PCIE_CLKREQ_TBT#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#
CLKOUT_SRC_N15
CLKOUT_SRC_P15
GPP_J0
GPP_J1
GPP_J10
CNV_BRI_DT_R
CNV_BRI_RSP
CNV_RGI_DT_R
CNV_RGI_RSP
R407 *0_4
R404 *0_4
GPP_J8
GPP_J9
AR2
AT5
AU4
P48
V47
V48
W47
L47
L46
U48
U47
N48
N47
P47
R46
C36
B36
F39
G38
AR42
AR48
AU47
AU46
C39
D39
D46
C47
B38
C38
C45
C46
E37
D38
J41
H42
B44
A44
R37
R35
D43
C44
N42
M44
AW13
AV13
AR13
AW3
AT10
AW2
U24C
CL_CLK
CL_DATA
CL_RST#
GPP_K8
GPP_K9
GPP_K10
GPP_K11
GPP_K0
GPP_K1
GPP_K2
GPP_K3
GPP_K4
GPP_K5
GPP_K6
GPP_K7
PCIE11_TXP/SATA0A_TXP
PCIE11_TXN/SATA0A_TXN
PCIE11_RXP/SATA0A_RXP
PCIE11_RXN/SATA0A_RXN
GPP_F10/SATA_ SCLOCK
GPP_F11/SATA_ SLOAD
GPP_F13/SATA_ SDATAOUT0
GPP_F12/SATA_ SDATAOUT1
PCIE14_TXN/SATA1B_TXN
PCIE14_TXP/SATA1B_TXP
PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP
PCIE13_TXN/SATA0B_TXN
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP
PCIE12_TXP/SATA1A_TXP
PCIE12_TXN/SATA1A_TXN
PCIE12_RXP/SATA_1A_RXP
PCIE12_RXN/SATA1A_RXN
PCIE20_TXP/SATA7_TXP
PCIE20_TXN/SATA7_TXN
PCIE20_RXP/SATA7_RXP
PCIE20_RXN/SATA7_RXN
PCIE19_TXP/SATA6_TXP
PCIE19_TXN/SATA6_TXN
PCIE19_RXP/SATA6_RXP
PCIE19_RXN/SATA6_RXN
PCH_CFL-H_874P
U24G
BE33
GPP_A16/CLK OUT_48
D7
CLKOUT_CPUNSSC_P
C6
CLKOUT_CPUNSSC
B8
CLKOUT_CPUBCLK_P
C8
CLKOUT_CPUBCLK
U9
XTAL_OUT
U10
XTAL_IN
T3
XCLK_BIASREF
BA49
RTCX1
BA48
RTCX2
BF31
GPP_B5/SRCC LKREQ0#
BE31
GPP_B6/SRCC LKREQ1#
AR32
GPP_B7/SRCC LKREQ2#
BB30
GPP_B8/SRCC LKREQ3#
BA30
GPP_B9/SRCC LKREQ4#
AN29
GPP_B10/SRC CLKREQ5#
AE47
GPP_H0/SRCCL KREQ6#
AC48
GPP_H1/SRCCL KREQ7#
AE41
GPP_H2/SRCCL KREQ8#
AF48
GPP_H3/SRCCL KREQ9#
AC41
GPP_H4/SRCCL KREQ10#
AC39
GPP_H5/SRCCL KREQ11#
AE39
GPP_H6/SRCCL KREQ12#
AB48
GPP_H7/SRCCL KREQ13#
AC44
GPP_H8/SRCCL KREQ14#
AC43
GPP_H9/SRCCL KREQ15#
V2
CLKOUT_PCIE_N15
V3
CLKOUT_PCIE_P15
T2
CLKOUT_PCIE_N14
T1
CLKOUT_PCIE_P14
AA1
CLKOUT_PCIE_N13
Y2
CLKOUT_PCIE_P13
AC7
CLKOUT_PCIE_N12
AC6
CLKOUT_PCIE_P12
PCH_CFL-H_874P
U24M
GPP_G0/SD_CM D
BE9
GPP_G1/SD_D0
BF8
GPP_G2/SD_D1
BF9
GPP_G3/SD_D2
BG8
GPP_G4/SD_D3
BE8
GPP_G5/SD_CD#
BD8
GPP_G6/SD_CL K
GPP_G7/SD_W P
AP3
GPP_I11/M2_SK T2_CFG0
AP2
GPP_I12/M2_SK T2_CFG1
AN4
GPP_I13/M2_SK T2_CFG2
AM7
GPP_I14/M2_SK T2_CFG3
AV6
GPP_J0/CNV_ PA_BLANKING
AY3
GPP_J1/CPU_ VCCIO_PWR_ GATE#
GPP_J11/A4 WP_PRES ENT
AV7
GPP_J10
GPP_J_2
GPP_J_3
AV4
GPP_J_4_CNV _BRI_DT_UART0_RTSB
AY2
GPP_J5/CNV_ BRI_RSP/UART0_RX D
BA4
GPP_J6/CNV_ RGI_DT/UART0_TXD
AV3
GPP_J7/CNV_ RGI_RSP/UART0_CTS#
GPP_J8/CNV_ MFUART2_RXD
AU9
GPP_J9/CNV_ MFUART2_TXD
PCH_CFL-H_874P
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE_15_SATA_2_TXN
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATA_ LED#
GPP_E0/SATAX PCIE0/SATAGP0
GPP_E1/SATAX PCIE1/SATAGP1
GPP_E2/SATAX PCIE2/SATAGP2
GPP_F0/SATAXP CIE3/SATAGP_3
GPP_F1/SATAXP CIE4/SATAGP4
GPP_F2/SATAXP CIE5/SATAGP5
GPP_F3/SATAXP CIE6/SATAGP6
GPP_F4/SATAXP CIE7/SATAGP7
GPP_F21/EDP _BKLTCTL
GPP_F20/EDP _BKLTEN
GPP_F19/EDP _VDDEN
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
CLKIN_XTAL
7 OF 13
CNV_WT_RCOMP
GPPJ_RCOMP_ 1P81
GPPJ_RCOMP_ 1P82
GPPJ_RCOMP_ 1P83
13 OF 13
PLTRST_CPU#
CNV_WR_CLKN
CNV_WR_CLKP
SD_RCOMP_1P8
SD_RCOMP_3P3
3 OF 13
3
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP
PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP
THRMTRIP #
PECI
PM_SYNC
PM_DOWN
Y3
Y4
B6
A6
AJ6
AJ7
AH9
AH10
AE14
AE15
AE6
AE7
AC2
AC3
AB2
AB3
W4
W3
W7
W6
AC14
AC15
U2
U3
AC9
AC11
AE9
AE11
R6
CNV_WR_D0N
CNV_WR_D0P
CNV_WR_D1N
CNV_WR_D1P
CNV_WT_CLKN
CNV_WT_CLKP
CNV_WT_D0N
CNV_WT_D0P
CNV_WT_D1N
CNV_WT_D1P
PCIE_RCOMPN
PCIE_RCOMPP
RSVD2
RSVD3
RSVD#BC1
3
G36
F36
C34
D34
K37
J37
C35
B35
F44
E45
PCIE_TXN15_WLAN_C
B40
PCIE_TXP15_WLAN_C
C40
L41
M40
B41
C41
K43
K44
PCIE_TXN17_TBT_C
A42
PCIE_TXP17_TBT_C
B42
P41
R40
PCIE_TXN18_TBT_C
C42
PCIE_TXP18_TBT_C
D42
AK48
AH41
NGFF1_DET1
AJ43
AK47
AN47
NGFF2_DET2
AM46
AM43
AM47
AM48
PCH_DPST_PWM
AU48
PCH_LVDS_BLON
AV46
PCH_DISP_ON
AV44
PM_THRMTRIP#_L
AD3
PCH_PECI
AF2
PM_SYNC_R
AF3
CPU_PLTRST#
AG5
H_PM_DOWN
AE2
Swap SSD2 and TBT CLK for PCIE SSD RAID 2/1
CLKIN_XTAL
R388 10K/F_4
BD4
BE3
BB3
BB4
BA3
BA2
BC5
BB6
BE6
BD7
BG6
BF6
CNV_RCOMP
BA1
PCIECOMP_N
B12
PCIECOMP_P
A13
BE5
BE4
BD1
BE1
BE2
Y35
Y36
BC1
AL35
TP
R1026 10K/F_4
R910 620_4
R902 30_4
R347 *Short_0402
CK_XDP_N 16
CK_XDP_P 16
CPU_PCI_BCLKN 2
CPU_PCI_BCLKP 2
CLK_PCIE_SSD1N 47
CLK_PCIE_SSD1P 47
CLK_VGA_N 21
CLK_VGA_P 21
CLK_PCIE_LANN 55
CLK_PCIE_LANP 55
CLK_PCIE_WLANN 46
CLK_PCIE_WLANP 46
CLK_PCIE_SSD2N 48
CLK_PCIE_SSD2P 48
CLK_PCIE_TBTN 39
CLK_PCIE_TBTP 39
modify 8/9
CLKIN_XTAL 46
CNVI for WLAN
R373 150/F_4
R949 100/F_4
R385 200_1%_4
R395 200_1%_4
R927 200_1%_4
CNV_WR_CLKN 46
CNV_WR_CLKP 46
CNV_WRXN0 46
CNV_WRXP0 46
CNV_WRXN1 46
CNV_WRXP1 46
CNV_WT_CLKN 46
CNV_WT_CLKP 46
CNV_WTXN0 46
CNV_WTXP0 46
CNV_WTXN1 46
CNV_WTXP1 46
TP66
C1224 0.1u/16V_4
C1225 0.1u/16V_4
C1245 0.22u/6.3V_2
C1244 0.22u/6.3V_2
C1254 0.22u/6.3V_2
C1253 0.22u/6.3V_2
+3V
SSD1
GFX
LAN
WLAN
SSD2
TBT
2
PCIE_RXN9_SSD 47
PCIE_RXP9_SSD 47
PCIE_TXN9_SSD 47
PCIE_TXP9_SSD 47
PCIE_RXN10_SSD 47
PCIE_RXP10_SSD 47
PCIE_TXN10_SSD 47
PCIE_TXP10_SSD 47
PCIE_RXN15_WLAN 46
PCIE_RXP15_WLAN 46
PCIE_TXN15_WLAN 46
PCIE_TXP15_WLAN 46
2/5 modify
PCIE_RXN17_TBT 39
PCIE_RXP17_TBT 39
PCIE_TXN17_TBT 39
PCIE_TXP17_TBT 39
PCIE_RXN18_TBT 39
PCIE_RXP18_TBT 39
PCIE_TXN18_TBT 39
PCIE_TXP18_TBT 39
SATA_LED# 47,48,51
NGFF1_DET1 47
For SSD1 Det
modify 8/9
PCH_DPST_PWM 35
PCH_LVDS_BLON 35
PCH_DISP_ON 35
PM_THRMTRIP# 2,17,18,19,20,50
PCH_PECI 2
PM_SYNC 2
CPU_PLTRST#R 2
H_PM_DOWN 2
Close WiFi Connector
CNV_RGI_RSP
R398 20K/F_4
CNV_BRI_RSP
R384 20K/F_4
GPP_J9
CNV_BRI_DT_R
CNV_RGI_DT_R
2
R916 *4.7K /F_4
R339 10K/F_4
R358
R362 *100K/F_4
+1.8V_DEEP_SUS
+1.8V_DEEP_SUS
+1.8V_DEEP_SUS
R365 4.7K/F_4
R368 *4.7K/F_4
+1.8V_DEEP_SUS
20K_1%_4
1
SSD1 PCIE x4
WLAN
TBT PCIE x4
SSD SATA I/F --> H
SSD PCIE I/F --> L
stuff R1037 and unstuff R1039 for PCIE SSD RAID 2/1
R262 *10K/F_4
R1037 10K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
PM_THRMTRIP#_L
EMI RESERVE
SATA_LED#
D99 PESD5V0H1BSF
NGFF1_DET1
NGFF2_DET2
RS232_DET#
GPP_G3
PCH_DPST_PWM
PCH_PECI
PCIE_CLKREQ_NGFF1#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ2#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_TBT#
PCIE_CLKREQ_NGFF2#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#
CPU_VCCIO_PWR_GATE 59
R918 *100K/F_4
Modify 8/10
VCCIO Power Gate control for C10
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 3/7 (SATA /LPC/CLK)
PCH 3/7 (SATA /LPC/CLK)
PCH 3/7 (SATA /LPC/CLK)
1
modify 8/9
R912 2K/F_4
C1204 1000P/50V_4
Add 12/19
1 2
R231 10K/F_4
R1039 *10K/F_4
R225 *100K/F_4
R925 *10K/F_4
R190 10K/F_4
R980 10K/F_4
R981 10K/F_4
R296 *10K/F_4
R298 10K/F_4
R343 10K/F_4
R300 10K/F_4
R1024 10K/F_4
R1022 *10K/F_4
R245 *10K/F_4
R1017 *10K/F_4
R243 *10K/F_4
R242 *10K/F_4
R251 *10K/F_4
R1018 *10K/F_4
R246 *10K/F_4
R244 *10K/F_4
+3V_DEEP_SUS
+1.8V_DEEP_SUS
R889
*10K/F_4
Q92
3
*PJA138K
2
1
ZGQ
ZGQ
ZGQ
11 73 Monday, March 12, 2018
11 73 Monday, March 12, 2018
11 73 Monday, March 12, 2018
11
+1.05V_DEEP_SUS
+3V
+3V
R911
*10K/F_4
GPP_J1
of
1A
1A
1A
5
4
3
2
1
SML2ALERT#
+3V_DEEP_ SUS
+3V_DEEP_ SUS
+3V_DEEP_ SUS
ZGQ
ZGQ
ZGQ
12
+3V_DEEP_ SUS
R1025
*4.7K/F_4
R1014
*30K_4
R234
100K/F_4
R266
*4.7K/F_4
R1028
100K/F_4
R1009
*4.7K/F_4
R1029
100K/F_4
R1010
*100_4
12 73 Monday, March 12, 2018
12 73 Monday, March 12, 2018
of
12 73 Monday, March 12, 2018
of
1A
1A
1A
PCH Strap Pin
D D
EMI RESERVE
PCH_SPI1_CLK
EC6 *10P/50V/C0G_4
TP15
TP16
PCH_SPI1_SI
PCH_SPI1_SI 16
C C
TP18
TP70
TP69
TP68
TP67
TP8
SPI_TPM_CS# SPI_TPM_CS#_L
TS_SP I1_CL K
TS_SP I1_CS #
TS_SP I1_MIS O
TS_SP I1_MO SI TS_SP I1_MIS O_R
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
R223 33_4
R222 33_4
R1027 *Short_0402
R1015 33_4
R278 33_4
R952 33_4
R957 33_4
R950 33_4
R948 33_4
PCH_SPI1_SI_L
PCH_SPI1_SO_L
PCH_SPI_CS0#_L
PCH_SPI1_CLK_L
SPI1_IO2
SPI1_IO3
TS_SP I1_CL K_R
TS_SP I1_CS #_R
TS_SP I1_MO SI_R
U24A
BE36
GPP_A11/PME#/SD_VDD2_PWR_EN#
R15
RSVD#R15
R13
RSVD#R13
AL37
VSS
AN35
TP#AN35
AU41
SPI0_MOSI
BA45
SPI0_MISO
AY47
SPI0_CS0#
AW47
SPI0_CLK
AW48
SPI0_CS1#
AY48
SPI0_IO2
BA46
SPI0_IO3
AT40
SPI0_CS2#
BE19
GPP_D1/SPI1_CLK/SBK1_BK1
BF19
GPP_D0/SPI1_CS#/SBK0_BK0
BF18
GPP_D3/SPI1_MOSI/SBK3_BK3
BE18
GPP_D2/SPI1_MISO/SBK2_BK2
BC17
GPP_D22/SPI1_IO3
BD17
GPP_D21/SPI1_IO2
PCH_CFL-H_874P
1 OF 13
GPP_B13/PLTRST#
GPP_K16/GSXCLK
GPP_K12/GSXDOUT
GPP_K13/GSXSLOAD
GPP_K14/GSXDIN
GPP_K15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
INTRUD ER#
This strap should sample HIGH.
R259 *10 0K/F_4
B B
PCH SPI ROM(CLG)
+3V_DEEP_ SUS
Follow VSPI level (1.8V or 3.3V)
R187 0_4
PLTRST#(CLG)
PCI_PLTRST#
A A
+3V_DEEP_ SUS
C1381 0.1u/16V_4
5
1
2
3
MC74VHC1G08DFT2G
5
4
PLTRST#
U25
PLTRST# 21,39,46,47,48,49,50,55
R977
100K/F_4
XDP_SPI_IO2 16
+SPI_VCC
PCH_SPI_SI_EC 49
PCH_SPI_SO_EC 49
SPI_CS0#_UR_ME 49
PCH_SPI_CLK_EC 49
4
EC
PLTRST#(CLG)
PCI_PLTRST#
AV29
Y47
Y46
Y48
W46
AA45
AL47
AM45
BF32
BC33
AE44
AJ46
AE43
AC47
AD48
AF47
AB47
AD47
AE48
BB44
PCH_SPI_CS0# +SPI_VCC
PCH_SPI1_CLK
PCH_SPI1_SI
PCH_SPI1_SO
SPI1_IO2
R1038 0_4
+SPI_VCC
R217 33_4
R214 33_4
R1016 *Short_0402
R1030 33_4
Modify 8/10
KBL_DET#
SMB_ME4_DAT
SMB_ME4_CLK
PCH_GPP_H15
SMB_ME3_DAT
SMB_ME3_CLK
SML2ALERT#
SMB_ME2_DAT
SMB_ME2_CLK
SM_INTRUDER#
PCH_GPP_H15
C1258
1u/10V_4
R1036 *1K_1%_4
R260 1M/F_4
follow intel command 8/8
R256 100K/F_4
+SPI_VCC
R1035
4.7K/F_4
SPI1_IO2 PCH_SPI_IO2
R1043 33_4
Modify 8/10
PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
3
TP71
TP9
+3V_RTC
+3V_DEEP_ SUS
PCH 6*5mm WSON 32M
SPI ROM Socket
2nd source AKE3DZN0Q02
R208
*2.55K/F_4
U26
1
VDD
CE#
6
SCK
5
SI
2
HOLD#
SO
3
WP#
VSS
BIOS SOCKET
change U26 footprint name to soic8-7_9-1_27
10/03
AKE3DF-KN01
Socket:DG008000011
Modify 8/10
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
modify 8/9
SMB_ME4_CLK
SMB_ME4_DAT
SMB_ME3_CLK
SMB_ME3_DAT
SMB_ME2_CLK
SMB_ME2_DAT
KBL_DET#
8
7
4
+SPI_VCC
R193 *1K_1%_4
C156
0.1u/16V_4
PCH_SPI_IO3
2
+3V_DEEP_ SUS
PCH_SPI1_SO_L
R263 1K/F_4
R249 1K/F_4
R250 1K/F_4
R1023 1K/F_4
R1012 1K/F_4
R1013 1K/F_4
+3VPCU
R983 *100K/F_4
C1221 *0.1U/16V_4
ESD
R194 33_4
*20K/F_4
R254
*4.7K/F_4
+3V_DEEP_ SUS
SPI1_IO3
ESPI FLASH SHARING MODE
HIGH:SLAVE ATTACEHD FLASH SHARING
LOW: 0: MASTER ATTACHED FLASH SHARING
This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
R235
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
update vlaue follow intel command 8/8
PCH_SPI1_SI_L
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
update vlaue follow intel command 8/8
SPI1_IO2
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
update vlaue follow intel command 8/8
SPI1_IO3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
PROJECT :
PCH 4/7 (GPIO/MISC)
PCH 4/7 (GPIO/MISC)
PCH 4/7 (GPIO/MISC)
1
5
Boot BISO Destin ation: HIGH=LPC, LOW=SPI
Modify 8/10
GPP_B22 LOW
TP80
modify 10/20
TP20
+3V_DEEP_SUS
R297 100K/F_4
R280
*Short_0402
R294
GPUEVENT#_PCH 26
D D
GC6FBEN_Q 26
DGPU_PWROK_Q 27
DGPU_PWR_EN 27
DGPU_HOLD_RST# 21
TPD_IN T#_PC H 54
EMI RESERVE
I2C1_SC L
EC3 *10P/50V/C0G_4
TBT_HTP LG_NL 5 39
TBT3
TPD
C C
TBT
B B
+3V
R360 *1K_1%_4
R290 *10K_1%_2
R591 10K_1%_2
R285 *10K_1%_2
R283 10K_1%_2
Modify 8/10
EDP_HPD_CPU
DGPU_PWR_EN
GC6FBEN_Q_ZRYD_W S1
DGPU_HOLD_RST#
DGPU_PWROK_Q
+3V
R325 *Short_0402
S_GPIO
R313 *Short_0402
I2C1_SC L 41
I2C1_SD A 41
I2C0_SC L 54
I2C0_SD A 54
TBT_DP _HPD 24,38,39
SIO_EXT_SCI# 49
+3V_DEEP_SUS
EDP_HPD_CPU 35
R363 100K_1%_4
R289 10K_1%_2
R588 *10K_1%_2
R287
R282 *10K_1%_2
Unstuff TBT_DP_HDP 10/20
R350 *0_5%_4
R314 10K_1%_2
10K_1%_2
GSPI1_MOSI
GSPI0_MOSI
DGPU_PWR_EN
DGPU_HOLD_RST#
GPP_B15
BBS_BIT1
GPP_C11
10K_1%_2
UART2_CTS#
UART2_RTS#
UART2_TXD
UART2_RXD
I2C1_SC L
I2C1_SD A
I2C0_SC L
I2C0_SD A
DDPB_HPD0
DP_HPD_PCH_R
HDMI_HPD_PCH_R
SIO_EXT_SCI#
EDP_HPD_CPU
4
U24K
BA26
GPP_B22/GSP I1_MOSI
BD30
GPP_B21/GSP I1_MISO
AU26
GPP_B20/GSP I1_CLK
AW26
GPP_B19/GSP I1_CS0#
BE30
GPP_B18/GSP I0_MOSI
BD29
GPP_B17/GSP I0_MISO
BF29
GPP_B16/GSP I0_CLK
BB26
GPP_B15/GSP I0_CS0#
BB24
GPP_C9/UART0_TXD
BE23
GPP_C8/UART0_R XD
AP24
GPP_C11/UART0_ CTS#
BA24
GPP_C10/UART0_ RTS#
BD21
GPP_C15/UART1_ CTS#/ISH_UART1_CTS#
AW24
GPP_C14/UART1_ RTS#/ISH_UART1_RTS#
AP21
GPP_C13/UART1_ TXD/ISH_UART1_TXD
AU24
GPP_C12/UART1_ RXD/ISH_UART1_RXD
AV21
GPP_C23/UART2_ CTS#
AW21
GPP_C22/UART2_ RTS#
BE20
GPP_C21/UART2_ TXD
BD20
GPP_C20/UART2_ RXD
BE21
GPP_C19/I2C1_S CL
BF21
GPP_C18/I2C1_S DA
BC22
GPP_C17/I2C0_S CL
BF23
GPP_C16/I2C0_S DA
BE15
GPP_D4/ISH_I2C2_ SDA/I2C3_SDA/ SBK4_BK4
BE14
GPP_D23/ISH_I2C2 _SCL/I2C3_SCL
PCH_CFL-H_874P
U24E
AT6
GPP_I0/DDPB_H PD0/DISP_MISC0
AN10
GPP_I1/DDPC_HP D1/DISP_MISC1
AP9
GPP_I2/DPPD_H PD2/DISP_MISC2
AL15
GPP_I3/DPPE_ HPD3/DISP_MISC3
AN6
GPP_I4/EDP_HP D/DISP_MISC4
PCH_CFL-H_874P
GPP_D9/ISH_SP I_CS#/GSPI2_CS0#
GPP_D10/ISH_S PI_CLK/GSPI2_CLK
GPP_D11/ISH_S PI_MISO/GP_BSSB _CLK/GSPI2_MISO
GPP_D12/ISH_S PI_MOSI/GP_BSSB _DI/GSPI2_MOSI
GPP_D16/ISH_UA RT0_CTS#/CNV_W CEN
GPP_D15/ISH_UA RT0_RTS#/GSPI2_CS1# /CNV_WFE N
GPP_D14/ISH_UA RT0_TXD/I2C2_SCL
GPP_D13/ISH_UA RT0_RXD/I2C2_SDA
GPP_H20/ISH_I2C0 _SCL
GPP_H19/ISH_I2C0 _SDA
GPP_H22/ISH_I2C1 _SCL
GPP_H21/ISH_I2C1 _SDA
GPP_A23/ISH_GP 5
GPP_A22/ISH_GP 4
GPP_A21/ISH_GP 3
GPP_A20/ISH_GP 2
GPP_A19/ISH_GP 1
GPP_A17/SD_ VDD1_PW R_EN#/ISH_GP7
11 OF 13
GPP_A18/ISH_GP 0
BOARD_ID0 BOARD_ID1
GPP_K21
GPP_K20
AL13
AR8
AN13
AL10
AL9
AR3
AN40
AT49
AP41
M45
L48
T45
T46
AJ47
GPP_I5/DDPB_C TRLCLK
GPP_I6/DDPB_C TRLDATA
GPP_I7/DDPC_CTRLC LK
GPP_I8/DDPC_CTRLD ATA
GPP_I9/DDPD_CTRLC LK
GPP_I10/DDPD_C TRLDATA
GPP_F23/DDPF_ CTRLDATA
GPP_F22/DDPF_ CTRLCLK
GPP_F14/EXT_P WR_GATE#/PS _ON#
GPP_K23/IMGCLK OUT1
GPP_K22/IMGCLK OUT0
GPP_H23/TIME_SYNC 0
5 OF 13
3
TBT_FOR CE_P WR_ R
BA20
BOARD_ID0
BB20
BOARD_ID1
BB16
BOARD_ID2
AN18
BOARD_ID3
BF14
BOARD_ID4
AR18
BOARD_ID5
BF17
BOARD_ID6
BE17
AG45
Add R1219 for intel#571006 10/18
AH46
AH47
GPP_H21
AH48
AV34
AW32
BA33
BE34
BD34
BF35
BD38
00
01
10
11
DDPB_CLK
DDPB_DATA
DDPC_CLK
DDPC_DATA
DDPD_CLK
DDPD_DATA
GPP_K21
BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10
BOARD_ID11
BOARD_ID12
BOARD_ID13
R1219 10K/F_4
OD_EN
NC
NC
Y
NC
Modify 8/10
R309 *Short_0402
R60 *Short_0402
+3V
GPP_H21 = XTAL Frequency Select
PWM pin
NSVR pin
Reserve
Reserve
NC
Y
Y
NC
Y
NC
TP22
TP23
SKTOCC_N_R 2
BOOT SELECT STRAP
HIGH:LPC
LOW: SPI. (Default)
S_GPIO
+3V_DEEP_SUS 2,9,10,11,12,14,16,40
TBT_FOR CE_P WR 3 9
BOARD_ID0 35
BOARD_ID1 35
LCD_OD_EN# 35
Support panel
Reserve
NSVR
DD
Normal, DD, Freesync
+3V_DEEP_SUS
R315
*4.7K_1%_4
R307
*20K_1%_4
2
Modify 8/10
NO REBOOT IF SAMPLED HIGH
HIGH:TOP SWAP ENABLED (CRB)
LOW: Disable "No Reboot" mode. (Default)
BBS_BIT1
I2C0_SC L
I2C0_SD A
I2C1_SC L
I2C1_SD A
GPP_C11
UART2_CTS#
UART2_RTS#
UART2_TXD
UART2_RXD
change R331 to 2.2K and stuff it for TBT HPD 11/29
DDPC_CLK
DDPC_DATA
DDPB_CLK
DDPB_DATA
DDPD_CLK
DDPD_DATA
SKTOCC_N_R
R321 *100K/F_4
R338 *100K/F_4
R323 *10K/F_4
R946 *10K/F_4
R346 *M_KB@10K/ F_4
R958 *10K/F_4
R954 *M_PB@10K/ F_4
R273 *NVL@10K/F_4
R270 *N-Tobii@10K/F_4
R267 *N-Macro@10K/F_4
R986 *10K/F_4
R272 *Max-Q@10K/F_4
R991 *N-GS@10K/F_4
R992 *OP@10K/F_4
+3V
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10
BOARD_ID11
BOARD_ID12
BOARD_ID13
RESERVED
This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
Intel ME STRAP
R965
4.7K_1%_4
R964
*20K_1%_4
1
+3V_DEEP_SUS
R418 2.2K_4
R429 2.2K_4
R303 2.2K_4
R302 2.2K_4
R299 100K/F_4
R301 *49.9K_1%_4
R331 2.2K_4
R305 *49.9K_1%_4
R312 *49.9K_1%_4
R391 *10K/F_4
R393 *10K/F_4
R392 *10K/F_4
R387 *10K/F_4
R394 *10K/F_4
R386 *10K/F_4
R203 *100K/F_4
modify 8/8
R318 10K/F_4
R337 10K/F_4
R336 SUB@10K/F_4
R943 10K/F_4
R348 P_KB@10K/F_4
R959 P_TP@10K/F_4
R955 P_PB@10K/F_4
R274 VL@10K/F_4
R271 Tobii@10K/F_4
R268 Macro@10K/F_4
R987 10K/F_4
R275 Max-P@10K/F_4
R997 GS@10K/F_4
R996 DIS@10K/F_4
+3V
GPP_K21
13
+3V_DEEP_SUS
+3V_DEEP_SUS
R241
*100K/F_4
R252
*20K/F_4
Low
NO
NO
YES
3
Pin Name
High
ID.NO
BOARD_ID8
MAXP
BOARD_ID9
GS G-SYNC
BOARD_ID10
d-VGA
Strap description
No reboot
Boot BIOS Strap Bit (BBS)
Function
EYE Trace
Macro Key
Touch Panel
Sampled
PCH_PWROK
PCH_PWROK
R937
2
*OP@1M_1%_4
DP_HPD_PCH_R
1
DP_HPD_PCH 24,36
R938 *OP@100K_ 1%_4
A A
update BOM 10/20
HDMI_HPD_PCH 24,37
R944 *OP@100K_ 1%_4
3
*OP@PJA138K
Q93
+3V
R942
*OP@1M_1%_4
321
5
HDMI_HPD_PCH_R
Q94 *OP@P JA138K
ID.NO
BOARD_ID11
BOARD_ID12
BOARD_ID13
Function
4
Low
MAXQ
PCB
Non-GS
VGA
Optimus
GPP_B18
(GSPI0_MOSI)
GPP_B22
(GSPI1_MOSI)
High
ID.NO
YES
BOARD_ID4
YES
NO
BOARD_ID6
BOARD_ID7
Configuration
0 = *Disable No Reboot (iPD 20K)
1 = Enable No Reboot Mode
0 = *SPI (iPD 20K)
1 = LPC
+3V
+3V
Function
Keyboard
Touch PAD
Power Button
Battery
Vin Boost
note
Low
Metal
Metal
Metal
NO
R288 *1K_1%_4
R295 *1K_1%_4
2
High High
GSPI0_MOSI
GSPI1_MOSI
Plastic
Plastic
Plastic
YES
note
R286 *100K/F_4
ID.NO
BOARD_ID0
BOARD_ID1 BOARD_ID5
BOARD_ID2
BOARD_ID3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Function
LCD Panel
LCD Panel
Sub-Woofer
LCD OD_EN#
PCH 5/7 (GPIO )
PCH 5/7 (GPIO )
PCH 5/7 (GPIO )
Low
No Stuff
Default
Default
No Stuff
No
YES
Default Enable
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGQ
ZGQ
ZGQ
13 73 Monday, March 12, 2018
of
13 73 Monday, March 12, 2018
1
13 73 Monday, March 12, 2018
1A
1A
1A
5
4
3
2
1
14
+1.05V_DEE P_SUS
D D
22U/6.3V_6
C175
1U/6.3V_4
C190
1U/6.3V_4
EMI RESERVE
+VCCDUSB
EC10 *10P/50V/C0G_4
+1.05V_DEE P_SUS
C C
+1.05V_DEE P_SUS
+1.05V_DEE P_SUS
+1.05V_DEE P_SUS
+1.05V_DEE P_SUS
+1.05V_DEE P_SUS
+1.05V_DEE P_SUS
+1.05V_DEE P_SUS
R311
R1004 *0_4
C1231 1u/6.3V_4
R281
R914
R1033 0_8
C1236 1u/6.3V_4
R366
R915
R306
R926
Modify 8/10
B B
+3V_DEEP_ SUS
EMI RESERVE EMI RESERVE
EC11 *10P/50V/C0G_4
+VCCDUSB
*Short_0402
+VCCDSW_1 .05V
C171 1u/6.3V_4
+VCCPRIM_MPHY
*Short_0603
C1401 0.1u/10V_2
*Short_0603
C1203 1u/6.3V_4
+VCCAMPHYPLL
C1248 22U/6.3V_6
C1241 22U/6.3V_6
+VCCA_XTAL
*Short_0603
C205 22U/6.3V_6
C200 22U/6.3V_6
+VCCAPLL_1
*Short_0603
C1205 1u/6.3V_4
+VCCA_BCLK
*Short_0603
C192 1u/6.3V_4
+VCCAPLL_2
*Short_0603
C1206 1u/6.3V_4
+VCCAPLL_1 +VCCAPLL_2
EC12 *10P/50V/C0G_4
U24H
AA22
VCCPRIM_1P051
AA23
VCCPRIM_1P052
AB20
VCCPRIM_1P053
AB22
VCCPRIM_1P054
AB23
VCCPRIM_1P055
AB27
VCCPRIM_1P056
AB28
VCCPRIM_1P057
AB30
VCCPRIM_1P058
AD20
VCCPRIM_1P059
AD23
VCCPRIM_1P0510
AD27
VCCPRIM_1P0511
AD28
VCCPRIM_1P0512
AD30
VCCPRIM_1P0513
AF23
VCCPRIM_1P0516
AF27
VCCPRIM_1P0517
AF30
VCCPRIM_1P0518
U26
VCCPRIM_1P0523
U29
VCCPRIM_1P0524
V25
VCCPRIM_1P0525
V27
VCCPRIM_1P0526
V28
VCCPRIM_1P0527
V30
VCCPRIM_1P0528
V31
VCCPRIM_1P0529
AD31
VCCPRIM_1P0514
AE17
VCCPRIM_1P0515
W22
VCCDUSB_1P051
W23
VCCDUSB_1P052
BG45
VCCDSW_1P051
BG46
VCCDSW_1P052
W31
VCCPRIM_MPHY_1P05
D1
VCCPRIM_1P0521
E1
VCCPRIM_1P0522
C49
VCCAMPHYPLL_1P051
D49
VCCAMPHYPLL_1P052
E49
VCCAMPHYPLL_1P053
P2
VCCA_XTAL_1P051
P3
VCCA_XTAL_1P052
W19
VCCA_SRC_1P051
W20
VCCA_SRC_1P052
C1
VCCAPLL_1P054
C2
VCCAPLL_1P055
V19
VCCA_BCLK_1P05
B1
VCCAPLL_1P051
B2
VCCAPLL_1P052
B3
VCCAPLL_1P053
PCH_CFL-H_874P
+1.2VSUS
8 OF 13
+3VPCU
VCCPRIM_3P32
DCPRTC1
DCPRTC2
VCCPRIM_3P35
VCCSPI
VCCRTC1
VCCRTC2
VCCPGPPG_3P3
VCCPRIM_3P33
VCCPRIM_3P34
VCCPGPPHK1
VCCPGPPHK2
VCCPGPPEF1
VCCPGPPEF2
VCCPGPPD
VCCPGPPBC1
VCCPGPPBC2
VCCPGPPA
VCCPRIM_3P31
VCCDSW_3P31
VCCDSW_3P32
VCCHDA
VCCPRIM_1P83
VCCPRIM_1P84
VCCPRIM_1P85
VCCPRIM_1P86
VCCPRIM_1P87
VCCPRIM_1P81
VCCPRIM_1P82
VCCPRIM_1P0520
VCCPRIM_1P0519
VCCPRIM_1P241
VCCPRIM_1P242
VCCDPHY_1P241
VCCDPHY_1P242
VCCDPHY_1P243
VCCMPHY_SENSE
VSSMPHY_SENSE
AW9
BF47
BG47
V23
AN44
BC49
BD49
AN21
AY8
BB7
AC35
AC36
AE35
AE36
AN24
AN26
AP26
AN32
AT44
BE48
BE49
BB14
AG19
AG20
AN15
AR15
BB11
AF19
AF20
AG31
AF31
AK22
AK23
AJ22
AJ23
BG5
K47
K46
+1.05V_DEE P_SUS
DCPRTC
C1233 0.1u/16V_4
C1232 0.1u/16V_4 C199
+3V_VCCSPI
C1249 0.1u/16V_4
C1239 0.1u/16V_4
C1240 1u/6.3V_4
C1250 0.1u/16V_4
C173 4.7u/6.3V_4
+VCCPGPPA
+V3.3DX_ADO
VCCPHVLDO_1P8
+VCCDPHY
C189 1u/6.3V_4
C183 4.7u/6.3V_4
VCCMPHY_SENSE
VSSMPHY_SENSE
+3V_DEEP_ SUS
R269
*Short_0402
Modify 8/10
+3V_DEEP_ SUS
R1224
C498 0.1u/16V_4
R330 BLM15GG47 1SN1D
C202 0.1u/16V_4
C203 0.1u/16V_4
C196 4.7u/6.3V_4
R322 0_4
C197 1u/6.3V_4
R419 CNVI@0_6
+3V_DEEP_ SUS
+3V_RTC
+3V_DEEP_ SUS
eSPI/GPPA Power rail
*Short_0402
10mils
+VCCPGPPA
+3V_DEEP_ SUS
+3V_DEEP_ SUS
+1.8V_DEEP _SUS
Need stuff R322 9/12
+1.05V_DEE P_SUS
+1.2VSUS
TP74
TP73
R291 *0_5%_6
R292 0_5%_6
+1.8V_DEEP _SUS
+VCCPGPPA
C172
0.1u/16V_4
11/1 change to +3V_DEEP_SUS for S5 leakage
Internal LDO
+1.8V_DEEP _SUS
+VCCAPLL_1
+VCCAPLL_2
+VCCPRIM_MPHY
+VCCAMPHYPLL
+3V_DEEP_ SUS
C1397
0.1u/10V_2
C1398
0.1u/10V_2
C1399
0.1u/10V_2
C1400
0.1u/10V_2
C185
0.1u/10V_2
2
C174
10u/6.3V_4
C184
1u/6.3V_4
A A
+3V_DEEP_ SUS 2,9,10,11,12,13,16,40
5
C170
0.1u/16V_4
External VR
4
C187
0.1u/16V_4
C168
0.1u/16V_4
C206
*0.1u/10V_2
C188
0.1u/16V_4
+1.8V_S5 +1.8V _DEEP_SUS
R329 *0_6
C182
0.1u/16V_4
+3V_S5 +3V_DEEP_ SUS
R372
R377
C243
0.1u/16V_4
*Short_0603
*Short_0603
C1238
0.1u/16V_4
3
C208
0.1u/10V_2
C178
4.7u/6.3V_4
+1V_S5 +1.05V_DEE P_SUS
R232
R233
0.1u/16V_4
*Short_0603
*Short_0603
0.1u/16V_4
C177
C169
C179
C176
C181
4.7u/6.3V_4
10u/6.3V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
C180
2.2U/10V_4
1u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 6/7 (POWER)
PCH 6/7 (POWER)
PCH 6/7 (POWER)
ZGQ
ZGQ
ZGQ
14 73 Monday, March 12, 2018
14 73 Monday, March 12, 2018
14 73 Monday, March 12, 2018
1
1A
1A
1A
of
5
4
3
2
1
15
D D
U24I
A2
VSS_1
A28
VSS_2
A3
VSS_3
A33
VSS_4
A37
VSS_5
A4
VSS_6
A45
VSS_7
A46
VSS_8
A47
VSS_9
A48
VSS_10
A5
VSS_11
A8
VSS_12
AA19
VSS_13
AA20
VSS_14
AA25
VSS_15
AA27
VSS_16
AA28
VSS_17
AA30
VSS_18
AA31
VSS_19
AA49
VSS_20
AA5
VSS_21
AB19
C C
B B
AB25
AB31
AC12
AC17
AC33
AC38
AC46
AD19
AD22
AD25
AD49
AE12
AE33
AE38
AE46
AF22
AF25
AF28
AG22
AG23
AG25
AG27
AG28
AG30
AG49
AH12
AH17
AH33
AH38
AK19
AK20
AK25
AK27
AK28
AK30
AK31
AK46
AC4
AD1
AD2
AE4
AG1
AJ19
AJ20
AJ25
AJ27
AJ28
AJ30
AJ31
AK4
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
PCH_CFL-H_874P
9 OF 13
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
AL12
AL17
AL21
AL24
AL26
AL29
AL33
AL38
AM1
AM18
AM32
AM49
AN12
AN16
AN34
AN38
AP4
AP46
AR12
AR16
AR34
AR38
AT1
AT16
AT18
AT21
AT24
AT26
AT29
AT32
AT34
AT45
AV11
AV39
AW10
AW4
AW40
AW46
B47
B48
B49
BA12
BA14
BA44
BA5
BA6
BB41
BB43
BB9
BC10
BC13
BC15
BC19
BC24
BC26
BC31
BC35
BC40
BC45
BC8
BD43
BE44
BF1
BF2
BF3
BF48
BF49
BG17
BG2
BG22
BG25
BG28
BG33
BG37
BG48
BG3
BG4
C12
C25
C30
C4
C48
C5
D12
D16
D17
D30
D33
D8
E10
E13
E15
E17
E19
E22
E24
E26
E31
E33
E35
E40
E42
E8
F41
F43
F47
G44
G6
H8
J10
J26
J29
J4
J40
J46
J47
J48
J9
K11
K39
M16
M18
M21
U24L
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
12 OF 13
PCH_CFL-H_874P
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
M24
M32
M34
M49
M5
N12
N16
N34
N35
N37
N38
P26
P29
P4
P46
R12
R16
R26
R29
R3
R34
R38
R4
T17
T18
T32
T4
T49
T5
T7
U12
U15
U17
U21
U24
U33
U38
V20
V22
V4
V46
W25
W27
W28
W30
Y10
Y12
Y17
Y33
Y38
Y9
U24J
RSVD#Y14
RSVD#Y15
RSVD#U37
RSVD#U35
RSVD#N32
RSVD#R32
RSVD#AH15
RSVD#AH14
10 OF 13
PREQ#
PRDY#
CPU_TRST#
TRIGGER_OUT
TRIGGER_IN
PCH_CFL-H_874P
Y14
Y15
U37
U35
N32
R32
AH15
AH14
AL2
AM5
AM4
AK3
AK2
PGDMON
H_PREQ#_L
H_PRDY#_L
H_TRST#_L
PCH_2_CPU_TRIG_R
CPU_2_PCH_TRIG
R335
*1K/F_4
R923
R907
R357
R905
*Short_0402
*Short_0402
*Short_0402
*Short_0402
H_PRDY#_L
H_TRST#_L
H_PREQ# 2,16
H_PRDY# 2,16
H_TRST# 2,16
PCH_2_CPU_TRIG 8
CPU_2_PCH_TRIG 8
R922 *51_4
R367 *51_4
CRB is 30 ohme check it
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
PCH 7/7 (GND)
PCH 7/7 (GND)
PCH 7/7 (GND)
ZGQ
ZGQ
ZGQ
15 73 Monday, March 12, 2018
15 73 Monday, March 12, 2018
15 73 Monday, March 12, 2018
1
1A
1A
1A
of
of
5
4
3
+1.05V_DEEP_SUS
2
1
16
CON2
H_PREQ# 2,15
H_PRDY# 2,15
CFG0 2
CFG1 2
CFG2 2
D D
+VCCIO
C C
APS
+3V_DEEP_SUS
R316 150_4
+3VPCU
CFG3 2
CFG4 2
CFG5 2
CFG6 2
CFG7 2
CK_XDP_P 11
CK_XDP_N 11
XDP_DBRESET# 10,16
PCH_SMBDATA 10,17,18,19,20
PCH_SMBCLK 10,17,18,19,20
H_TDO 2,10
H_TRST# 2,15
H_TDI 2,10
H_TMS 2,10
H_TCK 2,10
XDP_SPI_IO2 12
HOOK2
NBSWON#
R308 1K/F_4
CFG0 HOOK2
R327 300_ 4
R344 1K/F_4
MSR_ENABLE_N
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
H_TDO
H_TRST#
H_TDI
H_TMS
H_TCK
3
OBSFN_A0
5
OBSFN_A1
9
OBSDATA_A0
11
OBSDATA_A1
15
OBSDATA_A2
17
OBSDATA_A3
27
OBSDATA_B0
29
OBSDATA_B1
33
OBSDATA_B2
35
OBSDATA_B3
41
HOOK1
45
HOOK2
40
ITPCLK/HOOK4
42
ITPCLK#/HOOK5
48
DBR#/HOOK7
51
SDA
53
SCL
52
TDO
54
TRSTN
56
TDI
58
TMS
57
TCK0
60
GND17
59
GND16
50
CPU XDP
GND15
49
GND14
38
GND13
37
GND12
32
GND11
31
GND10
*Samtec BSH-030 -01
VCC_OBS_CD
VCC_OBS_AB
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
PWRGOOD/HOOK0
RESET#/HOOK6
NC161NC2
62
EMI RESERVE
CON1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
19
20
19
20
*APS CONN
11
12
12
XDP_DBRESET#
13
13
14
14
15
15
16
16
17
17
18
18
B B
EC1 *10P/50V/C0G _4
SUSB# 10,49
SLP_S5# 1 0
SUSC# 10,49
SLP_A# 10
RTC_RST# 10
NBSWON# 49,51
XDP_DBRESET# 10,16
PCH_SLP_S0ix# 10
OBSFN_B0
OBSFN_B1
OBSFN_C0
OBSFN_C1
OBSFN_D0
OBSFN_D1
HOOK3
TCK1
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
44
43
21
23
4
CFG17
6
CFG16
10
CFG8
12
CFG9
16
CFG10
18
CFG11
22
CFG19
24
CFG18
28
CFG12
30
CFG13
34
CFG14
36
CFG15
47
HOOK3
55
39
ITP_PMODE
46
1
GND0
2
7
8
13
14
19
20
25
26
XDP_BPM0 2
XDP_BPM1 2
CFG17 2
CFG16 2
CFG8 2
CFG9 2
CFG10 2
CFG11 2
CFG19 2
CFG18 2
CFG12 2
CFG13 2
CFG14 2
CFG15 2
R341 *0_4
R304 1K/F_4
R284 1K/F_4
0.1u/16V_4
HOOK3
C194
PCH_TCK 10
RSMRST# 10,49
CFG3
R334 1K/F_4
R326 2.2K_4
+1.05V_DEEP_SUS
R319
2.2K_4
PCH_SPI1_SI
ITP_PMODE 10
PCH_SPI1_SI 12
+SPI_VCC
+3V_DEEP_SUS 2,9,10,11,12,13,14,40
+1.05V_DEEP_SUS 10,11,14
+VCCIO 2,3,6,26,59,61,64
A A
+3VPCU 9,10,12,14,35,38,40,44,49,51,53,55,57,58,64,66
5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
Date: Sheet
2
PROJECT :
XDP & APS
XDP & APS
XDP & APS
ZGQ
ZGQ
ZGQ
1
1A
1A
16 73 Monday, March 12, 2018
16 73 Monday, March 12, 2018
16 73 Monday, March 12, 2018
1A
of
5
4
3
2
1
17
2.48A
R421 24.9/F_4
+1.2VSUS
JDIM4B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR3-DIMM0_H=9.2_RVS
R413
*Short_0402
+VREFCA_CHA_DIMM
C244
0.1U/16V_4_X7R
255
257
259
258
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHA_DIMM
+VREFCA_CHA_DIMM
Place these Caps near So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C1070 1U/6.3V_4
C1069 1U/6.3V_4
C1075 1U/6.3V_4
C1071 1U/6.3V_4
C1197 1U/6.3V_4
C1196 1U/6.3V_4
C1192 1U/6.3V_4
C1195 1U/6.3V_4
C1056 10U/6.3V_6
C1057 10U/6.3V_6
C1052 10U/6.3V_6
C1199 10U/6.3V_6
C1201 10U/6.3V_6
C1200 10U/6.3V_6
C1202 10U/6.3V_6
C1051 10U/6.3V_6
Place these Caps near So-Dimm
+VREFCA_CHA_DIMM
C226 0.1U/16V_4_X7R
C245 *2.2U/10V_4
+2.5VSUS
C1061 *1U/6.3V_4
C1073 1U/6.3V_4
C1053 10U/6.3V_6
C1048 10U/6.3V_6
+3V
C1072 0.1U/16V_4_X7R
C1060 2.2U/10V_4
DDR_VTT
C1067 1U/6.3V_4
C468 1U/6.3V_4
C1078 10U/6.3V_6
VDDSPD
VPP1
VPP2
VTT
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
(260P)
DDR4 SODIMM 260 PIN
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND#1
GND#2
D D
+1.2VSUS
PM_THRMTRIP#
C C
B B
A A
R835 *1K/F_4
SWAP Pin 8/3
A-DIMM0
SA0=0;SA1=0;SA2=0
R830
*0_4
CHA_DIMM0_SA2 CHA_DIMM0_SA0
R831
*Short_0402
R834
+3V
240/F_4
DIMM0_CHA_EVENT_N PM_THRMTRIP#
R501
*0_4
CHA_DIMM0_SA1
R487
*Short_0402
M_A_A[16:0] 4,19
DDRA_ACT# 4,19
DDR0_PAR 4,19
DDR0_ALERT# 4,19
DDR_DRAMRST# 10,18,19,20
M_A_DIM0_CLKP0 4
M_A_DIM0_CLKN0 4
M_A_DIM0_CLKP1 4
M_A_DIM0_CLKN1 4
DIMM0_CHA_EVENT_N
C1168 *0.1U/16V_4
M_A_BS#0 4,19
M_A_BS#1 4,19
M_A_BG#0 4,19
M_A_BG#1 4,19
M_A_CS#0 4
M_A_CS#1 4
M_A_CKE0 4
M_A_CKE1 4
M_A_ODT0 4
M_A_ODT1 4
PCH_SMBCLK 10,16, 18,19,20
PCH_SMBDATA 10,16,18,19,20
M_A_CB0 4,19
M_A_CB4 4,19
M_A_CB2 4,19
M_A_CB7 4,19
M_A_CB1 4,19
M_A_CB5 4,19
M_A_CB3 4,19
M_A_CB6 4,19
R502
*0_4
R484
*Short_0402
+1.2VSUS
CHA_DIMM0_SA0
CHA_DIMM0_SA1
CHA_DIMM0_SA2
M_A_CB0
M_A_CB4
M_A_CB2
M_A_CB7
M_A_CB1
M_A_CB5
M_A_CB3
M_A_CB6
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16
TP55
TP51
PCH_SMBCLK
PCH_SMBDATA
JDIM4A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR3-DIMM0_H=9.2_RVS
M_A_DQ4
8
DQ0
M_A_DQ0
7
DQ1
M_A_DQ2
20
DQ2
M_A_DQ7
21
DQ3
M_A_DQ5
4
DQ4
M_A_DQ3
3
DQ5
M_A_DQ1
16
DQ6
M_A_DQ6
17
DQ7
M_A_DQ8
28
DQ8
M_A_DQ12
29
DQ9
M_A_DQ11
41
DQ10
M_A_DQ14
42
DQ11
M_A_DQ9
24
DQ12
M_A_DQ13
25
DQ13
M_A_DQ15
38
DQ14
M_A_DQ10
37
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
+1.2VSUS
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246
13
34
55
76
179
200
221
242
M_A_DQSP8
97
11
32
53
74
177
198
219
240
M_A_DQSN8
95
R416 1K/F_4
SMDDR_VREF_CA 4
M_A_DQ25
M_A_DQ28
M_A_DQ30
M_A_DQ27
M_A_DQ24
M_A_DQ29
M_A_DQ31
M_A_DQ26
M_A_DQ45
M_A_DQ44
M_A_DQ46
M_A_DQ42
M_A_DQ40
M_A_DQ41
M_A_DQ47
M_A_DQ43
M_A_DQ56
M_A_DQ61
M_A_DQ63
M_A_DQ62
M_A_DQ57
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQ17
M_A_DQ21
M_A_DQ19
M_A_DQ23
M_A_DQ16
M_A_DQ20
M_A_DQ18
M_A_DQ22
M_A_DQ32
M_A_DQ37
M_A_DQ34
M_A_DQ39
M_A_DQ33
M_A_DQ36
M_A_DQ35
M_A_DQ38
M_A_DQ51
M_A_DQ50
M_A_DQ53
M_A_DQ49
M_A_DQ52
M_A_DQ54
M_A_DQ55
M_A_DQ48
0.1U/16V_4_X7R
C224
M_A_DQ[63:0] 4,19
SWAP Pin 8/3
M_A_DQSP[8:0] 4,19
M_A_DQSN[8:0] 4,19
VREF CHA Solution
+SMDDR_VREF_CHA_DIMM0_R
R412
1K/F_4
R422 2/F_6
C242
0.022U/25V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT :
DDR4 Channel A DIMM0
DDR4 Channel A DIMM0
DDR4 Channel A DIMM0
1
ZGQ
ZGQ
ZGQ
1A
1A
1A
17 73 Monday, March 12, 2018
17 73 Monday, March 12, 2018
of
17 73 Monday, March 12, 2018
5
4
3
2
1
18
+1.2VSUS
JDIM3B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR4-DIMM0_H=5.2_RVS
R899 1K/F_4
C1193
0.1U/16V_4_X7R
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
VSS69
(260P)
94
DDR4 SODIMM 260 PIN
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND#1
262
GND#2
+SMDDR_VREF_CHB_DIMM0_R
R900
1K/F_4
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHB_DIMM
VREF CHB Solution
R898 *Short_0402
+VREFCA_CHB_DIMM
Place these Caps n ear So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
+VREFCA_CHB_DIMM +2.5VSUS
C1158 1U/6.3V_4
C1145 1U/6.3V_4
C1140 1U/6.3V_4
C1084 1U/6.3V_4
C1155 1U/6.3V_4
C1086 1U/6.3V_4
C1055 1U/6.3V_4
C1186 1U/6.3V_4
C1176 10U/6.3V_6
C1152 10U/6.3V_6
C1143 10U/6.3V_6
C1091 10U/6.3V_6
C1177 10U/6.3V_6
C1171 10U/6.3V_6
C1147 10U/6.3V_6
C1180 10U/6.3V_6
Place these Caps n ear So-Dimm
C1194 0.1U/16V_4_X7R
C227 *2.2U/10V_6
DDR_VTT
+3V
C1064 10U/6.3V_6
C1058 10U/6.3V_6
C1076 1U/6.3V_4
C1074 *1U/6.3V_4
C1059 1U/6.3V_4
C1068 1U/6.3V_4
C1063 10U/6.3V_6
C1066 0.1U/16V_4_X7R
C1054 2.2U/10V_6
TP53
TP54
M_B_ODT0
M_B_ODT1
JDIM3A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR4-DIMM0_H=5.2_RVS
M_B_DQ1
8
DQ0
M_B_DQ4
7
DQ1
M_B_DQ2
20
DQ2
M_B_DQ7
21
DQ3
M_B_DQ0
4
DQ4
M_B_DQ5
3
DQ5
M_B_DQ3
16
DQ6
M_B_DQ6
17
DQ7
M_B_DQ8
28
DQ8
M_B_DQ14
29
DQ9
M_B_DQ15
41
DQ10
M_B_DQ12
42
DQ11
M_B_DQ9
24
DQ12
M_B_DQ10
25
DQ13
M_B_DQ13
38
DQ14
M_B_DQ11
37
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_B_DQ16
50
M_B_DQ22
49
M_B_DQ23
62
M_B_DQ20
63
M_B_DQ17
46
M_B_DQ18
45
M_B_DQ19
58
M_B_DQ21
59
M_B_DQ25
70
M_B_DQ30
71
M_B_DQ24
83
M_B_DQ31
84
M_B_DQ28
66
M_B_DQ27
67
M_B_DQ29
79
M_B_DQ26
80
M_B_DQ39
174
M_B_DQ38
173
M_B_DQ37
187
M_B_DQ32
186
M_B_DQ34
170
M_B_DQ35
169
M_B_DQ33
183
M_B_DQ36
182
M_B_DQ44
195
M_B_DQ41
194
M_B_DQ46
207
M_B_DQ43
208
M_B_DQ45
191
M_B_DQ40
190
M_B_DQ47
203
M_B_DQ42
204
M_B_DQ54
216
M_B_DQ48
215
M_B_DQ50
228
M_B_DQ55
229
M_B_DQ52
211
M_B_DQ51
212
M_B_DQ49
224
M_B_DQ53
225
M_B_DQ57
237
M_B_DQ59
236
M_B_DQ58
249
M_B_DQ56
250
M_B_DQ62
232
M_B_DQ61
233
M_B_DQ63
245
M_B_DQ60
246
M_B_DQSP0
13
M_B_DQSP1
34
M_B_DQSP2
55
M_B_DQSP3
76
M_B_DQSP4
179
M_B_DQSP5
200
M_B_DQSP6
221
M_B_DQSP7
242
M_B_DQSP8
97
M_B_DQSN0
11
M_B_DQSN1
32
M_B_DQSN2
53
M_B_DQSN3
74
M_B_DQSN4
177
M_B_DQSN5
198
M_B_DQSN6
219
M_B_DQSN7
240
M_B_DQSN8
95
SWAP Pin 8/3
R803
*0_4
CHB_DIMM0_SA0 CHB_DIMM0_SA1
R805
*Short_0402
240/F_4
M_B_A[16:0] 4,20
DDRB_ACT# 4,20
DDR1_PAR 4,20
DDR1_ALERT# 4,20
DDR_DRAMRST# 10,17,19,20
DIMM0_CHB_EVENT_N PM_THRMTRIP#
M_B_DIM0_CLKP0 4
M_B_DIM0_CLKN0 4
M_B_DIM0_CLKP1 4
M_B_DIM0_CLKN1 4
PCH_SMBCLK 10,16, 17,19,20
PCH_SMBDATA 10,16,17,19,20
M_B_CB1 4,20
M_B_CB6 4,20
M_B_CB5 4,20
M_B_CB0 4,20
M_B_CB4 4,20
M_B_CB2 4,20
M_B_CB3 4,20
M_B_CB7 4,20
D D
R832
+1.2VSUS
PM_THRMTRIP#
C C
B-DIMM0
B B
SA0=0;SA1=1;SA2=0
R504
*0_4
CHB_DIMM0_SA2
R488
*Short_0402
R833 *1K/F_4
+3V
R801
*Short_0402
R804
*0_4
M_B_BS#0 4,20
M_B_BS#1 4,20
M_B_BG#0 4,20
M_B_BG#1 4,20
M_B_CS#0 4
M_B_CS#1 4
M_B_CKE0 4
M_B_CKE1 4
M_B_ODT0 4
M_B_ODT1 4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16
DIMM0_CHB_EVENT_N
C1165 *0.1U/16V_4
PCH_SMBCLK
PCH_SMBDATA
CHB_DIMM0_SA0
CHB_DIMM0_SA1
CHB_DIMM0_SA2
M_B_CB1
M_B_CB6
M_B_CB5
M_B_CB0
M_B_CB4
M_B_CB2
M_B_CB3
M_B_CB7
+1.2VSUS
M_B_DQ[63:0] 4,20
M_B_DQSP[8:0] 4,20
M_B_DQSN[8:0] 4,20
2.48A
SWAP Pin 8/3
+1.2VSUS
SMDDR_VREF_DQ1_M3 4
+1.2VSUS 2,6,10,14,17,19,20,60,71
A A
+2.5VSUS 17,19,20,60
5
4
3
SMDDR_VREF_DQ1_M3
C1191
0.022U/25V_4
R897
24.9/F_4
R901 2/F_6
+VREFCA_CHB_DIMM
C1198
0.1U/16V_4_X7R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
2
Date: Sheet of
PROJECT :
DDR4 Channel B DIMM0
DDR4 Channel B DIMM0
DDR4 Channel B DIMM0
1
ZGQ
ZGQ
ZGQ
of
18 73 Monday, March 12, 2018
18 73 Monday, March 12, 2018
18 73 Monday, March 12, 2018
1A
1A
1A
5
4
3
2
1
19
7/28 change to STD
M_A_A[16:0] 4,17
D D
DDRA_ACT# 4,17
DDR0_PAR 4,17
DDR0_ALERT# 4,17
+1.2VSUS
PM_THRMTRIP# DIMM1_CHA_EVENT_N
Modify 8/10
R505 *1K/F_4
SWAP Pin 8/3
A-DIMM1
SA0=1;SA1=0;SA2=0
R506
*0_4
R497
*Short_0402
PM_THRMTRIP# 2,11,17,18,20,50
C C
B B
+3V
R498
*0_4
CHA_DIMM1_SA1
R489
*Short_0402
DDR_DRAMRST# 10,17,18,20
M_A_DIM1_CLKP0 4
M_A_DIM1_CLKN0 4
M_A_DIM1_CLKP1 4
M_A_DIM1_CLKN1 4
240/F_4
R492
DIMM1_CHA_EVENT_N
C1161 *0.1U/16V_4
M_A_BS#0 4,17
M_A_BS#1 4,17
M_A_BG#0 4,17
M_A_BG#1 4,17
M_A_CS#2 4
M_A_CS#3 4
M_A_CKE2 4
M_A_CKE3 4
M_A_ODT2 4
M_A_ODT3 4
PCH_SMBCLK 10,16, 17,18,20
PCH_SMBDATA 10,16,17,18,20
M_A_CB5 4,17
M_A_CB1 4,17
M_A_CB6 4,17
M_A_CB3 4,17
M_A_CB4 4,17
M_A_CB0 4,17
M_A_CB7 4,17
M_A_CB2 4,17
CHA_DIMM1_SA0 CHA_DIMM1_SA2
R490
*0_4
R500
*Short_0402
+1.2VSUS
M_A_CB5
M_A_CB1
M_A_CB6
M_A_CB3
M_A_CB4
M_A_CB0
M_A_CB7
M_A_CB2
CHA_DIMM1_SA0
CHA_DIMM1_SA1
CHA_DIMM1_SA2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16
TP50
TP49
PCH_SMBCLK
PCH_SMBDATA
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR3-DIMM0_H=4_RVS
M_A_DQ3
8
DQ0
M_A_DQ5
7
DQ1
M_A_DQ6
20
DQ2
M_A_DQ1
21
DQ3
M_A_DQ0
4
DQ4
M_A_DQ4
3
DQ5
M_A_DQ7
16
DQ6
M_A_DQ2
17
DQ7
M_A_DQ13
28
DQ8
M_A_DQ9
29
DQ9
M_A_DQ15
41
DQ10
M_A_DQ10
42
DQ11
M_A_DQ12
24
DQ12
M_A_DQ8
25
DQ13
M_A_DQ11
38
DQ14
M_A_DQ14
37
DQ15
M_A_DQ20
50
DQ16
M_A_DQ16
49
DQ17
M_A_DQ22
62
DQ18
M_A_DQ18
63
DQ19
M_A_DQ21
46
DQ20
M_A_DQ17
45
DQ21
M_A_DQ23
58
DQ22
M_A_DQ19
59
DQ23
M_A_DQ29
70
DQ24
M_A_DQ24
71
DQ25
M_A_DQ26
83
DQ26
M_A_DQ31
84
DQ27
M_A_DQ28
66
DQ28
M_A_DQ25
67
DQ29
M_A_DQ27
79
DQ30
M_A_DQ30
80
DQ31
M_A_DQ36
174
DQ32
M_A_DQ33
173
DQ33
M_A_DQ38
187
DQ34
M_A_DQ35
186
DQ35
M_A_DQ37
170
DQ36
M_A_DQ32
169
DQ37
M_A_DQ39
183
DQ38
M_A_DQ34
182
DQ39
M_A_DQ41
195
DQ40
M_A_DQ40
194
DQ41
M_A_DQ43
207
DQ42
M_A_DQ47
208
DQ43
M_A_DQ44
191
DQ44
M_A_DQ45
190
DQ45
M_A_DQ42
203
DQ46
M_A_DQ46
204
DQ47
M_A_DQ52
216
DQ48
M_A_DQ54
215
DQ49
(260P)
DDR4 SODIMM 260 PIN
EZIW
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ48
228
DQ50
M_A_DQ55
229
DQ51
M_A_DQ51
211
DQ52
M_A_DQ50
212
DQ53
M_A_DQ49
224
DQ54
M_A_DQ53
225
DQ55
M_A_DQ57
237
DQ56
M_A_DQ60
236
DQ57
M_A_DQ58
249
DQ58
M_A_DQ59
250
DQ59
M_A_DQ56
232
DQ60
M_A_DQ61
233
DQ61
M_A_DQ62
245
DQ62
M_A_DQ63
246
DQ63
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP2
55
M_A_DQSP3
76
M_A_DQSP4
179
M_A_DQSP5
200
M_A_DQSP6
221
M_A_DQSP7
242
M_A_DQSP8
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN2
53
M_A_DQSN3
74
M_A_DQSN4
177
M_A_DQSN5
198
M_A_DQSN6
219
M_A_DQSN7
240
M_A_DQSN8
95
M_A_DQ[63:0] 4,17
SWAP Pin 8/3
M_A_DQSP[8:0] 4,17
M_A_DQSN[8:0] 4,17
2.48A
+1.2VSUS
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR3-DIMM0_H=4_RVS
255
257
259
258
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHA_DIMM
+VREFCA_CHA_DIMM
Place these Caps n ear So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C1154 1U/6.3V_4
C1169 1U/6.3V_4
C1160 1U/6.3V_4
C1133 1U/6.3V_4
C1141 1U/6.3V_4
C1150 1U/6.3V_4
C1139 1U/6.3V_4
C1138 1U/6.3V_4
C446 10U/6.3V_6
C445 10U/6.3V_6
C235 10U/6.3V_6
C447 10U/6.3V_6
C234 10U/6.3V_6
C236 10U/6.3V_6
C376 10U/6.3V_6
C374 10U/6.3V_6
Place these Caps n ear So-Dimm
+VREFCA_CHA_DIMM
C225 0.1U/16V_4_X7R
C220 *2.2U/10V_4
+2.5VSUS
C451 *1U/6.3V_4
C435 1U/6.3V_4
C450 10U/6.3V_6
C449 10U/6.3V_6
+3V
C469 0.1U/16V_4_X7R
C479 2.2U/10V_4
DDR_VTT
C463 1U/6.3V_4
C464 1U/6.3V_4
C441 10U/6.3V_6
VDDSPD
VPP1
VPP2
VTT
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
(260P)
DDR4 SODIMM 260 PIN
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND#1
GND#2
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
DDR4 Channel A DIMM1
DDR4 Channel A DIMM1
DDR4 Channel A DIMM1
1
ZGQ
ZGQ
ZGQ
1A
1A
1A
19 73 Monday, March 12, 2018
19 73 Monday, March 12, 2018
of
19 73 Monday, March 12, 2018
of
5
4
3
2
1
7/28 change RVS
TP26
TP48
M_B_ODT0
M_B_ODT1
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR4-DIMM0_H=4_STD
M_B_DQ5
8
DQ0
M_B_DQ0
7
DQ1
M_B_DQ6
20
DQ2
M_B_DQ3
21
DQ3
M_B_DQ4
4
DQ4
M_B_DQ1
3
DQ5
M_B_DQ7
16
DQ6
M_B_DQ2
17
DQ7
M_B_DQ10
28
DQ8
M_B_DQ9
29
DQ9
M_B_DQ13
41
DQ10
M_B_DQ11
42
DQ11
M_B_DQ14
24
DQ12
M_B_DQ8
25
DQ13
M_B_DQ15
38
DQ14
M_B_DQ12
37
DQ15
M_B_DQ18
50
DQ16
M_B_DQ17
49
DQ17
M_B_DQ21
62
DQ18
M_B_DQ19
63
DQ19
M_B_DQ22
46
DQ20
M_B_DQ16
45
DQ21
M_B_DQ20
58
DQ22
M_B_DQ23
59
DQ23
M_B_DQ27
70
DQ24
M_B_DQ28
71
DQ25
M_B_DQ26
83
DQ26
M_B_DQ29
84
DQ27
M_B_DQ30
66
DQ28
M_B_DQ25
67
DQ29
M_B_DQ31
79
DQ30
M_B_DQ24
80
DQ31
M_B_DQ35
174
DQ32
M_B_DQ34
173
DQ33
M_B_DQ36
187
DQ34
M_B_DQ33
186
DQ35
M_B_DQ38
170
DQ36
M_B_DQ39
169
DQ37
M_B_DQ32
183
DQ38
M_B_DQ37
182
DQ39
M_B_DQ40
195
DQ40
M_B_DQ45
194
DQ41
M_B_DQ42
207
DQ42
M_B_DQ47
208
DQ43
M_B_DQ41
191
DQ44
M_B_DQ44
190
DQ45
M_B_DQ43
203
DQ46
M_B_DQ46
204
DQ47
M_B_DQ52
216
DQ48
M_B_DQ51
215
DQ49
(260P)
DDR4 SODIMM 260 PIN
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_B_DQ53
228
DQ50
M_B_DQ49
229
DQ51
M_B_DQ54
211
DQ52
M_B_DQ48
212
DQ53
M_B_DQ55
224
DQ54
M_B_DQ50
225
DQ55
M_B_DQ62
237
DQ56
M_B_DQ61
236
DQ57
M_B_DQ60
249
DQ58
M_B_DQ63
250
DQ59
M_B_DQ57
232
DQ60
M_B_DQ59
233
DQ61
M_B_DQ56
245
DQ62
M_B_DQ58
246
DQ63
M_B_DQSP0
13
M_B_DQSP1
34
M_B_DQSP2
55
M_B_DQSP3
76
M_B_DQSP4
179
M_B_DQSP5
200
M_B_DQSP6
221
M_B_DQSP7
242
M_B_DQSP8
97
M_B_DQSN0
11
M_B_DQSN1
32
M_B_DQSN2
53
M_B_DQSN3
74
M_B_DQSN4
177
M_B_DQSN5
198
M_B_DQSN6
219
M_B_DQSN7
240
M_B_DQSN8
95
M_B_A[16:0] 4,18
D D
DDRB_ACT# 4,18
DDR1_PAR 4,18
DDR1_ALERT# 4,18
240/F_4
R482
+1.2VSUS
PM_THRMTRIP# DIMM1_CHB_EVENT_N
PM_THRMTRIP# 2,11,17,18,19,50
C C
B-DIMM1
B B
SA0=1;SA1=1;SA2=0
R507
*0_4
Modify 9/14
R495
*Short_0402
R493 *1K/F_4
+3V
R499
*Short_0402
CHB_DIMM1_SA1
R491
*0_4
SWAP Pin 8/3
R486
*0_4
R503
*Short_0402
CHB_DIMM1_SA0 CHB_DIMM1_SA2
DDR_DRAMRST# 10,17,18,19
M_B_DIM1_CLKP0 4
M_B_DIM1_CLKN0 4
M_B_DIM1_CLKP1 4
M_B_DIM1_CLKN1 4
PCH_SMBCLK 10,16, 17,18,19
PCH_SMBDATA 10,16,17,18,19
M_B_CB2 4,18
M_B_CB4 4,18
M_B_CB7 4,18
M_B_CB3 4,18
M_B_CB6 4,18
M_B_CB1 4,18
M_B_CB0 4,18
M_B_CB5 4,18
M_B_BS#0 4,18
M_B_BS#1 4,18
M_B_BG#0 4,18
M_B_BG#1 4,18
M_B_CS#2 4
M_B_CS#3 4
M_B_CKE2 4
M_B_CKE3 4
M_B_ODT2 4
M_B_ODT3 4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16
DIMM1_CHB_EVENT_N
C1163 *0.1U/16V_4
PCH_SMBCLK
PCH_SMBDATA
CHB_DIMM1_SA0
CHB_DIMM1_SA1
CHB_DIMM1_SA2
M_B_CB2
M_B_CB4
M_B_CB7
M_B_CB3
M_B_CB6
M_B_CB1
M_B_CB0
M_B_CB5
+1.2VSUS
M_B_DQ[63:0] 4,18
SWAP Pin 8/3
M_B_DQSP[8:0] 4,18
M_B_DQSN[8:0] 4,18
2.48A
+1.2VSUS
JDIM1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR4-DIMM0_H=4_STD
255
257
259
258
+VREFCA_CHB_DIMM
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHB_DIMM
Place these Caps n ear So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C1083 1U/6.3V_4
C1162 1U/6.3V_4
C1085 1U/6.3V_4
C1183 1U/6.3V_4
C1181 1U/6.3V_4
C1062 1U/6.3V_4
C241 1U/6.3V_4
C1045 1U/6.3V_4
C229 10U/6.3V_6
C1182 10U/6.3V_6
C237 10U/6.3V_6
C233 10U/6.3V_6
C1093 10U/6.3V_6
C1050 10U/6.3V_6
C228 10U/6.3V_6
C1092 10U/6.3V_6
Place these Caps n ear So-Dimm
C231 0.1U/16V_4_X7R
C232 *2.2U/10V_6
+2.5VSUS +VREFCA_CHB_DIMM
DDR_VTT
+3V
C473 10U/6.3V_6
C474 10U/6.3V_6
C437 1U/6.3V_4
C455 *1U/6.3V_4
C436 1U/6.3V_4
C453 1U/6.3V_4
C471 10U/6.3V_6
C443 0.1U/16V_4_X7R
C448 2.2U/10V_6
VDDSPD
VPP1
VPP2
VTT
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
(260P)
DDR4 SODIMM 260 PIN
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND#1
GND#2
20
+1.2VSUS 2,6,10,14,17,18,19,60,71
+2.5VSUS 17,18,19,60
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
DDR4 Channel B DIMM1
DDR4 Channel B DIMM1
DDR4 Channel B DIMM1
1
ZGQ
ZGQ
ZGQ
1A
1A
1A
of
20 73 Monday, March 12, 2018
20 73 Monday, March 12, 2018
20 73 Monday, March 12, 2018
of
5
DG:1.8V
+1.8V_AON
R778
Q78
DGPU_PWROK 27
PCIE_CLKREQ_VGA# 11
D D
C C
B B
A A
3
PEG_RXP0 3
PEG_RXN0 3
PEG_RXP1 3
PEG_RXN1 3
PEG_RXP2 3
PEG_RXN2 3
PEG_RXP3 3
PEG_RXN3 3
PEG_RXP4 3
PEG_RXN4 3
PEG_RXP5 3
PEG_RXN5 3
PEG_RXP6 3
PEG_RXN6 3
PEG_RXP7 3
PEG_RXN7 3
PEG_RXP8 3
PEG_RXN8 3
PEG_RXP9 3
PEG_RXN9 3
PEG_RXP10 3
PEG_RXN10 3
PEG_RXP11 3
PEG_RXN11 3
PEG_RXP12 3
PEG_RXN12 3
PEG_RXP13 3
PEG_RXN13 3
PEG_RXP14 3
PEG_RXN14 3
PEG_RXP15 3
PEG_RXN15 3
DMG1012T-7
2
PEG_TXP0 3
PEG_TXN0 3
PEG_TXP1 3
PEG_TXN1 3
PEG_TXP2 3
PEG_TXN2 3
PEG_TXP3 3
PEG_TXN3 3
PEG_TXP4 3
PEG_TXN4 3
PEG_TXP5 3
PEG_TXN5 3
PEG_TXP6 3
PEG_TXN6 3
PEG_TXP7 3
PEG_TXN7 3
PEG_TXP8 3
PEG_TXN8 3
PEG_TXP9 3
PEG_TXN9 3
PEG_TXP10 3
PEG_TXN10 3
PEG_TXP11 3
PEG_TXN11 3
PEG_TXP12 3
PEG_TXN12 3
PEG_TXP13 3
PEG_TXN13 3
PEG_TXP14 3
PEG_TXN14 3
PEG_TXP15 3
PEG_TXN15 3
10K_1%_2
1
CLK_VGA_P 11
CLK_VGA_N 11
C697 0.22u/6.3V_2
C689 0.22u/6.3V_2
C668 0.22u/6.3V_2
C677 0.22u/6.3V_2
C670 0.22u/6.3V_2
C666 0.22u/6.3V_2
C667 0.22u/6.3V_2
C663 0.22u/6.3V_2
C659 0.22u/6.3V_2
C645 0.22u/6.3V_2
C646 0.22u/6.3V_2
C643 0.22u/6.3V_2
C639 0.22u/6.3V_2
C636 0.22u/6.3V_2
C625 0.22u/6.3V_2
C629 0.22u/6.3V_2
C626 0.22u/6.3V_2
C616 0.22u/6.3V_2
C613 0.22u/6.3V_2
C606 0.22u/6.3V_2
C604 0.22u/6.3V_2
C602 0.22u/6.3V_2
C589 0.22u/6.3V_2
C588 0.22u/6.3V_2
C571 0.22u/6.3V_2
C567 0.22u/6.3V_2
C566 0.22u/6.3V_2
C546 0.22u/6.3V_2
C542 0.22u/6.3V_2
C540 0.22u/6.3V_2
C539 0.22u/6.3V_2
C536 0.22u/6.3V_2
PEGX_RST#
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
PEG_RXP4_C
PEG_RXN4_C
PEG_RXP5_C
PEG_RXN5_C
PEG_RXP6_C
PEG_RXN6_C
PEG_RXP7_C
PEG_RXN7_C
PEG_RXP8_C
PEG_RXN8_C
PEG_RXP9_C
PEG_RXN9_C
PEG_RXP10_C
PEG_RXN10_C
PEG_RXP11_C
PEG_RXN11_C
PEG_RXP12_C
PEG_RXN12_C
PEG_RXP13_C
PEG_RXN13_C
PEG_RXP14_C
PEG_RXN14_C
PEG_RXP15_C
PEG_RXN15_C
U20A
BK26
BL26
BM26
BM27
BG26
BH26
BL27
BK27
BF26
BE26
BK29
BL29
BF27
BG27
BM29
BM30
BG29
BH29
BL30
BK30
BF29
BE29
BK32
BL32
BF30
BG30
BM32
BM33
BG32
BH32
BL33
BK33
BF32
BE32
BK35
BL35
BF33
BG33
BM35
BM36
BG35
BH35
BL36
BK36
BF35
BE35
BK38
BL38
BF36
BG36
BM38
BM39
BG38
BH38
BL39
BK39
BF38
BE38
BK41
BL41
BF39
BG39
BM41
BM42
BH41
BG41
BL42
BK42
GPU_N17E_2152P
5
1/23 PCI_EXPRESS
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
4
1.0V
+1V_GFX
BB33
PEX_DVDD
BB35
PEX_DVDD
BB36
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_DVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
PEX_HVDD
BC33
BC35
BC36
BD33
BD36
BB26
BB27
BB29
BB32
BC26
BC27
BC29
BC30
BC32
BD27
BD30
1.8V
+1.8V_MAIN
1u/6.3V_2
C753
1u/6.3V_2
C706
1u/6.3V_2
C752
1u/6.3V_2
C605
Under GPU
C762 1u/6.3V_2
C765 1u/6.3V_2
C651 1u/6.3V_2
C627 1u/6.3V_2
Under GPU
PEX_PLL_HVDD
BB30
PEX_PLL_HVDD
PEX_TERMP
BL44
PEX_TERMP
4
R538 0_5%_4
C638
0.1u/10V_2
R792 2.49K_1%_4
C1038 22u/6.3V_6
C550 10u/6.3V_4
C590 10u/6.3V_4
C1036 4.7u/6.3V_4
C733 4.7u/6.3V_4
Near GPU
C808
C648
C647
C804
C814
Near GPU
+1.8V_MAIN
DGPU_HOLD_RST# 13
3
22u/6.3V_6
10u/6.3V_4
10u/6.3V_4
4.7u/6.3V_4
4.7u/6.3V_4
N17_GPU RST#
Cb
C818 0.1u/10V_2
PLTRST# 12,39,46,47,48,49,50,55
3
1
2
+1.8V_AON
3 5
VMA_DQ[63:0] 30
Rg
R584
0_5%_4
FBA_DBI[7:0] 30
FBA_EDC[7:0] 30
FBA_PLL_AVDD
Ub
SYS_PEX_RST_MON#
4
U10
NL17SZ08DFT2G
VMA_DQ[63:0]
0.4A
1.8V
Rf
C642
0.1u/10V_2
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
R742
100K_1%_4
R734
2
U20B
U51
U48
U50
U49
R51
R50
R47
U46
V46
Y45
Y47
Y46
V50
V47
U52
V51
AJ44
AG48
AJ45
AG49
AF46
AF47
AF48
AD47
AD49
AD48
AC46
AC47
AA47
AA46
AA45
Y44
AW51
BA52
AW50
BA51
BA50
BB50
BA49
AW49
AV48
AT49
AT47
AT48
AT46
AV51
AV52
AV49
AJ48
AJ46
AJ47
AK49
AM47
AM46
AN48
AN49
AM44
AM45
AN45
AN46
AR48
AN47
AR47
AR46
U47
Y48
AG47
AC48
BB51
AV50
AM48
AR49
R48
V48
AF44
AA48
BB52
AT50
AK48
AR51
W47
W49
W51
W6
W8
Y14
Y15
Y16
AF42
L29
C562
0.1u/10V_2
GPU_N17E_2152P
SYS_PEX_RST_MON# 26
*Short_0402
2
2/23 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
GND
GND
GND
GND
GND
GND
GND
GND
FB_REFPLL_AVDD0
FB_REFPLL_AVDD1
PEGX_RST#
PEGX_RST# 27
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35
FBA_DBG_RFU1
FBA_DBG_RFU2
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_WCK01
FBA_WCK01
FBA_WCKB01
FBA_WCKB01
FBA_WCK23
FBA_WCK23
FBA_WCKB23
FBA_WCKB23
FBA_WCK45
FBA_WCK45
FBA_WCKB45
FBA_WCKB45
FBA_WCK67
FBA_WCK67
FBA_WCKB67
FBA_WCKB67
FBA_PLL_AVDD
1
FBA_CMD0
Y51
Y52
Y49
AA52
AA51
AA50
AC50
AC51
AC52
AC49
AD52
AD51
AD50
AF50
AF51
AF52
AN50
AN51
AN52
AM49
AM52
AM51
AM50
AK50
AK51
AK52
AJ49
AJ52
AJ51
AJ50
AG50
AG51
AG52
AF49
Y50
AR50
AA44
AN44
AG45
AG46
AK46
AK45
U45
U44
V45
V44
AC45
AC44
AD46
AD45
AV47
AV46
AW48
AW47
AR45
AR44
AT45
AT44
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DEBUG0
FBA_DEBUG1
R518
R519
FBA_CMD[31:0] 30
*60.4_1%_4
*60.4_1%_4
VMA_CLK0 3 0
VMA_CLK0# 30
VMA_CLK1 3 0
VMA_CLK1# 30
VMA_WCK01 30
VMA_WCK01# 30
VMA_WCK23 30
VMA_WCK23# 30
VMA_WCK45 30
VMA_WCK45# 30
VMA_WCK67 30
VMA_WCK67# 30
FBVDDQ_MEM
FBA_PLL_AVDD 22,23
FBA_PLL_AVDD
AN42
C563
0.1u/10V_2
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
N17E-GX-1/9 (P CIE)
N17E-GX-1/9 (P CIE)
N17E-GX-1/9 (P CIE)
Date: Sheet of
Date: Sheet
Date: Sheet
1 2
L24 PBY160808T-600Y-N
C580
22u/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGQ
ZGQ
ZGQ
21 73 Monday, March 12, 2018
21 73 Monday, March 12, 2018
1
21 73 Monday, March 12, 2018
+1.8V_MAIN
21
0.4A
of
of
1A
1A
1A
5
4
3
2
1
VMB_DQ[63:0] 31
D D
C C
B B
FBB_DBI[7:0] 31
FBB_EDC[7:0] 31
A A
FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63
H32
D32
A33
B32
E32
G32
J30
F32
H36
G36
J36
F36
F33
D33
J32
G33
E45
D45
F45
G45
D42
E42
F42
H41
E41
F39
E39
D39
F38
E38
D36
E36
M50
P48
M51
M49
P47
P52
R46
P46
L50
L51
L52
L49
M46
L47
M48
M47
D48
C50
C48
C49
E49
E50
F49
F48
F50
D52
J50
H48
H51
J51
H49
H52
C32
E33
E44
G39
P49
L48
D50
H50
B33
E35
G44
H38
P50
J48
D51
F51
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
U20C
3/23 FBB
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
GND
GND
GND
GND
GND
GND
GND
GND
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35
FBB_DBG_RFU1
FBB_DBG_RFU2
FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1
FBB_WCK01
FBB_WCK01
FBB_WCKB01
FBB_WCKB01
FBB_WCK23
FBB_WCK23
FBB_WCKB23
FBB_WCKB23
FBB_WCK45
FBB_WCK45
FBB_WCKB45
FBB_WCKB45
FBB_WCK67
FBB_WCK67
FBB_WCKB67
FBB_WCKB67
FBB_PLL_AVDD
B35
A35
D35
A36
B36
C36
C38
B38
A38
D38
A39
B39
C39
C41
B41
A41
B49
A49
A48
D47
A47
B47
C47
C45
B45
A45
D44
A44
B44
C44
C42
B42
A42
D41
C35
B50
J35
J41
H42
G42
F47
E47
J33
H33
G35
H35
J39
H39
F41
G41
L46
L45
M44
M45
H47
H46
J47
J46
L38
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_DEBUG0
FBB_DEBUG1
FBA_PLL_AVDD
FBB_CMD[31:0] 31
R536 *60.4_1%_4
R529 *60.4_1%_4
VMB_CLK0 31
VMB_CLK0# 31
VMB_CLK1 31
VMB_CLK1# 31
VMB_WCK01 3 1
VMB_WCK01# 31
VMB_WCK23 3 1
VMB_WCK23# 31
VMB_WCK45 3 1
VMB_WCK45# 31
VMB_WCK67 3 1
VMB_WCK67# 31
C746
0.1u/10V_2
FBVDDQ_MEM
FBA_PLL_AVDD 21,23
VMC_DQ[63:0] 32
FBC_DBI[7:0] 32
FBC_EDC[7:0] 32
VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63
FBC_DBI0
FBC_DBI1
FBC_DBI2
FBC_DBI3
FBC_DBI4
FBC_DBI5
FBC_DBI6
FBC_DBI7
FBC_EDC0
FBC_EDC1
FBC_EDC2
FBC_EDC3
FBC_EDC4
FBC_EDC5
FBC_EDC6
FBC_EDC7
C6
D6
A6
B6
B4
A4
B3
C4
D9
C9
E9
B9
B8
A8
F6
E6
F18
G18
E18
H18
D15
E15
G17
H17
J15
H15
E14
F14
H11
G11
F11
E11
J29
F30
H29
G30
B30
A30
H30
C30
D27
J26
F27
G27
C27
B27
A27
G29
H20
D18
G20
E20
F23
E21
D21
E23
G24
H26
F24
G26
F26
D26
B26
C26
A5
C8
J18
F12
D29
E27
F20
E26
D5
D8
E17
E12
E30
B29
G21
E24
Y25
Y26
Y27
Y28
Y29
Y30
Y31
Y32
U20D
4/23 FBC
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
GND
GND
GND
GND
GND
GND
GND
GND
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33
FBC_CMD34
FBC_CMD35
FBC_DBG_RFU1
FBC_DBG_RFU2
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
FBC_WCK01
FBC_WCK01
FBC_WCKB01
FBC_WCKB01
FBC_WCK23
FBC_WCK23
FBC_WCKB23
FBC_WCKB23
FBC_WCK45
FBC_WCK45
FBC_WCKB45
FBC_WCKB45
FBC_WCK67
FBC_WCK67
FBC_WCKB67
FBC_WCKB67
FBC_PLL_AVDD
C11
B11
A11
D11
A12
B12
C12
C14
B14
A14
D14
A15
B15
C15
C17
B17
B24
A24
D23
A23
B23
C23
C21
B21
A21
D20
A20
B20
C20
C18
B18
A18
D17
A17
A9
C24
J14
J23
G15
F15
H21
J21
F8
G8
G9
F9
H12
G12
G14
H14
J27
H27
E29
F29
G23
H23
H24
J24
L17
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_DEBUG0
FBC_DEBUG1
FBA_PLL_AVDD
FBC_CMD[31:0] 32
R548 *60.4_1%_4
R541 *60.4_1%_4
VMC_CLK0 32
VMC_CLK0# 32
VMC_CLK1 32
VMC_CLK1# 32
VMC_WCK01 32
VMC_WCK01# 32
VMC_WCK23 32
VMC_WCK23# 32
VMC_WCK45 32
VMC_WCK45# 32
VMC_WCK67 32
VMC_WCK67# 32
C731
0.1u/10V_2
FBVDDQ_MEM
22
GPU_N17E_2152P
5
4
3
GPU_N17E_2152P
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
2
Date: Sheet
PROJECT :
N17E-GX-2/9 (Memory)_1
N17E-GX-2/9 (Memory)_1
N17E-GX-2/9 (Memory)_1
ZGQ
ZGQ
ZGQ
1
1A
1A
1A
22 73 Monday, March 12, 2018
of
22 73 Monday, March 12, 2018
of
22 73 Monday, March 12, 2018
5
4
3
2
1
ZGQ
ZGQ
ZGQ
23 73 Monday, March 12, 2018
23 73 Monday, March 12, 2018
23 73 Monday, March 12, 2018
23
of
1A
1A
1A
U20E
VMD_DQ[63:0] 33
D D
C C
B B
FBD_DBI[7:0] 33
FBD_EDC[7:0] 33
A A
5
4
VMD_DQ0
VMD_DQ1
VMD_DQ2
VMD_DQ3
VMD_DQ4
VMD_DQ5
VMD_DQ6
VMD_DQ7
VMD_DQ8
VMD_DQ9
VMD_DQ10
VMD_DQ11
VMD_DQ12
VMD_DQ13
VMD_DQ14
VMD_DQ15
VMD_DQ16
VMD_DQ17
VMD_DQ18
VMD_DQ19
VMD_DQ20
VMD_DQ21
VMD_DQ22
VMD_DQ23
VMD_DQ24
VMD_DQ25
VMD_DQ26
VMD_DQ27
VMD_DQ28
VMD_DQ29
VMD_DQ30
VMD_DQ31
VMD_DQ32
VMD_DQ33
VMD_DQ34
VMD_DQ35
VMD_DQ36
VMD_DQ37
VMD_DQ38
VMD_DQ39
VMD_DQ40
VMD_DQ41
VMD_DQ42
VMD_DQ43
VMD_DQ44
VMD_DQ45
VMD_DQ46
VMD_DQ47
VMD_DQ48
VMD_DQ49
VMD_DQ50
VMD_DQ51
VMD_DQ52
VMD_DQ53
VMD_DQ54
VMD_DQ55
VMD_DQ56
VMD_DQ57
VMD_DQ58
VMD_DQ59
VMD_DQ60
VMD_DQ61
VMD_DQ62
VMD_DQ63
FBD_DBI0
FBD_DBI1
FBD_DBI2
FBD_DBI3
FBD_DBI4
FBD_DBI5
FBD_DBI6
FBD_DBI7
FBD_EDC0
FBD_EDC1
FBD_EDC2
FBD_EDC3
FBD_EDC4
FBD_EDC5
FBD_EDC6
FBD_EDC7
AK8
AK4
AK2
AK3
AK5
AK6
AK9
AK7
AG4
AF9
AG6
AG7
AJ4
AJ5
AJ6
AG5
Y6
Y5
V5
Y4
AA6
AA5
AC5
AC4
AD7
AC6
AF6
AD6
AF7
AF8
AF2
AF3
F4
E1
F3
F5
D2
D1
C3
C2
J5
J4
L8
J2
F1
F2
H4
H5
V7
V8
V6
V9
U4
R5
R6
U8
P6
R9
P4
P5
L7
L6
L4
L5
AJ1
AG1
AA7
AD5
D3
H3
U5
M9
AJ3
AG2
AA9
AF4
E3
H2
U6
M5
Y33
Y34
Y35
Y36
Y37
Y38
Y39
Y9
GPU_N17E_2152P
5/23 FBD
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
GND
GND
GND
GND
GND
GND
GND
GND
GP104
FBD_CMD0
AD2
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD_CMD33
FBD_CMD34
FBD_CMD35
FBD_DBG_RFU1
FBD_DBG_RFU2
FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1
FBD_WCK01
FBD_WCK01
FBD_WCKB01
FBD_WCKB01
FBD_WCK23
FBD_WCK23
FBD_WCKB23
FBD_WCKB23
FBD_WCK45
FBD_WCK45
FBD_WCKB45
FBD_WCKB45
FBD_WCK67
FBD_WCK67
FBD_WCKB67
FBD_WCKB67
FBD_PLL_AVDD
AD1
AD4
AC1
AC2
AC3
AA3
AA2
AA1
AA4
Y1
Y2
Y3
V3
V2
V1
L3
L2
L1
M4
M1
M2
M3
P3
P2
P1
R4
R1
R2
R3
U3
U2
U1
V4
AD3
J3
AC9
P9
Y8
Y7
R8
R7
AJ8
AJ7
AG8
AG9
AD8
AD9
AC7
AC8
J6
J7
H7
H6
P8
P7
M7
M8
V11
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_DEBUG0
FBD_DEBUG1
FBA_PLL_AVDD
FBD_CMD[31:0] 33
R565 *60.4_1%_4
R570 *60.4_1%_4
VMD_CLK0 33
VMD_CLK0# 33
VMD_CLK1 33
VMD_CLK1# 33
VMD_WCK01 33
VMD_WCK01# 33
VMD_WCK23 33
VMD_WCK23# 33
VMD_WCK45 33
VMD_WCK45# 33
VMD_WCK67 33
VMD_WCK67# 33
C780
0.1u/10V_2
FBVDDQ_MEM
FBA_PLL_AVDD 21,22
GP106
Quanta Computer Inc.
Quanta Computer Inc.
UNUSED
FBD
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
Date: Sheet of
Date: Sheet
3
2
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N17E-GX-3/9 (M emory)_2
N17E-GX-3/9 (M emory)_2
N17E-GX-3/9 (M emory)_2
1
5
To HDMI Connector
U20R
8/23 IFPC
IFPC_RSET
1K_1%_4
R740
CORE_PLLVDD 27
1.8V
0.4A
C713
4.7u/6.3V_4
0.4A
R735
+1V_GFX
C745
4.7u/6.3V_4
CORE_PLLVDD
C748
4.7u/6.3V_4
+1V_GFX
1.8V
0.4A
C688
4.7u/6.3V_4
1K_1%_4
1.0V
0.4A
C712
4.7u/6.3V_4
5
C573
0.1u/10V_2
D D
1.0V
+1V_GFX
C C
B B
A A
CORE_PLLVDD
C665
0.1u/10V_2
IFPEF_RSET
C769 0.1u/10V_2
C728
0.1u/10V_2
+1V_GFX
C695
4.7u/6.3V_4
C612
1u/6.3V_2
C714
1u/6.3V_2
BC15
BC17
BD20
BD18
BB21
BB23
BD17
BD15
BC18
BC20
C617
1u/6.3V_2
BC21
BC23
IFPCD_RSET
IFPCD_PLLVDD
IFPC
IFP_IOVDD
IFP_IOVDD
GPU_N17E_2152P
U20P
10/23 IFPE
IFPEF_RSET
IFPEF_PLLVDD
IFPE
IFP_IOVDD
IFP_IOVDD
GPU_N17E_2152P
U20O
6/23 IFPF
IFP_IOVDD
IFP_IOVDD
IFPF
GPU_N17E_2152P
U20Q
9/23 IFPD
IFPD
IFP_IOVDD
IFP_IOVDD
GPU_N17E_2152P
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
To DP CONN
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
To TBT Type-C re-Driver
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
To eDP re-Driver
DVI/HDMI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
DP
IFPC_AUX
IFPC_AUX
DP
IFPE_AUX
IFPE_AUX
DP
IFPF_AUX
IFPF_AUX
DP
IFPD_AUX
IFPD_AUX
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
IFPC_L3
IFPC_L3
IFPC_L2
IFPC_L2
IFPC_L1
IFPC_L1
IFPC_L0
IFPC_L0
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
BF11
BE11
BM14
BM15
BL15
BK15
BK17
BL17
BM17
BM18
4
BL9
BK9
BF17
BE17
BF18
BG18
BG20
BH20
BF20
BE20
BL8
BK8
BG14
BH14
BF14
BE14
BF15
BG15
BG17
BH17
INT_DP_AUXN
INT_DP_AUXP
BM9
BM8
BK11
BL11
BM11
BM12
BL12
BK12
BK14
BL14
INT_eDP_AUXN
INT_eDP_AUXP
4
GPU_DDCDATA
GPU_DDCCLK
GPU_DDCDATA
GPU_DDCCLK
INT_DP_AUXN
INT_DP_AUXP
GPU_TBT_AUXN
GPU_TBT_AUXP
INT_eDP_AUXN
INT_eDP_AUXP
GPU_CLK# 37
GPU_CLK 37
GPU_D0# 37
GPU_D0 37
GPU_D1# 37
GPU_D1 37
GPU_D2# 37
GPU_D2 37
R545
*100K_1%_4
DP_D3# 36
DP_D3 3 6
DP_D2# 36
DP_D2 3 6
DP_D1# 36
DP_D1 3 6
DP_D0# 36
DP_D0 3 6
R784
100K_1%_4
GPU_TBT_AUXN
GPU_TBT_AUXP
GPU_TBT_D3# 38
GPU_TBT_D3 38
GPU_TBT_D2# 38
GPU_TBT_D2 38
GPU_TBT_D1# 38
GPU_TBT_D1 38
GPU_TBT_D0# 38
GPU_TBT_D0 38
R767
100K_1%_4
R768
100K_1%_4
GPU_DDCDATA 37
GPU_DDCCLK 37
R547
*100K_1%_4
INT_DP_AUXN 36
INT_DP_AUXP 3 6
R785
100K_1%_4
R772
100K_1%_4
INT_eDP_AUXN 35
INT_eDP_AUXP 35
INT_eDP_TXN3 35
INT_eDP_TXP3 35
INT_eDP_TXN2 35
INT_eDP_TXP2 35
INT_eDP_TXN1 35
INT_eDP_TXP1 35
INT_eDP_TXN0 35
INT_eDP_TXP0 35
R769
100K_1%_4
GPIO27_IFPC_HPD_HDMI 26
GPIO18_IFPE_HPD_DP 26
GPU_TBT_AUXN 38,39
GPU_TBT_AUXP 38,39
GPIO24_IFPF_HPD_TBT 26
GPIO17_IFPD_HPD_EDP 26
+1.8V_AON
3
1
R587
10K_1%_2
2
Q49
DMG1012T-7
+1.8V_AON
+1.8V_AON
+1.8V_AON
GPIO27_IFPE_HPD_Q
R741
10K_1%_2
3
2
Q73
1
DMG1012T-7
R729
10K_1%_2
Q72
3
DMG1012T-7
2
1
R753
10K_1%_2
Q75
3
DMG1012T-7
2
1
3
3
HDMI-HPD
R589 100K_1%_4
R585
100K_1%_4
C825
*220p/50V_4
DP HPD
GPIO18_IFPE_HPD_Q
R731
100K_1%_4
R732 100K_1%_4
TBTA HPD
TBT_DP_HPD _Q
R727 100K_1%_4
R730
100K_1%_4
eDP HPD(For G-Sync)
EDP_HPD_GPU_Q
R761 100K_1%_4
R746
100K_1%_4
Modify 8/16
R540
HDMI_HPD _PCH 13,37
1.8V
0.4A
C1021
220p/50V_4
C1027
*220p/50V_4
IFPAB_RSET
1K_1%_4
CORE_PLLVDD
C775 0.1u/10V_2
DP_HPD_PCH 13,36
C1022
*220p/50V_4
TBT_DP_HPD 13,3 8,39
EDP_HPD_GPU 35
+1V_GFX
BD23
BD21
BB17
BB15
BB18
BB20
AM5
AM6
AM7
AV7
AV8
AW9
U20V
GPU_N17E_2152P
U20U
GPU_N17E_2152P
2
U20N
7/23 IFPAB
IFPAB_RSET
IFPAB_PLLVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFPAB
GPU_N17E_2152P
11/23 MIOA
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOA_VREF
12/23 MIOB
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VREF
2
1
DL-DVI
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
DP DVI/HDMI
BH11
IFPA_AUX
SDA
SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
IFPA_AUX
IFPA_L3
IFPA_L3
IFPA_L2
IFPA_L2
IFPA_L1
IFPA_L1
IFPA_L0
IFPA_L0
BG11
BF21
BG21
BG23
BH23
BF23
BE23
BF24
BG24
24
To TBT Type-C re-Driver
GPU_TBT2_AUXN
BG12
IFPB_AUX
SDA
SCL
TXC
TXC
TXD0
TXD3
TXD0
TXD3
TXD1
TXD4
TXD1
TXD4
TXD2
TXD5
TXD2
TXD5
AN9
MIOAD0
AM2
MIOAD1
AN7
MIOAD2
AN6
MIOAD3
AR1
MIOAD4
AR6
MIOAD5
AR5
MIOAD6
AM8
MIOAD7
AN3
MIOAD8
AR8
MIOAD9
AR3
MIOAD10
AR2
MIOAD11
AT7
MIOA_CTL3
AM1
MIOA_HSYNC
AR7
MIOA_VSYNC
AN1
MIOA_DE
AN2
MIOA_CLKOUT
AM3
MIOA_CLKIN
GPIO15_IFPB_HPD_TBT 26
AT3
MIOBD0
AV6
MIOBD1
AT2
MIOBD2
AT1
MIOBD3
AW6
MIOBD4
AV2
MIOBD5
AV1
MIOBD6
AV3
MIOBD7
AW3
MIOBD8
BA8
MIOBD9
AW7
MIOBD10
BB8
MIOBD11
BB7
MIOB_CTL3
AV5
MIOB_HSYNC
BA7
MIOB_VSYNC
AW2
GP106 GP104
UNUSED MIOB
MIOB_DE
MIOB_CLKOUT
MIOB_CLKIN
AW1
AT6
GPU_TBT2_AUXP
BH12
IFPB_AUX
BL18
IFPB_L3
BK18
IFPB_L3
BK20
IFPB_L2
BL20
IFPB_L2
BM20
IFPB_L1
BM21
IFPB_L1
BL21
IFPB_L0
BK21
IFPB_L0
GPU_TBT2_AUXN
GPU_TBT2_AUXP
+1.8V_AON
R590
10K_1%_2
Q51
DMG1012T-7
3
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet
TBT2_DP_ HPD_Q
2
R607
100K_1%_4
N17E-GX-4/9(Display)
N17E-GX-4/9(Display)
N17E-GX-4/9(Display)
R774
100K_1%_4
TBTB HPD
GPU_TBT2_AUXN 38,39
GPU_TBT2_AUXP 38,39
GPU_TBT2_D3# 38
GPU_TBT2_D3 38
GPU_TBT2_D2# 38
GPU_TBT2_D2 38
GPU_TBT2_D1# 38
GPU_TBT2_D1 38
GPU_TBT2_D0# 38
GPU_TBT2_D0 38
R773
100K_1%_4
R601 100K_1%_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
C854
220p/50V_4
TBT2_DP_ HPD 38 ,39
ZGQ
ZGQ
ZGQ
24 73 Monday, March 12, 2018
24 73 Monday, March 12, 2018
24 73 Monday, March 12, 2018
of
of
1A
1A
1A
5
4
3
2
1
VRAM Table
RAMCFG
[2:0]
GDDR5 256Mx32 8 GHz
0x1
GDDR5 256Mx32 8 GHz
0x2
D D
C
B B
+1.8V_AON
R763
R760
*100K_1%_4
100K_1%_4
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
A A
R759
*100K_1%_4
R762
100K_1%_4
R758
*100K_1%_4
R757
100K_1%_4
R765
100K_1%_4
R764
*100K_1%_4
R557
*100K_1%_4
R556
100K_1%_4
R561
100K_1%_4
R560
*100K_1%_4
ROM_SI
ROM_SO
ROM_SCLK
Modify 8/16
GDDR5 256Mx32 8 GHz
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
R714
*100K_1%_4
R711
100K_1%_4
U20T
15/23 MISC 2
BL3
STRAP0
BL4
STRAP1
BM4
STRAP2
BM5
STRAP3
BK5
STRAP4
BJ5
STRAP5
GPU_N17E_215 2P
R725
*100K_1%_4
R726
100K_1%_4
+1.8V_AON
Samsung B die 0x0
Micron A die
Hynix M die
R707
*100K_1%_4
R708
100K_1%_4
STRAP5
G-SYNC
None G-SYNC
5
4
100K PU
100K PD
3
Vendor P/N Vendor DESCRIPTION
K4G80325FB-HC25
MT51J256M32HF-80:A
H5GQ8H24MJR-R4C
ROM_CS
BJ4
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
BUFRST
ROM_SI
BK2
ROM_SO
BK4
ROM_SCLK
BK3
BF9
BUFRST
ROM_SI
ROM_CS ROM_CS_R Hold#_7
ROM_SCLK ROM_SCLK_R
Quanta P/N
AKG58WWT509
AKG5QGUTL14
AKG5RF0TW06
TP29
R710 33_1%_2
R728 33_1%_2
R706 33_1%_2
ROM_CS_R
ROM_SCLK_R
ROM_SI_R
ROM_SO
WP#_3
ROM_SI_R
ROM_SO
colay ROM Socket
+1.8V_AON
2
U18
1
CS
6
CLK
5
SI
2
HOLD
DO
3
WP
*VBIOS Socket
R723
10K_1%_2
U19
5
2
1
6
chang P/N to AKE5GGN0N02
8/18
VCC
GND
+1.8V_AON
8
Hold#_7
7
4
ROM_CS_R
ROM_SO
ROM_SI_R
ROM_SCLK_R
For ICT test
8
VCC
DI(IO0)
WP(IO2)
DO(IO1)
HOLD(IO3)
CS
CLK
GD25LQ80BTIGR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
3
7
4
GND
N17E-GX-5/9(Strap)
N17E-GX-5/9(Strap)
N17E-GX-5/9(Strap)
WP#_3
R724 10K_1%_2
R709 10K_1%_2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
TP39
TP38
TP36
TP35
+1.8V_AON
ZGQ
ZGQ
ZGQ
25 73 Monday, March 12, 2018
25 73 Monday, March 12, 2018
25 73 Monday, March 12, 2018
25
C1013
0.1u/10V_2
of
of
1A
1A
1A
C
5
U20W
13/23 MISC 1
BG5
JTAG_TMS
JTAG_TDI
JTAG_TRST#
JTAG_TCK
BF12
BJ1
BJ2
BK24
BL23
BM23
BM24
BL24
BK23
OVERT
TS_VREF
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
NVJTAG_SEL
GPU_N17E_2152P
+1.8V_AON
GPUEVENT#_PCH 13
+1.8V_AON
Event
GPUEVENT#
OVERT# 27
TP28
TP44
TP43
TP46
TP45
R776 *10K_1%_2
R775 *10K_1%_2
R777 10K_1%_2
R779 *10K_1%_2
GPUEVENT#
1V8_MAIN_EN
FRM_LCK#
NVVDD_PSI#
THER_ALERT#
PWR_LEVEL
SYS_PEX_RST_MON#_R
GPU_PEX_RST_HOLD#
GPIO28_OC_WARN#_Q
NVVDDS_PSI_R
EDPc_OUTPUT_C AP
D42 RB500V-40
2
TS_VREF
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
JTAG_SEL
R751 10K_1%_2
R752 10K_1%_2
R744 10K_1%_2
R743 10K_1%_2
R580 10K_1%_2
R721 100K_1%_4
R750 10K_1%_2
R574 10K_1%_2
R582 10K_1%_2
R571 10K_1%_2
R745 10K_1%_2
1
5
D D
C C
B B
A A
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
I2CB_SCL
I2CB_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31_RFU
GPIO32_RFU
BJ8
BH8
BG9
BH9
BG8
BF8
BD6
BB5
BD1
BE4
BE1
BG2
BD2
BD7
BH4
BJ3
BD3
BH3
BE6
BB1
BG4
BG1
BE2
BH1
BE3
BD4
BE5
BA5
BB6
BG3
BD5
BB2
BE7
BA4
BB4
BA3
BB3
BA2
BA1
GFx_SCL
GFx_SDA
I2CC_SCL_ GFX
I2CC_SDA_G FX
I2CB_SCL_G
I2CB_SDA_G
NVVDDS_PSI_R
Throttle
+VCCIO
+1.8V_AON
4
+1.8V_AON
R551
2K_1%_4
R573
GPUEVENT#
1V8_MAIN_EN
FRM_LCK#
NVVDD_PSI#
LCD_BL_PWM
MEM_VDD_CTRL
THER_ALERT#
MEM_VREF_CTL
LCD_VDD
PWR_LEVEL
LCD_BLEN
SYS_PEX_RST_MON#_R
STEREO_OUT_SRV_H EAD
RASTER_SYNC0
GPU_PEX_RST_HOLD#
GPIO28_OC_WARN#_Q
EDPc_OUTPUT_C AP
TP40
TP42
R613
R612 *Short_0402
PWR_LEVEL
GPIO12 AC detect
AC high
DC low
PWR_LEVEL
D57
4
R549
R550
2K_1%_4
2K_1%_4
*0_5%_4
R568 *80@10K_1%_2
R736 *Short_0402
*0_5%_4
2
1
Q70 DMG1012T-7
B2A
2
1
R719
*0_5%_2
R546
2K_1%_4
R553
2K_1%_4
NVVDDS_VID 68
NVVDDS_PSI 68
NVVDD_PWM_GPU 66
+1.8V_AON
1V8_MAIN_EN 27,66,71
FRM_LCK# 35
PSI 66 ,68,69
THER_ALERT# 27
HPD_TBT_DP change to GPIO15 9/20
GPIO15_IFPB_HPD_TBT 24
GPIO17_IFPD_HPD_EDP 24
GPIO18_IFPE_HPD_DP 24
GPIO24_IFPF_HPD_TBT 24
GPIO27_IFPC_HPD_HDMI 24
3
R718 *0_5%_4
SDM20U30-7
+1.8V_AON
R552
2K_1%_4
R720 10K_1%_2
R576 *100K_1%_4
R567 10K_1%_2
R749 100K_1%_4
R579 *100K_1%_4
R748 *100K_1%_4
R747 *0_5%_4
R566 100K_1%_4
D41
3
+3V
R722
10K_1%_2
3
Q69
2
DMG1012T-7
1
TP41
TP30
SDM20U30-7
2
1
dGPU_OPP #_PROC HOT# 49
GPU_THROTTING# 57
3
3
Q71
2
DMG1012T-7
1
3
Q52
2
*DMG1012T-7
1
GC6FBEN 27
LCD_BL_PWM 35
MEM_VDD_CTRL 69
MEM_VREF_CTL 30 ,31,32,33
LCD_VDD 35
LCD_BLEN 35
SYS_PEX_RST_MON# 21
GPIO28_OC_WARN# 70
I2CC_SDA_G FX
GC6FBEN_Q 13
GC6FBEN_Q_EC 49
+1.8V_AON
2
1
26
+1.8V_AON
5
4
3
Q48A
PJX138K
Q47B
2
PJX138K
6 1
I2CC_SCL_ IPC 7 0
I2CC_SDA_IP C 7 0
2
GFx_SCL I2CC_SCL_ GFX
GFx_SDA
2
6 1
Q48B
PJX138K
Q47A
5
PJX138K
3 4
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
N17E-GX-6/9(G PIO)
N17E-GX-6/9(G PIO)
N17E-GX-6/9(G PIO)
Date: Sheet
Date: Sheet of
Date: Sheet
GPUT_CLK 49
GPUT_DATA 49
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGQ
ZGQ
ZGQ
26 73 Monday, March 12, 2018
26 73 Monday, March 12, 2018
1
26 73 Monday, March 12, 2018
1A
1A
1A
of
of
5
D46 *SDM20U30-7
2
OVERT#_R 70
PEGX_RST# 21
R733
+1.8V_AON
D D
OVERT# 26
10K_1%_2
1
Q74
*DMG1012T-7
2
1
3
R737
*Short_0402
R738 *10K_1%_2
+1.8V_AON
4
R602 *0_5%_4
THER_ALERT# 26
3
1V8_MAIN_EN 26,66,71
R583 0_5%_4
+1.8V_AON
2
1
3
Q50 DMG1012T-7
+1.8V_AON
2
1
3
Q56 DMG1012T-7
DGPU_THER_ALERT# 49
DGPU_OVT#_EC 49
2
for GC6
+1.8V_AON
Ca
C880
0.1u/10V_2
U12
74LVC1G32GW
2
FBVDD_EN 69
4
1
3 5
Ua
Rb
R717 *10K_1%_2
GC6FBEN
1
27
+1.8V_AON
+1V_GFX_PG 71
1
2
D48
SDM20U30-7
D49
R644
D50
R651 1K_1%_4
1
2
1070@SDM20U30-7
2
1070@100K_1%_4
SDM20U30-7
1
R655
*1.21K_1%_4
R716
*1070@12.1K_1%_4
C956
*0.1u/10V_2
NVVDDPG_R
C888
*1070@0.22u/6.3V_2
NVVDDPG
NVVDD_CORE1_EN 66
NVVDDPG_R 68
R713
*1070@0_5%_4
R780
GC6FBEN
2
10K_1%_2
3
Q55
DMG1012T-7
1
NVVDDPG_RRR
3
2
Q57
DMG1012T-7
1
R606
0_5%_4
+1.8V_AON
R599
*10K_1%_2
NVVDDPG 66
C C
GC6FBEN 26
NVVDDPG
NVVDDPG_RRR
R605
*0_5%_4
3
2
1
NVVDD_PG_LOOP_OVT
Q53
DMG1012T-7
NVVDD POWER GOOD LOOPBACK
For Power off sequence
+1.8V
U14
74LVC1G32GW
DGPU_PWR_EN
2
NVVDDPG_R
4
PS_FBVDD_PGOOD
1
3 5
+1.8V_AON
1
NVVDDPG
4
DGPU_PWR_EN
2
U11
3 5
1070@NL17SZ08DFT2G
1V8_AON_EN 71
DGPU_PWR_EN 13
PS_FBVDD_PGOOD 36,69
Overt temp ckt for NVVDD and NVVDDS
U20S
14/23 XTAL/PLL
BD12
SP_PLLVDD
BC12
VID_PLLVDD
U42
GPCPLL_AVDD0
AF11
GPCPLL_AVDD1
BB24
XS_PLLVDD
BJ6
XTALSSIN
XTALSSIN
VGA_XTALIN VGA_XTALOUT
BL6
XTALIN
GPU_N17E_2152P
XTALOUTBUFF
XTALSSIN
R555
R766
10K_1%_2
10K_1%_2
4
XTALOUTBUFF
XTALOUT
BK6
BM6
XTALOUTBUFF
GPU All power good/GC6 sequence
+1.8V_AON
R624
3
D56
BAT54AW-L
10K_1%_2
3
NVVDDPG
PS_FBVDD_PGOOD
1
2
2
+1.8V_AON
2
3
1
R623
10K_1%_2
Q58
DMG1012T-7
C886
*0.1u/10V_2
2
+1.8V_AON
3
1
R639
10K_1%_2
Q61
DMG1012T-7
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
+1.8V_AON
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N17E-GX -7/9 (MISC)
N17E-GX -7/9 (MISC)
N17E-GX -7/9 (MISC)
1
Q77
2
DMG1012T-7
3
DGPU_PWROK_Q 13
DGPU_PWROK 21
ZGQ
ZGQ
ZGQ
27 73 Monday, March 12, 2018
of
27 73 Monday, March 12, 2018
27 73 Monday, March 12, 2018
1A
1A
1A
Y4
27MHZ/10ppm
1
2
C768
0.1u/10V_2
C781
0.1u/10V_2
3
4
CORE_PLLVDD
C726
0.1u/10V_2
C747
22u/6.3V_6
VGA_XTALOUT
C1028
10p/50V_4
B B
CORE_PLLVDD 24
+1.8V_MAIN
L15 PBY160808T-600Y-N
1 2
0.4A
A A
change crystal cap from 12p to 10p 12/08
TXC suggest 12P,B stage check again
C727
4.7u/6.3V_4
5
C694
0.1u/10V_2
VGA_XTALIN
CORE_PLLVDD
C553
0.1u/10V_2
C1030
10p/50V_4