Each instance in R evision Hist ory refle cts a c hange to this doc ument from
its previous revision. For more deta ils, refer to the corresponding page s
and appropriate links in the table below.
Zilog’s Z8 Encore! XP® F1680 Series microcontr ollers (MCU) are based
on the 8-bit eZ8 CPU c ore and optimiz ed for l ow-power appli cati ons. The
Z8 Encore! XP F1680 Series support 1.8 V to 3.6 V operation with
extremely low Activ e, Halt, and Stop mode curr ents and an assortment of
speed and low power options. Z8F1680AN020 is the silicon used in the
board. For more information, refe r to Z8 Encore! XPProduct Specification (PS0250). The features to balance power and performance needs of applications include:
•
Wide operat ing voltage range: 1.8 V–3.6 V.
•
Active, Halt, and Stop operati onal modes with the ability to enable or
disable peripherals for power savings.
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
®
F1680 Series
1
•
Oscillator control tha t determines clock source, operating speed, and
fail safe operation in addition to fast wakeup.
•
A user-controlle d Program RAM area to store interrupt service
routines (ISR) of high-fre quency interrupts. The Program RAM
mechanism ensures low average current and quick response for highfrequency interrupts.
MCU Features
Features of the Z8 Encore! XP F1680 MCU include:
•
T wo Z8F1680AN020SG 44-pin Devices with 20 MHz eZ8 CPU core
•
16 KB Flash memory with in-circuit programming capability
•
2 KB register data RAM
•
1 KB Program RAM for program code shadowing and data storage
•
256 B non-volatile data storage (NVDS)
UM021204-0508Introduction
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
•
Fast 8-channel, 10-bit analog-to-digital converter (ADC)
•
On-chip temperature sensor
•
T wo on-chip analog comparators
•
On-chip low-power operational amplifier (LPO)
•
T wo full-duplex, 9-bit, UART ports with support of Local In te rconnect Network (LIN) protocol
•
Enhanced serial peripheral interface (SPI) controller
•
I2C Master/Slave
•
Three enhanced 16-bit timers with Capture, Compare, and PWM
capability
•
Multichannel timer that supports four capture/compare modules on
one timer
2
•
Watchdog Timer (WDT) with dedicated internal RC oscillator
•
39 Input/Output (I/O) pins
•
Up to 20 vectored interrupts
•
On-Chip Debugger (OCD)
•
Power-On Reset (POR)
•
Built-in Low-Voltage Detecti on (LVD) and Voltage Brownout (VBO)
protection
•
Internal Precision Oscillator (IPO) with output frequency range of
43 kHz to 11 MHz
0 ºC to +70 ºC (standard) operating temperature ranges
UM021204-0508Introduction
Z8 Encore! XP® Dual F1680 Series Development Kit
For more information on the Z8 Encore! XP F1680 Series, refer to Z8
Encore! XP® F1680 Series Pr oduct Specification (PS0250), available fo r
download at www.zilog.com.
Hardware-Suppor ted So ftware Features
Zilog’s eZ8 MCU, latest 8-bit MCU meets the continuing demand for
faster and more code-efficient microcontrollers. It executes a superset of
the original Z8® instruction set. The eZ8 MCU features include:
•
Direct register- to-regist er architecture allows each register to function
as an accumu lat or, improving execution time and decreasing the
required Program Memory.
•
Software stack a llows grea ter dep th in sub-routin e ca lls an d int errupts
more than hardware stacks.
User Manual
3
•
Compatible with existing Z8 code.
•
Expanded internal Registe r File allows access up to 4 KB.
•
New instructions improve execution efficiency for code developed
using higher-level programming languages including C.
•
Pipelined instruction fetch and execution.
•
New instructions for improved per formance including BIT, BSWAP,
BTJ, CPC, LDC, LDCI, LEA, MULT, and SRL.
•
New instructions support 12-bit linear addressing of the regist er fi le.
•
Up to 10 MIPS operation.
•
C-Compiler friendly.
•
2 to 9 clock cycles per instruction.
TM
For more details on eZ8 MCU, refer to eZ8(UM0128), available for download at www.zilog.com.
UM021204-0508Introduction
CPU User Manual
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
Z8 Enc ore! XP® Dual F1680 Series
Development Board
The Z8 Encore! XP Dual F1680 Series deve lopment board (see Figure 1)
provides a tool to evaluate features of the Z8 Encore! XP F1680 Series
MCU and to start de veloping an application before building the hardware.
4
Figure 1. Z8 Encore! XP F1680 Seri es Devel opm ent Boar d
UM021204-0508Z8 Encore! XP
®
Dual F1680 Series
Theory of Operation
Figure 2 displays the Z8 Encore! XP F1680 development board.
The terms used in this section are explained below:
TermsDefinitions
Z8F1680_S (MCU_S)I
Z8F1680_M (MCU_M)I
2
C Slave device
2
C Master device
The features of Z8F1680 MDS-compliant module include:
•
T wo Z8F1680 devices: the Z8F1680_M I2C Master device and the
Z8F1680_S I2C Slave device.
UM021204-0508Z8 Encore! XP
®
Dual F1680 Series
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
•
RS-232 interface.
•
T wo MDS connectors.
•
I2C-driven DAC that provides analo g input for the Z8F1680_S
device.
•
The Slave device has a 20 MHz crystal; the Master device uses
internal IPO.
•
On-chip debugger interface.
The module has two main modes of operation:
•
Downloading and debugging code into the Slave dev ic e through the
Master device, using the connection of the OCD of the Slave device
to the UART1 of the Master device. In this case, PA7 of the Master
device is acting as a Reset sou rce for the Slave device and needs to be
configured as an output with Open Drain.
6
•
Downloading and debugging code in either the Master or Slave
device using the standard OCD interface on either chip.
The operation mode is selected by switch S2.
All the GPIOs of both devices, except for those used on the module ar e
connected to JP1 and JP2. All the GPIOs of the Slave device, except
analog inputs are connected to the odd pins of JP1. The GPIOs of the
Master device are connected to the even pins of JP1 and to JP2. All the
analog inputs of the Slave devi ce are connected to JP2. Input PB3/ANA3
of the Slave device can be connecte d through J1 to eithe r the out put of U2
(12-bit DAC) or to JP2 pin 6.
The 12-bit DAC7571 manufactured by TI (U2) is controlled either by
Master or Slav e de vic e.
UM021204-0508Z8 Encore! XP
®
Dual F1680 Series
Block Diagram
Figure 3 displays the block diagram of the Z8F1680 MDS module.
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
7
Figure 3. Block Diagram of the Z8F1680 MDS Module
UM021204-0508Z8 Encore! XP
®
Dual F1680 Series
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
Hardware Interface Specification
The hardware specifications include:
•
Headers
•
Drivers (I2C, UART, and so on)
•
Debug interface
•
Expansion Module interface
Power and Communication Interfaces
T able 1 lists jumper information concerning the shunt status, functions ,
devices, and defaults affected of jumpers JP1, JP2, JP3, JP 4, JP5, and JP6.
Table 1. Shunt Settings for the Z8 Encore! XP F1680 Development Board
8
Factory
NumberShuntsFunctionPins Connected (IN/OUT)
1J1AN3_IN1–2 AN3_IN connected to
AN3 on the JP3
2–3 AN3_IN connected to
Vout of DAC
2J2RS-232IN—RS-232 disabledDefault
OUT—RS-232 enabledOUT
4J4AVCC for MCU_SIN—AVCC is connected to
VCC_3.3 V
OUT—AVCC not connected
5J5GND Test Point N/A
6J6VCC_3.3 V Test Point N/A
UM021204-0508Z8 Encore! XP
®
Settings
2–3
Default
IN
Dual F1680 Series
Z8 Encore! XP® Dual F1680 Series Development Kit
External Interface Headers JP1 and JP2
External interface headers JP1 and JP2 are displayed in the schematic in
Figure 5 on page 11.
Kit Contents
For kit contents, refer to Z8 Encore! XP® Dual F1680 Series Develop-
ment Kit Quick Start Guide (QS0038).
Installation
Follow the directions in the Z8 Encore! XP® Dual F1680 Series Develop-
ment Kit Quick Start Guide (QS0038) for software insta llation and setup
of the Z8 Encore! XP Dual F1680 Series Development Kit.
User Manual
9
UM021204-0508Z8 Encore! XP
®
Dual F1680 Series
Schematics
This section includes schematics for the Z8 Encore! XP Dual F1680 Series Development Board. The following components appear in the
schematic but are not installed on the board:
•
C20
•
J3
•
R13 through R15
•
U11
5
Z8 Encore! XP
®
Dual F1680 Series Development Kit
User Manual
10
4
3
2
1
DD
CC
BB
AA
-DIS_232
-DIS_IrDA
POWER&COMMUNICATIONS
-DIS_232
-DIS_IRDA
POWER&COMMUNICATIONS
A1
FABA1FAB
5
PCS_5
PCS_6
PCS_7
PA3_CTS0
PA4_RXD0
PA5_TXD0
-RESET
TXD1
RXD1
nCTS0
RXD0
TXD0
nCTS1
MCU
MCU
PCS_5
PCS_6
PCS_7
PA3_CTS0
PA4_RXD0
PA5_TXD0
-RESET
PD5_TXD1
PD4_RXD1
PD3_nCTS1
PD6_DE1
PA2_DE0
ANA[7:0]
PAS_[7:2]
PBS_5
PES_4
PCS_[4:3]
PDS_[2:1]
PDS_7
PES_[3:0]
PES_[6:5]
PAM_0
PAM_1
PAM_6
PBM_[5:0]
PCM_[7:0]
PDM_[3:1]
PDM_6
PDM_7
PEM_0
PEM_[6:3]
PCS_5
PCS_6
PCS_7
PA3
PA4
PA5
-RESET
TXD1
RXD1
PCS_[4:3]
PES_[6:5]
PDM_6
ANA[7:0]
PAS_[7:2]
PBS_5
PES_4
PDS_[2:1]
PDS_7
PES_[3:0]
PAM_0
PAM_1
PBM_[5:0]
PCM_[7:0]
PDM_[3:1]
PDM_7
PEM_0
PEM_[6:3]
TXD1
TXD0
PAM_6
MDS INTERFACE
ANA[7:0]
PAS_[7:2]
PBS_5
PES_4
PCS_[4:3]
PDS_[2:1]
PDS_7
PES_[3:0]
PES_[6:5]
PAM_0
PAM_1
PAM_6
PBM_[5:0]
PCM_[7:0]
PDM_[3:1]
PDM_6
PDM_7
PEM_0
PEM_[6:3]
TXD1
TXD0
MDS_INTERFACE
-DIS_IrDA
-DIS_232
nCTS1
-RESET
nCTS0
RXD1
RXD0
-DIS_IrDA
-DIS_232
nCTS1
RXD1
-RESET
RXD0
nCTS0
TOP
Title
Title
Title
Z8F24xB Evaluation Module. Schematic.
Z8F24xB Evaluation Module. Schematic.
Z8F24xB Evaluation Module. Schematic.
Size
Document Number
Size
Document Number
Size
Document Number
B
B
B
Date:
Wednesday, November 29, 2006
Date:
Wednesday, November 29, 2006
Date:
4
3
2
Wednesday, November 29, 2006
96C1011-001
96C1011-001
96C1011-001
Sheet
Sheet
Sheet
1
14
14
14
Rev
Rev
Rev
C
C
C
of
of
of
Figure 4. Z8 Encore! XP Dual F1680 Series MCU Developmen t Board
Figure 6. Z8 Encore! XP Dual F1680 Series MCU Developm ent Board (Con tinued)
UM021204-0508 Schematics
Z8 Encore! XP
®
Dual F1680 Series Development Kit
User Manual
13
P1
2
3
1
CON DCP1CON DC
DD
CC
PCS_5
PCS_6
BB
PCS_7
-RESET
5
D3
REDD3RED
D4
YELLD4YELL
D5
GREEND5GREEN
21
21
21
VCC_3.3V
U9
U9
SPX2815AU-3.3
SPX2815AU-3.3
3
VI
R16
R16
12
10K
10K
5V
12
C12
C12
0.1uF
0.1uF
2
VO
4
VO_2
GND
1
C19
C19
0.1uF
0.1uF
AB
SW PB NO
SW PB NO
-RESET
12
S1
S1
12
C18
C18
+
+
10uF
10uF
4
VCC_5V
VCC_5V
12
+
+
C14
C14
10uF
10uF
VCC_3.3V
12
R11
R11
100 OHm
100 OHm
21
D2
GREEND2GREEN
3.3 OK
B1A1
3
-DIS_232
DIS RS232
J9
SHUNTJ9SHUNT
HDR/PIN 2x1
HDR/PIN 2x1
2
12
C13
C13
0.1uF
0.1uF
12
C17
C17
0.1uF
0.1uF
1
PA5_TXD0
PA3_CTS0
PA4_RXD0
5
VCC
I
SN74LVC2G04
SN74LVC2G04
2
GND
U10A
U10A
O
6
-DIS_IRDA
PA5_TXD0
PA3_CTS0
PA4_RXD0
VCC_3.3V
12
R12
R12
10K
10K
J2
J2
1
1
2
GND
2
DIS IRDA
SHUNT
SHUNT
GND
J10
J10
HDR/PIN 2x1
HDR/PIN 2x1
U8
U8
2
C1+
4
C1-
5
C2+
6
C2-
13
T1IN
12
T2IN
15
R1OUT
10
R2OUT
1
EN
20
SHDN
J3
J3
1
1
2
2
VCC_3.3V
12
19
VCC
T1OUT
T2OUT
R1IN
R2IN
GND
SP3222EBCA
SP3222EBCA
18
R15
R15
10K
10K
VCC_3.3V
V+
V-
NC1
NC2
5
3
I
2
3
7
17
8
16
9
14
11
U10B
U10B
VCC
O
SN74LVC2G04
SN74LVC2G04
GND
12
C11
C11
0.1uF
0.1uF
12
12
C16
C16
C15
C15
0.1uF
0.1uF
0.1uF
0.1uF
R13
R13
12
12
68R
68R
R14
R14
2R2
2R2
TXD1
4
IRDA_SD
RXD1
TXD
CTS
RXD
5
1
2
4
3
6
1
U11
U11
VCC
LEDA
TXD
SD
RXD
GND
C20
C20
0.33uF
0.33uF
CONSOLE
P2
P2
1
6
2
7
3
8
4
USER
9
5
DB9 Female
DB9 Female
T
ZHX1810
ZHX1810
7
AA
GND
5
4
J5
J5
11223
HDR/PIN 3x1
HDR/PIN 3x1
GND
3
J6
J6
11223
HDR/PIN 3x1
HDR/PIN 3x1
VCC_3.3V
3
VCC 3.3V
Title
Title
Title
Size
Size
Size
Date:
Date:
3
2
Date:
POWER & LOCAL INTERFACES
Z8F24xB Evaluation Module. Schematic.
Z8F24xB Evaluation Module. Schematic.
Z8F24xB Evaluation Module. Schematic.
Document Number
Document Number
Document Number
B
B
B
Wednesday, November 29, 2006
Wednesday, November 29, 2006
Wednesday, November 29, 2006
96C1011-001
96C1011-001
96C1011-001
44
44
44
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
C
C
C
of
of
of
Figure 7. Z8 Encore! XP Dual F1680 Series MCU Developm ent Board (Con tinued)
UM021204-0508 Schematics
Z8 Encore! XP® Dual F1680 Series Development Kit
Customer Support
For answers to technical questi ons about the product, documentation, or
any other issues with Zilog’s offerings, please visit Zilog’s Knowledge
Base at http://www.zilog.com/kb
For any comments, detail technical questions, or reporting problems,
please visit Zilog’s Technical Support at http://support.zilog.com
User Manual
14
.
.
UM021204-0508Customer Support
Z8 Encore! XP® Dual F1680 Series Development Kit
User Manual
15
Warning:
DO NOT USE IN LIFE SUPPORT
LIFE SUPPORT POLICY
ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONEN TS IN LIFE SUPPO RT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS PRIOR WRITTEN A PPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF ZILOG CORPORATION.
As used herein
Life su ppor t devic es or s yste ms ar e devi ces wh ich (a) a re int ended for su rgical i mpla nt
into the bod y, or (b) support o r sustain life an d whose failure to pe rform w hen prop erly
used in accordance with instructions for use provided in the labeling can be reasonably
expected to result in a significant injury to the user. A critical component is any
component in a life support device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.