Each instance in R evision Hist ory refle cts a c hange to this doc ument from
its previous revision. For more deta ils, refer to the corresponding pa ges
and appropriate links in the table below.
User Manual
ii
Revision
Date
May 200804Updated Introduction section.1
March
2008
December
2007
July 200601Original issue.All
LevelDescription
03Modified Table 2 in Schematics to
incorporate changes to R15 from 220
Ohm to 0 Ohm. Added Note 3 to the
Schematics.
02Updated Zilog logo, Zilog text, Disclaimer
section, and implemented style guide.
Removed XP from Z8 Encore! XP F0830/
F083A.
Zilog’s Z8 Encore!® F083A Series MCU is part of the line of Zilog®
microcontroller products. The Z8 Encore! F083A Series MCU Development Kit (Z8F083A0128ZCOG) ena bles you to become familiar with the
hardware and software tools available with this product. This kit consists
of the 8 KB version of the Z8 Encore! development board that supports
and presents the fea tures of the Z8 Encore! F083A Series. This kit allows
you to write application softwar e and contains all the supporting documents.
The Z8 Encore! F083A Series devic es support up to 8 KB Flash Program
Memory and 256 B register RAM that is pin-for-pin compatible with the
award-winning Z8 Encore! XP F0822 Series Flash Microcontrollers
family.
Z8 Encore!® F083A Series Development Kit
User Manual
1
The Z8 Encore! F083A Serie s device features up to e ight channels of fast
analog-to-digit al conversion (2.15 µs). The ADC on the Z8 Encore!
F083A is one of the fastest 10-bit ADCs availabl e in a 28-pin or smalle r
package. The Z8 Encore! F083A is built for speed to handle ri gorous
application requir ements for motor control, sensor interfacing, ballast
control, and appliance controls. The single-pin debugger and programming interface simplifie s code dev elopment and allows easy in-circuit
programming.
This user manual acquaints you with the Z8 Encore! F083A Series MCU
Development Kit, and gives instructions on setting up and using the tools
to start building designs and applications. Z8F083ASJ020 is the silicon
used in the board. For more information, refer to Z8 Encore!Series Product Specification (PS0263).
UM020604-0508Introduction
®
F083A
Page 5
Kit Contents
For information on kit contents, refer to Z8 Encore! XP®/Z8 Encore!®
(F0822, F082A, F1680, and F083A Series) Developme nt Kits Quick S t art
Guide (QS0043).
Z8 Encore!® F083A Series Development Kit
User Manual
2
UM020604-0508Introduction
Page 6
Installation
Z8 Encore!® F083A Series Development Kit
User Manual
3
For software installat ion and setup of the Z8 Encore!® F083A Series
Development Kit, refer to Z8 Encore! XP
F1680, and F083A Series) Development Kits Quick Start Guide
(QS0043).
®
/Z8 Encore!® (F0822, F082A,
UM020604-0508Installation
Page 7
Z8 Enco re!® F083A Series Development Kit
Z8 Encore!® F083A S e ries
Development Board
Introduction
The Z8 Encore!® F083A Series Developmen t Boa rd is a de velopm ent and
prototyping board f or the Z8 Encore! F083A Series MCU. The boa rd provides a tool to eva luate f eatures of Z8 En core! F083A Series MCU, and to
start developing an applica tion be fore building the hardware.
User Manual
4
Figure 1. Z8 Encore!® F083A Series Development Board
(see
Schematic on page 7 for details on com p onents not installed on thi s board)
UM020604-0508 Z8 Enco re!
®
F083A Series
Page 8
Features
Z8 Enco re!® F083A Series Development Kit
User Manual
The key features of Z8 Encore! F083A Series include:
•
20 MHz eZ8 CPU
•
Up to 8 KB Flash memory with in-circuit programming capability
•
Up to 256 B register RAM
•
100 B non-volatile data storage (NVDS)
•
Up to 23 I/O pins depending upon package
•
Internal precision osc illator (IPO)
•
External crystal oscillator
•
Two enhanced 16-bit timers with capture, compare, and PWM capability
5
•
Watchdog Timer (WDT) with dedicated internal RC oscillator
•
Single-pin, On-Chip Debugger (OCD)
•
Fast 8-channel, 10-bit analog-to-digital converter (ADC)
•
On-chip analog comparator
•
Up to 18 vectored interrupts
•
Voltage Brownout (VBO) protection
•
Power-On Reset (POR)
•
2.7 V to 3.6 V operating voltage
•
Up to thirteen 5 V tolerant input pins
•
20- and 28-pin packages
•
0 °C to +70 °C standard temperature range and -40 °C to +105 °C
extended temperature operating ranges
UM020604-0508 Z8 Enco re!
®
F083A Series
Page 9
MCU
Z8 Enco re!® F083A Series Development Kit
User Manual
The Z8 Encore! F083A Series MCU is member of a family of Zilog®
microcontroller prod ucts based upon the 8-bit eZ8 core CPU. The Flash
in-circuit programming capa bility a llows for faste r development ti me and
program changes in the field. The eZ8 core CPU is upward compatible
with existing Z8
(SAR) ADC on the Z8 Encore! F083A is one of the fastest 10-bit ADCs
available in a 28-pin or smaller package. The Z8 Encore! F083A is built
for speed to handle rigorous application requirements for motor control,
sensor interfacing, ballast control, and appliance controls.
The development board contains circuitry to support and present all the
features of the Z8 Encore! F083A Series. For more information on the
Z8 Encore!
Product Specification (PS0263) available for download at
w
ww.zilog.com.
®
instructions. The successive approximation register
®
family of devices, refer to Z8 Encore!® F083A Series
6
Jumper Settings
The only jumper available on the Z8 Encore! F083A development board
is JP5, which affects U5 RESET/PD0. Set JP5 as foll ows:
•
JP5 OUT (default): PD0 (GPIO)
•
JP5 IN: RESET when SW1 pressed
External Interface Headers JP1 and JP2
Figure 2 on page 8 displays the external interface headers JP1 and JP2.
UM020604-0508 Z8 Enco re!
®
F083A Series
Page 10
Schematic
This section includes schemat ics for the Z8 Encore!® F083A Series
Development Board (see Figure 2 and Figure 3 on pa ge 9).
The following components appear in the schematic but are not installed
on the board:
•
C1, C2, C5, C6, C9 , C11 throu gh C18
•
JP3, JP4
•
P1
•
R2 through R5
•
U1, U3, U4
Z8 Encore!® F083A Series Development Kit
User Manual
7
UM020604-0508Schematic
Page 11
Z8 Encore!
®
F083A Series Development Kit
User Manual
5
PA6_nT1OUT
PA7_T1OUT
DD
PC3_COUT
VCC_33V
GND
NOTE 3:
Resistors R20 and R21 are not populated. See Note 2.
CC
R200R20
0
BB
C19C19
D2
21
GREEND2GREEN
D3
21
YELLD3YELL
D4
21
REDD4RED
VCC_33V
GND
PA0_T0IN_JP
PA1_T0OUT_JP
R210R21
PB1_ANA1PB0_ANA0
PB2_ANA2
PB3_ANA3
0
VCC_33V
PA0_T0IN
PA1_T0OUT
GND
PA2
PA3_CTS0
PA4_RXD0
R140R14
0
Y1
1
1
2
1M
2
20 MHzY120 MHz
U6
1
PB1/ANA1
2
PB2/ANA2
3
PB3/CLKIN/ANA3
4
VDD
5
PA0/T0I N/T0OUT/XIN/
6
PA1/T0OUT/XOUT
7
GND
8
PA2/DE
9
PA3/CTS0
10
PA4/RXD0
Z8F04xAU6Z8F04xA
R181MR18
3
3
R7
R8
100R8100
R1010R10
10
20 pin footprint
R150R15
0
C20C20
NOTE 2
100R7100
VCC_33V
PB0/ANA0
PC3/COUT/LED
PC2/ANA6/LED
PC1ANA5/CINN/LED
PC0/ANA4/CINP/LED
DBG
RESET/PD0
PA7/T1OUT
PA6/T1IN/T1OUT
PA5/TXD0
R9
100KR9100K
TABLE 2
Clock Mode R14 R15 R18 C19 C20 Y1
Internal Only none none none none none none
AA
Crystal 0 Ohm 0 Ohm none Yes Yes Yes
Ceramic Res 0 Ohm 0 Ohm none none none Yes
External CMOS none none none none none none
(Use PA0_T0IN
pin on JP2)
5
20
19
18
17
16
15
14
13
12
11
4
R11
R11
100
100
VCC_33V
PC3_COUT
PC2_ANA6
PC1_ANA5
PC0_ANA4
DBG
PD0
PA7_T1OUT
PA6_nT1OUT
PA5_TXD0
PA2
SW2SW2
TEST
GND
R120R12
0
U8
1
IO
IO
GND
2
EMI FilterU8EMI Filter
SENSE
C22
C22
C23
C23
+
+
0.033uF
0.033uF
30uF
30uF
0.033uF
0.033uF
R160R16
0
Note 1:
PB6 and PB7 are dual function pins (GPIO or Analog supply)
R12, R13, R16, and R17 are zero-ohm resistors used in
conjunction with GPIO Control Registers to select function
desired. C21, C22, and C23 are bypass capacitors that are used
for better noise rejection. U8 is an optional filter that can
be used to improve the quality of the Analog Supply. The
development board is shipped configured for Analog Supply.
Table 1 shows the configurations recommended
NOTE 1:
3
C21
C21
R170R17
0.001uF
0.001uF
PA3_CTS0
PA4_RXD0
PA5_TXD0
R130R13
0
PB2_ANA2
PB4_ANA7
PB5
PB3_ANA3
VCC_33V
PA0_T0IN
C10
C10
PA1_T0OUT
GND
PA2
PA3_CTS0
PA4_RXD0PC4
PA5_TXD0
0
PB7GND
NOTE 1:
PB0_ANA0PB2_ANA2
Note 2: The XP supports internal, external crystal, external
ceramic resonator, external R/C and external CMOS drive
clock modes. R14, R15, R18, C19, C20 and Y1 are used to
support the clock mode selected. The development board is
shipped configured for external 20MHz ceramic resonator or
internal clock operation. When using Internal oscilator,
pins 7 and 8 could be used as GPIO ports PA0 and PA1. To do
so install R20 and R21.
Table 2 shows the recommended clock mode configurations.
4
PB1_ANA1
C11
C11
0.001uF
0.001uF
C12
C12
0.001uF
0.001uF
PB3_ANA3
C13
C13
0.001uF
0.001uF
3
TABLE 1
R12 R13 R16 R17 R22 U8 C21...C23
GPIO OUT IN OUT IN IN OUT OUT
Analog IN OUT IN OUT OUT optional IN
Supply
SW1SW1
GND
RESET/TEST2
JP5
PB6
R220R22
U5
U5
1
PB2/ANA2
2
PB4/ANA7
3
PB5/Vref
4
PB3/ANA3/CLKIN
5
PB6(AVDD)
6
VDD
7
PA0/T0IN /T0OUTXIN
8
PA1/T0OUT/XOUT
9
GND
10
PB7(AGND)
11
PA2/DE
12
PA3/CTS0
13
PA4/RXD0
14
PA5/TXD0
3
0
PB5_JP
28 pin footprint
Z8F04xA_28
Z8F04xA_28
PC0_ANA4
C14
C14
0.001uF
0.001uF
C15
C15
0.001uF
0.001uF
PC3/COUT/LED
PC2/ANA6/LED
PC1/ANA5/CINN/LED
PC0/ANA4/CINP/LED
RESET/PD0
PA7/T1OUT
PA6/T1IN/T1OUT
PC1_ANA5
PB0_ANA0
PB1_ANA1
PB2_ANA2
PB3_ANA3
PC0_ANA4
PC1_ANA5
PC2_ANA6
PB4_ANA7
JP5
1
2
HEADER 2
HEADER 2
PB1_ANA1
28
PB1/ANA1
PB0/ANA0
PC7/LED
PC6/LED
PC5/LED
PC4/LED
PC2_ANA6PB4_ANA7
C16
C16
0.001uF
0.001uF
DBG
27
26
25
24
23
22
21
20
19
18
17
16
15
J2
J2
1
3
5
7
9
11
13
15
HEADER 8X2
HEADER 8X2
PB0_ANA0
PC3_COUT
PC2_ANA6
PC1_ANA5
PC0_ANA4
PA6_nT1OUT
C17
C17
0.001uF
0.001uF
DBG
PD0
PC7
PC6
PA7_T1OUT
PC5
2
If Module is plugged onto the Dev Platform the local
RS232 interface is disabled by pin 50 of JP2
Figure 2. Schematic, Z8 Encore!® F083A Series MCU Development Board
UM020604-0508
Page 12
Z8 Encore!
5
5
4
4
3
3
2
2
1
1
DD
CC
BB
AA
TXD0
GND
CTS0
RXD0
VCC_33V
DBG
PA4_RXD0
PA5_TXD0
IRDA_SD
GND
PA3_CTS0
VCC_33V
GND
VCC_33V
PA5_TXD0
VCC_33V
PA4_RXD0
GND
VCC_33V
GND
-Z_RST
GND
GND
5V
VCC_33V
VCC
GND
-Z_RST
PA3_CTS0
DBG
-DIS_IRDA
-DIS_232
PA5_TXD0
PA4_RXD0
VCC_33V
GND
SENSE
Title
SizeDocument NumberRev
Date:Sheet
of
96C0941-001D
XP 4K MDS Processor Module. Schematic.
B
33Wednesday, March 12, 2008
Title
SizeDocument NumberRev
Date:Sheet
of
96C0941-001D
XP 4K MDS Processor Module. Schematic.
B
33Wednesday, March 12, 2008
Title
SizeDocument NumberRev
Date:Sheet
of
96C0941-001D
XP 4K MDS Processor Module. Schematic.
B
33Wednesday, March 12, 2008
CONSOLE
GND
USER
DBG
INTERFACE
DIS RS232
DIS IRDA
3.3 OK
C2
0.1uFC20.1uF
R368R3
68
C4
0.1uFC40.1uF
U3E
74LVC04/SO
U3E
74LVC04/SO
1110
147
U3A
74LVC04/SO
U3A
74LVC04/SO
12
147
U7
LT1129-3.3/DD
U7
LT1129-3.3/DD
OUT
1
SENSE
2
GND
3
SHDN
4
VIN
5
C6
0.1uFC60.1uF
JP3JP3
1
2
U3D
74LVC04/SO
U3D
74LVC04/SO
98
147
P2
Header 3x2
P2
Header 3x2
12
34
56
R2
10KR210K
U3B
74LVC04/SO
U3B
74LVC04/SO
34
147
R23
10K
R23
10K
U3F
74LVC04/SO
U3F
74LVC04/SO
1312
147
C1
0.1uFC10.1uF
JP4JP4
1
2
C9
330nFC9330nF
R1
680R1680
F1
RXE050F1RXE050
R24
15K
R24
15K
R4
2R7R42R7
C5
0.1uFC50.1uF
J1
PWR JACK
J1
PWR JACK
2
3
1
U4
ZHX1810U4ZHX1810
TXD
2
SD
4
RXD
3
LEDA
1
VCC
5
GND
6
T
0
+
C7
100/10
+
C7
100/10
C8
0.1uFC80.1uF
R5
10KR510K
+
C3
100/10
+
C3
100/10
U3C
74LVC04/SO
U3C
74LVC04/SO
56
147
P1
DB9 Female
P1
DB9 Female
5
9
4
8
3
7
2
6
1
U1
MAX3222U1MAX3222
EN
1
C1+
2
C1-
4
C2+
5
C2-
6
T1IN
13
T2IN
12
R1OUT
15
R2OUT
10
V+
3
V-
7
T1OUT
17
T2OUT
8
R1IN
16
R2IN
9
SHDN
20
VCC
19
GND
18
NC
11
NC
14
TP1TP1
12345
R6
10KR610K
D1
LEDD1LED
21
TP2TP2
12345
®
F083A Series Development Kit
User Manual
9
UM020604-0508
Figure 3. Schematic, Z8 Encore!® F083A Series MCU Development Board
Page 13
Z8 Enco re!® F083A Series Development Kit
Customer Support
For answers to technical questi ons about the product, documentation, or
any other issues with Zilog’s offerings, please visit Zilog’s Knowledge
Base at http://www.zilog.com/kb
For any comments, detail technical questions, or reporting problems,
please visit Zilog’s Technical Support at http://support.zilog.com
User Manual
10
.
.
UM020604-0508Customer Support
Page 14
Z8 Encore!® F083A Series Development Kit
User Manual
11
Warning:
DO NOT USE IN LIFE SUPPORT
LIFE SUPPORT POLICY
ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONEN TS IN LIFE SUPPO RT DEVICES OR SY STEMS WITHOUT THE
EXPRESS PRIOR WRITTEN A PPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF ZILOG CORPORATION.
As used herein
Life su ppor t devic es or s yste ms ar e devi ces wh ich (a) a re int ended for su rgical i mpla nt
into the bod y, or (b) support o r sustain life an d whose failure to pe rform w hen prop erly
used in accordance with instructions for use provided in the labeling can be reasonably
expected to result in a significant injury to the user. A critical component is any
component in a life support device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.