GENERAL DESCRIPTION
PRELIMINARY
P
RELIMINARY
C
USTOMER PROCUREMENT SPECIFICATION
Z86193
CMOS Z8® MICROCONTROLLER
MULTIPLIER/DIVIDER/SEARCH/MERGE
CPS DC-4206-01
Z86193
The Z86193 is a CMOS ROMless Z8® microcontroller
enhanced with a hardwired 16-bit x 16-bit multiplier,
32-bit/16-bit divider, three 16-bit counter/timers, search
and merge instructions, Evaluation mode and a Bus
Request mode. The device is code compatible with other
Z8 family devices, yet it offers more powerful mathematical
capabilities, data searching capabilities, and bit manipulation. The Z86193 is offered in a 64-pin VQFP package.
The Z86193 provides up to 16 output address lines permitting an address space of up to 64 Kbytes each of Program
or Data memory. Eight address outputs are provided by a
de-multiplexed 8-bit Address Bus (A7-A0) or by a multiplexed 8-bit Address/Data Bus (AD7-AD0). The remaining
eight address lines (A15-A8) can be provided by the
software configuration of Port0 to output address.
The Z86193 includes a bus which differs from other Z8
devices. The Z86193 provides bus control signals /RD
(Read Strobe), /WR (Write Strobe), and ALE (Address
Latch Enable).
There are 464 8-bit registers located on-chip and organized as 444 general-purpose registers, 16 control and
status registers, one reserved register, and up to three I/O
port registers. The Register File is partitioned into two
Register Pages. Page0 contains 208 registers and Page1
contains 208 registers. The 48 other registers are common
to both Register Pages. The Register file is also divided into
29 working register groups of 16 registers each. Configuration of the registers in this format allows the use of short
format instructions. There are 17 additional registers implemented in the Expanded Register file in Banks D and E.
Two of the registers may be used as general-purpose,
while the other 15 are used to supply data and control
for the multiplier/divider unit and the additional
counter/timers.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power V
Ground GND V
CC
V
DD
SS
DC-4206-01 (2-3-95)
1
PRELIMINARY
GENERAL DESCRIPTION (Continued)
CPS DC-4206-01
Z86193
Output
Counter/Timers
Input
Port 3
UART
Three 16-Bit
32 ÷ 16
Divider
16 x 16
Multiplier
Interrupt
Control
VCC GND
Register
File
Page 0
256 x
8-Bit
ALU
FLAGS
Register
Pointers
Register
File
Page 1
208 x
8-Bit
XTAL
/WR
/RD
ALE
Machine Timing, Emulation
and Instruction Control
Program
Counter
/RESET
SCLK
IACK
/SYNC
/WAIT
/BREQ
/BACK
SEARCH
Machine
MERGE
Machine
EVAL
Port 2
I/O
(Bit Programmable)
Demultiplexed
Address
Low Address
Address or I/O
(Nibble Programmable)
Z86193 Functional Block Diagram
Port 0
44
Port 1
8
Low
Address/Data
2
PIN CONFIGURATION
PRELIMINARY
CPS DC-4206-01
Z86193
N/C
N/C
P25
P26
P27
P31
P36
GND
VCC
XTAL2
XTAL1
SCLK
P37
P30
/EVAL
N/C
N/C
/WAIT
P24
45464748
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
12
N/C
3
/RESET
P21
P23
P22
GND
42
44
41
43
Z86193
VQFP
4
5678910
ALE
P35
/SYNC
/WR
/RD
P20
P34//DMA7P17//AD7
P33
40
39
VCC
GND
38
IACK
A6
P16/AD6A5P15/AD5
34
36
35
37
11
P32
P00/A8
15141312
P01/A9
P02/A10
33
16
/BREQ
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
N/C
/BACK
P14/AD4
A4
P13/AD3
A3
P12/AD2
A2
P11/AD1
A1
P10/AD0
A0
P07/A15
P06/A14
P05/A13
P04/A12
P03/A11
64-Pin VQFP Package
3
ABSOLUTE MAXIMUM RATINGS
PRELIMINARY
CPS DC-4206-01
Z86193
Symbol Description Min Max Units
V
CC
T
STG
T
A
Supply Voltage* –0.3 +7.0 V
Storage Temp –65 +150 C
Oper Ambient Temp † † C
* Voltages on all pins with respect to GND.
† See Ordering Information
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load
Diagram).
Stress greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
is a stress rating only; operation of the device at any
condition above those indicated in the operational sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended period may affect device reliability.
I
OL
DUT
Device Under Test
V Commutation
50 pf
I
OH
Test Load Diagram
4