YOKOGAWA DL1740EL, DL1720E, DL1740E Service manual

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Service Manual
DL1720E/DL1740E/DL1740EL Digital Oscilloscope
Yokogawa Electric Corporation
SM 701730-01E 2nd Edition
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Important Notice to the User
This manual contains information for servicing YOKOGAWA’s DL1720E/DL1740E/ DL1740EL Digital Oscilloscope. Check the serial number to confirm that this is the correct service manual for the instrument to be serviced. Before any maintenance and servicing, read all safety precautions carefully.
properly trained personnel
service manual. permitted by this service manual. clearly permitted by this service manual. In principle, Yokogawa Electric Corporation (YOKOGAWA) does not supply parts other than those listed in the customer maintenance parts list in this service manual (mainly
modules
whole assembly and not components within the assembly (see "Note"). If the user attempts to repair the instrument by replacing individual components within the assembly, YOKOGAWA assumes no responsibility for any consequences such as defects in instrument accuracy, or functionality, reliability, or for user safety hazards. YOKOGAWA does not offer more detailed maintenance and service information than that contained in this service manual. All reasonable efforts have been made to assure the accuracy of the content of this service manual. However, there may still be errors such as clerical errors or omissions. YOKOGAWA assumes no responsibility of any kind concerning the accuracy or contents of this service manual, nor for the consequences of any errors. All rights reserved. No part of this service manual may be reproduced in any form or by any means without the express written prior permission of YOKOGAWA. The contents of this manual are subject to change without notice.
and
may carry out the maintenance and servicing described in this
Do not disassemble the instrument or its parts,
Do not replace any part or assembly,
assemblies
). Therefore if an assembly fails, the user should replace the
Do not use the wrong manual.
Only
unless otherwise clearly
unless otherwise
Trademark
Revisions
Note
YOKOGAWA instruments have been designed in a way that the replacement of electronic parts can be done on an assembly (module) basis by the user. YOKOGAWA instruments have also been designed in a way that troubleshooting and replacement of any faulty assembly can be done easily and quickly. Therefore, YOKOGAWA strongly recommends replacing the entire assembly over replacing parts or components within the assembly. The reasons are as follows:
• Repair of components can only be performed by specially trained and qualified maintenance personnel with special tools. In addition, repair of components requires various special parts and components, including costly ones. It also requires facilities where highly-accurate and expensive maintenance equipment and special tools are provided.
• When taking the service life and cost of the instruments into consideration, the replacement of assemblies offers the user the possibility to use YOKOGAWA instruments more effectively and economically with a minimum in downtime.
• Adobe and Acrobat are trademarks of Adobe Systems Incorporated.
• For purposes of this manual, the TM and symbols do not accompany their respective trademark names or registered trademark names.
• Other company and product names are trademarks or registered trademarks of their respective companies.
1st Edition: October 2004 2nd Edition: June 2005
2nd Edition: June 2005 (YK) All Rights Reserved, Copyright © 2004 Yokogawa Electric Corporation
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Safety Precautions

The following general safety precautions must be observed during all phases of operation, service, and repair of this instrument. Failure to comply with these precautions or with specific warnings given elsewhere in this manual violates safety standards of design, manufacture, and intended use of the instrument. Yokogawa Electric Corporation assumes no liability for the customer's failure to comply with these requirements.
This service manual is to be used by properly trained personnel only. To avoid personal injury, do not perform any servicing unless you are qualified to do so. Refer to the safety precautions prior to performing any service. Even if servicing is carried out by qualified personnel according to this service manual, YOKOGAWA assumes no responsibility for any result occurring from this servicing.
Use the Correct Power Supply
Ensure the source voltage matches the voltage of the power supply before turning ON the power.
Use the Correct Power Cord and Plug
To prevent an electric shock or fire, be sure to use the power cord supplied by YOKOGAWA. The main power plug must be plugged into an outlet with a protective grounding terminal. Do not disable protection by using an extension cord without protective grounding.
WARNING
Connect the Protective Grounding Terminal
The protective grounding terminal must be connected to ground to prevent an electric shock before turning ON the power.
Do Not Impair the Protective Grounding
Never cut off the internal or external protective grounding wire or disconnect the wiring of the protective grounding terminal. Doing so creates a potential shock hazard.
Do Not Operate with Defective Protective Grounding or Fuse
Do not operate the instrument if you suspect the protective grounding or fuse might be defective.
Use the Correct Fuse
To prevent fire, make sure to use a fuse of the specified rating for current, voltage, and type. Before replacing the fuses, turn OFF the power and disconnect the power source. Do not use a different fuse or short-circuit the fuse holder.
Do Not Operate Near Flammable Materials
Do not operate the instrument in the presence of flammable liquids or vapors. Operation of any electrical instrument in such an environment constitutes a safety hazard.
Do Not Remove Any Covers
There are some components inside the instrument containing high voltage. Do not remove any cover if the power supply is connected. The cover should be removed by qualified personnel only.
Ground the Instrument before Making External Connections
Connect the protective grounding before connecting the instrument to a measurement or control unit.
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Safety Symbols Used on Equipment and in Manuals
Improper handling or use can lead to injury to the user or damage to the instrument. This symbol appears on the instrument to indicate that the user must refer to the user’s manual for special instructions. The same symbol appears in the corresponding place in the user’s manual to identify those instructions. In the manual, the symbol is used in conjunction with the word “WARNING” or “CAUTION.”
This symbol represents a functional grounding terminal. Such terminals should not be used as protective grounding terminals.
Safety Precautions
WARNING
CAUTION
Note
Describes precautions that should be observed to prevent serious injury or death to the user.
Describes precautions that should be observed to prevent minor or moderate injury, or damage to the instrument.
Provides important information for the proper operation of the instrument.
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Overview of This Manual

This manual is meant to be used by qualified personel only. Make sure to read the safety precautions at the beginning of this manual and the warnings/cautions contained in any referenced chapter prior to carrying out any servicing. This manual contains the following chapters:
1 Principles of Operations
Describes the functions of various assemblies and lists safety considerations.
2 Performance Testing
Describes the tests for checking performance of the instrument.
3 Adjustments
Describes the adjustments which can be performed by users.
4 Troubleshooting
Describes procedures for troubleshooting and what to do in case parts need to be replaced.
5 Schematic Diagram
A diagram of the system configuration.
6 Customer Maintenance Parts List
Contains exploded views and a list of replaceable parts.
7 Procedures for Disassembly
Lists the steps required to remove parts from the instrument.
Specifications are not included in this manual. For specifications, refer to IM 701730-01E.
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Contents

1
Safety Precautions .................................................................................................................. ii
Overview of This Manual ........................................................................................................iv
Chapter 1 Principles of Operation
1.1 Block Diagram .......................................................................................................... 1-1
1.2 Function of Each Assembly...................................................................................... 1-2
1.3 Function of Each ASIC ............................................................................................. 1-6
Chapter 2 Performance Testing
2.1 Introduction .............................................................................................................. 2-1
2.2 Tests for the DL1720E/DL1740E/DL1740EL ........................................................... 2-2
2.2.1 Grounding Test ............................................................................................. 2-3
2.2.2 Insulation Resistance Test ............................................................................ 2-4
2.2.3 Withstand Voltage ......................................................................................... 2-4
2.2.4 Selftest .......................................................................................................... 2-4
2.2.5 GP-IB Test .................................................................................................... 2-5
2.2.6 Rear Panel Probe Power Supply Test .......................................................... 2-6
2.2.7 LINE Trigger, Trigger LED, and Hold Off Test ............................................... 2-6
2.2.8 Probe Compensation Output and Auto Setup Test ....................................... 2-6
2.2.9 Timebase Accuracy Test ............................................................................... 2-7
2.2.10 Input Signal Bandwidth ................................................................................. 2-7
2.2.11 Trigger Sensitivity Test.................................................................................. 2-8
2.2.12 Offset Accuracy............................................................................................. 2-8
2.2.13 DC Accuracy ................................................................................................. 2-9
2.2.14 EXT Trigger Level Accuracy Test ................................................................ 2-10
2.2.15 EXT Trigger Sensitivity and Trigger Out Test .............................................. 2-11
2.2.16 EXT Clock Input Test .................................................................................. 2-12
2
3
4
5
6
7
Chapter 3 Adjustments
3.1 Introduction .............................................................................................................. 3-1
3.2 Test Environment ..................................................................................................... 3-2
3.3 Equipment Required ................................................................................................ 3-3
3.4 DC Offset Adjustment on the AD Board ................................................................... 3-4
3.5 Flatness Adjustment on the Analog Board ............................................................... 3-7
Chapter 4 Troubleshooting
4.1 Introduction .............................................................................................................. 4-1
4.2 Flow Chart ................................................................................................................ 4-2
4.3 Assemblies to Check When an Error Occurs ........................................................... 4-3
4.4 Power Supply Secondary Voltage............................................................................ 4-6
Chapter 5 Schematic Diagram
5.1 Schematic Diagram .................................................................................................. 5-1
Chapter 6 Customer Maintenance Parts List
6.1 Customer Maintenance Parts List ............................................................................ 6-1
6.2 Standard Accessories .............................................................................................. 6-5
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Contents
Chapter 7 Procedures for Disassembly
7.1 Flow Chart of Disassembly ...................................................................................... 7-1
7.2 Removing the Top Cover.......................................................................................... 7-2
7.3 Removing the Fan Assy ........................................................................................... 7-3
7.4 Removing the Printer Case ...................................................................................... 7-4
7.5 Removing the CPU Board Assy ............................................................................... 7-5
7.6 Removing the Printer Unit ........................................................................................ 7-6
7.7 Removing the Inverter Assy ..................................................................................... 7-9
7.8 Removing the Front Bezel ..................................................................................... 7-10
7.9 Removing the PC Card Drive/FDD Assy................................................................ 7-11
7.10 Removing the Key Board Assy .............................................................................. 7-12
7.11 Removing the LCD ................................................................................................. 7-13
7.12 Removing the Power Supply Assy ......................................................................... 7-14
7.13 Removing the Input Assy ....................................................................................... 7-16
7.14 Removing the AD Board Assy ................................................................................ 7-19
7.15 Removing the Analog Assy/ET2 Assy .................................................................... 7-21
7.16 Removing the ACQ Board Assy ............................................................................. 7-22
7.17 Removing the Ether Board Assy ............................................................................ 7-23
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Chapter 1 Principles of Operation

1.1 Block Diagram

Block Diagram of the DL1720E/DL1740E/DL1740EL
Primary memory
ATT
CH1
CH2
CH3*
CH4*
External clock input
External trigger input
Trigger gate input
Pre-
Multiplexer
AMP
Trigger
circuit
Signal Flow
The signal applied to each signal input terminal is first passed to the vertical control circuit consisting of an attenuator (ATT) and pre-amplifier. At the attenuator and pre­amplifier, the voltage and amplitude of each input signal is adjusted according to the settings such as the input coupling, probe attenuation/current-to-voltage conversion ratio, V/div, and offset voltage. The adjusted input signal is then passed to the multiplexer. The signal input to the multiplexer is passed to the A/D converter according to the time axis and other settings.
A/D
Time base
Primary
data
processing
circuit
Acquisition
memory
Secondary
data
processing
circuit
Display
processing
circuit
Display
memory
Data
processing
memory
CPU
VGA video
output
Color LCD
display
Built-in
printer
USB
Peripheral
Keyboard
GP-IB
USB
FDD or PC card
Ethernet
GO/NO-GO
Trigger output
1
Principles of Operation
(Optional)
(Optional)
At the A/D converter, the received voltage level is converted into digital values. The digital data is written to the primary memory by the primary data processing circuit at the sample rate that matches the time axis setting. The data written to the primary memory is processed (averaged, for example) by the secondary data processing circuit and written to the acquisition memory. The data written to the acquisition memory is converted into waveform display data by the secondary data processing circuit, transferred to the waveform processing circuit, and stored to the display memory. The waveforms are displayed on the LCD using the data stored to the display memory.
The block diagrams of the DL1720E are shown in figure 1.1 and figure 1.2. The block diagrams of the DL1740E/DL1740EL are shown in figure 1.3 and figure 1.4. Figure 1.1 and figure 1.3 are block diagrams of the circuit from the analog input to the A/D conversion circuit and trigger circuit including the attenuator, one-chip amplifier, analog multiplexer, time base circuit, A/D converter, trigger comparator, and trigger circuit. Figure 1.2 and figure 1.4 are block diagrams of (1) the data processing section which processes the acquired data and displays the waveform, (2) the CPU, and (3) the peripheral circuitry.
1-1
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1.2 Function of Each Assembly

Analog Board Assembly
The analog board assembly has a coupling switch for AC/DC, 1 MΩ/50 Ω, and GND/ Measure and a switch circuit for the attenuator (1:1, 10:1, 100:1, 200:1). Relays are used to make the switch. In addition, a one-chip amplifier IC and an analog multiplexer IC are onboard.
The one-chip amplifier IC has a gain switch circuit, a low-pass filter circuit (external capacitor), a trigger coupling circuit (external capacitor), and a trigger bandwidth limiting circuit (external capacitor). In addition, the input offset voltage and the trigger level are varied using an external DC voltage input. The frequency bandwidth of the IC is approximately 600 MHz.
As indicated in figure 1.1 or figure 1.3, the vertical sensitivity from 10 V/div to 2 mV/div is achieved by switching the gain on the attenuator and the one-chip amplifier IC.
The analog multiplexer IC is used to achieve the interleave operation. During the interleave operation, the input signal of CH1 (CH3) is supplied to the A/D converter of CH2 (CH4). The frequency bandwidth of the IC is approximately 2 GHz.
The above-mentioned control signal, offset, and DC voltage for the trigger level are supplied by the analog front-end controller (AFC) IC on the AD4 board (or the AD2 board for the DL1720E) assembly.
Table 1.1 Setting Range and Amplifying Level
Setting Range Attenuator Division Ratio Amplifying Rate
2 mV/div 1/1 × 25 5 mV/div 1/1 × 10 10 mV/div 1/1 × 5 20 mV/div 1/1 × 2.5 50 mV/div 1/1 × 1 100 mV/div 1/10 × 5 200 mV/div 1/10 × 2.5 500 mV/div 1/10 × 1 1 V/div 1/100 × 5 2 V/div 1/100 × 2.5 5 V/div 1/100 × 1 10 V/div 1/200 × 1
The setting range here is for the 1:1 probe setting.
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1.2 Function of Each Assembly
AD4 Board (or AD2 Board for the DL1720E) Assembly
The AD4 board (or AD2 board for the DL1720E) assembly has the time base, trigger, A/D converter, and analog control circuits onboard.
The time base is of a PLL configuration. 1 GHz and 800 MHz can be switched. On the DL1720E/DL1740E/DL1740EL, the frequency of the clock is converted to 500 MHz or 400 MHz using high-speed ECL logic and distributed to each channel. When in interleave mode, the clock for CH2 and CH4 is delayed by 1 ns with respect to the clock for CH1 and CH3, respectively (the DL1720E is not equipped with CH3 and CH4). For making minute time measurements of phase difference between the trigger and sampling clock (needed during repetitive sampling mode, for example), the T-V converter (TVC) is used.
The trigger section consists of a comparator, fast trigger logic (FTL), and pulse width detector (PWD). It also has a TV trigger circuit used only on CH1. The comparator has a window comparator function that allows window triggering. The window width is controlled by an external DC voltage input. The frequency bandwidth of the comparator IC is approximately 1 GHz.
The A/D converter operates at 500 MHz only when the sampling rate is 500 MS/s or when in 1 GS/s interleave mode. In all other cases, the A/D converter operates at 400 MHz. Sampling rates of 200 MS/s or lower are attained by extracting a portion of the data sampled at 400 MHz using the RBC on the ACQ4 board (or the ACQ2 board for the DL1720E) assembly.
1
Principles of Operation
The analog control circuit consists of an analog front-end controller (AFC), a PWM D/A converter, and a serial/parallel converter. This circuit controls the analog section of the analog board assembly and the AD board assembly. There are also EXT CLOCK IN, EXT TRIG IN, and TRIG GATE IN functions, as well as an active probe power supply (/ P4 or /P2 for the DL1720E) circuit.
ACQ4 Board (or ACQ2 Board for the DL1720E) Assembly
The ACQ4 board (or the ACQ2 board for the DL1720E) assembly has a primary data processing section, a secondary data processing section, and a display section (for displaying waveforms and other information).
The primary data processing section consists of the ring buffer memory (PBSRAM) and controller (RBC). The RBC receives the data that is transferred from the A/D converter on the ACQ4 board (or the ACQ2 board for the DL1720E) assembly and performs the primary data processing such as the above-mentioned data extraction of sampled data, envelope, and box averaging, then stores the data in the ring buffer memory. The written data are transferred to the acquisition memory interface (AMI) in the secondary data processing section according to the trigger address. The DL1720E uses 2 Mbit PBSRAM for the ring buffer memory, the DL1740E uses 4 Mbit PBSRAM, and the DL1740EL uses 16 Mbit PBSRAM.
The secondary data processing section consists of the AMI, work memory (PBSRAM), and the acquisition memory (synchronous DRAM). The AMI processes the data (averaging, for example) that is transferred from the RBC and stores the result in the acquisition memory. Then, the AMI converts the stored data to display data by performing additional processing such as compression and interpolation. The resultant data are transferred to the graphic control process (GCP) on the CPU board assembly according to the display update interval. The AMI also has computation functions (addition, subtraction, multiplication, division, differentiation, integration, etc.) and auxiliary functions such as automated measurement of waveform parameters.
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1.2 Function of Each Assembly
CPU Board Assembly
The CPU board consists of each circuit block’s control circuit, an I/O circuit, other peripheral circuits, and a display section (for displaying waveforms and other information).
A Hitachi HD6417750SF is used for the CPU. The actions of each circuit block connected to the CPU bus are controlled by the CPU.
The main memory (synchronous DRAM) and Flash memory are included in the CPU’s peripheral circuits.
In the I/O circuit, the following circuits carry out control through the CIO (CPU I/O interface IC). They are the backup memory, keyboard, floppy disk drive controller, GP-IB controller, USB I/F circuit, and PC card. On the CPU bus, they are the Ethernet I/F (option: /C10) circuit.
The display section consists of a GCP, graphic memory (synchronous GRAM), character memory (fast SRAM), and VGA VIDEO OUT circuits. The GCP writes the waveform data that are transferred from the AMI to the graphic memory. It synthesizes the contents of the graphic memory and the character memory and displays them on the TFT color LCD. The GCP also controls the built-in printer.
Key Board Assembly
Key switches, LEDs, the rotary encoder, and the jog shuttle are installed on the key board assembly.
Mother Board Assembly
Controls the exchange of signals between the CPU, KEY, ACQ4 (or the ACQ2 for the DL1720E), and a printer assembly. Supplies output from the power supply unit to the CPU, KEY, ACQ4 board (or the ACQ2 board for the DL1720E) assemblies, AD4 board (or the AD2 board for the DL1720E) assemblies, and a printer assembly. +12 V generation takes place on this board.
LCD Board Assembly
The LCD board assembly converts the connector of the LCD signal cable.
LCD Assembly
6.4-inch color TFT LC display Full display resolution: 640 × 480 Waveform display resolution: 500 × 384
Printer Assembly (Optional)
The printer is of a thermal sensitivity type that prints 8 dots per mm and 832 dots per line. A hardcopy of the display is printed in approximately 12 seconds.
FDD Assembly (-J1)
The FDD assembly supports 3.5-inch floppy disks (1.44 MB formats).
PCMCIA Board Assembly (-J3)
The PCMCIA board assembly connects a Type II PC card with the CPU board.
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1.2 Function of Each Assembly
Ether Board Assembly (Optional)
Option /C10 consists of an Ethernet interface section. The Ethernet interface section has an Ethernet controller. These interfaces are controlled by the CPU and CPU I/O interface (CIO) that are on the CPU board assembly.
OPT TRIG Board Assembly (Optional)
The OPT TRIG board assembly is equipped with a serial bus trigger logic (STL). The STL can generate two types of trigger signals: I2C bus triggers and SPI bus triggers.
1
Principles of Operation
1-5
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1.3 Function of Each ASIC

The following items describe the IC and the gate array function used in each assembly.
Analog Front-End Controller (AFC)
The AFC is a Bi-CMOS gate array. Its main functions are controlling the analog front­end circuit and assisting the trigger circuit. It includes a PWM signal output circuit used for D/A conversion, a parallel port, a serial port, a trigger hold-off circuit, an auto trigger circuit, a TV trigger generator, a fast counter, and a slow counter.
Fast Trigger Logic (FTL)
The FTL is an ECL gate array. Its main functions include generation of trigger signals according to the trigger functions, a trigger hold-off function, and control of the time-to­voltage converter (TVC).
Pulse Width Detector (PWD)
The PWD is an analog IC. Using an internally-startable oscillator and an external counter (AFC), it detects the pulse width for width triggering.
Time-to-Voltage Converter (TVC)
This is the analog IC that measures the internal sampling clock and trigger time, and converts time to voltage.
Ring Buffer Memory Controller (RBC)
The RBC is a Bi-CMOS gate array. It performs primary processing of the data such as the extraction of the sampled data, envelope, and box averaging. It also provides functions for controlling the ring buffer memory and the interface to the acquisition memory interface (AMI).
Acquisition Memory Interface (AMI)
The AMI is a CMOS gate array. Its functions include interfacing to the ring buffer memory controller (RBC), interfacing to the graphic control processor (GCP), averaging, history control, waveform computation, and auxiliary functions for the automated measurement of waveform parameters.
Graphic Control Processor (GCP)
The GCP is a CMOS gate array. Its functions include interfacing to the acquisition memory interface (AMI), graphic memory and character memory control, a waveform drawing function (accumulated display, for example), built-in printer control, and display data generation for the LCD.
CPU I/O Interface (CIO)
The CIO is a CMOS gate array. Its functions include interfacing to the CPU (HD6417750SF) and the peripheral ICs, keyboard control, LED control, interrupt control, and DMA selection.
Serial Bus Trigger Logic (STL)
The STL is a field programmable gate array. The STL can generate two types of serial bus triggers: I2C bus triggers and SPI bus triggers.
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1.3 Function of Each ASIC
1
Principles of Operation
CH1/CH2
* To ACQ2 Board
Assembly
Clock
A/D
Converter
A/D
Converter
Time
Base
Clock
Control
Signal
AFC
PROBE
POWER × 2 (/P2)
PWD
TRIG OUT
FTL
AD2 Board Assembly
TV Trigger
Line Trigger
Offset
Trigger Level
Multiplexer
From Power
Unit *
TVC
Comparator
One Chip Amplifier
ATT
Analog Board Assembly
MES)
(GND/
Coupling
50 Ω)
(1 M/
Coupling
(AC/DC)
Coupling
CH1
Figure 1.1 Block Diagram (Analog Section) of the DL1720E
CH2
HFrej
DC/AC/
Filter
(20 MHz,
100 MHz)
Gain
1/1,1/10,
1/100,1/200
MES
GND/
50
1 M/
AC/DC
Comparator
EXT.
ET2 Board Assembly
1/1
1/10
1-7
Page 15
1.3 Function of Each ASIC
Ether Board Assembly
Ethernet (/C10)
USB
USB IF
ETHERNET IF
CPU
GO/NO-GO
CPU Board Assembly
USB
PERIPHERAL
GPIB
GPIB IF
Main Memory
FD Drive (-J1)
FDD Controller
Flash ROM
PC Card (-J3)
PC CARD IF
Backup RAM
LCD
Video OUT
GCP
PIO
Printer (/B5)
Memory
Character
Graphic
Memory
CIO
Key Board
Assembly
AC
Power
Unit
DC
Line Trigger
To AD2 Board Assembly *
Mother Board Assembly
1-8
Work
Memory
AMI
ACQ
Memory
ACQ2 Board Assembly
RBC
Ring
Buffer
Memory
Clock
Control
CH1/CH2
From AD2 Board
Assembly *
Signal
Figure 1.2 Block Diagram (Digital Section) of the DL1720E
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1.3 Function of Each ASIC
1
Principles of Operation
CH1/CH2
* To ACQ4 Board
Assembly
CH3/CH4
* To ACQ4 Board
Assembly
Control Signal
PROBE
POWER × 4 (/P4)
TRIG OUT
EXT CLOCK IN
EXT TRIG IN
TRIG GATE IN
PWD
A/D
Converter
Clock
A/D
Converter
A/D
Converter
Clock
A/D
Converter
Time Base
Clock
AFC
FTL
STL
AD4 Board Assembly
OPT TRIG Board Assembly
TVC
Line Trigger
From Power
Unit *
TV Trigger
Comparator
Offset
Trigger Level
Multiplexer
One Chip Amplifier
Analog Board Assembly
ATT
MES)
(GND/
Coupling
50 )
(1 MΩ/
Coupling
(AC/DC)
Coupling
CH1
HFrej
DC/AC/
Filter
(20 MHz,
100 MHz)
Gain
1/1, 1/10,
1/100, 1/200
MES
GND/
0 5
1 MΩ/
AC/DC
CH2
CH3
CH4
Figure 1.3 Block Diagram (Analog Section) of the DL1740E/DL1740EL
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Page 17
1.3 Function of Each ASIC
Ether Board Assembly
Ethernet (/C10)
USB
USB IF
ETHERNET IF
CPU
GO/NO-GO
CPU Board Assembly
USB
PERIPHERAL
GPIB
GPIB IF
Main Memory
FD Drive (-J1)
FDD Controller
Flash ROM
PC Card (-J3)
PC CARD IF
Backup RAM
LCD
Video OUT
GCP
PIO
Printer (/B5)
Memory
Character
Graphic
Memory
CIO
Key Board
Assembly
AC
Power
Unit
DC
Line Trigger
To AD4 Board Assembly *
Mother Board Assembly
1-10
Work
Memory
ACQ
Memory
AMI
Work
Memory
AMI
ACQ
Memory
ACQ4 Board Assembly
RBC
Clock
CH1/CH2
From AD4 Board
Assembly *
Ring
Buffer
Memory
RBC
Clock
CH3/CH4
From AD4 Board
Assembly *
Ring
Buffer
Memory
Control
Signal
Figure 1.4 Block Diagram (Digital Section) of the DL1740E/DL1740EL
Page 18

Chapter 2 Performance Testing

2.1 Introduction

Test Environment
The aim of the tests in this chapter is to check the basic performance of the instrument. The order of the test procedures is just for convenience and does not need to be adhered to strictly. Please use the recommended equipment or their equivalents.
Operating Conditions
• Ambient temperature: 23±2°C
• Humidity: 55±10%RH
• Voltage of power supply: Specified voltage ±1%
• Frequency of power supply: Specified frequency ±1%
Warm Up Time
• More than thirty minutes after turning ON the instrument.
• Confirm that self calibration is correctly executed after the thirty-minute warm up. (Be sure to pay attention to the warm up time of all equipment that will be used in the test.)
2
Performance Testing
2-1
Page 19

2.2 Tests for the DL1720E/DL1740E/DL1740EL

Tests
2.2.1 Grounding Test
2.2.2 Insulation Resistance Test
2.2.3 Withstand Voltage
2.2.4 Selftest Memory Test Keyboard Test Printer Test (Only When the /B5 Option Is Installed) Floppy Disk Test (Only When the -J1 Option Is Installed) PC Card IF Test (Only When the -J3 Option Is Installed) Self-Calibration Test
2.2.5 GP-IB Test
2.2.6 Rear Panel Probe Power Supply Test
2.2.7 LINE Trigger, Trigger LED, and Hold Off Test
2.2.8 Probe Compensation Output and Auto Setup Test
2.2.9 Timebase Accuracy Test
2.2.10 Input Signal Bandwidth
2.2.11 Trigger Sensitivity Test
2.2.12 Offset Accuracy
2.2.13 DC Accuracy
2.2.14 Ext Trigger Level Accuracy Test
2.2.15 EXT Trigger Sensitivity and Trigger Out Test
2.2.16 Ext Clock Input Test
2-2
Page 20
Instruments Used
Before Testing
2.2 Tests for the DL1720E/DL1740E/DL1740EL
Model Name Recommended Device
AC low resistance tester Kikusui TOS6100 Insulation tester YOKOGAWA 2407 Withstanding voltage tester Kikusui TOS-8750 Calibrator FLUKE (WAVETEK) 9500 Programmable head FLUKE (WAVETEK) 9520, 5 pc. BNC cable 50 terminator Accessory probe 700988 FET probe YOKOGAWA 700939 Printer paper B9850NX
3.5" floppy disk Formatted 2 HD 1.4 M disk Flash ATA card JT**MA3-BD: Fujisoku PC Equivalent instruments may be used
• Unless specified within, use the default settings on the main unit during testing.
• The DL1740E and DL1740EL accept 4-channel input, so testing should be performed on channels 1 through 4. However, the DL1720E has 2-channel input, so testing should be performed on channels 1 and 2.
• Before testing, restart the unit while holding down the Reset key to initialize the instrument.
• During testing, also hold down the Reset key when restarting.
2
Performance Testing

2.2.1 Grounding Test

Product specification: 0.1 or less
Confirm that a current of 30 A flows between the FG inlet of the AC power supply input and channel 4 of the BNC ground (or between FG and EXT. for the DL1720E), and that the resistance value is 0.1 or less.
DL1720E/DL1740E/
DL1740EL
CH4
FG
V­I­V+ I+
AC Low Resistance Tester
2-3
Page 21
2.2 Tests for the DL1720E/DL1740E/DL1740EL

2.2.2 Insulation Resistance Test

Specifications: For DC 500 V, 10 M or higher
Testing Procedure
Measure the insulation resistance between the AC power supply input signals below when the power switch is turned ON.
DL1720E/DL1740E/
DL1740EL
L N
When the Ethernet (/C10) option is installed, also measure the insulation resistance across the following signals. (Note: the ETHERNET input terminal should be shorted across all terminals.)
Power Cable
G
L N
FG
Insulation Tester
DL1720E/DL1740E/

2.2.3 Withstand Voltage

Testing Procedure
Measure the withstand voltage between the AC power supply input signals below when the power switch is turned ON.
DL1720E/DL1740E/
Items to Be Checked
That the product specification is met. Specification: AC 1.5 kV for 1 minute

2.2.4 Selftest

The selftest is performed in the STOP condition. Test the following items.
DL1740EL
DL1740EL
L N
G
Ethernet Cable
(Terminal is shorted)
FG
Power Cable
L N
FG
Insulation Tester
Withstanding Voltage Tester
Testing Procedure
2-4
1. Perform the following test items while referring to “Performing a Self-Test” in the DL1720E/DL1740E/DL1740EL user’s manual (IM701730-01E).
• Memory Test
• Keyboard Test
• Printer Test (only when the /B5 option is installed)
• Floppy Disk Test (only when the -J1 option is installed)
• PC Card IF Test (only when the -J3 option is installed)
2. Confirm that all tests were completed normally and that no errors occurred.
3. Perform the self-calibration, referring to “Performing Calibration” in the DL1720E/DL1740E/DL1740EL user’s manual (IM 701730-01E).
4. Confirm that “CAL” in the upper left part of the screen disappears, and that calibration completed without errors.
Page 22

2.2.5 GP-IB Test

Test Items
Testing Procedure
2.2 Tests for the DL1720E/DL1740E/DL1740EL
• APC with support for GP-IB
• GP-IB cable
1. Connect the PC to the main unit with the GP-IB cable.
2. Press MISC. The MISC menu appears.
3. Press the Remote Control soft key. The Remote Cntl menu appears.
4. Press the Device soft key. The Device menu appears.
5. Press the GP-IB soft key.
6. Turn the jog shuttle to set the GP-IP address.
7. Select Format, Rx-Tx, or Terminator as required.
8. Execute a program like the one below. The following program was written in Visual Basic. Your program may differ depending on the language used.
Private Sub Command2_Click() 'GPIB-TEST
========== Initialize GP-IB =============
Call ibfind("DEV1", dl%) Call ibsic(dl%)
2
Performance Testing
vol$ = 0 vol$ = Space$(10)
========= Send command =========
Call ibwrt(dl%, "COMM:HEAD OFF" + vbCrLf) DoEvents Call ibwrt(dl%, "ACQ:MODE NORM" + vbCrLf) DoEvents Call ibwrt(dl%, "ACQ:MODE?" + vbCrLf) DoEvents
=========== Receive data ==============
Call ibrd(dl%, vol$) DoEvents
=========== Display data ==============
Text1.Text = Mid(vol$, 1, 4)
End Sub
Items to Be Checked
That "NORM" is displayed on the PC screen.
Display Screen Example
2-5
Page 23
2.2 Tests for the DL1720E/DL1740E/DL1740EL

2.2.6 Rear Panel Probe Power Supply Test

Testing Procedure
Connect the FET probe (700939) to the main unit, and confirm that the probe compensation signal appears correctly.

2.2.7 LINE Trigger, Trigger LED, and Hold Off Test

Testing Procedure
1. Initialize the unit. See section 4.4, “Initializing Settings” in the DL1720E/ DL1740E/DL1740EL user’s manual (IM 701730-01E) for the operating procedure.
2. Enter the following settings. SIMPLE (Trigger) Source: Line
Hold off: 1 s
Items to Be Checked
That the trigger LED blinks at 1 second intervals.

2.2.8 Probe Compensation Output and Auto Setup Test

Testing Procedure
1. Connect the accessory probe (10:1) to the Probe Compensation terminal and input to an arbitrary channel.
2. Execute Auto Setup. See section 4.5, “Executing Auto Setup” in the DL1720E/ DL1740E/DL1740EL user’s manual (IM 701730-01E) for the operating procedure.
Items to Be Checked
Confirm that a square wave of approximately 1 V
Probe Compensation Test Waveform
and 1 kHz appears on screen.
P-P
2-6
Page 24

2.2.9 Timebase Accuracy Test

Testing Procedure
1. Enter the following settings on the DL1720E/DL1740E/DL1740EL. CH1 Display: ON
Other than CH1 Display: OFF DISPLAY Format: Single ACQ Record Length: 10 k TIME/DIV 2 µs/div MEASURE Mode: ON
2.2 Tests for the DL1720E/DL1740E/DL1740EL
V/div: 50 mV/div Coupling: DC 50
Item Setup (CH1): Freq
2
Performance Testing
2. Input a 500.2 MHz, 300 mV
3. Confirm that the CH1 Freq becomes 200 ±25 kHz.
4. Enter the setting below, then input a 200.1 MHz, 300 mV TIME/DIV: 5 µs/div
5. Confirm that the CH1 Freq becomes 100 ±10 kHz.
Items to Be Checked
That the product specification is met. Specification: ±0.005%

2.2.10 Input Signal Bandwidth

Specification: DC–500 MHz (–3dB) DC 50 Ω (excluding the 2 mV/div and 5 mV/div)
Testing Procedure
1. Execute calibration (see section 4.6, “Performing Calibration” in the DL1720E/ DL1740E/DL1740EL user’s manual (IM 701730-01E)).
2. Enter the following settings on the DL1720E/DL1740E/DL1740EL. CH (all channels) Display: ON
DISPLAY Format: Single ACQ Record Length: 1 k
TIME/DIV 2 ns/div SIMPLE (Trigger) Source: Input channel MEASURE Mode: ON
sinewave from the calibrator to CH1.
P-P
sinewave.
P-P
DC–400 MHz (–3dB) DC 50 Ω (2 mV/div and 5 mV/div) DC–400 MHz (–3dB) 1 M (probe terminal)
Coupling: DC 50
Mode: Average Weight: 4
Item Setup (all channels): Sdev T-Range1: –5.00 div T-Range2: 5.00 div
3. Input a sinewave from the calibrator to the channel under test.
4. Using the table below, measure Sdev on the input waveform, and confirm that it lies within the judgment criteria.
V/div Input Amplitude (
1 V/div 5 V 500 MHz 1.26 to 1.98 V 200 mV/div 1.2 V 500 MHz 301 to 476 mV 50 mV/div 0.3 V 500 MHz 75.1 to 119 mV 10 mV/div 60 mV 500 MHz 15.1 to 23.8 mV 5 mV/div 30 mV 400 MHz 7.51 to 11.9 mV 2 mV/div 12 mV 400 MHz 3.01 to 4.76 mV
) Input Frequency Judgement Criteria
P-P
2-7
Page 25
2.2 Tests for the DL1720E/DL1740E/DL1740EL

2.2.11 Trigger Sensitivity Test

Specification: Sensitivity 1 div (display screen) at 500 MHz
Testing Procedure
Turn the display of each channel ON one at a time (with all other channels OFF), then confirm the following:
1. Enter the following settings on the DL1720E/DL1740E/DL1740EL. CH (all channels) V/div: 0.5 V/div,
TIME/DIV 1 ns/div DISPLAY Format: Single ACQ Record Length: 1 k
SIMPLE (Trigger) Source: Input channel
2. Input a 500 MHz sinewave from the calibrator to the channel under test so that the amplitude on the display screen is 500 mV
Items to Be Checked
Confirm that the triggers activate normally on all channels.
Probe: 1:1 Coupling: DC 50
Mode: Average Weight: 4
.
P-P
Trigger Sensitivity Test Waveform

2.2.12 Offset Accuracy

Specification: 2 mV/div–50 mV/div: ± (1% of the setting + 0.2 mV)
Testing Procedure
1. Execute calibration (see section 4.6, “Performing Calibration” in the DL1720E/
2. Enter the following settings on the DL1720E/DL1740E/DL1740EL.
100 mV/div–500 mV/div: ± (1% of the setting + 2 mV) 1 V/div–10 V/div: ± (1% of the setting + 20 mV)
DL1740E/DL1740EL user’s manual (IM 701730-01E)).
CH (all channels) V/div: 5 mV/div
Probe: 1:1 ACQ Mode: Box Average TIME/DIV 5 ms/div DISPLAY Format: Single MEASURE Mode: ON
Item Setup: Avg
(channel under test)
2-8
Page 26

2.2.13 DC Accuracy

Testing Procedure
2.2 Tests for the DL1720E/DL1740E/DL1740EL
3. Input a ±DC voltage from the calibrator to the channel under test.
4. Apply a ±1 V offset to the channel under test, then confirm that the values obtained from automated measurement of waveform parameters (see section
10.6, “Automated Measurement of Waveform Parameters” in the DL1720E/ DL1740E/DL1740EL user’s manual (IM 701730-01E) lie within the judgment criteria on all channels.
Input Voltage Offset Judgment Criteria
1 V 1 V 0.9898 to 1.0102 V –1 V –1 V –1.0102 to –0.9898 V
Specification: ±(1.5% of 8 div + offset accuracy)
1. Execute calibration (see section 4.6, “Performing Calibration” in the user’s manual (IM 701730-01E)).
2. Enter the following settings on the DL1720E/DL1740E/DL1740EL. CH (all channels) Coupling: DC 1 M DISPLAY Format: Single ACQ Mode: Box Average TIME/DIV 1 ms/div MEASURE Mode: ON
Item Setup: Avg (channel under test)
2
Performance Testing
3. Input DC voltage from the DC voltage generator to the channel under test.
4. Using the table below, confirm that the measured values lie within the judgment criteria on all channels.
Range Input Measured Value Input Measured Value Input Measured Value
Voltage Voltage Voltage
10 V 40 V 38.78 to 41.22 V 0 V –1.22 to 1.22 V –40 V –41.22 to –38.78 V 5 V 20 V 19.38 to 20.62 V 0 V –0.62 to 0.62 V –20 V –20.62 to –19.38 V 2 V 8.0 V 7.74 to 8.26 V 0 V –0.26 to 0.26 V –8.0 V –8.26 to –7.74 V 1 V 4.0 V 3.86 to 4.14 V 0 V –0.14 to 0.14 V –4.0 V –4.14 to –3.86 V
0.5 V 2.0 V 1.938 to 2.062 V 0 V –62 to 62 mV –2.0 V –2.062 to –1.938 V
0.2 V 800 mV 774 to 826 mV 0 V –26 to 26 mV –800 mV –826 to –774 mV
0.1 V 400 mV 386 to 414 mV 0 V –14 to 14 mV –400 mV –414 to –386 mV 50 mV 200 mV 193.8 to 206.2 mV 0 V –6.2 to 6.2 mV –200 mV –206.2 to –193.8 mV 20 mV 80 mV 77.4 to 82.6 mV 0 V –2.6 to 2.6 mV –80 mV –82.6 to –77.4 mV 10 mV 40 mV 38.6 to 41.4 mV 0 V –1.4 to 1.4 mV –40 mV –41.4 to –38.6 mV 5 mV 20 mV 19.2 to 20.8 mV 0 V –0.8 to 0.8 mV –20 mV –20.8 to –19.2 mV 2 mV 8.0 mV 7.56 to 8.44 mV 0 V –0.44 to 0.44 mV –8.0 mV –8.44 to –7.56 mV
2-9
Page 27
2.2 Tests for the DL1720E/DL1740E/DL1740EL

2.2.14 EXT Trigger Level Accuracy Test

Specification: ± (10% of setting + 50 mV)
Testing Procedure
1. Enter the following settings on the DL1720E/DL1740E/DL1740EL. CH1 Display: ON
Other than CH1 Display: OFF DISPLAY Format: Single ACQ Record Length: 10 k
TIME/DIV 200 µs/div SIMPLE (Trigger) Source: Ext
CURSOR Type: Marker
V/div: 0.2 V/div Probe: 1:1
Mode: Box Average
Range: ±1 V (for the DL1720E) Probe: 1:1
Cursor1: 0.00 div
2. Input a sinewave of 1.6 V
, 0 V offset, and 1 kHz from the calibrator to CH1
P-P
and the EXT trigger input terminal on the rear panel. Pass the input to the EXT trigger input terminal on the rear panel through a 50 terminator.
3. Confirm that the value V
read by the cursor when the polarity is , and the
h
value Vl when it is lie within the judgment criteria below.
Trigger Level Judgment Criteria
700 mV 580 mV (Vh + Vl)/ 2 820 mV 0 mV –50 mV (Vh + Vl)/ 2 50 mV –700 mV –820 mV (Vh + Vl)/ 2 –580 mV
4. Since you must cancel the trigger level offset for the trigger sensitivity test, use the V
and VI values measured when the trigger level was set to 0 mV under this
h
item, set
V
= –( Vh + Vl ) / 2,
c
then use this trigger level for the next EXT trigger sensitivity and trigger out test.
2-10
Page 28
2.2 Tests for the DL1720E/DL1740E/DL1740EL

2.2.15 EXT Trigger Sensitivity and Trigger Out Test

Specification: Sensitivity 100 mV at 100 MHz
Testing Procedure
1. Enter the following settings on the DL1720E/DL1740E/DL1740EL. CH1 Display: ON
V/div: 20 mV/div Probe: 1:1 Coupling: DC 50
CH2 Display: ON
V/div: 2 V/div Probe: 1:1
Coupling: DC 1 M Other than CH1 or CH2 Display: OFF DISPLAY Format: Dual ACQ Record Length: 10 k
Mode: Normal TIME/DIV 10 ns/div SIMPLE (Trigger) Source: Ext
Range: ±1 V (for the DL1720E)
Probe: 1:1
Level: V
Position: 10%
(see prev item)
c
2
Performance Testing
2. Input a 100 MHz, 100 mV
3. Connect the rear panel trigger output to CH2 through a BNC cable.
Items to Be Checked
Confirm that the trigger activates normally, and that a stable waveform is displayed.
Observation Example
sinewave from the calibrator to CH1 and the EXT
P-P
trigger input terminal. Pass the input to the EXT trigger input terminal through the 50 terminator.
2-11
Page 29
2.2 Tests for the DL1720E/DL1740E/DL1740EL

2.2.16 EXT Clock Input Test

1. Enter the following settings two channels at a time. Display: ON (other channels OFF)
2. Enter the following settings on all channels, then perform steps 3, 4, and 5. CH (all channels) V/div: 50 mV/div
DISPLAY Format: Dual ACQ Record Length: 10 k
ENHANCED (Trigger) Type: OR
3. Input a 20 MHz sinewave to the EXT clock input terminal on the rear panel through a 50 terminator.
4. Input a 300 mV under test.
5. Confirm that no noticeable degradation occurs from bit loss and that the waveform in the figure below is displayed correctly.
Probe: 1:1 Coupling: DC 1 M
Mode: Normal Time Base: Ext
Set Pattern (all channels): Level (all channels): 0 mV
, 4 kHz sinewave from the function generator to the channels
P-P
Waveform Observation Example
2-12
Page 30

Chapter 3 Adjustments

3.1 Introduction

The top cover, printer cover, printer case, front bezel, and shield cover must be removed before adjusting the DL1720E/DL1740E/DL1740EL. Read the warning and cautions below before doing so.
WARNING
Circuit patterns of the printed circuit board are exposed. Be careful when handling so that hands or fingers are not injured by the protruding pins.
CAUTION
• Circuit patterns of the printed circuit board are exposed. If these patterns touch other metallic materials, electrical shorting will occur, causing the circuit to be damaged or burnt.
• It is sometimes necessary to turn the DL1720E/DL1740E/DL1740EL upside down for adjustment. Do not drop the instrument, or allow it to fall over.
• When feeding power with the DL1720E/DL1740E/DL1740EL cover open, apply a flow of air to the AD4 board (or the AD2 board for the DL1720E) and Power Supply (B8052YA*).
* Power Supply of the DL1720E/DL1740E/DL1740EL shipped before May 2005 is
B9989YA, and Power Supply of the DL1720E/DL1740E/DL1740EL shipped since May 2005 is B8052YA.
3
Adjustments
3-1
Page 31

3.2 Test Environment

Operating Conditions
• Ambient temperature: 23 ±2˚C
• Humidity: 55 ±10% RH
• Voltage of power supply: Specified voltage ±1%
• Frequency of power supply: Specified frequency ±1%
Warm Up Time
• More than thrity minutes after tuning ON the instrument.
• Confirm that self calibration is correctly executed after the thirty-minute warm up. (Be sure to pay attention to the warm up time of all equipment that will be used in the test.)
3-2
Page 32

3.3 Equipment Required

Table 3.1 Equipment Required
Equipment Critical Specification Recommended
Calibrator DC FLUKE (WAVETEK) 9500 Programmable Head Output Level: 1 V FLUKE (WAVETEK) 9520
Accuracy: < 0.02% Square Wave Frequency: 10 kHz Output Level: > 60 V
Note
The values shown in the specification column are those indicated by this service manual only. These values do not indicate the actual performances of the recommended equipment and tools. Therefore, non-designated equipment and tools which satisfy the specifications are permitted.
P-P
3
Adjustments
3-3
Page 33

3.4 DC Offset Adjustment on the AD Board

Procedure
1. Remove the top cover and shield cover.
2. Allow the unit to warm up for ten minutes or more.
3. Connect each instrument as shown in figure 3.1, “Connection Method.”
DL1720E/DL1740E/DL1740EL
Calibrator
Programable Head
Figure 3.1 Connection Method
4. Press the SETUP key and select the Initialize soft key to execute initialization.
5. Press the MISC key and select the Calibration soft key.
6. Press the Cal Exec soft key to perform calibration.
7. Enter the settings on the DL1720E/DL1740E/DL1740EL and calibrator as follows.
3-4
DL1720E/DL1740E/DL1740EL
VERTICAL (for all channels)
V/div: 2 mV/div Probe: 1:1 Offset: +1.000 V
Bandwidth: 20 MHz HORIZONTAL T/div: 1 ms/div ACQ Mode: Box Average DISPLAY Format: Single MEASURE Mode: ON
Item Set Up: (Set to channel to be
measured) Select Avg. Time Range 1: –5 div Time Range 2: +5 div
Calibrator
DC Output Level: +1.0000 V
8. Adjust the variable resistor (refer to table 3.2, “Adjustment Point” and figure 3.2, “Adjustment Point Location Diagram”) corresponding to each channel so that the DC waveform fits within 1 V ±1 mV as shown in figure 3.3, “Observed Waveform.”
9. Perform the adjustment in step 7) for all channels.
Table 3.2 Adjustment Point
Channel Adjustment Point
CH1 R707 CH2 R714 CH3* R721 CH4* R728
* The DL1720E is not equipped with CH3 and CH4
Page 34
3.4 DC Offset Adjustment on the AD Board
3
Adjustments
R721
R728
Figure 3.2 Adjustment Point Location Diagram
R707
R714
3-5
Page 35
3.4 DC Offset Adjustment on the AD Board
Figure 3.3 Observed Waveform
3-6
Page 36

3.5 Flatness Adjustment on the Analog Board

Note
Before performing this flatness adjustment, the DC gain adjustment on the AD board must have been completed.
Procedure
1. Remove the top cover, printer cover, printer case, front bezel, and shield cover.
2. Turn on the power and allow the unit to warm up for ten minuets or more.
3. Connect each instrument as shown in figure 3.4, “Connection Method.”
DL1720E/DL1740E/DL1740EL
Calibrator
Programable Head
Figure 3.4 Connection Method
4. Press the SETUP key and select the Initialize soft key to execute initialization.
5. Press the MISC key and select the Calibration soft key.
6. Select the Cal Exec soft key to perform calibration.
7. For adjustment of the /10 range, enter the settings on the DL1720E/DL1740E/ DL1740EL oscilloscope and calibrator as follows.
3
Adjustments
DL1720E/DL1740E/DL1740EL
VERTICAL (for all channels)
V/div: 100 mV/div
Probe: 1:1 HORIZONTAL T/div: 10 µs/div TRIGGER Source: Input channel ACQ Mode: Box Average DISPLAY Format: Single
Calibrator
Waveform: Square wave Frequency: 10 kHz Amplitude: 600 mV
8. Adjust the variable capacitors CV101 and CV201, (refer to figure 3.5, “Adjustment Point Location Diagram”) so that the top of the waveform becomes flat as shown in figure 3.6, “Observed Waveform.” The waveform must fit within ±0.1 div.
P-P
3-7
Page 37
3.5 Flatness Adjustment on the Analog Board
9. For adjustment of the /100 range, enter the settings on the DL1720E/DL1740E/ DL1740EL oscilloscope and calibrator as follows.
DL1720E/DL1740E/DL1740EL
VERTICAL (for all channels)
HORIZONTAL T/div: 10 µs/div TRIGGER Source: Input channel ACQ Mode: Box Average DISPLAY Format: Single
Calibrator
Waveform: Square wave Frequency: 10 kHz Amplitude: 6 V
10. Adjust the variable capacitors CV102 and CV202 (refer to figure 3.5, “Adjustment Point Location Diagram”) so that the top of the waveform becomes flat as shown in figure 3.6, “Observed Waveform.” The waveform must fit within ±0.1 div.
11. For adjustment of the /200 range, enter the settings on the DL1720E/DL1740E/ DL1740EL oscilloscope and calibrator as follows.
V/div: 1 V/div Position: 0 div Probe: 1:1
P-P
DL1720E/DL1740E/DL1740EL
VERTICAL (for all channels)
V/div: 10 V/div Position: 0 div
Probe: 1:1 HORIZONTAL T/div: 10 µs/div TRIGGER Source: Input channel ACQ Mode: Box Average DISPLAY Format: Single
Calibrator
Waveform: Square wave Frequency: 10 kHz Amplitude: 60 V
P-P
12. Adjust the variable capacitors CV103 and CV203 (refer to figure 3.5, “Adjustment Point Location Diagram” ) so that the top of the waveform becomes flat as shown in figure 3.6, “Observed Waveform.” The waveform must fit within ±0.1 div.
3-8
Page 38
3.5 Flatness Adjustment on the Analog Board
CV203 (CH2, CH4)
CV202
(CH2, CH4)
Figure 3.5 Adjustment Point Location Diagram
CV201 (CH2, CH4)
CV103 (CH1, CH3)
CV102 (CH1, CH3)
CV101 (CH1, CH3)
3
Adjustments
Figure 3.6 Observed Waveform
3-9
Page 39

Chapter 4 Troubleshooting

4.1 Introduction

This chapter describes possible solutions for rectifying errors. In such cases, assembly removal may be required. Please heed the following warning.
Note
WARNING
Assembly replacement is to be performed only by qualified service technicians who have experience working with the hazards involved (such as fire and electrical shock).
If an error message is displayed, the error may have been caused by incorrectly operating the unit. Refer to the user's manual (IM 701730-01E), and perform the correct operation.
4
Troubleshooting
4-1
Page 40

4.2 Flow Chart

Figure 4.1, “Troubleshooting Flow Chart” shows an analytical method for handling malfunctions.
START
Power ON
LCD OK?
No error
messages?
Check the
fuse.
Fuse OK?
Check secondary
voltage of power supply.
Vol tag e OK?
INITIALIZE
LCD OK?
(2)
Check error
contents.
*
Check secondary
voltage of power
supply not connected
to mother board.
Vol tag e OK?
(1)
Check each
board for shorts.
Check display.
Connect RGB VIDEO
OUT to monitor.
Monitor
display OK?
Replace the fuse.
*
Replace
power supply
unit.
Replace CPU
board ass’y.
4-2
Execute self test.
Self test
successful?
Execute performance
test.
Performance
test successful?
END
Maintenance Service is Required Contact your nearest YOKOGAWA representative as listed on the back cover of this manual.
Figure 4.1 Troubleshooting Flow Chart
(3)
Check self test
results.
(4)
Check
performance
test results.
Check LCD
backlight.
Backlight
lights up?
* See section 4.4 for detailed instructions.
To initialize the settings, reboot the DL1720E/DL1740E/DL1740EL while pressing the RESET key.
The monitor to be connected must be VGA supported.
Replace lamp
unit or
inverter unit.
Replace LCD
ass’y.
Page 41

4.3 Assemblies to Check When an Error Occurs

(1)
A short may occur in an assembly other than the power supply unit. To check in which voltage line a short has occurred, investigate each assembly to which voltage is supplied using a circuit tester. Table 4.1 “Correspondence of Assembly to Voltage” shows the relationship between assemblies and voltages supplied to them.
Table 4.1 Correspondence of Assembly to Voltage
Voltage Series Assembly No. Assembly
+24 V B8052MP Mother Board Assembly
B9989GP PRINTER Assembly (Option: /B5) B9989SA FAN Assembly
+12 V B9989MG ET2 Board Assembly (MODEL: 701715)
B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MP Mother Board Assembly A1468UP Inverter Unit
+5 V B9989MG ET2 Board Assembly (MODEL: 701715)
B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MC CPU Board Assembly B8052MF ACQ2S Board Assembly (MODEL: 701715) B8052MD ACQ4S Board Assembly (MODEL: 701730) B8052ME ACQ4L Board Assembly (MODEL: 701740) B8052MP Mother Board Assembly B9989MK KEY Board Assembly B8051MG OPT TRIG Board Assembly (Option: /F5) A1092UN FDD Unit (Model: -J1) B8050MK PCMCIA Board Assembly (Model: -J3)
+3.3 V B8052MH AD2 Board Assembly (MODEL: 701715)
B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MC CPU Board Assembly B8052MF ACQ2S Board Assembly (MODEL: 701715) B8052MD ACQ4S Board Assembly (MODEL: 701730) B8052ME ACQ4L Board Assembly (MODEL: 701740) B8052MP Mother Board Assembly B8052MS ETHER Board Assembly (Option: /C10) B8051MG OPT TRIG Board Assembly (Option: /F5)
–2 V B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740)
B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MF ACQ2S Board Assembly (MODEL: 701715) B8052MD ACQ4S Board Assembly (MODEL: 701730) B8052ME ACQ4L Board Assembly (MODEL: 701740) B8052MP Mother Board Assembly
–5.2 V B9989MG ET2 Board Assembly (MODEL: 701715)
B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MP Mother Board Assembly
–12 V B9989MG ET2 Board Assembly (MODEL: 701715)
B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MP Mother Board Assembly
4
Troubleshooting
4-3
Page 42
4.3 Assemblies to Check When an Error Occurs
(2)
When trouble occurs, refer to the user’s manual to determine whether the trouble was caused by erroneous operation or by a hardware defect. Table 4.2, “Correspondence of Messages to Defective Assemblies,” shows which kind of trouble may be due to a hardware failure.
Table 4.2 Correspondence of Messages to Defective Assemblies
Code Message Assembly No. Assembly
713 Calibration failure.... B9989MG ET2 Board Assembly (MODEL: 701715)
901 Failed to backup setup data.... B8052MC CPU Board Assembly
906 Fan stopped.... B9989SA FAN Assembly
907 Backup battery is flat. B8052MC CPU Board Assembly * Power Supply of the DL1720E/DL1740E/DL1740EL shipped before May 2005 is B9989YA,
and Power Supply of the DL1720E/DL1740E/DL1740EL shipped since May 2005 is B8052YA.
B9989ML ANALOG Board Assembly
(MODEL: 701715/701730/701740) B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly
(MODEL: 701730/701740) B8052MC CPU Board Assembly B8052MF ACQ2S Board Assembly (MODEL: 701715) B8052MD ACQ4S Board Assembly (MODEL: 701730) B8052ME ACQ4L Board Assembly (MODEL: 701740) B8052MP Mother Board Assembly
B8052YA* Power Supply B8052MP Mother Board Assembly B8052MC CPU Board Assembly
(3)
When trouble occurs, check the test item displaying FAIL and select the relevant defective item from table 4.3, “Correspondence of Test Items to Defective Assemblies.” If necessary, replace the relevant assembly.
Table 4.3 Correspondence of Test Item to Defective Assemblies
Test Item Assembly No. Assembly
Key Board B8052MC CPU Board Assembly
Memory B8052MC CPU Board Assembly FDD B8052MC CPU Board Assembly
PC Card B8052MC CPU Board Board Assembly
Printer B8052MC CPU Board Assembly
Accuracy B9989MG ET2 Board Assembly (MODEL: 701715)
B8052MP Mother Board Assembly B9989MK KEY Board Assembly
A1092UN FDD Unit (Model: -J1)
B8050MK PCMCIA Board Assembly (Model: -J3)
B8052MP Mother Board Assembly B9989GP Printer Assembly (Option: /B5)
B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) B8052MH AD2 Board Assembly (MODEL: 701715) B8052MB AD4 Board Assembly (MODEL: 701730/701740) B8052MC CPU Board Assembly B8052MF ACQ2S Board Assembly (MODEL: 701715) B8052MD ACQ4S Board Assembly (MODEL: 701730) B8052ME ACQ4L Board Assembly (MODEL: 701740) B8052MP Mother Board Assembly
4-4
Page 43
4.3 Assemblies to Check When an Error Occurs
(4)
When trouble occurs, check the non-conforming test and select the relevant defective assembly from table 4.4, “Correspondence of Test Items to Defective Assemblies.” If necessary, replace the relevant assembly.
Table 4.4 Correspondence of Test Item to Defective Assemblies
Test Item Assembly No. Assembly
2.5Vertical Axis DC B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) Voltage Accuracy B8052MH AD2 Board Assembly (MODEL: 701715) Test B8052MB AD4 Board Assembly (MODEL: 701730/701740)
2.6Frequency B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) Response Test B8052MH AD2 Board Assembly (MODEL: 701715)
B8052MB AD4 Board Assembly (MODEL: 701730/701740)
2.7Time-base B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) Accuracy Test B8052MH AD2 Board Assembly (MODEL: 701715)
B8052MB AD4 Board Assembly (MODEL: 701730/701740)
2.8Trigger Sensitivity B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) Test B8052MH AD2 Board Assembly (MODEL: 701715)
B8052MB AD4 Board Assembly (MODEL: 701730/701740)
2.9Trigger Accutracy B9989ML ANALOG Board Assembly (MODEL: 701715/701730/701740) Test B8052MH AD2 Board Assembly (MODEL: 701715)
B8052MB AD4 Board Assembly (MODEL: 701730/701740)
4
Troubleshooting
4-5
Page 44

4.4 Power Supply Secondary Voltage

Check whether the power supply secondary voltage fits the values listed on figure 4.2, “Power Supply Secondary Terminals” and Table 4.5, “Power Supply Secondary Terminal’s Name.”
7
9
11
13
15
17
27
29
28
30
23
25
24
26
Figuer 4.2 Power Supply Secondary Terminals
Table 4.5 Power Supply Secondary Terminal’s Name
Pin No. Name
1 Sense 2, 4 +24 V 5 Remote 6 AC 5 V 8 –12 V 10 –5.2 V 13, 14 –2 V 17, 18 +5 V 25-30 +3.3 V 3, 7, 9, 11, 12, 15, 16, 19—24 GND
19
21
8
10
12
14
16
18
20
22
3
5
6
1
2
4
When checking the secondary voltage of the power supply unit apart from the main unit, short the remote pin to ground and turn ON the main switch of the power supply unit located on the rear panel.
4-6
Page 45

Chapter 5 Schematic Diagram

5.1 Schematic Diagram

ETHERNET
GP-IB
VIDEO
OUT(VGA)
USB
USB
CN301 CN302 CN6 CN300 CN100
PERIPHERAL
FDD
A1161UN
ASSY
B8052MS
(Option: /C10)
ETHER BOARD
CN1 CN3CN303CN601
(Select: -J1)
Ferrite Core
B8050WD
B8052SD
B8052MC
FAN
B9989SA
CN5
B8050MK
B8052SC
CPU BOARD ASSY
B8052YA*
(Select: -J3)
CN002CN001
Ferrite Core
B9914ZF
UNIT
POWER
SUPPLY
ASSY
BOARD
PCMCIA
B8052SB
CN600
CN2
CN1
PS30
CN11
CN1
CN2
B8052MP
MOTHER BOARD ASSY
Sense Head Motor
CN201 CN202 CN203
CN101
B9989YE
B9989GP
(Option: /B5)
PRINTER ASSY
CN1
B9989MK
KEY BOARD ASSY
5
Schematic Diagram
CN100
GO/NO-GO
PROBE POWER(Option: /P4, /P2)
/P4: B8052SE × 4
/P2: B8052SE × 2
EXT CLOCK IN/EXT TRIG IN/TRIG GATE IN: 701730/701740 (4CH)
None: 701715 (2CH)
OUT
TRIG
B9989SG
B9989SF
Figure 5.1 Schematic Diagram of the DL1720E/DL1740E/DL1740EL
CN12 CN13 CN14
CN11
CN15 CN16
B9989ML
CH1
B8052MD
ACQ4S BOARD ASSY
(701730)
B8052MB
AD4 BOARD ASSY
(701730/701740)
CN5 CN1
ASSY
BOARD
ANALOG
CH2
B8052ME
ACQ4L BOARD ASSY
(701740)
CN2 CN7
B8052MH
AD2 BOARD ASSY
(701715)
CN1
B9989ML
ANALOG
BOARD ASSY
(701730/701740)
CH3/
NON
B8052MF
ACQ2S BOARD ASSY
B9989MG
ET2 BOARD
ASSY
(701715)
CH4/
EXT.
(701715)
CN3 CN6
B9969SC
COMP
GND
CN1
CN12
CN1
CN1
CN10
CN13
B8052SA
OPT TRIG
B8051MG
(Option: /F5)
BOARD ASSY
CN302 CN301
CN4
B9989SD
SW
LCD
BOARD
B9989YD
CN1
ASSY
B9958LD
CN2
LCD
A1056VA
B9989SB
A1468UP
Inverter
* Power Supply of the DL1720E/DL1740E/DL1740EL shipped before May 2005 is B9989YA,
5-1
and Power Supply of the DL1720E/DL1740E/DL1740EL shipped since May 2005 is B8052YA.
Page 46

Chapter 6 Customer Maintenance Parts List

6.1 Customer Maintenance Parts List

6
Customer Maintenance Parts List
1M
Ω
20
p
F
C
40
H
1
0
V
p
k
CA
T
50
C
Ω
H
2
5
V
r
m
s
,
10V
p
k
C
H
3
C
H
4
Note: Parts marked with a symbol are Customer Maintenance Parts (CMP) .
6-1
Page 47
6.1 Customer Maintenance Parts List
Complete Set
12
11
10
9
7
6
15
5
14
8
4
1M
/20
p
F
_
<
CH
4
0
1
0
V
p
k
C
A
T
50
C
H
_
<
2
5V
r
m
s
,
1
0
V
p
k
C
H
3
C
H
4
Item
Part No. B9989EC Support
11 2
B9989DA Top Cover1 Y9408LB B.H. Screw, M4x8
3
Y9408LB 2
4
B9989EC Support1
5
B9989EU Sheet1
6
B9989DT Printer Cover1
7
B9989DU Handle1
8
B9946BQ Sheet ( /B5)1
9
B9858GB Clamp1
10
Qty
4
Description
B.H. Screw, M4x8
13
1
Item
Part No.
B9989DR Printer Case
11 1 12
B9989CJ Frame1
- Main Assembly
13
B8052DN 1
14
B8052DP Sheet ( /P4)1
B8052DH Sheet ( /C10)1
15
B8052DJ Sheet (not /C10)1 A9657ZJ Name Plate1
16
Note:
Qty
1
CMPL parts
2
Description
Sheet ( /P2)
16
3
(select)
(select)
6-2
Page 48
Main Assembly
6.1 Customer Maintenance Parts List
14
13
10
9
8
6
5
7
12
11
15
16
17
18
19
6
21
20
38
4
22
3
2
1
23 24
25
26
39
27
Customer Maintenance Parts List
36
35
34 33
31
37
32
28
41
40
29
30
6-3
Page 49
6.1 Customer Maintenance Parts List
Item
Part No. Qty Description
11 B9989DY Knob 12 B9989DX Knob 13 B8052DE Sheet (701715) 1B8052DF Sheet (701730, 701740) 24 B9989DK Knob
35 B9989EL Spring 16 B9989DL Knob 97 B9969DK Lens 18 B9989DM Knob 19 B9969DE Knob
110 B8052DA Front Bezel (701715)
Front Bezel (701730)
1B8052DB
Front Bezel (701740)
1B8052DC 111 B9989SD Cable Assembly (AD-Switch) 112 A1056VA LCD
B9958LD LCD-CN Board Assembly 14 15
B8052MP Mother Board Assembly 19 20
B9989DH Knob (701730, 701740) 23 24
113
Screw
4Y9205LB
Front Frame
1B9989CA 216 A9135ZM Spacer 117 A1468UP Power Supply
118
SUMI-Card,BUS-KBD
1B9989YE
Key Board Assembly
1B9989MK 121 B9989DQ Knob 122 B9989DG Knob (701715)
1
I/O Device ( /B5)
1A1207UD
Screw ( /B5)
3Y9205LB 125 A1161UN Memory System (-J1) 126 B8050WD SUMI Card (-J1) (CPU-Floppy)
(select)
(select)
(select)
12728B9989SA Fan Assembly
B.H. Screw,M3x8
29
B8052MB AD4 Board Assembly (701730, 701740)
30
B8052MH
B9989QA
33
B8052ME
34
B8052YA Power Supply 35 36 37 B8052CU
38
B9850EG TIP 39 40 41 B8051EN
4Y9308LB
PCMCIA Assembly (-J3)
1B8050MK 1
AD2 Board Assembly (701715)1
13132B9989QA
Analog Assembly Analog Assembly (701730, 701740)
1
ET2 Assembly (701715)
1B9989QG 1B8052MD ACQ4S Board Assembly (701730)
ACQ4L Board Assembly (701740)1
ACQ2S Board Assembly (701715)1B8052MF
1
Ethernet Assembly ( /C10)
1B8052BX 1B8052MC CPU Board Assembly
Bracket1
Cable Assembly1B8052SA
1
Rod
1B9850EF 1B8051MG OPT Trig Board Assembly ( /F5)
Stud ( /F5)2
(select)
(select)
(select)
Note : CMPL parts
6-4
Page 50

6.2 Standard Accessories

Standard Accessories
1
8
9
2
3
10
6
Customer Maintenance Parts List
4
12
5
6
11
13
14
Part No.
Item
1 A1006WD
A1253JZ
2
A1006WD
3
A1009WD
4
A1054WD
5
A1024WD
6
A1064WD
7
B9850NX
8
B9918EZ
9
10
B9989FA
11
B9989EX
12
A1352EF
13
700988
14
700988
15
7
15
Qty
Description
1Power Supply Code
3P-2P Adapter
1
Power Supply Code (Suffix code-D, UL.CSA standard)
1
Power Supply Code (Suffix code-F, VDE standard)
1
Power Supply Code (Suffix code-Q, BS standard)
1
1
Power Supply Code (Suffix code-R, AS standard)
1
Power Supply Code (Suffix code-H, GB standard) Roll Chart ( /B5)
1
Soft Case
-
-
1
Manuals
1
Front Cover
1
Stopper
1
Fuse (250V / 4A)
1
Probe (701715)
2
Probe (701730, 701740)
4
CD for Manual for DL1740E
1
(Suffix code-D, UL.CSA standard)
(select)
Note : * For use in Japan only, Suffix code-M CMPL parts
6-5
Page 51

Chapter 7 Procedures for Disassembly

7.1 Flow Chart of Disassembly

Top Cover
Fan Assy
Printer Case
CPU Board Assy
Printer Unit
Front Bezel
(Section 7.2)
(Section 7.3)
(Section 7.4)
(Section 7.5)
Ether Board Assy
(Section 7.6)
Inverter Assy
(Section 7.8)
PC Card Drive/FDD Assy
Key Board Assy
LCD
Power Supply Assy
Input Assy
(Section 7.17)
(Section 7.7)
(Section 7.9)
(Section 7.10)
(Section 7.11)
(Section 7.12)
(Section 7.13)
7
7
Procedures for Disassembly
AD Board Assy
Analog Assy/ET2 Assy
ACQ Board Assy
(Section 7.14)
(Section 7.15)
(Section 7.16)
7-1
Page 52

7.2 Removing the Top Cover

1. Remove the two screws from the rear panel as shown.
2. Remove the four screws from the bottom of the instrument as shown.
3. The top cover fits into the back of the front bezel. Remove the top cover by slowly pulling it away from the front bezel in the direction of the arrow as shown in the figure below.
DL with the Top Cover Removed
7-2
Page 53

7.3 Removing the Fan Assy

1. Remove the top cover. See section 7.2, “Removing the Top Cover.”
2. Remove the cables on the right side panel as you face the instrument as shown in the figure below.
3. Remove the three screws from the rear panel as shown in the figure.
7
7
Procedures for Disassembly
DL with the Fan Assy Removed
7-3
Page 54

7.4 Removing the Printer Case

1. Remove the top cover. See section 7.2, “Removing the Top Cover.”
2. Remove the printer cover by raising it in the direction of the arrow as shown below, then forcing it back until it pops out.
3. Remove the screw from the printer case located toward the rear of the instrument.
4. Lift the printer case to remove it, allowing the handle to slide through the opening in the case.
DL with the Printer Case Removed
7-4
Page 55

7.5 Removing the CPU Board Assy

1. Remove the printer case. See section 7.4, “Removing the Printer Case.”
2. Remove the screw from the left side panel as shown in the figure.
3. Remove the screw from the right side panel as shown, then remove the multiconductor(s) (there are two multiconductors with a PC card, and one with a floppy disk drive).
7
7
Procedures for Disassembly
4. Pull out the CPU Board Assy in the direction of the arrow as shown in the figure below, then remove the assy.
DL with the CPU Board Assy Removed
7-5
Page 56

7.6 Removing the Printer Unit

1. Remove the printer case. See section 7.4, “Removing the Printer Case.”
2. Remove the two screws from the left side panel as shown in the figure below. Next, remove the handle and bracket in the direction of the arrow.
DL with the Handle and Bracket Removed
3. Remove the screw as shown in the figure below, then remove the roll paper holder in the direction of the arrow.
7-6
Page 57
7.6 Removing the Printer Unit
4. Remove the two screws as shown in the figure below, then remove the cover in the direction of the arrow.
5. Remove the cable in the direction of the arrow shown in the figure below.
6. Remove the screws from the left side panel as shown in the figure below.
7. Remove the screw from the right side panel as shown in the figure below.
7
7
Procedures for Disassembly
7-7
Page 58
7.6 Removing the Printer Unit
8. Remove the two screws as shown in the figure below, then lift up the I/O device in the direction of the white arrow.
DL with the I/O Device Removed
9. Disconnect the three cable connectors as shown in the figure below, then remove the cables.
DL with the Printer Unit Removed
7-8
Page 59

7.7 Removing the Inverter Assy

1. Remove the printer unit. See section 7.6, “Removing the Printer Unit.”
2. Remove the two screws as shown, disconnect the three cables, then remove the assy.
DL with the Inverter Assy Removed
7
7
Procedures for Disassembly
7-9
Page 60

7.8 Removing the Front Bezel

1. Remove the printer case. See section 7.4, “Removing the Printer Case.”
2. Pull out the three knobs in the direction of the arrow shown in the figure below and remove them.
Note
When the TIME/DIV and V/DIV knobs are removed, the “rib” holding the knob to its shaft becomes worn down causing the knob to become loose. Therefore, you should replace the removed knobs with new ones.
3. As shown in the figure below, lift up the eight tabs that surround the Front Bezel, then remove the Front Bezel.
7-10
DL with the Front Bezel Removed
Page 61

7.9 Removing the PC Card Drive/FDD Assy

1. Remove the front bezel. See section 7.8, “Removing the Front Bezel.”
2. Remove the multiconductor(s) (there are two multiconductors with a PC card drive, and one with a floppy disk drive), then remove the two screws as shown in the figure below.
DL with the PC Card Drive/FDD Assy Removed
7
7
Procedures for Disassembly
7-11
Page 62

7.10 Removing the Key Board Assy

1. Remove the front bezel. See section 7.8, “Removing the Front Bezel.”
2. Remove the five screws as shown in the figure below.
3. Remove the multiconductor as shown in the figure.
DL with the Key Board Assy Removed
7-12
Page 63

7.11 Removing the LCD

1. Remove the printer unit and the front bezel. See section 7.6, “Removing the Printer Unit” and section 7.8, “Removing the Front Bezel.”
2. Remove the two cables, then remove the multiconductor as shown in the figure below.
3. Remove the four screws as shown in the figure below.
7
7
Procedures for Disassembly
4. Remove the LCD and board as shown in the figure below.
DL with the LCD Removed
7-13
Page 64

7.12 Removing the Power Supply Assy

1. Remove the fan assy and the front bezel. See section 7.3, “Removing the Fan Assy” and section 7.8, “Removing the Front Bezel.”
2. Remove the two screws, then remove the bracket as shown in the figure below.
3. Remove the three screws as shown in the figure below.
4. Remove the three screws as shown in the figure below.
5. Pull out the Power Supply Assy as shown in the figure below and remove it.
7-14
Page 65
7.12 Removing the Power Supply Assy
DL with the Power Supply Assy Removed
7
7
Procedures for Disassembly
7-15
Page 66

7.13 Removing the Input Assy

1. Remove the fan assy and the front bezel. See section 7.3, “Removing the Fan Assy” and section 7.8, “Removing the Front Bezel.”
2. Remove the two screws as shown in the figure below.
3. Remove the five screws as shown in the figure below.
4. Remove the two screws, then remove the bracket as shown in the figure below.
5. Remove the five screws, then remove the cable as shown in the figure below.
7-16
Page 67
7.13 Removing the Input Assy
6. Remove the left shield plate as shown in the figure below.
7. Remove the right shield plate as shown in the figure below.
8. Remove the cable as shown in the figure below.
9. Lift up the front end of the board assy as shown in figure below (left), then pull it out in the direction of the rear panel as shown in figure below (right).
7
7
Procedures for Disassembly
7-17
Page 68
7.13 Removing the Input Assy
DL with the Input Assy Removed
7-18
Page 69

7.14 Removing the AD Board Assy

1. Remove the input assy. See section 7.13, “Removing the Input Assy.”
Note
The AD Board Assy is easier to remove if you first remove the ACQ Board Assy. See section 7.16, “Removing the ACQ Board Assy.”
2. Remove the four screws as shown in the figure below, then remove the nuts as shown in the figure below.
3. As shown in the figure below, remove the eight screws, then remove the six cables.
4. Remove the panel as shown in the figure below.
If an option is installed, remove the two screws securing the option and the option itself, then remove the studs.
7
7
Procedures for Disassembly
7-19
Page 70
7.14 Removing the AD Board Assy
DL with the AD Board Assy Removed
7-20
Page 71

7.15 Removing the Analog Assy/ET2 Assy

1. Remove the input assy. See section 7.13, “Removing the Input Assy.”
2. Remove the two screws, then remove the cover as shown in the figure below.
3. Remove the screw as shown in the figure below.
7
7
Procedures for Disassembly
4. Remove the nuts as shown in the figure below.
DL with the Analog Assy/ET2 Assy Removed
7-21
Page 72

7.16 Removing the ACQ Board Assy

1. Remove the input assy. See section 7.13, “Removing the Input Assy.”
2. Remove the screw as shown in the figure below.
3. Remove the six screws as shown in the figure below.
DL with the ACQ Board Assy Removed
7-22
Page 73

7.17 Removing the Ether Board Assy

1. Remove the CPU board assy. See section 7.5, “Removing the CPU board Assy.”
2. Remove the three screws as shown in the figure below.
DL with the Ether Board Assy Removed
7
7
Procedures for Disassembly
7-23
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