Yamaha DSPAX-1300 Schematic
ABCDEFGH I JKL
SCHEMATIC DIAGRAM (FUNCTION)
Page 87
H4
1
2
3
4
0
0
5
6
7
8
to OPERATION (3)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MAIN L
11.4
NJM2068MD-TE2
0
0
0
NJM2068MD-TE2
0
-11.3
PHONO EQ
0
11.7
0
0
NJM2068MD-TE2
0.4
NJM2068MD-TE2
0.4
0.4
-11.4
INPUT SELECTOR
0
0
11.6
-11.7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
to VIDEO (7)
11.7
-11.6
11.7
-11.6
B3
RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
Page 83
11.7
000
11.700
000
11.7
DIGITAL IN
0
0
NJM2068MD-TE2
NJM2068MD-TE2
0
0
-11.7
0
11.6
0
0
11.7
-11.6
11.7
-11.6
to VIDEO (7)
0
0
0
0
11.7
000
11.7
000
E1 Page 83
to DSP
0
0
0
0
-11.6
-11.6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-11.6
-11.6
0
0
0
0
REAR L
0
0
11.711.7
0
11.7
-11.6
11.700
000
0
0
0
0
2.8
1.7
1.9
1.8
2.4
2.1
2.3
4.8
4.8
0
0.2
2.3
2.4
2.6
2.5
2.3
2.4
2.5
FLASH
MEMORY
Page 89
C3Page 89
to VIDEO (5)
C2Page 89
0
0
0
0
to DSP
2.2K
2.2K
F1
11.7
0
NJM2068MD-TE2
0
0
NJM2068MD-TE2
0
-11.6
FRONT L
CENTER
0
11.6
0
0
-11.7
0
11.6
0
0
NJM2068MD-TE2
NJM2068MD-TE2
0
0
-11.7
0
0
4.5
4.8
0
2.7
2.8
2.7
2.1
1.7
1.7
2.4
2.2
4.8
2.6
2.9
1.9
2.6
1.9
2.6
1.8
2.0
1.8
0
1.0
2.4
0
0
0
0
0
0
0
1.2
0
POWER
DETECT/
RESET
★ All voltages are measured with a 10MΩ/V DC electric volt meter.
★ Components having special characteristics are marked s and must be replaced
★ Schematic diagram is subject to change without notice.
2.6
2.5
0
2.5
2.5
0
4.8
0
4.8
4.8
2.6
2.6
0
2.6
2.6
0
4.8
0
4.8
0
2.6
2.6
2.5
5.1
5.1
4.8
2.6
2.6
2.6
5.1
5.1
ELECTRIC
VOLUME
2.6
2.6
0
2.6
2.6
0
4.8
0
4.8
0
2.6
2.6
0
2.6
2.6
0
4.8
0
4.8
0
1.8
2.8
2.1
1.7
2.2
4.7
0
0
4.7
0.2
2.9
2.6
2.6
1.8
5.0
5.0
5.0
0
0
0
0
0
4.8
0.3
3.6
0.3
5.0
5.0
0.5
0.3
0
with parts having specifications equal to those originally installed.
0.9
0.5
0
1.2
5.0
4.8
0
0.5
0
9.2
5.7
0.6
0.6
0
Page 87
A7
to OPERATION (2)
Point 2 Pin 20 of IC502
Point 3 emitter of Q511
and collector of Q522
A Q511 E
B Q522 C
MUTE
-11.7
5.1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
11.8
5.7
5.1
11.8
5.7
0
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
4.8
4.8
4.8
4.8
4.8
3.7
0
0
-11.7
0
0
0
4.5
4.5
-11.7
4.5
4.5
-11.7
4.5
4.5
-11.7
4.5
4.5
-11.7
4.5
4.5
-11.7
4.4
4.4
-11.7
0
0
-11.7
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
0
-11.7
0
5.0
0
0
5.0
-11.7
5.0
-11.7
5.0
-11.7
5.0
-11.7
5.0
-11.7
5.0
4.4
4.4
IC522: AN78N05
Voltage Regulator
Output Pass Transistor
Power Supply
Starter
Circuit
1 2 3
Excessive Electric
Current Protection
Standard
Voltage
Rsc
+
Amp.
–
Heat
Protection
A5
to POWER (1)
Page 92
E5
to MAIN (3)
Page 91
C3
to VIDEO (5)
Page 89
H7
to POWER (3)
Page 92
G1
Page 87
to OPERATION (1)
IC516~519, 526: YAC520-EE2
Stereo Digital Volume Controller
VREF
12
LIN2
11
LIN1
256
Detection
Reset
L
Control
Register
R
256
VREF
DVSS
DVDD
AVSS
AVDD
RIN1
RIN2
4
3
Zero Cross
13
6
15
14
x: NOT USED
O:USED / APPLICABLE
IC501, 507, 511, 513~515, 521, 523~525: NJM2068MD
IC508, : µPC4570G2
Dual OP-Amp
1
OUT
IC503, 509: LC78211
Analog Function Switch
L1
1
L2
2
L3
3
L4
4
LCOM1
5
L5
6
L6
7
LCOM2
8
L7
9
L8
10
LCOM3
11
DD
V
19
V
SS
16
V
EE
12
RES
18
S
17
+
–
Vref
Generator
&
Reset
pulse
Generator
S/P
16
Register
–
+
1
2
–IN
1
–+
3
+IN
1
4
–V
CC
LEVEL SHIFTER
SHIFT REGISTER
9
LOUT
8
VREF
17
ICN
16
TE
18
ZCEN
2
SDATAO
20
SDATAI
19
CSN
1
SCLK
7
ROUT
+V
8
OUT
7
– +
–IN
6
5
+IN
LATCH
IC512: MX29F400BTC-70
4Mbit CMOS Flash Memory
CE
OE
WE
A0~A17
Q0~Q15/A-1
CC
2
2
2
R1
30
R2
29
R3
28
R4
27
RCOM1
26
R5
25
R6
24
RCOM2
23
R7
22
R8
21
RCOM3
20
ZZ
D1
14
ZZ
CL
15
CONTROL
ZZ
CE
13
Control
Input Logic
Address
Latch
and
Buffer
POWER ON
(Connect the power cord)
IC502, 504: LC78212
Analog Function Switch
L1
1
L2
2
L3
3
LCOM1
4
L4
5
L5
6
L6
7
LCOM2
8
L7
9
L8
10
LCOM3
11
V
DD
19
V
SS
16
V
EE
12
RES
18
S
17
IC505, 510: LC78213
Analog Function Switch
L1
1
L2
2
LCOM1
3
L3
4
L4
5
LCOM2
6
L5
7
L6
8
LCOM3
9
L7
10
LCOM4
11
V
DD
19
V
SS
16
V
EE
12
RES
18
S
17
Program/Erase
High Voltage
X-Decoder Y-Decoder
Flash
Array
Y-Pass
Gate
Sense
PGM
Amplifier
Data HV
Program
Data Latch
I/O Buffer
POWER OFF
(Disconnect the power cord)
LEVEL SHIFTER
LATCH
SHIFT REGISTER
LEVEL SHIFTER
LATCH
SHIFT REGISTER
Machine (WSM)
Array
Source
HV
CONTROL
CONTROL
Write State
State
Register
Command
Data Decoder
Command
Data Latch
R1
30
R2
29
R3
28
RCOM1
27
R4
26
R5
25
R6
24
RCOM2
23
R7
22
R8
21
RCOM3
20
ZZ
D1
14
ZZ
CL
15
ZZ
CE
13
R1
30
R2
29
RCOM1
28
R3
27
R4
26
RCOM2
25
R5
24
R6
23
RCOM3
22
R7
21
RCOM4
20
ZZ
D1
14
ZZ
CL
15
ZZ
CE
13
0
0
4.8
0
0
0
11.7
NJM2068MD-TE2
NJM2068MD-TE2
0
-11.7
11.7
0
-11.7
2.1
2.3
0
3.7
2
4.8
4.805.1
0
0
11.7
0
0
0
NJM2068MD-TE2
NJM2068MD-TE2
0
0
-11.7
0
0
11.7
0
0
0
0
0
0
0
11.7
11.7
0
0
-11.6
0
4.5 0
2.8
1.7
1.9
1.8
1.4
0
4.8
0.5
1.0
4.8
2.8
0
0
4.8
4.8
0
4.7
4.8
4.8
0
0
4.9
4.8
4.8
4.8
4.8
4.8
4.2
4.8
0
4.8
4.8
0.1
4.9
0
0
0.2
0.2
5.7
5.7
4.8
0
5.0
0
4.9
0
4.8
5.0
0
0
0
0
0
0
0
0
4.8
0
2.6
2.6
2.6
5.1
0
0
5.1
0
4.8
0
2.6
2.6
2.6
5.1
0
0
5.1
0
4.8
00
0
0
2.7
2.7
1.7
1.7
2.6
1.9
1.9
2.5
2.3
2.4
2.5
2.4
6.8K
6.8K
0
0
0
0
0
0
0
4.8
4.8
4.8
2.3
2.4
2.6
MAIN µ–COM
4.8
4.8
000
0
0
0
4.8
4.8
A
5.7
0
0
0
4.8
4.8
4.8
0
5.2
0
4.8
2.302.1
3
5.7
5.0
B
0
RX-V2300/DSP-AX2300/RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
9
85
RX-V2300/DSP-AX2300
RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
■ PIN CONNECTION DIAGRAM
• ICs
LM61CIZ AN78N05
3: +Vs
2: Vout
1: GND
NJM2068MD
NJM2904M
TK15420M
µPC4570G2
8
ADM202JRN-REEL7
LA7108M
M62320FP
16
LC72722
24
1
LA7109
36
1
NJM7805FA
NJM78M12FA
4
1
1
12
18
3: IN
1: OUT
2: COM
NJM4556AL
1
MM74HC4051N
MM74HC4051SJX
MM74HC4053N
MM74HC4053SJX
TC74HC4052AF
8
LC74781-9798
24
1
MSM514260E-60JS
40
1
NJM79M05FA
NJM79M12FA
TC4066BP
8
16
1
CY62256LL
12
CS493292-CLR
20
• Diodes
1N4002S
PQ025EZ5MZPµPC29M33T-E1
3: IN
14
18
1
1
CS4382-KQR
36
37
48
1
2:
COM
1: OUT
NJM2581M
TC4066BF-T1
7
1
CS4392-KZR
CS5360-KSR
YAC520-EE2
9
LC78212LC78211
15
30
1
MX29F400BTC-70
25
12
25
24
13
48
14
3: COM
1
2: IN
1: OUT
TC74HCT00AF
TC74HCU04AF
TC74HCT08AF
7
BU2092
8
LC78213
1
1828
16
14
30
17
7
28
29
39
40 44
1
5
14
20
7
1
10
1
15
24
1
1SS133
1SS270A
1T2
D2SBA20
• Transistors
2SA893A
2SA970
2SA1015
2SB949
2SC535
2SC1815
2SC1890A
2SC2240
2SC2878
2SA1037K
2SC2412K
2SC3326
DTA144EKA
DTC144EKA
MTZJ4.7C
MTZJ5.1A
MTZJ6.2C
MTZJ9.1A
MTZJ10.0A
MTZJ10.0B
MTZJ12.0C
MTZJ20.0C
MTZJ24.0C
MTZJ33.0B
~
+
E
C
B
C
B
~
E
Cathode
–
2SC1740S
2SD1915F
2SA1708
2SC4488
Anode
D15XB20
E
C
C
E
B
B
1SS355
1SS380
MA8051-M
MA8056-M
MA8068-H
MA8082-H
RB501V-40
UDZS5.6BTE-17
–
+
2SA1837
2SB941
2SB1565
2SC4793
2SD2396
2SK246
S
Anode
Cathode
2SA1492
2SC3856
B
C
E
G
D
B
C
E
M66003-0101FP
49
64
116
82
M30805SGP YSS938-FXC9572XL-10TQ100C
73108
72
3348
32
76
17
100
125
5175
109
50
26
144
136
121
160
37
140
81120
80
41
ABCDEFGH I JKL
SCHEMATIC DIAGRAM (DSP)
RX-V2300/DSP-AX2300/RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
0.1
0
~
Fast CONNECT II Switch Matrix
: Page 85
to FUNCTION
3.500.9
0
0.2
C755
47PCH
4.9 4.8
18
18
18
18
0.1
3.4
C1
C1
0
0.9
0.9
0.9
2.1
0.2
0.2
2.6
2.6
3.402.7
RX-V2300/DSP-AX2300: Page 84
RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
0
3.500.2
0.2
0.1
0.1
1.3
2.1
0.1
1.8
DECODER
2.8
2.8
2.602.8
2.8
Function
Block 1
Macrocells
1 to 18
Function
Block 1
Macrocells
1 to 18
Function
Block 1
Macrocells
1 to 18
Function
Block 1
Macrocells
1 to 18
2.8
4.9
2.8
2.8
54
54
54
54
D1
: Page 85
D1
to FUNCTION
MAIN L (ANALOG IN)
0.2
0.2
0.2
2.7
0
0.2
3.5
3.5
0.1
3.4
3.5
3.4
3.4
3.3
3.3
3.3
3.3
3.5
0.8
0.9
0.1
0.1
0
1.8
1.8
1.8
0.2
0.1
0.1
0.2
2.7
0
0.1
0.1
1.8
1.8
0
2.6
0.1
2.8
2.7
2.7
3.5
2.8
C754
47PCH
4.8
2.7
0
IC524: CS5360-KSR
Stereo A/D Converter
VA+6VD+18RSY7MCLK
3
15
AINL-
AINL+
AINR-
AINR+
16
17
14
13
Voltage Reference
+–+
S/H
+–+
S/H
CMOUT
4.9
4.9
4.9
A/D CONVERTER
0
4.9
3.0
00
0
3.44.9
2.5
2.50
2.51.8
2.51.8
1.8
4.9
4.9
2.5
2.5
2.5
2.5
2.5
2.5
0
0
2.5
2.5
0
0
D/A CONVERTER
3.5
–
–
AGND
3.5
1.4
1.8
1.8
1.8
0.1
0
0
0
3.4
0.1
D/A CONVERTER
3.4
0
1.8
1.8
0.8
1.8
0
0.9
0
000
3.4
3.5
0.1
0.1
OVFL10FRAME8SCLK12LRCK
2
Serial Output Interface
+
LP Filter
DAC
LP Filter
DAC
4
–
Comparator
+
–
Comparator
Digital Decimation
Digital Decimation
5
DGND11PU1HP DEFEAT
High Pass
Filter
High Pass
Filter
4.7
9
20
19
Filter
Filter
2.5
2.5
2.5
SDATA
DIF0
DIF1
2.3
2.3
5.0
0
2.3
2.3
2.3
4.9
2.5
4.9
0
2.5
2.5
IC517: PQ025EZ5MZP
Regulator
Vin
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
0
1
5
GND
★ All voltages are measured with a 10MΩ/V DC electric volt meter.
★ Components having special characteristics are marked s and must be
replaced with parts having specifications equal to those originally
installed.
★ Schematic diagram is subject to change without notice.
0
0
0
0
3.3
0
2.9
0
2.9
3.3
3.3
2.9
0
2.9
0
2.9
0
2.9
0
3.3
3
Vo
2
Vc
820P
820P
C752
C637
2.5
2.5
820P
820P
C753
C556
0
-11.1
0
0
0
0
0000
2.9
2.9
2.9
2.9
0
0
0
0
0
0
-11.1
0
2.9
-11.1
2.9
2.9
2.9
2.9
CMPDAT, SDATAN2, RCV958
CMPREQ, LRCLKN2
IC501, 502: TC74HCU04AF
Hex Inverters
1
1A
2
1Y
3
2A 6Y
4
2Y
5
3A
6
3Y
GND
7
11.7
-11.7
CMPCLK, SCLKN2
SCLKN1, STCCLK2
2.5
0
2.5
2.5
2.5
2.5
13K
0
0
13K
13K
0
0.4
820P 820P
13K
11.7
0
1.3
-11.7
0
1.3
1.9
1.9
1.9
1.9
6.8K
1.9
1.9
6.8K
6.8K
1.9
1.9
6.8K
1.9
1.9
1.9
1.9
IC525: CS493292-CLR
Audio Decoder
27
28
29
25
26
LRCLKN1
22
SDATAN1
30
CLKIN
31
CLKSEL
x: NOT USED
O:USED / APPLICABLE
11.7
2.5
2.5
2.5
2.5
-11.7
11.7
0
0
-11.7
0
0
11.7
0
0
-11.7
11.7
0
0
-11.7
11.7
0
0
-11.7
RESET
36
Compressed
Data Input
Interface
Digital
Audio
Input
Interface
PLL
Clock Manager
32
34VA35
FILT233FILT1
IC503: TC74HCT00AF
Quad 2-Input Nand Gate
VCC
14
6A
13
12
5A
11
5Y
10
4A
9
4Y8
-11.1
-11.1
CENTER
-11.1
0.6
-11.1
FRONT L
0.6
0.6
REAR L
0.6
0.6
DATA6, EMAD6, GPIO6
DATA7, EMAD7, GPIO7
9
8
Frame
Shifter
Input
Buffer
Controller
RAM Input
Buffer
AGND
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DATA2, EMAD2, GPIO2
DATA3, EMAD3, GPIO3
DATA4, EMAD4, GPIO4
DATA5, EMAD5, GPIO5
15
14
11
10
Parallel or Serial Host Interface
24-Bit
DSP Processing
RAM
Program
Memory
RAM
Program
Memory
STC
24
DGND313DGND22DGND1
DATA1, EMAD1, GPIO1
RD, R/W, EOME, GPIO11
DATA0, EMAD0, GPIO0
17
16
18CS5
4
RAM
RAM Output
Data
Memory
RAM
Data
Memory
23
Buffer
VD312VD21VD1
IC508: CS4392-KZR
2-Channel D/A Converter
Vcc141A 1
4B13
4A12
4Y11
3B10
RST
3A9
3Y8
SCLK
LRCK
SDATA
IC510 : CS4382-KQR
8-Channel D/A Converter
42
19
RST
43
VLS
9
SCLK1
7
LRCK1
12
SCLK2
10
LRCK2
8
SDIN1
11
SDIN2
13
SDIN3
14
SDIN4
6
MCLK
DSDxx
IC509, 518~523: NJM2068MD
Dual OP-Amp.
OUT
–IN
+IN
–V
IC512: TC74HCT08AF
Quad 2-Input And Gate
+2
8
1
1
2
1
–+
3
1
4
CC
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
IC515: MSM514260E-60JS
4Mbit DRAM
14
RAS
29
LCAS
28
UCAS
A0~A8
20
VCC
21
VSS
WR, DS, EMWR, GPIO10
SCDIO, SCDOUT, PSEL, GPIO9
A0, SCCLK6A1, SCDIN20ABOOT, INTREQ
7
Output
Formatter
21
EXTMEM, GPIO8
19
1
4
SERIAL
5
PORT
3
DSD_SCLK(M3)
–+
Timing
Generator
Column
9
Address
Buffers
Internal
Addess
Counter
Row
9
Address
Buffers
37
DD
38
DC
44
MCLK
43
SCLK
42
LRCLK
39
AUDATA2
40
AUDATA1
41
AUDATA0
3
AUDATA3, XMT958
BMUTEC
M2 (SCL/CCLK)
M1 (SDA/CDIN)
8
7M39
MODE SELECT
(CONTROL PORT)
VOLUME
CONTROL
M0 (AD0/CS)
10
AMUTEC
13
20
EXTERNAL
MUTE CONTROL
INTERPOLATION
FILTER
REFERENCE
MIXER
VOLUME
CONTROL
INTERPOLATION
FILTER
6
MCLK
SCL/CCLK (M2)
SDA/CDIN(M1)
AD0/CS (M0)
GND
Q2 Q3
VLC
VA
Q4
15 16 17 18
Control Port (Stand-Alone Mode Select)
Volume Control ∆∑ DAC Analog Filter
Mixer
Volume Control ∆∑ DAC Analog FilterInterpolation Filter
Volume Control ∆∑ DAC Analog Filter
Mixer
Volume Control ∆∑ DAC Analog FilterInterpolation Filter
Serial Port
Volume Control ∆∑ DAC Analog Filter
Mixer
Volume Control ∆∑ DAC Analog FilterInterpolation Filter
Volume Control ∆∑ DAC Analog Filter
Mixer
Volume Control ∆∑ DAC Analog FilterInterpolation Filter
4 5 31 32
VD
CC
2
2
2
IC513: NJM2904M
Dual OP-Amp
+V
8
OUT
7
–IN
6
5
+IN
Interpolation Filter
Interpolation Filter
Interpolation Filter
Interpolation Filter
GND
–
Q1
INPUTS
Vcc14
+
4B13
4A12
4Y11
3B10
Q9Q8
3A9
3Y8
Refresh
Control Clock
Row
9
Deco-
ders
On Chip
VBB Generater
IC516: µPC29M33T-E1
Voltage Regulator
Starter Circuit
WE
13
9
Word
Drivers
Standard Voltage
Overheat Protection
Column Decoders
Sense Amplifiers
I/O
Controller
I/O
Controller
Memory
Cells
Amp.
OE
27
16 16
Selector
Driver
Excessive Electric
Current Protection
FILT+
CMOUT
11
12
∆∑
DAC
∆∑
DAC
41 22
External Mute Control
V–
Q10
I/O
Protection
Sudden Current
MUTEC1
Q11
Output
8
Buffers
Input
8
Buffers
Input
8
Buffers
Output
8
Buffers
Safety Drive
Limiter
ANALOG
FILTER
ANALOG
FILTER
MUTEC234
Q5
Q7
Q12
8
8
8
8
Q6
Q13
18
19
15
14
39
40
38
37
35
36
34
33
29
30
28
27
25
26
24
23
21
20
DQ1~DQ8
DQ9~DQ16
1
3
2
AOUTA+
AOUTA-
AOUTB+
AOUTB-
AOUTA1+
AOUTA1-
AOUTB1+
AOUTB1-
AOUTA2+
AOUTA2-
AOUTB2+
AOUTB2-
AOUTA3+
AOUTA3-
AOUTB3+
AOUTB3-
AOUTA4+
AOUTA4-
AOUTB4+
AOUTB4-
VQ
FILT+
OUTPUT
INPUT
OUTPUT
GND
83
RX-V2300/DSP-AX2300: Page 84
RX-V2300/DSP-AX2300: Page 86
1
2.7 4.9
0 2.7 4.7 4.9
2.7
2
0
RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
REGULATOR
4.9
3.3
3.3
0
0
4.9
H4
: Page 87
H4
to OPERATION (3)
W502
RX-V1300/RX-V1300RDS/HTR-5590/DSP-AX1300
DIGITAL OUT INHIBIT
0.1
4.9
0
0.1
4.9
0
3
4
3.9
0
4.9
3.9
0
4.9
3.9
0
4.9
3.9
0
4.9
0.1
3
2
4.9
4.9
4
0.1
6
3.4
5
4.9 4.9
1
0
7
0
4.9 4.9
14 14
77
3.1
2.6
0.5
0
4.8
0.2
0.2
0.2
0.2
4.8
0.9
0.8
0.9
0.9
0
1.9
~
~
~
~
4.8
14
8
3
0
2
0
4
0
5
0
0
6
DUTY CORRECTOR
0000.1
0
0
13
3.5
11
0
12
4.9
7
0
00
9
8
0.1
4.9
10
4.9
0
0.2
0.2
0.2
0.2
0
0.1
0.1
0.1
0.1
2.3
2.3
2.1
1.5
~
~
~
~
0
12
11
4.8
2.7
0
0
13
0.1
9
8
0.1
10
0
2.7
0.5
0
3.9
0
0.2
0.2
3.5
0.2
4.8
2.7
4.9
4.9
4.8
0.1
3.9
0
3.9
3.9
0
2.7
~
~
0.5
0.1
~~~~~
~
1.5
3.501.9
2.102.3
0.2
0.2
0.2
0.2
0.1
0.1
0.1
DSP/DOLBY/DTS
Point 1 Pin 1 of IC514
1
1.8
1.7
0
3.8
0.1
3.5
3.5
0.1
000
0
0
1.2
3.5
0
0
3.5
2.4
2.304.8
3.5
3.4
1
DIGITAL IN
0
0.5
3.1
2.6
5
0
0
0
0
4.9
W502
LEVEL CONVERT & SIGNAL DETECT
0.1
3.4 3.4
3.4
3.4
3.4
3.4
6
3.4
3.5
3.5
0
0
0.1
3.4
3.4
3.4
3.4
3.4
3.4
3.4
0
3.4
3.4
0
3.4
0
3.4
0
3.4
4.9
0
3.4
0
3.4
0
3.4
0
3.4
0
3.4
3.4
0.1
4.9
0
3.4
3.4
3.4
3.4
3.5
3.5
3.4
3.4
3.4
3.4
3.4
3.4
3.4
0
0
4.9
0
3.4
3.4
3.4
3.4
3.4
3.4
0.1
3.4
3.4
3.4
3.4
3.4
256K
SRAM
0
4.9
0
0
2.8
2.8
2.802.8
2.8
2.8
2.8
3.4
~
2.7
0.3
0
0.1
2.7
2.7
3.5
0.1
0.1
0.1
1.4
4.9
0.2
4.9
4.8
0.1
3.5
4.8
0
0
3.301.3
0
2.8
3.403.4
2.1
3.5
3.5
2.8
3.4
3.5
3.4
3.4
3.4
PLD
3.3
0
0
0
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.5
4.8
3.4
3.4
1.4
0.2
0.1
3.5
3.5
0
3.5
3.4
3.4
3.4
3.5
3.5
3.5
3.4
3.4
3.4
0
3.4
3.4
0
0
3.5
0
0
~
4.8
C756
0.1
0.2
0.1
47PCH
1.8
1.8
1.8
2.6
0.1
2.7
4M
7
IC528: MX29F400BTC-70
4Mbit CMOS Flash Memory
A0~A17
CE
OE
WE
Control
Input Logic
Address
Latch
and
Buffer
8
Q0~Q15/A-1
FLASH
Program/Erase
High Voltage
X-Decoder Y-Decoder
Flash
Array
Y-Pass
Gate
Sense
Amplifier
I/O Buffer
PGM
Data HV
Program
Data Latch
Array
Source
HV
Write State
Machine (WSM)
State
Register
Command
Data Decoder
Command
Data Latch
IC527: CY62256LL
Static RAM
A
10
A
9
A
8
A
7
A
6
A
5
A
4
ROW DECODER
A
3
A
2
CE
WE
OE
INPUT
BUFFER
512x512
ARRAY
COLUMN
DECODER
14
A
A13A12A
IC526: XC9572XL-10TQ100C
CPLD
JTAG Port
3
JTAG
1
Controller
In-System Programming Controller
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Blocks
SENCE
POWER
DOWN
AMPS
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
I/O
0
11
A1A
I/O/GCK
I/O/GSR
I/O/GTS
I/O
3
1
2
9
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