EDI8L3265C
64Kx32 SRAM
Features
NOT RECOMMENDED FOR NEW DESIGN
64Kx32 bit CMOS Static
Random Access Memory Array
Fast Access Times: 12*, 15, 20, and 25ns
Individual Byte Selects
User Configurable Organization
with Minimal Additional Logic
Master Output Enable and Write Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Surface Mount Package
68 Lead PLCC, No. 99 (JEDEC-M0-47AE)
Small Footprint, 0.990 Sq. In.
Multiple Ground Pins for Maximum
Noise Immunity
Single +5V (±5%) Supply Operation
* Advance Information
Pin Configurations and Block Diagram
64Kx32 CMOS High Speed
Static RAM
The EDI8L3265C is a high speed, high performance, four
megabit density Static RAM organized as a 64Kx32 bit
array.
Four Byte Selects, two Chip Enables, Write Control, and
Output Enable provide the user with a flexible memory
solution. The user may independently enable each of the
four bytes, and, with minimal additional peripheral logic,
the unit may be configured as a 128Kx16 array.
Fully asynchronous circuitry is used, requiring no clocks or
refreshing for operation and providing equal access and
cycle times for ease of use.
The EDI8L3265C, allows 2 megabits of memory to be
placed in less than 0.990 square inches of board space.
The EDI8L3265C can be upgraded to 128K, 256K or
512Kx32 in the same footprint using the EDI8L32128,
EDI8L32256 or the EDI8L32512C. (See page 6 for upgrade paths).
Note: Solder Reflow temperatures should not exceed 260°C for 10 seconds.
Pin Names
AØ-A15 Address Inputs
EØ-E1 Chip Enables (one per word)
BSØ-BS3 Byte Selects (One per Byte)
W Master Write Enable
G Master Output Enable
DQØ-DQ31 Common Data Input/Output
VCC Power (+5V±5%)
VSS Ground
NC No Connection
Notes: 1. See page 6 for upgrade paths.
March 1997 Rev. 4
ECO #8302
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
Absolute Maximum Ratings*
Voltage on any pin relative to VSS -0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial 0°C to + 70°C
Industrial -40°C to +85°C
Storage Temperature -55°C to +125°C
Recommended DC Operating Conditions
Parameter Sym Min Typ Max Units
Supply Voltage VCC 4.75 5.0 5.25 V
Supply Voltage VSS 0 0 0 V
Input High Voltage VIH 2.2 -- VCC+0.5 V
Input Low Voltage VIL -0.3 -- 0.8 V
Power Dissipation 3.0 Watts
Output Current. 20 mA
Junction Temperature, TJ 175°C
*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions greater than those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
AC Test Conditions
Input Pulse Levels VSS to 3.0V
Input Rise and Fall Times 5ns
Input and Output Timing Levels 1.5V
Output Load Figure 1
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
DC Electrical Characteristics
Parameter Sym Conditions Min Max Unit
12ns* 15ns 20/25ns ns
Operating Power ICC1 W= VIL, II/O = 0mA, 500 460 420 mA
Supply Current Min Cycle
Standby (TTL) ICC2 E ³ VIH, VIN £ VIL or 60 60 60 mA
Supply Current VIN ³ VIH, f=ØMHz
Full Standby ICC3 E ³ VCC-0.2V 20 20 20 mA
Supply Current CMOS VIN ³ VCC-0.2V or VIN £ 0.2V
Input Leakage Current ILI VIN = 0V to VCC ±10 ±10 ±10 µA
Output Leakage Current ILO V I/O = 0V to VCC ±10 ±10 ±10 µA
Output High Volltage VOH IOH = -4.0mA 2.4 V
Output Low Voltage VOL IOL = 8.0mA 0.4 0.4 0.4 V
*Typical: TA = 25°C, VCC = 5.0V
*Advanced Information
EDI8L3265C
64Kx32 SRAM
Truth Table
E W G BSØ-3 Mode Output Power
H X X X Standby High Z
L H H X Output Disable High Z ICC1
L X X H Output Disable High Z ICC1
L H L L Read Dout ICC1
L L X L Write Din ICC1
X Means Don't Care
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
ICC2,ICC3
Capacitance
(f=1.0MHz, VIN=VCC or VSS)
Parameter Sym Max Unit
Address Lines CA 20 pF
Data Lines CD/Q 10 pF
Write & Output W, G 16 pF
Enable Lines bF
Chip Enable Lines E, BS 9 pF
These parameters are sampled, not 100% tested.
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