u-blox NINA-B112, NINA-B111, NINA-B111-00B-00, NINA-B111-01B-00, NINA-B111-02B-00 System Integration Manual

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NINA-B1 series
Stand-alone Bluetooth low energy modules
System Integration Manual
Abstract
This document describes the system integration of NINA-
B1 series
stand-alone Bluetooth® low energy modules. With embedded
Bluetooth low energy stack and u-
blox connectivity software, these
modules are tailored for OEMs who wish to have the shortest time­to-market. The OEMs can also
embed their own application on top
of the integrated Bluetooth low energy stack using
Nordic SDK or
Arm® Mbed™ integrated development environment (IDE).
www.u
-blox.com
UBX
-15026175 - R09
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Document Information
Title NINA-B1 series
Subtitle Stand-alone Bluetooth low energy modules
Document type System Integration Manual
Document number UBX-15026175
Revision and date R09 24-Nov-2017
Disclosure restriction
Product Status Corresponding content status
Functional Sample Draft For functional testing. Revised and supplementary data will be published later.
In Development / Prototype
Objective Specification Target values. Revised and supplementary data will be published later.
Engineering Sample Advance Information Data based on early testing. Revised and supplementary data will be published later.
Initial Production Early Prod. Information
Data from product verification. Revised and supplementary data may be published later.
Mass Production / End of Life
Production Information Final product specification.
This document applies to the following products:
Product name Type number u-blox connectivity software version PCN reference Product status
NINA-B111 NINA-B111-00B-00 1.0.0 N/A Mass Production
NINA-B111-01B-00 2.0.0 N/A Mass Production
NINA-B111-02B-00 3.0.1 N/A Initial Production
NINA-B112 NINA-B112-00B-00 1.0.0 N/A Mass Production
NINA-B112-01B-00 2.0.0 N/A Mass Production
NINA-B112-02B-00 3.0.1 N/A Initial Production
u-blox reserves all rights to this document and the information contained herein. Products, names, logos and designs described herein may in whole or in part be subject to intellectual property rights. Reproduction, use, modification or disclosure to third parties of this document or any part thereof without the express permission of u-blox is strictly prohibited.
The information contained herein is provided “as is” and u-blox assumes no liability for the use of the information. No warranty, either express or implied, is given, including but not limited, with respect to the accuracy, correctness, reliability and fitness for a particular purpose of the information. This document may be revised by u-blox at any time. For most recent documents, visit www.u-blox.com.
Copyright © 2017, u-blox AG.
u-blox is a registered trademark of u-blox Holding AG in the EU and other countries. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
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Contents
Contents .............................................................................................................................. 3
1 System description ....................................................................................................... 5
1.1 Overview and applications .................................................................................................................... 5
1.1.1 Module architecture ...................................................................................................................... 6
1.1.2 Hardware options .......................................................................................................................... 6
1.1.3 Software options ........................................................................................................................... 6
1.2 Pin configuration and function ............................................................................................................. 6
1.2.1 Pin attributes ................................................................................................................................. 6
1.2.2 Pin description ............................................................................................................................... 7
1.3 Supply interfaces ................................................................................................................................ 10
1.3.1 Main supply input ....................................................................................................................... 10
1.3.2 Digital I/O interfaces reference voltage (VCC_IO) ......................................................................... 11
1.3.3 VCC application circuits ............................................................................................................... 11
1.4 System function interfaces .................................................................................................................. 11
1.4.1 Module reset ............................................................................................................................... 11
1.4.2 Internal temperature sensor ......................................................................................................... 11
1.5 Debug – Serial Wire Debug (SWD) ...................................................................................................... 11
1.6 Serial interfaces .................................................................................................................................. 12
1.6.1 Universal Asynchronous Serial Interface (UART) ........................................................................... 12
1.6.2 Serial Peripheral Interface (SPI) ..................................................................................................... 12
1.6.3 I2C interface................................................................................................................................. 12
1.7 GPIO pins ........................................................................................................................................... 13
1.7.1 Analog interfaces ........................................................................................................................ 13
1.8 Antenna interfaces ............................................................................................................................. 14
1.8.1 Antenna pin – NINA-B111 ........................................................................................................... 14
1.8.2 Integrated antenna – NINA-B112................................................................................................. 15
1.8.3 NFC antenna ............................................................................................................................... 15
1.9 Reserved pins (RSVD) .......................................................................................................................... 15
1.10 GND pins ............................................................................................................................................ 15
2 Software ..................................................................................................................... 16
2.1 u-blox connectivity software ............................................................................................................... 16
2.2 Open CPU .......................................................................................................................................... 16
2.2.1 Nordic SDK .................................................................................................................................. 16
2.2.2 Arm Mbed OS ............................................................................................................................. 19
2.2.3 Wirepas connectivity software ..................................................................................................... 23
2.3 Flashing the NINA-B1 module ............................................................................................................. 23
2.3.1 UART flashing.............................................................................................................................. 23
2.3.2 SWD flashing............................................................................................................................... 25
3 Design-in ..................................................................................................................... 28
3.1 Overview ............................................................................................................................................ 28
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3.2 Antenna interface ............................................................................................................................... 28
3.2.1 RF transmission line design (NINA-B111 only) .............................................................................. 28
3.2.2 Antenna design (NINA-B111 only) ............................................................................................... 30
3.2.3 On-board antenna design (NINA-B112 only) ................................................................................ 32
3.3 Supply interfaces ................................................................................................................................ 33
3.3.1 Module supply design ................................................................................................................. 33
3.4 Data communication interfaces .......................................................................................................... 33
3.4.1 Asynchronous serial interface (UART) design ............................................................................... 33
3.4.2 Serial peripheral interface (SPI) ..................................................................................................... 34
3.4.3 I2C interface................................................................................................................................. 34
3.5 NFC interface ...................................................................................................................................... 34
3.5.1 Battery protection ....................................................................................................................... 34
3.6 General High Speed layout guidelines ................................................................................................. 35
3.6.1 General considerations for schematic design and PCB floor-planning .......................................... 35
3.6.2 Module placement ...................................................................................................................... 35
3.6.3 Layout and manufacturing .......................................................................................................... 35
3.7 Module footprint and paste mask ....................................................................................................... 36
3.8 Thermal guidelines.............................................................................................................................. 36
3.9 ESD guidelines .................................................................................................................................... 36
4 Handling and soldering ............................................................................................. 38
4.1 Packaging, shipping, storage and moisture preconditioning ............................................................... 38
4.2 Handling ............................................................................................................................................. 38
4.3 Soldering ............................................................................................................................................ 38
4.3.1 Reflow soldering process ............................................................................................................. 38
4.3.2 Cleaning ...................................................................................................................................... 39
4.3.3 Other remarks ............................................................................................................................. 40
5 Qualifications and approvals ..................................................................................... 41
6 Product testing ........................................................................................................... 42
6.1 u-blox In-Series production test .......................................................................................................... 42
6.2 OEM manufacturer production test .................................................................................................... 42
6.2.1 “Go/No go” tests for integrated devices ...................................................................................... 43
Appendix .......................................................................................................................... 44
A Glossary ...................................................................................................................... 44
B Antenna reference designs ........................................................................................ 45
B.1.1 Floor plan ......................................................................................................................................... 46
Related documents........................................................................................................... 48
Revision history ................................................................................................................ 48
Contact .............................................................................................................................. 49
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1 System description
1.1 Overview and applications
The NINA-B1 series modules are small stand-alone Bluetooth low energy modules featuring Bluetooth 5, a powerful Arm
®
Cortex®-M4 with FPU, and state-of-the-art power performance. The embedded low power crystal
in NINA-B1 minimizes power consumption, thus extending the battery life. The NINA-B1 is delivered with u-blox connectivity software that provides support for u-blox Bluetooth low
energy Serial Port Service, GATT client and server, beacons, NFC™, and simultaneous peripheral and central roles – all configurable from a host by using AT commands.
NINA-B1 offers full flexibility for customers who prefer to add their application to run on the built-in Cortex-M4 with FPU. With 512 kB flash and 64 kB RAM, it offers the best-in-class capacity for customer applications running on top of the Bluetooth low energy stack using SDK from Nordic Semiconductor or Arm
®
Mbed™. Additionally, NFC and interfaces such as SPI, I2C, and I2S are available, and features like Bluetooth Mesh, AirFuel, and Apple HomeKit are also supported. In combination with Wirepas Connectivity stack, NINA-B1 can form large scale industrial mesh networks for several applications, such as lighting, asset tracking, and metering.
NINA-B112 comes with an internal antenna and NINA-B111 has a pin for use with an external antenna. The internal PIFA antenna is specifically designed for the small NINA-B1 form factor and provides an extensive range of more than 300 m, independent of ground plane and component placement.
The module is globally certified for use with the internal antenna or a range of external antennas. This reduces time and effort for customers integrating NINA-B1 in their designs.
Table 1: NINA-B1 series main features summary
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1.1.1 Module architecture
Figure 1: Block diagram of NINA-B1 series
1.1.2 Hardware options
The NINA-B1 series modules use an identical hardware configuration except for the different PCB sizes and antenna solutions. An on board 32.768 kHz low power crystal is always included and an integrated DC/DC converter for higher efficiency under heavy load situations.
1.1.3 Software options
The NINA-B1 series module can be used either together with the pre-flashed u-blox connectivity software or as an Open CPU module where you can run your own application developed with either Arm Mbed, Nordic SDK or Wirepas development environment inside the NINA-B1 module. The different software options are described in more detail in section 2.
1.2 Pin configuration and function
1.2.1 Pin attributes
1. FUNCTION: Pin function
2. PIN NAME: The name of the package pin or terminal
3. PIN NUMBER: Package pin numbers associated with each signal
4. POWER: The voltage domain that powers the pin
5. TYPE: Signal type description:
- I = Input
- O = Output
- I/O = Input and Output
- D = Open drain
DC/DC and LDO regulators
512 kB Flash
BLE baseband
Cryptographic
hardware
accelerators
IO Buffers
Arm Cortex
-M4 with FPU
Antenna
NINA-B112
PLL
VCC_IO (1.7 – 3.6 V)
VCC (1.7
- 3.6 V)
32 MHz
Reset
UART
SPI GPIO
1.3 V
System
power
I2C
PWM I2S
ADC and
comparator
Analog
Passive NFC tag
NFC
64 kB RAM
PLL
32.768 kHz
Low power crystal
RTC
RF
Antenna pin
NINA-B111
Nordic Semiconductor
nRF52832
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- DS = Differential
- PWR = Power
- GND = Ground
- PU = Internal Pull-Up
- PD = Internal Pull-Down
- H = High-Impedance pin
- RF = Radio interface
6. SIGNAL NAME: The signal name for that pin in the mode being used
7. REMARKS: Pin description and notes.
1.2.2 Pin description
The pin-out described in Figure 2 is an example pin-out that demonstrates the most commonly used interfaces.
A = Analog function capable pin
Figure 2: NINA-B1 series pin assignment (top view)
The grey pins in the center of the modules are GND pins. The outline of NINA-B111 ends at the dotted line as shown in Figure 2, where the antenna area of NINA-B112 begins.
All digital or analog functions described in this manual can be freely assigned to any GPIO pin. Analog
functions are limited to analog capable pins. Signals marked red in Figure 2 are not freely assignable but locked to a specific pin.
The GPIO pins 16, 17, 18, and 20 are connected to pins located close to the radio part of the RF chip. It is
recommended to avoid using these pins for high speed digital interfaces or sinking/sourcing large currents through them. Doing so, can affect the RF performance.
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Do not apply an NFC field to the NFC pins when they are configured as GPIOs. Doing so may
cause permanent damage to the module. When driving different logic levels on these pins in GPIO mode, a small current leakage will occur, make sure they are set to the same logic level before entering into any power saving modes.
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Function Pin Name Pin No.
nR52 pin
Type Description u-blox connectivity software
Power VCC 10 PWR Module supply input
1.7-3.6V range
VCC_IO 9 PWR IO Voltage supply input
Must be connected to VCC on NINA-B1
GND 6, 12, 14,
26, 30
GND Module ground
EGP - GND
The exposed pads in the center of the module should be connected
to the GND
GPIO
GPIO_1
1
P0.08
I/O
General purpose I/O
RED: System status signal
GPIO_2
2
P0.11
I/O
General purpose I/O
GPIO_3
3
P0.12
I/O
General purpose I/O
GPIO_4
4
P0.13
I/O
General purpose I/O
GPIO_5
5
P0.14
I/O
General purpose I/O
GPIO_7
7
P0.16
I/O
General purpose I/O
GREEN/SWITCH_1:
This signal is multiplexed:
GREEN: System status signal.
SWITCH_1:
Grounding SWITCH_1 and
SWITCH_2 during a reset will make the module enter the bootloader.
Grounding SWITCH_1 and
SWITCH_2 during a reset and holding it low for 10s will make the module restore all
factory settings.
GPIO_16
16
P0.28
I/O
General purpose I/O
Pin is analog capable
UART_DTR:
Can be used to indicate system
mode
GPIO_17
17
P0.29
I/O
General purpose I/O Pin is analog capable
UART_DSR: Can be used to set system mode
GPIO_18
18
P0.30
I/O
General purpose I/O
Pin is analog capable
SWITCH_2:
Grounding SWITCH_1 and
SWITCH_2 during reset will make the module enter the bootloader.
Grounding SWITCH_1 and
SWITCH_2 during a reset and holding it low for 10s will make the module restore all factory settings.
Grounding SWITCH_2 during
reset will reset the UART serial settings.
Can be use as external connect
or to enable parable mode. See u-blox Short Range
Modules AT Commands
Manual [4] for more details.
GPIO_20
20 P0.31
I/O
General purpose I/O Pin is analog capable
UART_RTS: UART request to send control signal
GPIO_21
21
P0.07
I/O
General purpose I/O
UART_CTS:
UART clear to send control signal
GPIO_22
22
P0.06
I/O
General purpose I/O
UART_TXD UART data output
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Function Pin Name Pin No.
nR52 pin
Type Description u-blox connectivity software
GPIO_23
23
P0.05
I/O
General purpose I/O
Pin is analog capable
UART_RXD:
UART data input
GPIO_24
24
P0.02
I/O
General purpose I/O Pin is analog capable
GPIO_25
25
P0.03
I/O
General purpose I/O Pin is analog capable
GPIO_27
27
P0.04
I/O
General purpose I/O Pin is analog capable
Control
RESET_N
19 P0.21 I
System reset input Active low
Radio
ANT 13 I/O
Tx/Rx antenna interface Used with NINA-B111 modules
NFC1/GPIO_2
8
28
P0.09 I/O
NFC antenna pin 1
May be used as a GPIO
NFC2/GPIO_2
9
29
P0.10 I/O
NFC antenna pin 2
May be used as a GPIO
Other
SWO/GPIO_8
8
P0.18
I/O
Serial Wire debug trace data
output
May be used as a GPIO
BLUE:
System status signal
SWDCLK
11
I Serial Wire Debug port clock signal
SWDIO
15
I/O Serial Wire Debug port data signal
Table 2: NINA-B1 pin description
Do not apply any Voltage to Digital, Control and Radio signal groups while in Non-powered
mode to avoid damaging the module.
1.3 Supply interfaces
1.3.1 Main supply input
The NINA-B1 series uses an integrated DC/DC converter to transform the supply voltage presented at the VCC pin into a stable system core voltage. Due to this, the NINA-B1 modules are compatible for use in battery powered designs.
While using NINA-B1 with a battery, it is important that the battery type can handle the peak power of the module. In case of battery supply, consider adding extra capacitance on the supply line to avoid capacity degradation. See the NINA-B1 series Data Sheet [2] for information about voltage supply requirement and current consumption.
Table 3: Summary of voltage supply requirements
The current requirement in Table 3 considers using the u-blox connectivity software with UART
comunication. But it does not include any aditional I/O current. Any use of external push-buttons, LEDs, or other interfaces will add to the total current consumption of the NINA-B1 module. The peak current consumption of the entire design will have to be taken into account when considering a battery powered solution.
Rail Voltage requirement Current requirement (peak)
VCC 1.7 V – 3.6 V 15 mA
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1.3.2 Digital I/O interfaces reference voltage (VCC_IO)
On the NINA-B1 series modules, the I/O voltage level is the same as the supply voltage and VCC_IO is internally connected to the supply input VCC.
When using NINA-B1 with a battery, the I/O voltage level will vary with the battery output voltage, depending on the charge of the battery. Level shifters might be needed depending on the I/O voltage of the host system.
1.3.3 VCC application circuits
The power for NINA-B1 series modules is provided through the VCC pins, which can be one of the following:
• Switching Mode Power Supply (SMPS)
• Low Drop Out (LDO) regulator
• Battery
The SMPS is the ideal choice when the available primary supply source has higher value than the operating supply voltage of the NINA-B1 series modules. The use of SMPS provides the best power efficiency for the overall application and minimizes current drawn from the main supply source.
While selecting SMPS, ensure that AC voltage ripple at switching frequency is kept as low as
possible. Layout shall be implemented to minimize impact of high frequency ringing.
The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage where the typical 85-90% efficiency of the switching regulator leads to minimal current saving. Linear regulators are not recommended for high voltage step-down as they will dissipate a considerable amount of energy.
DC/DC efficiency should be evaluated as a tradeoff between active and idle duty cycle of the specific application. Although some DC/DC can achieve high efficiency at extremely light loads, a typical DC/DC efficiency quickly degrades as idle current drops below a few mA greatly reducing the battery life.
Due to the low current consumption and wide voltage range of the NINA-B1 series module, a battery can be used as a main supply. The capacity of the battery should be selected to match the application. Care should be taken so that the battery can deliver the peak current required by the module. See the NINA-B1 series Data Sheet [2] for electrical specifications.
It is considered as best practice to have decoupling capacitors on the supply rails close to the NINA-B1 series module, although depending on the design of the power routing on the host system, capacitance might not be needed.
1.4 System function interfaces
1.4.1 Module reset
You can reset the NINA-B1 modules by applying a low level on the RESET_N input pin, which is normally set high with an internal pull-up. This causes an “external” or “hardware” reset of the module. The current parameter settings are not saved in the non-volatile memory of the module and a proper network detach is not performed.
1.4.2 Internal temperature sensor
The radio chip in the NINA-B1 module contains a temperature sensor used for over temperature and under temperature shutdown.
The temperature sensor is located inside the radio chip and should not be used if an accurate
temperature reading of the surrounding environment is required.
1.5 Debug – Serial Wire Debug (SWD)
The primary interface for debug is the SWD interface. The SWD interface can also be used for software upgrade. The two pins, SWDIO and SWDCLK should be made accessible on header or test points.
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1.6 Serial interfaces
As the NINA B1 module can be used with both the u-blox connectivity software and open CPU
based application, based on either the Nordic SDK or the Arm Mbed platform, the available interfaces and the pin mapping can differ. For detailed pin information, see the Pin description section.
1.6.1 Universal Asynchronous Serial Interface (UART)
The NINA-B1 series module provides a Universal Asynchronous Serial Interface (UART) for data communication. The following UART signals are available:
Data lines (RXD as input, TXD as output)
Hardware flow control lines (CTS as input, RTS as output)
DSR and DTS are used to set and indicate system modes
The UART can be used as both 4 wire UART with hardware flow control and 2-wire UART with only TXD and RXD. If using the UART in 2-wire mode, CTS should be connected to GND on the NINA-B1 module.
Depending on the bootloader used, the UART interface can also be used for software upgrade. See the Software section for more information.
The u-blox connectivity software adds the DSR and DTR pins to the UART interface. These pins are not used as originally intended, but to control the state of the NINA-B1 module. Depending on the current configuration, the DSR can be used to:
• Enter command mode
• Disconnect and/or toggle connectable status
Enable/disable the rest of the UART interface
• Enter/wake up from the sleep mode
See the NINA-B1 series Data Sheet [2] for characteristic information about the UART interface.
Interface Default configuration
COM port 115200 baud, 8 data bits, no parity, 1 stop bit, hardware flow control
Table 4: Default settings for the COM port while using the u-blox connectivity Software
It is recommended to make the UART available either as test points or connected to a header for software upgrade.
The IO level of the UART will follow the VCC voltage and it can thus be in the range of 1.8 V and 3.6 V. If you are connecting the NINA-B1 module to a host with a different voltage on the UART interface, a level shifter should be used.
1.6.2 Serial Peripheral Interface (SPI)
NINA-B1 supports up to 3 serial peripheral interfaces that can operate in both master and slave modes with a maximum serial clock frequency of 8 MHz in both these modes. The SPI interfaces use the following 4 signals:
SCLK
MOSI
MISO
CS
When using the SPI interface in master mode, it is possible to use GPIOs as additional Chip Select (CS) signals to allow addressing of multiple slaves.
1.6.3 I
2
C interface
The Inter-Integrated Circuit (I2C) interfaces can be used to transfer or receive data on a 2-wire bus network. The NINA-B1 modules can operate as both master and slave on the I
2
C bus using both standard (100 kbps) and fast (400 kbps) transmission speeds. The interface uses the SCL signal to clock instructions and data on the SDL signal.
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External pull up resistors are required for the I2C interface. The value of the pull up resistor should be selected depending on the speed and capacitance of the bus.
1.7 GPIO pins
The NINA-B1 series module can provide up to 19 pins, which can be configured as general purpose input or output. 7 GPIO pins are capable of handling analog functionality. All pins are capable of handling interrupt.
Function Description Default
NINA-B1 pin
Configurable GPIOs
General purpose input Digital input with configurable edge detection and interrupt generation. Any
General purpose output Digital output with configurable drive strength, pull-up, pull-down, open-
source, open-drain and/or slew rate.
Any
Pin disabled Pin is disconnected from input buffers and output drivers. All* Any
Timer/ counter High precision time measurement between two pulses/ Pulse counting with
interrupt/event generation.
Any
Interrupt/ Event trigger Interrupt/event trigger to the software application/ Wake up event. Any
ADC input 8/10/12-bit analog to digital converter Any analog
Analog comparator input Compare two voltages, capable of generating wake-up events and
interrupts
Any analog
PWM output Output complex pulse width modulation waveforms Any
Connection status indication
Indicates if a BLE connection is maintained BLUE** Any
* = If left unconfigured ** = If using u-blox connectivity software
Table 5: GPIO custom functions configuration
1.7.1 Analog interfaces
8 out of the 19 digital GPIOs can be multiplexed to analog functions. The following analog functions are available for use:
1x 8-channel ADC
• 1x Analog comparator*
1x Low-power analog comparator*
*Only one of the comparators can be used simultaneously.
1.7.1.1 ADC
The Analog to Digital Converter (ADC) can sample up to 200 kHz using different inputs as sample triggers. Table 6 shows the sample speed in correlation to the maximum source impedance. It supports 8/10/12-bit resolution. Any of the 8 analog inputs can be used both as single-ended inputs and as differential pairs for measuring the voltage across them. The ADC supports full 0 V to VCC input range.
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Table 6: Acquisition vs source impedance
1.7.1.2 Comparator
The comparator compares voltages from any analog pin with different references as shown in Table 7. It supports full 0 V to VCC input range and can generate different software events to the rest of the system.
1.7.1.3 Low power comparator
The low-power comparator operates in the same way as the normal comparator, with reduced functionality. It can be used during system OFF modes as a wake up source.
1.7.1.4 Analog pin options
The following table shows the supported connections of the analog functions.
An analog pin may not be simultaneously connected to multiple functions.
Table 7: Possible uses of analog pin
1.8 Antenna interfaces
The antenna interface is different for each module variant in the NINA-B1 series.
1.8.1 Antenna pin – NINA-B111
The NINA-B111 is equipped with an RF pin. The RF pin has a nominal characteristic impedance of 50 and must be connected to the antenna through a 50 transmission line to allow reception of radio frequency (RF) signals in the 2.4 GHz frequency band.
Choose an antenna with optimal radiating characteristics for the best electrical performance and overall module functionality. An internal antenna, integrated on the application board or an external antenna that is connected to the application board through a proper 50 connector can be used.
While using an external antenna, the PCB-to-RF-cable transition must be implemented using either a suitable 50 connector, or an RF-signal solder pad (including GND) that is optimized for 50 Ω characteristic impedance.
1.8.1.1 Antenna matching
The antenna return loss should be as good as possible across the entire band when the system is operational to provide optimal performance. The enclosure, shields, other components and surrounding environment will
ACQ [us] Maximum source resistance [k]
3 10
5 40
10 100
15 200
20 400
40 800
Analog function Connects to
ADC single-ended input Any analog pin or VCC
ADC differential input Any analog pin or VCC pair
Comparator IN+ Any analog pin
Comparator IN- Pin 24 or 25, VCC, 1.2 V, 1.8 V, 2.4 V
Low-power comparator IN+ Any analog pin
Low-power comparator IN- Pin 24 or 25, 1/16 to 15/16 VCC in steps of 1/16 VCC
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impact the return loss seen at the antenna port. Matching components are often required to re-tune the antenna to bring the return loss within an acceptable range.
It is difficult to predict the actual matching values for the antenna in the final form factor. Therefore, it is a good practice to have a placeholder in the circuit with a ”pi” network, with two shunt components and a series component in the middle, to allow maximum flexibility while tuning the matching to the antenna feed.
1.8.1.2 Approved antenna designs
NINA-B1 modules come with a pre-certified design that can be used to save costs and time during the certification process. To take advantage of this service, the customer is required to implement antenna layout according to u-blox reference designs. The reference design is described in Appendix B.
The designer integrating a u-blox reference design into an end-product is solely responsible for the unintentional emission levels produced by the end-product.
The module may be integrated with other antennas. In this case, the OEM installer must certify his design with respective regulatory agencies.
1.8.2 Integrated antenna – NINA-B112
The NINA-B112 is equipped with an integrated antenna on the module. This will simplify the integration as there will be no need to do RF trace design on the host PCB. By using the NINA-B112 with integrated antenna, the certification of the NINA-B1 series module can be reused, thus minimizing the effort needed in the test lab.
1.8.3 NFC antenna
The NINA-B1 series modules include a Near Field Communication interface, capable of operating as a 13.56 MHz NFC tag at a bit rate of 106 kbps. As an NFC tag, data can be read from or written to the NINA-B1 modules using an NFC reader; however the NINA-B1 modules are not capable of reading other tags or initiating NFC communications. Two pins are available for connecting to an external NFC antenna: NFC1 and NFC2.
1.9 Reserved pins (RSVD)
Do not connect reserved (RSVD) pin. The reserved pins can be allocated for future interfaces and functionality.
1.10 GND pins
Good connection of the module's GND pins with solid ground layer of the host application board is required for correct RF performance. It significantly reduces EMC issues and provides a thermal heat sink for the module.
See the Module footprint and paste mask and Thermal guidelines sections for information about ground design.
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