Texas instruments UCC23513-1EVM-014 User Manual

Using the UCC23513-1EVM-014

User's Guide
Literature Number: SLUUBW3A
October 2018–Revised July 2019
(1)

1 Introduction

User's Guide
SLUUBW3A–October 2018–Revised July 2019
Using the UCC23513-1EVM-014
The UCC23513-1EVM-014 evaluation module is designed for evaluation of TI's 5-kV channel gate drivers with opto-compatible input, and UCC23511. The input is current driven, requiring between 7 mA and 16 mA for device turn-on, and can be reverse biased for turnoff. The UCC23513 is a 4-A source and 5-A peak sink current driver while the UCC23511 is capable of 1.5-A source and 2-A sink peak output current for driving Si MOSFETs, IGBTs, and SiC transistors. This user's guide covers the UCC23513-1EVM-014, which is used for evaluation of the UCC23513 and UCC23511, which are pin-to­pin compatible devices.
Developed for high voltage applications where isolation and reliability are required, the UCC2351x family of devices deliver reinforced isolation of 5 kV common mode transient immunity (CMTI) greater than 150 V/ns. It offers lower propagation delay, lower­part to-part delay skew, higher CMTI, smaller Pulse Width Distortion, and higher operating temperature, which provides significant performance upgrade over opto isolated gate drivers, while still maintaining pin­to-pin compatibility.
The input current and voltage characteristics of the e-diode™ functionally mimics the primary side of an opto-isolator. The output side VCC has a wide recommended operating range from 14-V to 33-V and allows the device to be used in a low-side or high-side configuration along with bipolar supplies for SiC Power FETs. The pin-to-pin compatibility enables designers to use the UCC23513 and UCC23511 in existing designs and new designs for motor drives, industrial power supplies, solar inverters, and UPS.

2 Description

The UCC23513-1EVM-014 evaluation board utilizes a SN74LVC2G17DBVR (dual Schmitt-Trigger buffer) to drive signal current on the primary side of the device. The board is populated with clips and 2-position headers for flexibility in connecting power and signal inputs, along with signal test points and large GND vias to enable installation of ground springs. The PCB layout is optimized with minimal loop area in the input and output paths and showcases design for high voltage between the primary side and secondary side with >8 mm creepage. For detailed device information, refer to the UCC23513 and UCC23511 datasheets and TI's Isolated gate driver solutions.
isolated single-
RMS
and a surge immunity tested up to 8 kV along with a
RMS
Part Number Description Package
UCC23513 4-A source / 5-A sink, output current
UCC23511 1-A source / 2-A sink, output current

2.1 Features

Evaluation module for the UCC23513 and UCC23511 in stretched SO-6 package
5-V input buffer, and 14-V to 33-V VCC power supply range
4-A and 5-A source/sink current capability (UCC23513)
1.5-A and 2-A source/sink current capability (UCC23511)
5-kV
(1)
e-diode is a trademark of Texas Instruments.
2
Isolation for 1 minute per UL 1577
RMS
Table 1. EVM Compatible Devices
Copyright © 2018–2019, Texas Instruments Incorporated
Stretched SO-6 package with >8.5-mm
creepage and clearance
Stretched SO-6 package with >8.5-mm
creepage and clearance
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
www.ti.com
Buffer disconnect headers for custom input drive solution
PCB layout showcases high voltage isolation design between primary side and secondary side
Unpopulated pads for bootstrap supply, split supply, and turn on/turn off resistance
Description
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
3
Description

2.2 I/O Description

PINS DESCRIPTION
J1–1 Anode Buffer input J1–2 GND input J2–1 Cathode Buffer input J2–2 GND input J3–1 Anode Buffer Jumper J3–2 Anode Buffer Jumper J4–1 Cathode Buffer Jumper J4–2 Cathode Buffer Jumper J5–1 Cathode Resistor to GND Jumper J5–2 Cathode Resistor to GND Jumper J6–1 VG to 1 nF Load Jumper J6–2 VG to 1 nF Load Jumper J7–1 VG to 180 nF Load Jumper J7–2 VG to 180 nF Load Jumper P1–1 +5 V Buffer Supply
P1-2 GND P2-1 +14 V–33 V Output Side Supply P2-2 VSS
www.ti.com
Table 2. Jumpers Setting

2.3 Jumpers (Shunt) Options

JACK Jumper Setting Options FACTORY SETTING
J1
J2
J3
J4
J5
J6
J7
Option A: Jumper not installed, IN/PWM signal provided by external signal Option B: Jumper on J1-1 and J1-2 set Anode Buffer Input low
Option A: Jumper on J2-1 and J2-2 set Cathode Buffer Input low Option B: Jumper not installed, IN/PWM signal provided by external signal
Option A: Jumper on J3-1 and J3-2, pass signal to Anode Resistor Option B: Jumper not installed, Anode_R left floating for external drive
Option A: Jumper on J4-1 and J4-2, pass signal to Cathode Resistor Option B: Jumper not installed, Cathode_R left floating for external drive
Option A: Jumper not installed, Cathode_R left floating from GND Option B: Jumper on J5-1 and J5-2, ties Cathode_R to GND
Option A: Jumper installed, VG tied to 1nF test load Option B: Jumper not installed, VG floating
Option A: Jumper not installed, VG floating Option B: Jumper installed, VG tied to 180nF test load
Table 3. Jumpers Setting
Option A
Option A
Option A
Option A
Option A
Option A
Option A
4
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
www.ti.com

3 Electrical Specifications

Table 4. UCC23513-1EVM-014 Electrical Specifications
DESCRIPTION MIN TYP MAX UNIT
V
DD
V
CC
F
S
T
J
Primary-side power supply 4.5 5.5 V Driver output power supply 14 33 V Switching frequency 0 1 MHz Operating junction temperature range -40 150 °C

4 Test Summary

In this section, the UCC23513-1EVM-014 is tested in its default configuration. Different jumper settings, PWM signal input options, and voltage source settings can be found in Section 3 Electrical Specifications.

4.1 Definitions

This procedure details how to configure the UCC23513 evaluation board. Within this test procedure, the following naming conventions are followed. Refer to the UCC23513-1EVM-014 schematic, Section 8, for details.
VXX: External voltage supply name V
: Voltage at test point TPxx. For example, V(TP12) means the voltage at TP12.
(TPxx)
V
: Voltage at jack terminal Jxx
(Jxx)
J
: Terminal or pin yy of jack xx
xx(yy)
DMM: Digital multi-meters UUT: Unit under test EVM: Evaluation module assembly. In this case, the UUT assembly drawings have location for jumpers,
test points, and individual components.
Electrical Specifications

4.2 Equipment

4.2.1 Power Supplies
Two DC power supply with voltage/current above 5-V/0.1-A and 35-V/0.5-A (for example: Agilent E3634A)
4.2.2 Function Generators
One function generator over 1 MHz (for example: Tektronics AFG3252)

4.3 Equipment Setup

4.3.1 DC Power Supply Settings
DC power supply #1 – Voltage setting: 5-V – Current limit: 0.05-A
DC power supply #2 – Voltage setting: 15-V for the UCC23513 and UCC23511 – Current limit: 0.1 A
4.3.2 Digital Multi-Meter Settings
Digital multi-meter #1
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
5
Shunt #1 Shunt #3
Shunt #2
Shunt #4
Test Summary
– DC current measurement, auto-range
Digital multi-meter #2 – DC current measurement, auto-range
4.3.3 Function Generator Settings
www.ti.com
Table 5. Function Generator Settings
MODE FREQUENCY DUTY DELAY HIGH LOW
Channel
Output
Pulse DC ~ 100 kHz 50% 0 ns 5 V 0 V High Z
4.3.4 Oscilloscope Setting
BANDWIDTH COUPLING TERMINATION SCALE SETTINGS INVERTING
Channel A 500 MHz or above DC 1 Mor automatic 10× or automatic OFF Channel B 500 MHz or above DC 1 Mor automatic 10× or automatic OFF
4.3.5 Jumper (Shunt) Settings
Default shunt configuration should be adequate for this test.
OUTPUT
IMPEDANCE
Table 6. Oscilloscope Settings
6
Figure 1. Default Jumper Settings
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
+
s
Power
Supply #1
(5V/0.05A)
+
s
Power
Supply #2
(15V/0.1A)
+
s
DMM #2
DC Current
CH1
EVM
Function
Generator
Oscilloscope
DMM #1
DC Current
+
s
www.ti.com
4.3.6 Bench Setup Diagram
The current bench setup diagram includes the function generator and oscilloscope connections. Follow the connection procedure below. Figure 2 can be used as a reference.
Make sure the output of the function generator and voltage sources are disabled before connection.
Function generator channel applied on J1-1 ←→ J1-2 (see in Figure 2)
Power supply #1: positive node connected to input of DMM #1 with DMM #1 output connected to P1-1 (or VDD), and negative node applied on P1-2 (or GND).
Power supply #2: positive node connected to input of DMM #2 with DMM #2 output connected to P2-1 (or VCC), negative node connected directly to P2-2 (or VSS).
Oscilloscope channel-A probes Anode_R ←→ GND, smaller measurement loop is preferred.
Oscilloscope channel-B probes VG (or J7-1) ←→ VSS, smaller measurement loop is preferred.
Test Summary
Figure 2. Bench Setup Diagram and Configuration
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
7
Power Up and Power Down Procedure

5 Power Up and Power Down Procedure

5.1 Power Up (CL= 1000 pF)

1. Before proceeding to the power up procedure, make sure that Section 4.3.6 is implemented for setting up all the equipment. Figure 3 can be used as reference.
2. Enable supply #1.
3. Enable supply #2.The quiescent current on DMM1 and DMM2 ranges in 1 mA to 3 mA if everything is set correctly.
4. Enable function generator output.
5. Afterward, the following occurs:
1. Stable pulse output on the channel-A and channel-B in the oscilloscope. See Figure 3.
2. Scope frequency measurement is the same as function generator output.
3. DMM #1 and #2 should read measurement results around 5 mA–10 mA under no load conditions. For more information about operating current, refer to UCC23513 datasheet.
www.ti.com
Figure 3. Example Input and Output Waveforms (Ch1 is PWM Input, Ch2 is Outputs)

5.2 Power Down

1. Disable function generator.
2. Disable power supply #2.
3. Disable power supply #1.
4. Disconnect cables and probes.
8
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
www.ti.com
Test Waveforms with Different Input/Output Configurations

6 Test Waveforms with Different Input/Output Configurations

6.1 Input Side Reverse Bias

The default configuration grounds input to cathode buffer. Cathode buffer can alternatively be driven with a function generator to reverse bias input diode on turn-off. With J2 jumper (shunt) removed, cathode and anode buffers are driven 180º out-of-phase, which showcases the reverse blocking capability of the UCC23513.

6.2 Output Split Supply

The output can be configured to provide split supply operation through two unique methods. Single supply: Remove R9 and install C6 = C7 = 1 µF, R7 = 7.5 k, D2 = 5.1 V Zener, and R8 jumper. Dual supply: Remove R9 and install C11 = 0.1 µF, C12 = 2.2 µF, apply V+ from VCC to VSS, and V- from
VSS to Phase. These configurations allow output operation from -5 V off, to VCC-5V on which is commonly found in SiC
power stage configurations. Figure 5 shows operation with the latter method.
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Figure 4. Input e-Diode driven +/-5 V
(Ch1 is PWM Input, Ch2 is Output)
Copyright © 2018–2019, Texas Instruments Incorporated
9
Test Waveforms with Different Input/Output Configurations
www.ti.com
Figure 5. Output Split Supply Operation
(Ch1 is PWM Input, Ch2 is Output)

6.3 Peak Output Current Measurement Using 180nF Load

The output can be configured to measure peak output current by moving the jumper from J6 to J7. This jumpers are in a 180 nF load capacitor, C15, which can be used to indirectly measure the output current as seen in the Understanding Peak Source and Sink Current Parameters Application Note (SLLA387). Input PWM is set to 200 Hz to avoid excessive power dissipation in the driver.
10
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
www.ti.com
Test Waveforms with Different Input/Output Configurations
Figure 6. Source dv/dt Measurement
Peak source current is calculated at 4.008 A for the UCC23513.
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
11
UCC23511 Test Implementation
www.ti.com
Figure 7. Sink dv/dt Measurement
Peak sink current is calculated at 5.011 A for the UCC27513.

7 UCC23511 Test Implementation

Replace the UCC23513 with the UCC23511 from the default configuration on the EVM. Solder the UCC23511 sample and use Table 7 to adjust the value of R10to observe the desired peak current out of the driver.
Table 7. Minimum Gate Resistor (Ω)
Gate driver supply VCC-VEE (V)
15 4 23 7 30 10
Minimum total gate resistance (Ω) = (R
+ R
G_int
)
GON
+ R
G_int
) or (R
GOFF
12
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
www.ti.com

8 Schematic

Figure 8 shows only the schematic diagram for the UCC23513-1EVM-014. For evaluation of the UCC23511, use the UCC23513DWY for U1.
Schematic
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Figure 8. UCC23513-1EVM-014 Schematic
Copyright © 2018–2019, Texas Instruments Incorporated
13
Layout Diagrams

9 Layout Diagrams

Figure 9, Figure 10, Figure 11, and Figure 12 show the PCB layout information for the UCC23513-1EVM-
014.
www.ti.com
Figure 9. Top Overlay
14
Figure 10. Top Layer
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
www.ti.com
Layout Diagrams
Figure 11. Bottom Layer
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Figure 12. Bottom Overlay
Copyright © 2018–2019, Texas Instruments Incorporated
15
List of Materials

10 List of Materials

Quantity Designator Description Part Number Manufacturer
1 U1
1 U2
2 C1, C2
1 C3
1 C4
1 C10
1 C11
1 C14
1 C15 9 J1, J2, J3, J4, J5, J6, J7, P1, P2 Header, 100mil, 2x1, Gold, TH Std Std
2 R1, R2 RES, 100, 1%, 0.1 W, 0603 Std Std 2 R3, R4 2 R9 RES, 0, 5%, 0.125 W, 0805 Std Std
1 R10 RES, 4.99, 1%, 0.125 W, 0805 Std Std 4 SH-J2, SH-J3, SH-J4, SH-J6 Shunt, 100mil, Flash Gold, Black Std Std
16
0 C5, C6, C7
0 C8
0 C9, C12, C13 0 D1 Diode, Schottky, 1200 V, 8 A, TH Std Std 0 D2
0 D3 0 H1, H3, H5, H7 Standoff, Hex, 0.5"L #4-40 Nylon Std Std 0 H2, H4, H6, H8 0 R5 RES, 1.0 k, 5%, 0.1 W, 0603 Std Std
0 R7 RES, 7.50 k, 1%, 0.1 W, 0603 Std Std 0 R11 RES, 10.0, 1%, 0.125 W, 0805 Std Std 0 R12 RES, 4.7 k, 5%, 0.125 W, 0805 Std Std
0 R13 0 TP14 Test Point, Miniature, SMT Std Std
TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP15, TP20, TP21
Table 8. UCC23513-1EVM-014 List of Materials
5-kVRMS, 3-A Single Channel Isolated Gate Driver with Opto Compatible Input, DWY0006A (SOIC-6)
Dual Schmitt-Trigger Buffer, DBV0006A, LARGE T&R
CAP, CERM, 22 pF, 100 V, +/- 5%, C0G/NP0, 0603
CAP, CERM, 0.1 µF, 50 V,+/- 10%, X7R, AEC-Q200 Grade 1, 0603
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0805
CAP, CERM, 0.1 µF, 50 V, +/- 20%, X7R, 0805
CAP, CERM, 2.2 µF, 50 V, +/- 10%, X5R, 0805
CAP, CERM, 1000 pF, 50 V, +/- 1%, C0G/NP0, 0805
CAP, CERM, 0.18 µF, 50 V, +/­10%, X7R, 0805
RES, 137, 1%, 0.125 W, AEC-Q200 Grade 0, 0805
Test Point, Miniature, SMT Std Std
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0603
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X7R, 0603
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0805
Diode, Zener, 5.1 V, 300 mW, SOD­523
Diode, Schottky, 40 V, 1 A, MicroSMP
Machine Screw, Round, #4-40 x 1/4, Nylon, Philips panhead
RES, 10, 5%, 0.125 W, AEC-Q200 Grade 0, 0805
UCC23513DWYRTexas
SN74LVC2G17 DBVR
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Std Std
Instruments
Texas Instruments
www.ti.com
16
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
www.ti.com
List of Materials
Table 8. UCC23513-1EVM-014 List of Materials (continued)
Quantity Designator Description Part Number Manufacturer
0
TP16, TP17, TP18, TP19, TP22, TP23, TP24, TP25
Test Point, Compact, Black, TH Std Std
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
17

Revision History

www.ti.com
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (October 2018) to A Revision .................................................................................................... Page
Changed From "UCC23513" to "UCC23513 and UCC23511" ...................................................................... 2
Deleted "GaN" to "Si MOSFETs, IGBTs and SiC".................................................................................... 2
Changed "UCC23513EVM-014" to "UCC23513-1EVM-014"........................................................................ 2
Added "Which are pin-to-pin compatible devices" .................................................................................... 2
Changed "100V/ns" to "150 V/ns"....................................................................................................... 2
Changed from "15-V to 33-V" to "14-V to 33-V"....................................................................................... 2
Added Table 1 ............................................................................................................................. 2
Changed to "–40" from "-55"............................................................................................................. 5
Added content to Section 7............................................................................................................. 12
Added Table 7............................................................................................................................ 12
18
Revision History
Copyright © 2018–2019, Texas Instruments Incorporated
SLUUBW3A–October 2018–Revised July 2019
Submit Documentation Feedback
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
Loading...