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UCC21520EVM-286
User Manual
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Texas Instruments UCC21520EVM-286, UCC20520EVM286, UCC21530EVM286, UCC21521CEVM-286 User Manual

Using the UCC21520EVM-286, UCC20520EVM­286, UCC21521CEVM-286, and UCC21530EVM­286
User's Guide
Literature Number: SLUUBG8B
June 2016–Revised November 2018
Contents
1 Trademarks......................................................................................................................... 4
2 Introduction......................................................................................................................... 4
3 Description.......................................................................................................................... 4
3.1 Features................................................................................................................... 5
3.2 I/O Description............................................................................................................ 5
3.3 Jumpers (Shunt) Setting ................................................................................................ 6
4 Electrical Specifications........................................................................................................ 6
5 Test Summary ..................................................................................................................... 7
5.1 Definitions................................................................................................................. 7
5.2 Equipment................................................................................................................. 7
5.3 Equipment Setup......................................................................................................... 7
6 Power-Up and Power-Down Procedure ................................................................................. 10
6.1 Power Up ................................................................................................................ 10
6.2 Power Down............................................................................................................. 10
7 Test Waveforms (C
7.1 DT Connected to VCCI(J-DT Option B in ).......................................................................... 11
7.2 DT Pin Floating or Left Open (J-DT Option A in ).................................................................. 11
7.3 DT Pin Connected to RDT (J-DT Option C in )..................................................................... 12
8 Schematic ......................................................................................................................... 13
9 Layout Diagrams ................................................................................................................ 14
10 List of Materials ................................................................................................................. 16
Revision History.......................................................................................................................... 17
=0pF) With Different DT Configurations .................................................... 11
L
2

Table of Contents

Copyright © 2016–2018, Texas Instruments Incorporated
SLUUBG8B–June 2016–Revised November 2018
www.ti.com
1 Jumpers Installation Position............................................................................................... 8
2 Bench Setup Diagram and Configuration................................................................................. 9
3 Example Input and Output Waveforms (Channels 3 and 4 are PWM Inputs, Channels 1 and 2 are Outputs) 10 4 Overlap is Allowed When DT Connected to VCCI (Channels 3 and 4 are PWM Inputs, Channels 1 and 2
5 Test Waveforms if DT is Left Open (Channel 3 and 4 are PWM Inputs, and Channel 1 and 2 are Driver
6 Test Waveforms if DT Connected to RDT(Channel 3 and 4 is PWM Inputs, and Channel 1 and 2 is Driver
7 UCC21520EVM-286 Schematic.......................................................................................... 13
8 Top Overlay................................................................................................................. 14
9 Top Layer.................................................................................................................... 14
10 Bottom Layer................................................................................................................ 15
11 Bottom Overlay ............................................................................................................. 15
1 Jumpers Setting.............................................................................................................. 5
2 Jumpers Setting.............................................................................................................. 6
3 UCC2x5xxEVM-286 Electrical Specifications............................................................................ 6
4 Two-Channel Function Generator Settings............................................................................... 8
5 Oscilloscope Settings ....................................................................................................... 8
6 UCC2x5xxEVM-286 List of Materials.................................................................................... 16
List of Figures
are Driver Outputs) ........................................................................................................ 11
Outputs) ..................................................................................................................... 11
Outputs) ..................................................................................................................... 12
List of Tables
SLUUBG8B–June 2016–Revised November 2018
Copyright © 2016–2018, Texas Instruments Incorporated
List of Figures
3
User's Guide
SLUUBG8B–June 2016–Revised November 2018
Using the UCC21520EVM-286, UCC20520EVM-286,
UCC21521CEVM-286, and UCC21530EVM-286
UCC2x5xxEVM-286 evaluation modules are designed for evaluation of TI's 5.7-kV channel gate driver family with 4-A source and 6-A sink peak current for driving Si MOSFETs, IGBTs and WBG devices such as SiC and GaN transistors. This user's guide covers the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286, and UCC21530EVM-286 used to evaluate the UCC21520DW, UCC20520DW, UCC21521CDW, and UCC21530DWK, respectively. To evaluate other Iso-Drivers in the UCC2x5xx family, TI recommends that the user read the data sheet thoroughly before switching the part in the EVMs covered by this user guide. In this user guide, the UCC21520EVM-286 evaluation module is shown as the primary example, and the key differences between the UCC21520EVM-286 and the UCC20520EVM-286, UCC21521CEVM-286, and UCC21530EVM-286 will be highlighted accordingly.
SPACER

1 Trademarks

All trademarks are the property of their respective owners.

2 Introduction

Developed for high voltage applications where isolation and reliability is required, the UCC2x5xx delivers reinforced isolation of 5.7 kV transient immunity (CMTI) greater than 100 V/ns. It has the industry’s fastest propagation delay of 19 ns and the tightest channel-to-channel delay matching of less than 5 ns to enable high-switching frequency, high-power density, and efficiency.
The flexible, universal capability of the UCC2x5xx with up to 18-V VCCI and 25-V VDDA/VDDB allows the device to be used as a low-side, high-side, high-side/low-side, or half-bridge drivers with dual PWM input or single PWM input. With its integrated components, advanced protection features (UVLO, dead time and enable/disable), and optimized switching performances, the UCC2x5xx enables designers to build smaller, more robust designs for enterprise, telecom, automotive, and industrial applications with a faster time to market.
isolated dual-
RMS
and a surge immunity tested up to 12.8 kV along with a common-mode
RMS

3 Description

The UCC2x5xx evaluation board has three independent screw terminal blocks for VCCI, VDDA, and VDDB. The 3-position headers with jumpers for all the key input signals, such as PWM INPUTs (INA, INB or PWM), dead time (DT) programming and enable/disable function (EN/DIS), allow designers to easily evaluate different protection functions. A variety of testing points also support most of the key feature probing of the UCC2x5xx. Moreover, the PCB layout is not only optimized with minimized loop area in each gate driver loop and power supply loop with bypassing capacitors, but the layout also supports high voltage test between the primary side and secondary side with 120-mil PCB board cutout. Importantly, the creepage distance between two output channels are maximized with bootstrap diode in footprint of TO252-2(DPAK), which facilitates high-voltage, half-bridge testing for a wide variety of power converter topologies. For detail device information, refer to UCC21520DW, UCC20520DW, UCC21521CDW and UCC21530DWK data sheets and TI's Isolated gate driver solutions.
4
Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286, and UCC21530EVM-286
SLUUBG8B–June 2016–Revised November 2018
Copyright © 2016–2018, Texas Instruments Incorporated
www.ti.com

3.1 Features

• Evaluation module for the UCC21520DW, UCC20520DW, and UCC21521CDW in a wide body SOIC­16 (DW), along with the UCC21530DWK in wide body SOIC-14 (DWK) package
• 3-V to 18-V VCCI power supply range, and up to 25-V VDDA/VDDB power supply range
• 4-A and 6-A source/sink current capability
• 5.7-kV
Isolation for 1 minute per UL 1577
RMS
• TTL/CMOS-compatible inputs
• Onboard trimmer potentiometer for dead-time programming
• 3-position header with for INA, INB, DT and enable/disable
• PCB layout optimized for power supply bypassing cap, gate driver loop
• PCB board cutout that facilitates high voltage isolation test between primary side and secondary side
• Maximized creepage distance between two output channels
• Support for half-bridge test with MOSFETs, IGBTs and SiC MOSFETs with connection to external power stage
• Testing points allows probing all the key pins of the UCC21520DW, UCC20520DW, UCC21521CDW, UCC21530DWK, and other wide-body ISO driver family parts.

3.2 I/O Description

Description
Table 1. Jumpers Setting
PINS DESCRIPTION
J1–1 VCCI positive input J1–2 VCCI negative input J2–1 VDDA negative input J2–2 Driver A output J2–3 VDDA positive input J3–1 VDDB negative input J3–2 Driver B output
J3–3 VDDB positive input J-INA-1 Primary ground J-INA-2 INA/PWM signal input J-INA-3 Primary VCC J-INB-1 Primary ground J-INB-2 INB signal input J-INB-3 Primary VCC
J-DIS-1 or J-DIS/EN-1 Primary VCC J-DIS-2 or J-DIS/EN-2 Enable/Disable signal input J-DIS-3 or J-DIS/EN-3 Primary ground
J-DT-1 Primary VCC J-DT-2 Dead-time programming pin J-DT-3 Connects to trimmer potentiometer
SLUUBG8B–June 2016–Revised November 2018
Copyright © 2016–2018, Texas Instruments Incorporated
Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286,
and UCC21530EVM-286
5
Description

3.3 Jumpers (Shunt) Setting

JACK Jumper Setting Options FACTORY SETTING
Jumper not installed, INA/PWM signal provided by external signal and this pin is default low if left open
Jumper not installed, INB signal provided by external signal and this pin is default low if left open
enable/disable pin
Jumper on J-DT-2 and J-DT-1 allows driver output overlap or driver output follows PWM input for UCC21520EVM and UCC21521CEVM. The dead time will be around 0 ns in this option for UCC20520EVM
Jumper on J-DT-2 and J-DT-3 set the dead time by DT (in ns) = RDT(in kΩ) × 10. For better noise immunity and dead-time matching, TI recommends to parallel a 2.2-nF or above bypassing capacitor from DT pin to GND.
J-INA
J-INB
J-DIS or J-
DIS/EN
J-DT
Option A:
Option B: Jumper on J-INA-2 and J-INA-1 set INA low
Option C: Jumper on J-INA-2 and J-INA-3 set INA high
Option A:
Option B: Jumper on J-INB-2 and J-INB-1 set INB low
Option C: Jumper on J-INB-2 and J-INB-3 set INB high
Option D: Header J-INB is not installed, and no connection on the device under test
Option A: Jumper not installed, the devices under test are enabled when left open on
Option B: Jumper on J-DIS-2 and J-DIS-1 or J-DIS/EN-2 and J-DIS/EN-1
Option C: Jumper on J-DIS-2 and J-DIS-3 or J-DIS/EN-2 and J-DIS/EN-3
Option A: Jumper not installed, interlock with 8-ns dead time
Option B:
Option C:
www.ti.com
Table 2. Jumpers Setting
Option A
Option A for
UCC21520EVM-286,
UCC21521CEM-286 and
UCC21530EVM-286;
Option D for
UCC20520EVM-286
Option C for
UCC21520EVM-286 and
UCC20520EVM-286;
Option B for
UCC21521CEVM-286 and
UCC21530EVM-286
Option B

4 Electrical Specifications

Table 3. UCC2x5xxEVM-286 Electrical Specifications
DESCRIPTION MIN TYP MAX UNIT
V
CCI
V
DDA,VDDB
F
S
T
J
Primary-side power supply 3 18 V
Driver output power supply for UCC21520EVM-286 and
UCC20520EVM-286
Driver output power supply for UCC21521CEM-286 and
UCC21530EVM
Switching frequency 0 5 MHz
Operating junction temperature range –40 125 °C
9.2 25 V
14.7 25 V
6
Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286, and UCC21530EVM-286
Copyright © 2016–2018, Texas Instruments Incorporated
SLUUBG8B–June 2016–Revised November 2018
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