The UCC1800/1/2/3/4/5 family of high-speed, low-power integrated cir
cuits contain all of the control and drive components required for off-line
and DC-to-DC fixed frequency current-mode switching power supplies
with minimal parts count.
These devices have the same pin configuration as the UC1842/3/4/5
family, and also offer the added features of internal full-cycle soft start
and internal leading-edge blanking of the current-sense input.
The UCC1800/1/2/3/4/5 family offers a variety of package options, tem
Internal Leading-Edge Blanking of the
•
Current Sense Signal
1 Amp Totem-Pole Output
•
perature range options, choice of maximum duty cycle, and choice of
critical voltage levels. Lower reference parts such as the UCC1803 and
UCC1805 fit best into battery operated systems, while the higher refer
ence and the higher UVLO hysteresis of the UCC1802 and UCC1804
70ns Typical Response from
•
Current-Sense to Gate Drive Output
1.5% Tolerance Voltage Reference
•
• Same Pinout as UC3842 and
make these ideal choices for use in off-line power supplies.
The UCC180x series is specified for operation from –55
the UCC280x series is specified for operation from –40
the UCC380x series is specified for operation from 0
o
o
Cto+70oC.
UC3842A
Part NumberMaximum Duty CycleReference VoltageTurn-On ThresholdTurn-Off Threshold
Current (Note 2) .......................... 30.0mA
CC
OUT Current...................................±1.0A
OUT Energy (Capacitive Load) ................... 20.0µJ
Analog Inputs (FB, CS).................... –0.3Vto 6.3V
Power Dissipation at T
Power Dissipation at T
Power Dissipation at T
Storage Temperature Range.............
Lead Temperature (Soldering, 10 Seconds) ........ +300°C
Note 1: Values beyond which damage may occur. All voltages
are with respect to GND. All currents are positive into
the specified terminal. Consult Unitrode databook for
information regarding thermal specifications and limita
tions of packages.
Note 2: In normal operation V
limiting resistor. Absolute maximum of 12V applies
when V
that I
CC
does not exceed 30mA (which includes gate
CC
drive current requirement). The resistor should be
sized so that the V
tions is below 12V but above the turn off threshold.
COMP=2.0V; UCCx803/51.952.02.051.952.02.05
Input Bias Current
–11–11µA
Open Loop Voltage Gain60806080dB
COMP Sink CurrentFB=2.7V, COMP=1.1V0.33.50.42.5mA
COMP Source CurrentFB=1.8V, COMP=REF–1.2V–0.2–0.5–0.8–0.2–0.5–0.8mA
Gain Bandwidth Product(Note 9)22MHz
PWM Section
Maximum Duty CycleUCCx800/2/397991009799100%
UCCx801/4/5484950484950
Minimum Duty CycleCOMP=0V00%
Current Sense Section
Gain(Note 5)1.101.651.801.101.651.80V/V
Maximum Input SignalCOMP=5V (Note 6)0.91.01.10.91.01.1V
Input Bias Current
–200200–200200nA
CS Blank Time5010015050100150ns
Over-Current Threshold1.421.551.681.421.551.68V
COMP to CS OffsetCS=0V0.450.901.350.450.901.35V
Start to Stop HysteresisUCCx8000.120.30.480.120.30.48V
UCCx8011.622.41.622.4V
UCCx802/43.54.25.13.54.25.1V
UCCx803/50.20.50.80.20.50.8V
Soft Start Section
COMP Rise TimeFB=1.8V, Rise from 0.5V to REF–1V410410ms
Overall Section
Start-up CurrentV
< Start Threshold0.10.20.10.2mA
CC
Operating Supply CurrentFB=0V, CS=0V0.51.00.51.0mA
VCC Internal Zener VoltageI
VCC Internal Zener Voltage Minus
=10mA (Note 8), (Note 10)1213.5151213.515V
CC
UCCx802/4 (Note 8)0.51.00.51.0V
Start Threshold Voltage
Note 3: Adjust VCC above the start threshold before setting at 10V.
Note 4: Oscillator frequency for the UCCx800, UCCx802 and UCCx803 is the output frequency.
Oscillator frequency for the UCCx801, UCCx804 and UCCx805 is twice the output frequency.
Note 5: Gain is defined by:
COMP
A
=≤≤
V
∆
CS
VV
008.
CS
.
V
∆
Note 6: Parameter measured at trip point of latch with Pin 2 at 0V.
Note 7: Total Variation includes temperature stability and load regulation.
Note 8: Start Threshold, Stop Threshold and Zener Shunt Thresholds track one another.
Note 9: Guaranteed by design. Not 100% tested in production.
Note 10: The device is fully operating in clamp mode as the forcing current is higher than the normal operating supply current.
4
PIN DESCRIPTIONS
COMP: COMP is the output of the error amplifier and the
input of the PWM comparator.
Unlike other devices, the error amplifier in the UCC3800
family is a true, low output-impedance, 2MHz operational
amplifier. As such, the COMP terminal can both source
and sink current. However, the error amplifier is internally
current limited, so that you can command zero duty cycle
by externally forcing COMP to GND.
The UCC3800 family features built-in full cycle Soft Start.
Soft Start is implemented as a clamp on the maximum
COMP voltage.
CS: CS is the input to the current sense comparators.
The UCC3800 family has two different current sense
comparators: the PWM comparator and an over-current
comparator.
The UCC3800 family contains digital current sense filter
ing, which disconnects the CS terminal from the current
sense comparator during the 100ns interval immediately
following the rising edge of the OUT pin. This digital filtering, also called leading-edge blanking, means that in
most applications, no analog filtering (RC filter) is required on CS. Compared to an external RC filter technique, the leading-edge blanking provides a smaller
effective CS to OUT propagation delay. Note, however,
that the minimum non-zero On-Time of the OUT signal is
directly affected by the leading-edge-blanking and the CS
to OUT propagation delay.
The over-current comparator is only intended for fault
sensing, and exceeding the over-current threshold will
cause a soft start cycle.
FB: FB is the inverting input of the error amplifier. For
best stability, keep FB lead length as short as possible
and FB stray capacitance as small as possible.
GND: GND is reference ground and power ground for all
functions on this part.
OUT:OUT is the output of a high-current power driver ca
pable of driving the gate of a power MOSFET with peak
currents exceeding ± 750mA. OUT is actively held low
when V
The high-current power driver consists of FET output de
vices, which can switch all of the way to GND and all of
the way to V
low impedance to overshoot and undershoot. This means
that in many cases, external schottky clamp diodes are
not required.
RC: RC is the oscillator timing pin. For fixed frequency
operation, set timing capacitor charging current by con
necting a resistor from REF to RC. Set frequency by con
necting a timing capacitor from RC to GND. For best
performance, keep the timing capacitor lead to GND as
short and direct as possible. If possible, use separate
ground traces for the timing capacitor and all other func
tions.
The frequency of oscillation can be estimated with the
following equations:
UCCx800/1/2/4:
UCCx803, UCCx805:
where frequency is in Hz, resistance is in ohms, and ca
pacitance is in farads. The recommended range of timing
resistors is between 10k and 200k and timing capacitor is
100pF to 1000pF. Never use a timing resistor less than
10k.
To prevent noise problems, bypass VCC to GND with a
ceramic capacitor as close to the VCC pin as possible.
An electrolytic capacitor may also be used in addition to
the ceramic capacitor.
REF: REF is the voltage reference for the error amplifier
and also for many other functions on the IC. REF is also
used as the logic power supply for high speed switching
logic on the IC.
When V
is greater than 1V and less than the UVLO
CC
threshold, REF is pulled to ground through a 5k ohm resistor. This means that REF can be used as a logic output indicating power system status. It is important for
reference stability that REF is bypassed to GND with a
ceramic capacitor as close to the pin as possible. An
electrolytic capacitor may also be used in addition to the
ceramic capacitor. A minimum of 0.1µF ceramic is re
quired. Additional REF bypassing is required for external
loads greater than 2.5mA on the reference.
To prevent noise problems with high speed switching
transients, bypass REF to ground with a ceramic capaci
tor very close to the IC package.
VCC: V
is the power input connection for this device.
CC
In normal operation V
limiting resistor. Although quiescent V
-
low, total supply current will be higher, depending on
OUT current. Total V
current and the average OUT current. Knowing the
V
CC
operating frequency and the MOSFET gate charge (Qg),
average OUT current can be calculated from:
=×
IQF
OUTg
There should be a minimum of 1.0mF in parallel with a
-
0.1mF ceramic capacitor from V
-
.
close to the device
5
15.
F
=
RC
•
10.
F
=
RC
•
is powered through a current
CC
current is very
CC
current is the sum of quiescent
CC
to ground located
CC
-
-
-
-
The UCC3800/1/2/3/4/5 oscillator generates a sawtooth
waveform on RC. The rise time is set by the time constant
of R
T and CT. The fall time is set by CT and an internal tran
sistor on-resistance of approximately 125 . During the fall
time, the output is off and the maximum duty cycle is re
duced below 50% or 100% depending on the part number.
Larger timing capacitors increase the discharge time and re
duce the maximum duty cycle and frequency.
Figure 10. COMP to CS offset vs. temperature,
CS=0V.
8
PACKAGE OPTION ADDENDUM
www.ti.com
PACKAGING INFORMATION
Orderable DeviceStatus
5962-9451301MPAACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
5962-9451302MPAACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
5962-9451303MPAACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
5962-9451304MPAACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
5962-9451305MPAACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
5962-9451305VPAACTIVECDIPJG81TBDA42N / A for Pkg Type
UCC1800JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1800J883BACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1800L883BACTIVELCCCFK201TBDPOST-PLATE N / A for Pkg Type
UCC1801JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1801J883BACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1802JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1802J883BACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1803JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1803J883BACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1804JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1804J883BACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1805JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC1805J883BACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC2800DACTIVESOICD875Green (RoHS &
UCC2800DG4ACTIVESOICD875Green (RoHS &
UCC2800DTRACTIVESOICD82500 Green (RoHS &
UCC2800DTRG4ACTIVESOICD82500 Green (RoHS &
UCC2800NACTIVEPDIPP850Green (RoHS &
UCC2800NG4ACTIVEPDIPP850Green (RoHS &
UCC2800PWACTIVETSSOPPW8150 Green (RoHS &
UCC2800PWG4ACTIVETSSOPPW8150 Green (RoHS &
UCC2800PWTRACTIVETSSOPPW82000 Green (RoHS &
UCC2800PWTRG4ACTIVETSSOPPW82000 Green (RoHS &
UCC2801DACTIVESOICD875Green (RoHS &
UCC2801DG4ACTIVESOICD875Green (RoHS &
UCC2801DTRACTIVESOICD82500 Green (RoHS &
UCC2801DTRG4ACTIVESOICD82500 Green (RoHS &CU NIPDAULevel-1-260C-UNLIM
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAUN / A for Pkg Type
CU NIPDAUN / A for Pkg Type
CU NIPDAULevel-2-260C-1 YEAR
CU NIPDAULevel-2-260C-1 YEAR
Call TILevel-2-260C-1 YEAR
Call TILevel-2-260C-1 YEAR
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
10-Mar-2008
(3)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable DeviceStatus
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
no Sb/Br)
UCC2801NACTIVEPDIPP850Green (RoHS &
CU NIPDAUN / A for Pkg Type
no Sb/Br)
UCC2801NG4ACTIVEPDIPP850Green (RoHS &
CU NIPDAUN / A for Pkg Type
no Sb/Br)
UCC2801PWACTIVETSSOPPW8150 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2801PWG4ACTIVETSSOPPW8150 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2801PWTRG4ACTIVETSSOPPW8TBDCall TICall TI
UCC2802DACTIVESOICD875Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2802DG4ACTIVESOICD875Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2802DTRACTIVESOICD82500 Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2802DTRG4ACTIVESOICD82500 Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2802JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC2802NACTIVEPDIPP850Green (RoHS &
CU NIPDAUN / A for Pkg Type
no Sb/Br)
UCC2802NG4ACTIVEPDIPP850Green (RoHS &
CU NIPDAUN / A for Pkg Type
no Sb/Br)
UCC2802PWACTIVETSSOPPW8150 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2802PWG4ACTIVETSSOPPW8150 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2802PWTRG4ACTIVETSSOPPW8TBDCall TICall TI
UCC2803DACTIVESOICD875Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2803DG4ACTIVESOICD875Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2803DTRACTIVESOICD82500 Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2803DTRG4ACTIVESOICD82500 Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
UCC2803JACTIVECDIPJG81TBDA42 SNPBN / A for Pkg Type
UCC2803NACTIVEPDIPP850Green (RoHS &
CU NIPDAUN / A for Pkg Type
no Sb/Br)
UCC2803NG4ACTIVEPDIPP850Green (RoHS &
CU NIPDAUN / A for Pkg Type
no Sb/Br)
UCC2803PWACTIVETSSOPPW8150 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2803PWG4ACTIVETSSOPPW8150 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2803PWTRACTIVETSSOPPW82000 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2803PWTRG4ACTIVETSSOPPW82000 Green (RoHS &
CU NIPDAULevel-2-260C-1 YEAR
no Sb/Br)
UCC2804DACTIVESOICD875Green (RoHS &
CU NIPDAULevel-1-260C-UNLIM
no Sb/Br)
10-Mar-2008
(3)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable DeviceStatus
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
UCC2804D/70021OBSOLETESOICD8TBDCall TICall TI
UCC2804D/81221ACTIVESOICD875Green (RoHS &
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
4040064/F 01/97
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
19
20
21
22
23
24
25
1282627
12
131415161817
0.020 (0,51)
0.010 (0,25)
MIN
0.342
(8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307
(7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850
(21,6)
1.047
(26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358
(9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858
(21,8)
1.063
(27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
0.021 (0,53)
0.015 (0,38)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
4
0.070 (1,78) MAX
0.020 (0,51) MIN
0.200 (5,08) MAX
0.125 (3,18) MIN
0.100 (2,54)
0.010 (0,25)
Seating Plane
M
0.325 (8,26)
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.010 (0,25) NOM
0.430 (10,92)
MAX
4040082/D 05/98
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
0.063 (1,60)
0.015 (0,38)
0.100 (2,54)
8
1
5
4
0.065 (1,65)
0.045 (1,14)
0.020 (0,51) MIN
0.023 (0,58)
0.015 (0,38)
0.280 (7,11)
0.245 (6,22)
0.310 (7,87)
0.290 (7,37)
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0°–15°
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8