Texas Instruments TPS61030PWP, TPS61030RSAR, TPS61031PWP, TPS61031RSAR, TPS61032PWP Schematic [ru]
...
SW
C1
10 µF
L1
6.8 µH
R1
R2
VBAT
VOUT
FB
C2
2.2 µFC3220 µF
LBO
PGND
LBI
SYNC
EN
GND
TPS6103x
e.g. 5 V up to
1000 mA
Low Battery
Comparator
Output
R3
R4
R6
1.8 V to 5 V
Input
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SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
TPS6103x 96% Efficient Synchronous Boost Converter With 4A Switch
1 Features 3 Description
1
• 96% Efficient Synchronous Boost Converter With
1000-mA Output Current
From 1.8-V Input
• Device Quiescent Current: 20-µA (Typ)
• Input Voltage Range: 1.8-V to 5.5-V
• Fixed and Adjustable Output Voltage Options Up
to 5.5-V
• Power Save Mode for Improved Efficiency at Low
Output Power
• Low Battery Comparator
• Low EMI-Converter (Integrated Antiringing Switch)
• Load Disconnect During Shutdown
• Over-Temperature Protection
• Available in a Small 4 mm x 4 mm QFN-16 or in a
TSSOP-16 Package
2 Applications
All Single Cell Li or Dual Cell Battery Operated
Products as MP-3 Player, PDAs, and Other
Portable Equipment
The TPS6103x devices provide a power supply
solution for products powered by either a one-cell LiIon or Li-polymer, or a two to three-cell alkaline, NiCd
or NiMH battery. The converter generates a stable
output voltage that is either adjusted by an external
resistor divider or fixed internally on the chip. It
provides high efficient power conversion and is
capable of delivering output currents up to 1 A at 5 V
at a supply voltage down to 1.8 V. The implemented
boost converter is based on a fixed frequency, pulsewidth- modulation (PWM) controller using a
synchronous rectifier to obtain maximum efficiency.
At low load currents the converter enters Power Save
mode to maintain a high efficiency over a wide load
current range. The Power Save mode can be
disabled, forcing the converter to operate at a fixed
switching frequency. It can also operate synchronized
to an external clock signal that is applied to the
SYNC pin. The maximum peak current in the boost
switch is limited to a value of 4500 mA.
The converter can be disabled to minimize battery
drain. During shutdown, the load is completely
disconnected from the battery. A low-EMI mode is
implemented to reduce ringing and, in effect, lower
radiated electromagnetic energy when the converter
enters the discontinuous conduction mode.
TPS61030,TPS61031,TPS61032
4 Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS61030
TPS61031 TSSOP (16) 5.00 mm × 4.40 mm
TPS61032
TPS61030
TPS61031 QFN (16) 4.00 mm x 4.00 mm
TPS61032
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
(1)
TPS61030,TPS61031,TPS61032
SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
www.ti.com
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Device Comparison Table..................................... 3
7 Pin Configuration and Functions......................... 3
8 Specifications......................................................... 4
8.1 Absolute Maximum Ratings ...................................... 4
8.2 ESD Ratings ............................................................ 4
8.3 Recommended Operating Conditions....................... 4
8.4 Thermal Information.................................................. 4
8.5 Electrical Characteristics........................................... 5
8.6 Typical Characteristics.............................................. 6
9 Parameter Measurement Information .................. 8
10 Detailed Description ............................................. 9
10.1 Overview................................................................. 9
10.2 Functional Block Diagram....................................... 9
10.3 Feature Description............................................... 10
10.4 Device Functional Modes...................................... 10
11 Application and Implementation........................ 12
11.1 Application Information.......................................... 12
11.2 Typical Application ............................................... 12
12 Power Supply Recommendations ..................... 18
13 Layout................................................................... 18
13.1 Layout Considerations .......................................... 18
13.2 Layout Example .................................................... 18
13.3 Thermal Considerations........................................ 18
14 Device and Documentation Support ................. 19
14.1 Device Support...................................................... 19
14.2 Related Links ........................................................ 19
14.3 Trademarks........................................................... 19
14.4 Electrostatic Discharge Caution............................ 19
14.5 Glossary................................................................ 19
15 Mechanical, Packaging, and Orderable
Information........................................................... 19
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (October 2014) to Revision G Page
• Moved T
spec to the Absolute Maximum Ratings table. Changed Handling Ratings to ESD Ratings............................... 4
stg
• Added System Examples .................................................................................................................................................... 16
Changes from Revision E (January 2012) to Revision F Page
• Added Device Information and Handling Rating tables, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
Changes from Revision D (April 2004) to Revision E Page
• Changed the temperature range From: 40°C to 85°C To: -40°C to 85°C.............................................................................. 3
2 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS61030 TPS61031 TPS61032
NC
SW
SW
LBI
LBO
VOUT
SYNC
EN
VBAT
VOUT
VOUT
FB
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SW
SW
VBAT
LBI
SYNC
NC
VOUT
VOUT
VOUT
FB
GND
LBO
EN
NC − No internal connection
PowerPAD
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TPS61030,TPS61031,TPS61032
SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
DC/DC
(1)
PACKAGE PART NUMBER
6 Device Comparison Table
T
A
-40°C to 85°C
(1) Contact the factory to check availability of other fixed output voltage versions.
(1) For all available packages, see the orderable addendum at the end of the datasheet.
OUTPUT VOLTAGE
Adjustable TPS61030
3.3 V 16-Pin TSSOP PowerPAD™ TPS61031
5 V TPS61032
Adjustable TPS61030
3.3 V 16-Pin QFN TPS61031
5 V TPS61032
7 Pin Configuration and Functions
PWP Package
16-Pins
Top View
(1)
RSA Package
16-Pins
Top View
Pin Functions
PIN
NAME
EN 9 11 I Enable input. (1/VBAT enabled, 0/GND disabled)
FB 12 14 I Voltage feedback of adjustable versions
GND 11 13 I/O Control/logic ground
LBI 7 9 I Low battery comparator input (comparator enabled with EN)
LBO 10 12 O Low battery comparator output (open drain)
NC 16 2 Not connected
PGND 3, 4, 5 5, 6, 7 I/O Power ground
PowerPAD™ Must be soldered to achieve appropriate power dissipation. Should be connected to
SYNC 8 10 I Enable/disable power save mode (1/VBAT disabled, 0/GND enabled, clock signal for
SW 1, 2 3, 4 I Boost and rectifying switch input
VBAT 6 8 I Supply voltage
VOUT 13, 14, 15 1, 15, 16 O DC/DC output
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
NO. I/O DESCRIPTION
PWP RSA
PGND.
synchronization)
Product Folder Links: TPS61030 TPS61031 TPS61032
TPS61030,TPS61031,TPS61032
SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
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8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VIInput voltage on LBI –0.3 3.6 V
Input voltage on SW, VOUT, LBO, VBAT, SYNC, EN, FB –0.3 7 V
TJMaximum junction temperature –40 150
T
Storage temperature range –65 150
stg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
8.2 ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all –2000 2000
(1)
V
Electrostatic discharge V
(ESD)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
pins
Charged device model (CDM), per JEDEC specification JESD22- –1000 1000
C101, all pins
(2)
(1)
MIN MAX UNIT
°C
MIN MAX UNIT
8.3 Recommended Operating Conditions
MIN NOM MAX UNIT
V
T
T
Supply voltage at VBAT 1.8 5.5 V
I
Operating ambient temperature range -40 85 °C
A
Operating virtual junction temperature range -40 125 °C
J
8.4 Thermal Information
TPS6103x
THERMAL METRIC
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
Junction-to-ambient thermal resistance 46.9 35.5
Junction-to-case (top) thermal resistance 25.8 36.7
Junction-to-board thermal resistance 19.4 12.9
Junction-to-top characterization parameter 0.8 0.5
Junction-to-board characterization parameter 19.3 12.9
Junction-to-case (bottom) thermal resistance 2.2 3.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(1)
PWP RSA UNIT
16 PINS 16 PINS
°C/W
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Product Folder Links: TPS61030 TPS61031 TPS61032
TPS61030,TPS61031,TPS61032
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SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
8.5 Electrical Characteristics
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC/DC STAGE
V
Input voltage range 1.8 5.5 V
I
V
TPS61030 output voltage range 1.8 5.5 V
O
V
TPS61030 feedback voltage 490 500 510 mV
FB
f Oscillator frequency 500 600 700 kHz
Frequency range for synchronization 500 700 kHz
Switch current limit VOUT= 5 V 3600 4000 4500 mA
Start-up current limit 0.4 x I
SW
SWN switch on resistance VOUT= 5 V 55 mΩ
SWP switch on resistance VOUT= 5 V 55 mΩ
Total accuracy -3% 3%
Line regulation 0.6%
Load regulation 0.6%
VBAT 10 25 µA
Quiescent current
VOUT 10 20 µA
IO= 0 mA, VEN= VBAT = 1.8 V,
VOUT =5 V
IO= 0 mA, VEN= VBAT = 1.8 V,
VOUT = 5 V
Shutdown current VEN= 0 V, VBAT = 2.4 V 0.1 1 µA
CONTROL STAGE
V
Under voltage lockout threshold V
UVLO
V
LBI voltage threshold V
IL
voltage decreasing 1.5 V
LBI
voltage decreasing 490 500 510 mV
LBI
LBI input hysteresis 10 mV
LBI input current EN = VBAT or GND 0.01 0.1 µA
LBO output low voltage VO= 3.3 V, IOI= 100 µA 0.04 0.4 V
LBO output low current 100 µA
LBO output leakage current V
V
EN, SYNC input low voltage 0.2 × VBAT V
IL
V
EN, SYNC input high voltage 0.8 × VBAT V
IH
= 7 V 0.01 0.1 µA
LBO
EN, SYNC input current Clamped on GND or VBAT 0.01 0.1 µA
Overtemperature protection 140 °C
Overtemperature hysteresis 20 °C
mA
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Product Folder Links: TPS61030 TPS61031 TPS61032
0
0.5
1
1.5
2
2.5
3
3.5
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
V
- Input Voltage - V
Maximum Output Current
- A
0
0.5
1
1.5
2
2.5
3
3.5
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
V
- Input Voltage - V
Maximum Output Current
- A
TPS61030,TPS61031,TPS61032
SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
www.ti.com
8.6 Typical Characteristics
Table 1. Table Of Graphs
DC/DC CONVERTER FIGURE
Maximum output current vs Input voltage
vs Output current (TPS61030) (VO= 2.5 V, VI= 1.8 V, VSYNC = 0 V) Figure 3
vs Output current (TPS61031) (VO= 3.3 V, VI= 1.8 V, 2.4 V, VSYNC = 0 V) Figure 4
Efficiency vs Output current (TPS61032) (VO= 5.0 V, VI= 2.4 V, 3.3 V, VSYNC = 0 V) Figure 5
vs Input voltage (TPS61031) (IO= 10 mA, 100 mA, 1000 mA, VSYNC = 0 V) Figure 6
vs Input voltage (TPS61032) (IO= 10 mA, 100 mA, 1000 mA, VSYNC = 0 V) Figure 7
Output voltage
vs Output current (TPS61031) (VI= 2.4 V) Figure 8
vs Output current (TPS61032) (VI= 3.3 V) Figure 9
No-load supply current into VBAT vs Input voltage (TPS61032) Figure 10
No-load supply current into VOUT vs Input voltage (TPS61032) Figure 11
Minimum Load Resistance at
Startup
vs Input voltage (TPS61032) Figure 12
Figure 1,
Figure 2
Figure 1. TPS61031 Maximum Output Current Figure 2. TPS61032 Maximum Output Current
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vs Input Voltage vs Input Voltage
Product Folder Links: TPS61030 TPS61031 TPS61032
50
55
60
65
70
75
80
85
90
95
100
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
Efficiency
- %
VI- Input Voltage - V
IO= 100 mA
IO= 10 mA
IO= 1000 mA
3.2
3.25
3.3
3.35
3.4
1 10 100 1000 10000
- Output V
oltage
- V
IO- Output Current - mA
V
O
50
80
90
100
Efficiency
- %
VI- Input Voltage - V
IO= 10 mA
IO= 100 mA
1.8 2 2.6 2.8 32.2 2.4 3.2
60
IO= 1000 mA
70
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000 10000
V
BAT
= 3.3 V
V
BAT
= 2.4 V
Efficiency
- %
IO- Output Current - mA
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000 10000
Efficiency
- %
IO- Output Current - mA
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000 10000
V
BAT
= 2.4 V
V
BAT
= 1.8 V
Efficiency
- %
IO- Output Current - mA
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TPS61030,TPS61031,TPS61032
SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
VO= 2.5 V VI= 1.8 V
Figure 3. TPS61030 Efficiency vs Output Current
VO= 5 V
Figure 5. Tps61032 Efficiency vs Output Current
VO= 3.3 V
Figure 4. TPS61031 Efficiency vs Output Current
Figure 6. TPS61031 Efficiency vs Input Voltage
Figure 7. TPS61032 Efficiency vs Input Voltage Figure 8. TPS61031 Output Voltage vs Output Current
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 7
VBAT = 2.4 V
Product Folder Links: TPS61030 TPS61031 TPS61032
SW
C1
10 µF
Power
Supply
L1
6.8 µH
R1
R2
VBAT
VOUT
FB
C2
2.2 µFC3220 µF
LBO
PGND
LBI
SYNC
EN
GND
TPS6103x
V
CC
Boost Output
Control Output
R3
R4
R6
0
2
4
6
8
10
12
14
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
V
- Input Voltage - V
Minimum Load Resistance at Startup
-
Ω
0
2
4
6
8
10
12
14
2 3 4 5
VI- Input Voltage - V
–40 C°
85 C°
25 C°
µA
No-Load Supply Current Into VOUT
-
4.8
4.85
4.9
4.95
5
5.05
5.1
5.15
5.2
1 10 100 1000 10000
- Output V
oltage
- V
IO- Output Current - mA
V
O
0
2
4
6
8
10
12
14
16
2 3 4 5
VI- Input Voltage - V
–40 C°
85 C°
25 C°
µA
No-Load Supply Current Into VBA
T -
TPS61030,TPS61031,TPS61032
SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
VBAT = 3.3 V
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Figure 9. TPS61032 Output Voltage
vs Output Current
Figure 11. TPS61032 No-Load Supply Current Into Vout
vs Input Voltage
9 Parameter Measurement Information
Figure 10. TPS61032 No-Load Supply Current into Vbat
vs input Voltage
Figure 12. Minimum Load Resistance at Start-Up
vs Input Voltage
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Product Folder Links: TPS61030 TPS61031 TPS61032
Anti-
Ringing
Gate
Control
PGND
Regulator
PGND
Control Logic
Oscillator
Temperature
Control
VOUT
PGND
FB
SW
VBAT
EN
SYNC
GND
LBI
LBO
_
+
100 kW
10 pF
_
+
V
REF
= 0.5 V
GND
Error Amplifier
_
+
_
+
GND
V
REF
= 0.5 V
Low Battery Comparator
TPS61030,TPS61031,TPS61032
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SLUS534G –SEPTEMBER 2002–REVISED MARCH 2015
10 Detailed Description
10.1 Overview
The TPS6103x synchronous step-up converter typically operates at a 600 kHz frequency pulse width modulation
(PWM) at moderate to heavy load currents. The converter enters Power Save mode at low load currents to
maintain a high efficiency over a wide load. The Power Save mode can also be disabled, forcing the converter to
operate at a fixed switching frequency. The TPS6103x family is based on a fixed frequency with multiple feed
forward controller topology. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored
and forwarded to the regulator. The peak current of the NMOS switch is also sensed to limit the maximum
current flowing through the switch and the inductor. It can also operate synchronized to an external clock signal
that is applied to the SYNC pin. Additionally, TPS6103x integrated the low-battery detector circuit typically used
to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set
threshold voltage.
10.2 Functional Block Diagram
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TPS61030,TPS61031,TPS61032
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10.3 Feature Description
10.3.1 Controller Circuit
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 4000 mA. An internal temperature sensor prevents the device
from getting overheated in case of excessive power dissipation.
10.3.2 Synchronous Rectifier
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In
conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in
shutdown and allows current flowing from the battery to the output. This device however uses a special circuit
which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when
the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of
the converter. No additional components have to be added to the design to make sure that the battery is
disconnected from the output of the converter.
10.4 Device Functional Modes
10.4.1 Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is
switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This
also means that the output voltage can drop below the input voltage during shutdown. During start-up of the
converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the
battery.
10.4.1.1 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than
approximately 1.6 V. When in operation and the battery is being discharged, the device automatically enters the
shutdown mode if the voltage on VBAT drops below approximately 1.6 V. This undervoltage lockout function is
implemented in order to prevent the malfunctioning of the converter.
10.4.2 Softstart
When the device enables the internal start-up cycle starts with the first step, the precharge phase. During
precharge, the rectifying switch is turned on until the output capacitor is charged to a value close to the input
voltage. The rectifying switch current is limited in that phase. This also limits the output current under short-circuit
conditions at the output. After charging the output capacitor to the input voltage the device starts switching. Until
the output voltage is reached, the boost switch current limit is set to 40% of its nominal value to avoid high peak
currents at the battery during startup. When the output voltage is reached, the regulator takes control and the
switch current limit is set back to 100%.
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