TEXAS INSTRUMENTS TPS2046, TPS2056 Technical data

MAXIMUM CONTINUOUS

SHORT-CIRCUIT CURRENT

TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

features

D

135-mΩ -Maximum (5-V Input) High-Side
MOSFET Switch

D

250 mA Continuous Current per Channel

D

Independent Short-Circuit and Thermal
Protection With Overcurrent Logic Output

D

Operating Range . . . 2.7-V to 5.5-V

D

Logic-Level Enable Input

D

2.5-ms Typical Rise Time

D

Undervoltage Lockout

D

10 µA Maximum Standby Supply Current

D

Bidirectional Switch

D

Available in 8-pin SOIC and PDIP Packages

D

Ambient Temperature Range, –40°C to 85°C

D

2-kV Human-Body-Model, 200-V
Machine-Model ESD Protection

typical applications

D

Notebook, Desktop and Palmtop PCs

D

Monitors, Keyboards, Scanners, and
Printers

D

Digital Cameras, Phones, and PBXs

D

Hot-Insertion Applications

TPS2046

D OR P PACKAGE

(TOP VIEW)

GND

IN
EN1
EN2

1
2
3
4

8
7
6
5

OC1
OUT1
OUT2
OC2

GND

EN1
EN2

TPS2056

D OR P PACKAGE

(TOP VIEW)

1

IN

2
3
4

description

The TPS2046 and TPS2056 dual power-distribution switches are intended for applications where heavy
capacitive loads and short circuits are likely. These devices incorporate in single packages two 135-mΩ
N-channel MOSFET high-side power switches for power-distribution systems that require multiple power
switches. Each switch is controlled by a logic enable compatible with 5-V and 3-V logic. Gate drive is provided
by an internal charge pump that controls the power-switch rise times and fall times to minimize current surges
during switching. The charge pump requires no external components and allows operation from supplies as low
as 2.7 V.

8
7
6
5

OC1
OUT1
OUT2
OC2

When the output load exceeds the current-limit threshold or a short is present, the TPS2046 and TPS2056 limit
the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx
output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch
causing the junction temperature to rise, a thermal protection circuit shuts off the switch in overcurrent to prevent
damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal
circuitry ensures the switch remains off until valid input voltage is present.

The TPS2046 and TPS2056 are designed to limit at 0.44-A load. These power distribution switches, available
in 8-pin small-outline integrated circuit (SOIC) and 8-pin plastic dual-in-line packages (PDIP), operate over an
ambient temperature range of –40°C to 85°C.

AVAILABLE OPTIONS

T

A

–40°C to 85°C Active low 0.25 0.44 TPS2046D TPS2046P
–40°C to 85°C Active high 0.25 0.44 TPS2056D TPS2056P

†

The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2046DR)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

ENABLE

RECOMMENDED

LOAD CURRENT

(A)

TYPICAL

LIMIT AT 25°C

(A)

PACKAGED DEVICES

SOIC

†

(D)

Copyright  1999, Texas Instruments Incorporated

PDIP

(P)

) logic

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

TPS2046, TPS2056

I/O

DESCRIPTION

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

TPS2046 functional block diagram

OC1

†

Current sense

GND

EN1

EN2

Thermal

Sense

Driver

Charge

Pump

UVLO

Power Switch

IN

Charge

Pump

Driver

Thermal

Sense

Current

Limit

CS

CS

Current

Limit

†

OUT1

†

OUT2

OC2

Terminal Functions

TERMINAL

NO.

NAME

EN1 3 – I Enable input. Logic low turns on power switch, IN-OUT1.
EN2 4 – I Enable input. Logic low turns on power switch, IN-OUT2.
EN1 – 3 I Enable input. Logic high turns on power switch, IN-OUT1.
EN2 – 4 I Enable input. Logic high turns on power switch, IN-OUT2.
GND 1 1 I Ground
IN 2 2 I Input voltage
OC1 8 8 O Overcurrent. Logic output active low, for power switch, IN-OUT1
OC2 5 5 O Overcurrent. Logic output active low, for power switch, IN-OUT2
OUT1 7 7 O Power-switch output
OUT2 6 6 O Power-switch output

D OR P

TPS2046 TPS2056

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

detailed description

power switch

TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (V
Configured as a high-side switch, the power switch prevents current flow from OUTx to IN and IN to OUTx when
disabled. The power switch can supply a minimum of 250 mA per switch.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.

driver

The driver controls the gate voltage of the power switch. T o limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.

enable (ENx or ENx)

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current to less than 10 µA when a logic high is present on ENx (TPS2046) or a logic low is present
on ENx (TPS2056). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.

overcurrent (OCx)

The OCx
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.

current sense

open-drain output is asserted (active low) when an overcurrent or overtemperature condition is

I(IN)

= 5 V).

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant current mode and holds the current constant
while varying the voltage on the load.

thermal sense

The TPS2046 and TPS2056 implement a dual-threshold thermal trip to allow fully independent operation of the
power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When
the die temperature rises to approximately 140°C, the internal thermal sense circuitry checks to determine which
power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting
operation of the adjacent power switches. Hysteresis is built into the thermal sense, and after the device has
cooled approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the
fault is removed. The (OCx
occurs.

undervoltage lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V , a control
signal turns off the power switch.

) open-drain output is asserted (active low) when overtemperature or overcurrent

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TPS2046, TPS2056

UNIT

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range, V
Output voltage range, V
Input voltage range, V
Continuous output current, I

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T
Storage temperature range, T

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . .

Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C 2 kV. . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

PACKAGE

D 725 mW 5.8 mW/°C 464 mW 377 mW
P 1175 mW 9.4 mW/°C 752 mW 611 mW

(see Note1) –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(IN)

O(OUTx)

I(ENx)

(see Note1) –0.3 V to V

or V

I(ENx)

O(OUTx)

J

stg

Machine model 0.2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DISSIPATION RATING TABLE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(IN)

–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

recommended operating conditions

TPS2046 TPS2056

MIN MAX MIN MAX

Input voltage, V
Input voltage, V
Continuous output current, I
Operating virtual junction temperature, T

I(IN)
I(ENx

or V

)

I(ENx)

O(OUTx)

J

2.7 5.5 2.7 5.5 V
0 5.5 0 5.5 V
0 250 0 250 mA

–40 125 –40 125 °C

†

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

†

UNIT

r

trRise time, output

ms

tfFall time, output

ms

PARAMETER

TEST CONDITIONS

UNIT

VILLow-level input voltage

IIInput current

A

PARAMETER

TEST CONDITIONS

†

UNIT

TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

electrical characteristics over recommended operating junction temperature range, V

= rated current, V

I

O

I(ENx)

= 0 V, V

= Hi (unless otherwise noted)

I(ENx)

I(IN)

= 5.5 V,

power switch

TPS2046 TPS2056

MIN TYP MAX MIN TYP MAX

V

= 5 V,

I(IN)

IO = 0.1 A

Static drain-source on-state
resistance, 5-V operation

DS(on)

Static drain-source on-state
resistance, 3.3-V operation

p

p

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

V

= 5 V,

I(IN)

IO = 0.1 A
V

= 5 V,

I(IN)

IO = 0.1 A
V

= 3.3 V,

I(IN)

IO = 0.1 A
V

= 3.3 V,

I(IN)

IO = 0.1 A
V

= 3.3 V,

I(IN)

IO = 0.1 A
V

= 5.5 V,

I(IN)

CL = 1 µF,
V

= 2.7 V,

I(IN)

CL = 1 µF,
V

= 5.5 V,

I(IN)

CL = 1 µF,
V

= 2.7 V,

I(IN)

CL = 1 µF,

TJ = 25°C,

TJ = 85°C,

TJ = 125°C,

TJ = 25°C,

TJ = 85°C,

TJ = 125°C,

TJ = 25°C,
RL = 20 Ω

TJ = 25°C,
RL = 20 Ω

TJ = 25°C,
RL = 20 Ω

TJ = 25°C,
RL = 20 Ω

80 95 80 95

90 120 90 120

100 135 100 135

85 105 85 105

100 135 100 135

115 150 115 150

2.5 2.5

3 3

4.4 4.4

2.5 2.5

mΩ

enable input ENx or ENx

TPS2046 TPS2056

MIN TYP MAX MIN TYP MAX

V

High-level input voltage 2.7 V ≤ V

IH

p

p

t

Turn-on time CL = 100 µF, RL = 20 Ω 20 20 ms

on

t

Turn-off time CL = 100 µF, RL = 20 Ω 40 40

off

TPS2046 V
TPS2056 V

4.5 V ≤ V

2.7 V≤ V
I(ENx

I(ENx)

≤ 5.5 V 2 2 V

I(IN)

≤ 5.5 V 0.8 0.8 V

I(IN)

≤ 4.5 V 0.4 0.4

I(IN)

= 0 V or V

)

= V

I(IN)

I(ENx)

or V

= V

I(IN)

= 0 V –0.5 0.5

I(ENx)

–0.5 0.5

µ

current limit

TPS2046 TPS2056

MIN TYP MAX MIN TYP MAX

V

= 5 V, OUT connected to GND,

I

Short-circuit output current

OS

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

I(IN)

Device enable into short circuit.

0.345 0.44 0.525 0.345 0.44 0.525 A

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

TPS2046, TPS2056

TEST CONDITIONS

UNIT

Su ly

TPS2046

,

A

V

V

TPS2056

Su ly

V

V

TPS2046

,

A

V

V

TPS2056

g

d

A

leak

g

T

25°C

A

PARAMETER

TEST CONDITIONS

UNIT

PARAMETER

TEST CONDITIONS

UNIT

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

electrical characteristics over recommended operating junction temperature range, V

= rated current, V

I

O

I(ENx)

= 0 V, V

= Hi (unless otherwise noted) (continued)

I(ENx)

I(IN)

= 5.5 V,

supply current

PARAMETE

R

pp
current,
low-level
output

pp
current,
high-level
output

Leakage
current

Reverse

age

current

No Load
on OUTx

No Load
on OUTx

OUTx
connecte
to ground

IN = high
impedance

V

= V

I(ENx)

I(ENx)

I(ENx)

I(ENx)

V

I(ENx)

V

I(ENx)

V

I(ENx

V

I(ENx)

I(IN)

= 0

= 0

=

I(IN)

= V

I(IN)

= 0 V –40°C ≤ TJ ≤ 125°C TPS2056 100
= 0 V

)

= Hi

TJ = 25°C
–40°C ≤ TJ ≤ 125°C
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
TJ = 25°C
–40°C ≤ TJ ≤ 125°C

–40°C ≤ TJ ≤ 125°C TPS2046 100

°

=

J

TPS2046 0.3
TPS2056 0.3

TPS2046 TPS2056

MIN TYP MAX MIN TYP MAX

0.015 1
10

0.015 1
10

80 100

100

80 100

100

undervoltage lockout

TPS2046 TPS2056

MIN TYP MAX MIN TYP MAX

Low-level input voltage 2 2.5 2 2.5 V
Hysteresis TJ = 25°C 100 100 mV

µ

µ

µ

µ

overcurrent OCx

Sink current
Output low voltage IO = 5 mA, V
Off-state current

†

Specified by design, not production tested.

†

†

VO = 5 V 10 10 mA

VO = 5 V, VO = 3.3 V 1 1 µA

OL(OCx)

TPS2046 TPS2056

MIN TYP MAX MIN TYP MAX

0.5 0.5 V

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

PARAMETER MEASUREMENT INFORMATION

OUTx

V

I(ENx)

(5 V/div)

V

I(ENx)

V

O(OUTx)

t

RL CL

V

O(OUTx)

TEST CIRCUIT

50%

t

on

50%

90%

10%

V

I(ENx)

t

off

V

O(OUTx)

VOLTAGE WA VEFORMS

r

90%

90%

10%

50%

t

on

10%

50%

90%

10%

t

f

t

off

Figure 1. Test Circuit and Voltage Waveforms

V

I(ENx)

(5 V/div)

V

O(OUTx)

(2 V/div)

V

= 5 V

I(IN)

TA = 25°C
CL = 0.1 µF

0123456

t – Time – ms

78910

Figure 2. Turnon Delay and Rise Time

with 0.1-µF Load

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V

O(OUTx)

(2 V/div)

V

= 5 V

I(IN)

TA = 25°C
CL = 0.1 µF

0 1000 2000 3000

t – Time – ms

4000 5000

Figure 3. Turnoff Delay and Fall Time

with 0.1-µF Load

7

TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

PARAMETER MEASUREMENT INFORMATION

V

V

I(ENx)

(5 V/div)

V

O(OUTx)

(2 V/div)

0123456

t – Time – ms

V

= 5 V

I(IN)

TA = 25°C
CL = 1 µF
RL = 20 Ω

78910

I(ENx)

(5 V/div)

V

O(OUTx)

(2 V/div)

V

I(IN)

TA = 25°C
CL = 1 µF
RL = 20 Ω

0 2 4 6 8 10 12

= 5 V

14 16 18 20

t – Time – ms

Figure 4. Turnon Delay and Rise Time

with 1-µF Load

V

I(ENx)

(5 V/div)

I

O(OUTx)

(0.2 A/div)

0123456

t – Time – ms

Figure 6. TPS2046, Short-Circuit Current,

Device Enabled into Short

V

= 5 V

I(IN)

TA = 25°C

78910

V

O(OUTx)

(2 V/div)

I

O(OUTx)

(0.5 A/div)

Figure 7. TPS2046, Threshold Trip Current

Figure 5. Turnoff Delay and Fall Time

with 1-µF Load

V

= 5 V

I(IN)

TA = 25°C

01020 30405060

t – Time – ms

70 80 90 100

with Ramped Load on Enabled Device

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

PARAMETER MEASUREMENT INFORMATION

V

= 5 V

I(IN)

TA = 25°C
RL = 20 Ω

V

I(ENx)

(5 V/div)

I

O(OUTx)

(0.2 A/div)

V

O(OCx)

(5 V/div)

220 µF

47 µF

0 2 4 6 8 10 12

100 µF

14 16 18 20

t – Time – ms

Figure 8. Inrush Current with 220-µF, 100-µF

and 47-µF Load Capacitance

V

= 5 V

I(IN)

TA = 25°C

V

O(OCx)

(5 V/div)

I

O(OUTx)

(0.5 A/div)

Figure 9. Ramped Load on Enabled Device

V

O(OCx)

(5 V/div)

0 20 40 60 80 100 120

t – Time – ms

V

= 5 V

I(IN)

TA = 25°C

140 160 180 200

V

= 5 V

I(IN)

TA = 25°C

I

O(OUTx)

(0.5 A/div)

0 200 400 600 800 1000

t – Time – µs

Figure 10. 4-Ω Load Connected

to Enabled Device

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

I

O(OUTx)

(0.5 A/div)

0 200 400 600 800 1000

t – Time – µs

Figure 11. 1-Ω Load Connected

to Enabled Device

9

TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

TYPICAL CHARACTERISTICS

6

5.5

5

4.5

Turnon Delay – ms

4

3.5

3

2.5 3 3.5 4 4.5

2.7
VI

= 5 V

(IN)

TA = 25°C

TURNON DELAY

vs

INPUT VOLTAGE

VI – Input Voltage – V

Figure 12

RISE TIME

vs

LOAD CURRENT

CL = 1 µF
RL = 20 Ω
TA = 25°C

5 5.5 6

15

CL = 1 µF
RL = 20 Ω
TA = 25°C

13

11

Turnoff Delay – ms

9

7

2.5 3 3.5 4 4.5

2.85
VI

= 5 V

(IN)

TA = 25°C

TURNOFF DELAY

vs

INPUT VOLTAGE

5 5.5 6

VI – Input Voltage – V

Figure 13

FALL TIME

vs

LOAD CURRENT

– Rise Time – ms

r

t

10

2.6

2.5

2.4

2.3
0 0.05 0.1 0.15 0.2 0.25

IL – Load Current – A

Figure 14

2.8

2.75

– Fall Time – ms

f

t

2.7

0.3 0.35 0.4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2.65
0 0.05 0.1 0.15 0.2 0.25

0.3 0.35 0.4

IL – Load Current – A

Figure 15

TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

TYPICAL CHARACTERISTICS

SUPPLY CURRENT, OUTPUT ENABLED

vs

JUNCTION TEMPERATURE

200

Aµ

V

180

160

140

120

– Supply Current, Output Enabled –

I(IN)

I

100

–50 –25 0 25 50

TJ – Junction Temperature – °C

I(IN)

V

I(IN)

= 5 V

V

I(IN)

= 3.3 V

Figure 16

SUPPLY CURRENT, OUTPUT ENABLED

vs

INPUT VOLTAGE

200

Aµ

180

TJ = 85°C

V

= 5.5 V

I(IN)

= 4 V

V

= 2.7 V

I(IN)

75 100 125 150

TJ = 125°C

SUPPLY CURRENT, OUTPUT DISABLED

vs

JUNCTION TEMPERATURE

2000
1800

V

V

I(IN)

I(IN)

V

I(IN)

V

I(IN)

= 4 V

= 2.7 V

1600
1400

1200

1000

800
600

400

– Supply Current, Output Disabled – nA

200

0

I(IN)

I

–200

–50 –25 0 25 50 75

TJ – Junction Temperature – °C

Figure 17

SUPPLY CURRENT, OUTPUT DISABLED

vs

INPUT VOLTAGE

2000

1600

TJ = 125°C

= 5.5 V
= 5 V

100 125 150

160

140

TJ = 0°C

120

– Supply Current, Output Enabled –

I(IN)

I

100

2.5 3 3.5 4

TJ = –40°C

VI – Input Voltage – V

Figure 18

4.5

1200

800

TJ = 25°C

400

– Supply Current, Output Disabled – nA

0

I(IN)

I

–400

5 5.5 6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2.5 3 3.5 4 4.5

TJ = 85°C

TJ = –40°C

VI – Input Voltage – V

Figure 19

TJ = 25°C

TJ = 0°C

5 5.5 6

11

TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

TYPICAL CHARACTERISTICS

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs

Ω

175

150

125

100

75

– Static Drain-Source On-State Resistance – m

50

–50 –25 0 25 50 75

DS(on)

r

JUNCTION TEMPERATURE

IO = 0.25 A

V

TJ – Junction Temperature –°C

I(IN)

V

I(IN)

= 3.3 V

= 2.7 V

V

I(IN)

V

I(IN)

100 125 150

Figure 20

INPUT-TO-OUTPUT VOLTAGE

vs

LOAD CURRENT

45

TA = 25°C

40

V

= 2.7 V

35

30

25

20

– Input-To-Output Voltage – mV

15

10

O(OUTx)

V
–

5

I(IN)

0

V

0.1 0.14 0.18

V

= 3.3 V

I(IN)

V

I(IN)

IL – Load Current – A

I(IN)

V

= 4.5 V

I(IN)

= 5 V

0.22 0.3

0.26

Figure 22

= 4.5 V

= 5 V

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

vs

Ω

175

150

125

100

75

– Static Drain-Source On-State Resistance – m

50

DS(on)

2.5 3 3.5 4 4.5

r

INPUT VOLTAGE

IO = 0.25 A

TJ = 125°C

TJ = 85°C

TJ = 25°C

TJ = 0°C

TJ = –40°C

5 5.5 6

VI – Input Voltage – V

Figure 21

SHORT-CURCUIT OUTPUT CURRENT

vs

INPUT VOLTAGE

490

470

450

430

410

390

– Short-circuit Output Current – mA

370

OS

I

350

2.5 3 3.5 4

TJ = –40°C

TJ = 25°C

TJ = 125°C

4.5 5 5.5

VI – Input Voltage – V

Figure 23

12

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TPS2046, TPS2056

DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

TYPICAL CHARACTERISTICS

0.73
TA = 25°C

Load Ramp = 1 A/10 ms

0.71

0.69

0.67

Threshold Trip Current – A

0.65

2.5 3 3.5 4

2.5

2.4

2.3

THRESHOLD TRIP CURRENT

vs

INPUT VOLTAGE

4.5 5 65.5

VI – Input Voltage – V

Figure 24

UNDERVOLTAGE LOCKOUT

vs

JUNCTION TEMPERATURE

Start Threshold

SHORTCIRCUIT OUTPUT CURRENT

vs

JUNCTION TEMPERATURE

450

V

V

I(IN)

I(IN)

445

440

V

= 4 V

435

430

425

420

415

– Short-circuit Output Current – mA

OS

I

410
405

–50 –25 0 25 50

I(IN)

TJ – Junction Temperature – °C

Figure 25

CURRENT-LIMIT RESPONSE

vs

PEAK CURRENT

500

sµ

350

= 5 V

= 2.7 V

75 100 125

V

I(INx)

TA = 25°C

= 5 V

Stop Threshold

2.2

2.1

UVLO – Undervoltage Lockout – V

2

–50 –25 0 25 50 75

TJ – Junction Temperature – °C

Figure 26

250

Current Limit Response –

100

100 125 150

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0

02 4 6

810

Peak Current – A

Figure 27

13

TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

TYPICAL CHARACTERISTICS

OVERCURRENT (OCx) RESPONSE TIME

vs

PEAK CURRENT

10

V

= 5 V

I(IN)

TA = 25°C

sµ

8.5

7

5.5

Overcurrent OCx Time –

Power Supply

2.7 V to 5.5 V

4

0246

Peak Current – A

Figure 28

APPLICATION INFORMATION

TPS2046

2

IN

0.1 µF

8

OC1

3

EN1

5

OC2

4

EN2

Figure 29. Typical Application

OUT1

OUT2

GND

1

810

7

0.1 µF 22 µF

6

0.1 µF 22 µF

Load

Load

power-supply considerations

A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy .
This precaution reduces power-supply transients that may cause ringing on the input. Additionally , bypassing
the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit
transients.

14

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TPS2046, TPS2056

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SLVS183 – APRIL 1999

APPLICATION INFORMATION

overcurrent

A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do
not increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs
only if the fault is present long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before V
and immediately switch into a constant-current output.

In the second condition, the short occurs while the device is enabled. At the instant the short occurs, very high
currents may flow for a short time before the current-limit circuit can react. After the current-limit circuit has
tripped (reached the overcurrent trip threshhold) the device switches into constant-current mode.

In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 7). The TPS2046 and TPS2056 are capable of delivering current up to the current-limit
threshold without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.

has been applied (see Figure 6). The TPS2046 and TPS2056 sense the short

I(IN)

OCx response

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
Connecting a heavy capacitive load to an enabled device can cause momentary false overcurrent reporting from
the inrush current flowing through the device, charging the downstream capacitor. An RC filter (see Figure 30)
can be connected to the OCx
extremely high capacitive loads. Using low-ESR electrolytic capacitors on the output lowers the inrush current
flow through the device during hot-plug events by providing a low impedance energy source, thereby reducing
erroneous overcurrent reporting.

TPS2046

GND
IN
EN1

EN2

Figure 30. Typical Circuits for OC Pin and RC Filter for Damping Inrush OC Responses

pin to reduce false overcurrent reporting caused by hot-plug switching events or

V+

R

pullup

R

filter

To USB
Controller

C

filter

OC1
OUT1
OUT2

OC2

V+

R

pullup

GND
IN
EN1

EN2

TPS2046

OC1
OUT1
OUT2

OC2

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DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

APPLICATION INFORMATION

power dissipation and junction temperature

The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to that of power packages; it is
good design practice to check power dissipation and junction temperature. The first step is to find r
input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature
of interest and read r

P

+

r

D

DS(on

)

Finally, calculate the junction temperature:

T

+

P

R

J

Where:

TA = Ambient Temperature °C
R

θJA

Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.

q

D

= Thermal resistance SOIC = 172°C/W, PDIP = 106°C/W

from Figure 21. Next, calculate the power dissipation using:

DS(on)

2

I

)

T

JA

A

DS(on)

at the

thermal protection

Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The faults force the TPS2046 and TPS2056 into constant current mode, which causes
the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch
is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels.
The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built into the
thermal sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back on. The
switch continues to cycle in this manner until the load fault or input power is removed.

The TPS2046 and TPS2056 implement a dual thermal trip to allow fully independent operation of the power
distribution switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die
temperature rises to approximately 140°C, the internal thermal sense circuitry checks which power switch is
in an overcurrent condition and turns that power switch off, thus isolating the fault without interrupting operation
of the adjacent power switch. Should the die temperature exceed the first thermal trip point of 140°C and reach
160°C, both switches turn off. The OC
overcurrent occurs.

open-drain output is asserted (active low) when overtemperature or

undervoltage lockout (UVLO)

An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage
falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if
the switch is enabled. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce
EMI and voltage overshoots.

16

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APPLICATION INFORMATION

Universal Serial Bus (USB) applications

The Universal Serial Bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.

USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.

The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:

D

Hosts/self-powered hubs (SPH)

D

Bus-powered hubs (BPH)

D

Low-power, bus-powered functions

D

High-power, bus-powered functions

D

Self-powered functions

Self-powered and bus-powered hubs distribute data and power to downstream functions. The TPS2046 and
TPS2056 can provide power-distribution solutions for many of these classes of devices.

bus-powered hubs

Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs
are required to power up with less than one unit load. The BPH usually has one embedded function, and power
is always available to the controller of the hub. If the embedded function and hub require more than 100 mA
on power up, the power to the embedded function may need to be kept off until enumeration is completed. This
can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching
the embedded function is not necessary if the aggregate power draw for the function and controller is less than
one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.

low-power bus-powered functions and high-power bus-powered functions

Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA, and high-power functions must draw less than 100 mA at power up
and can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination
of 44 Ω and 10 µF at power up, the device must implement inrush current limiting (see Figure 31).

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TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

APPLICATION INFORMATION

Power Supply

D+
D–

V

BUS

GND

USB

Control

10 µF

3.3 V

2

0.1 µF

8
3

5
4

IN

OC1
EN1
OC2
EN2

TPS2046

GND

1

OUT1

OUT2

7

6

Figure 31. High-Power Bus-Powered Function

0.1 µF 10 µF

0.1 µF 10 µF

Internal
Function

Internal
Function

USB power-distribution requirements

USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power distribution features must be implemented.

D

Bus-Powered Hubs must:
– Enable/disable power to downstream ports
– Power up at <100 mA
– Limit inrush current (<44 Ω and 10 µF)

D

Functions must:
– Limit inrush currents
– Power up at <100 mA

The feature set of the TPS2046 and TPS2056 allows them to meet each of these requirements. The integrated
current-limiting and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable
and controlled rise times meet the need of both input and output ports on bus-power hubs, as well as the input
ports for bus-power functions (see Figure 32).

18

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SLVS183 – APRIL 1999

APPLICATION INFORMATION

TUSB2040

Hub Controller

Upstream
Port

D +
D –

GND

5 V

1 µF

SN75240

A
B

0.1 µF

4.7 µF

C
D

GND

TPS76333

IN

3.3 V

GND

48-MHz
Crystal

Tuning

Circuit

4.7 µF

DP0
DM0

V

CC

XTAL1

XTAL2

OCSOFF

GND

BUSPWR
GANGED

DP1

DM1

DP2

DM2

DP3

DM3

DP4

DM4

PWRON1

OVRCUR1

PWRON2

OVRCUR2

PWRON3

OVRCUR3

PWRON4

OVRCUR4

TPS2046

EN1

OC1

EN2

OC2

TPS2046

EN1

OC1

EN2

OC2

OUT1
OUT2

OUT1
OUT2

IN

IN

ABC

D

SN75240

ABC

D

SN75240

0.1 µF

0.1 µF

Ferrite Beads

33 µF

Ferrite Beads

33 µF

Ferrite Beads

33 µF

Ferrite Beads

Downstream

Ports
D +

D –
GND

5 V

†

D +
D –

GND

5 V

†

D +
D –

GND

5 V

†

D +
D –

GND

†

USB rev 1.1 requires 120 µF per hub.

Figure 32. Bus-Powered Hub Implementation

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

33 µF

5 V

†

19

TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

APPLICATION INFORMATION

generic hot-plug applications (see Figure 33)

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen
by the main power supply and the card being inserted. The most effective way to control these surges is to limit
and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS2046 and TPS2056, these devices
can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature
of the TPS2046 and TPS2056 also ensures the switch will be off after the card has been removed, and the switch
will be off during the next insertion. The UVLO feature guarantees a soft start with a controlled rise time for every
insertion of the card or module.

PC Board

Power

Supply

2.7 V to 5.5 V

1000 µF
Optimum

0.1 µF

Overcurrent Response

TPS2046

GND
IN

EN1
EN2

OC1

OUT1
OUT2

OC2

Block of
Circuitry

Block of
Circuitry

Figure 33. Typical Hot-Plug Implementation

By placing the TPS2046 and TPS2056 between the VCC input and the rest of the circuitry , the input power will
reach these devices first after insertion. The typical rise time of the switch is approximately 2.5 ms, providng
a slow voltage ramp at the output of the device. This implementaion controls system surge currents and provides
a hot-plugging mechanism for any device.

20

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DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

MECHANICAL DATA

D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0.050 (1,27)

14

1

0.069 (1,75) MAX

A

0.020 (0,51)

0.014 (0,35)

0.010 (0,25)

0.004 (0,10)

DIM

8

7

PINS **

0.010 (0,25)

0.157 (4,00)

0.150 (3,81)

M

0.244 (6,20)

0.228 (5,80)

Seating Plane

0.004 (0,10)

8

14

0.008 (0,20) NOM

0°–8°

16

Gage Plane

0.010 (0,25)

0.044 (1,12)

0.016 (0,40)

A MAX

A MIN

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.197

(5,00)

0.189

(4,80)

0.344
(8,75)

0.337
(8,55)

0.394

(10,00)

0.386

(9,80)

4040047/D 10/96

21

TPS2046, TPS2056
DUAL CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS183 – APRIL 1999

MECHANICAL DATA

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)

0.355 (9,02)

58

0.260 (6,60)

0.240 (6,10)

41

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001

0.010 (0,25)

M

0.310 (7,87)

0.290 (7,37)

Seating Plane

0°–15°

0.010 (0,25) NOM

4040082/B 03/95

22

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PACKAGE OPTION ADDENDUM

www.ti.com

23-Jul-2007

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package

Drawing

Pins Package

Qty

Eco Plan

TPS2046D NRND SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPS2046DG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPS2046DR NRND SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPS2046DRG4 NRND SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPS2046P NRND PDIP P 8 50 Pb-Free

TPS2046PE4 NRND PDIP P 8 50 Pb-Free

TPS2056D NRND SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPS2056DG4 NRND SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPS2056DR NRND SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPS2056DRG4 NRND SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPS2056PE4 NRND PDIP P 8 TBD Call TI Call TI

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU N / A for Pkg Type

CU NIPDAU N / A for Pkg Type

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

TAPE AND REEL INFORMATION

19-Mar-2008

*All dimensions are nominal

Device Package

TPS2046DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS2056DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Type

Package
Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

19-Mar-2008

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPS2046DR SOIC D 8 2500 340.5 338.1 20.6
TPS2056DR SOIC D 8 2500 346.0 346.0 29.0

Pack Materials-Page 2

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the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products Applications

Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Clocks and Timers www.ti.com/clocks Digital Control www.ti.com/digitalcontrol
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
RFID www.ti-rfid.com Telephony www.ti.com/telephony
RF/IF and ZigBee® Solutions www.ti.com/lprf Video & Imaging www.ti.com/video

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