Texas Instruments LV70036DSER, TLV70012DCKR, TLV70012DDCR, TLV70012DSER, TLV70013DDCR Schematic [ru]

...
TLV700xx
GND
EN
IN OUT
V
IN
V
OUT
C
IN
C
OUT
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SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
TLV700 200-mA, Low-IQ, Low-Dropout Regulator for Portable Devices

1 Features 3 Description

1
Very Low Dropout: – 43 mV at I – 85 mV at I – 175 mV at I
= 50 mA, V
OUT
= 100 mA, V
OUT
= 200 mA, V
OUT
OUT
OUT
= 2.8 V
= 2.8 V
= 2.35 V
OUT
2% Accuracy
Low IQ: 31 μA
Available in Fixed-Output Voltages from 1.2 V to
4.8 V
High PSRR: 68 dB at 1 kHz
Stable With Effective Capacitance of 0.1 μF
(1)
Thermal Shutdown and Overcurrent Protection
Available in 1.5-mm × 1.5-mm SON-6, SOT23-5, and SC-70 Packages
(1)
See the Input and Output Capacitor Requirements.

2 Applications

Wireless Handsets
Smart Phones, PDAs
ZigBee®Networks
Bluetooth®Devices
Li-Ion Operated Handheld Products
WLAN and Other PC Add-on Cards
The TLV700 series of low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides overall 2% accuracy. Low output noise, very high power-supply rejection ratio (PSRR), and low dropout voltage make this series of devices ideal for most battery-operated handheld equipment. All device versions have thermal shutdown and current limit for safety.
Furthermore, these devices are stable with an effective output capacitance of only 0.1 μF. This feature enables the use of cost-effective capacitors that have higher bias voltages and temperature derating. The devices regulate to specified accuracy with no output load.
The TLV700 series of LDOs are available in 1.5-mm × 1.5-mm SON-6, SOT-5, and SC70 packages.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
TL700xx SOT (5) 2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TLV700
(1)
SC70 (5) 2.00 mm × 1.25 mm
WSON (6) 1.50 mm × 1.50 mm
Typical Application Circuit
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV700
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
www.ti.com

Table of Contents

1 Features.................................................................. 1 8 Application and Implementation........................ 13
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 4
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Typical Characteristics.............................................. 7
7 Detailed Description ............................................ 11
7.1 Overview................................................................. 11
7.2 Functional Block Diagram....................................... 11
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 12
8.1 Application Information............................................ 13
8.2 Typical Application .................................................. 13
9 Power Supply Recommendations...................... 14
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Examples................................................... 15
10.3 Thermal Protection................................................ 15
10.4 Power Dissipation ................................................. 16
11 Device and Documentation Support................. 17
11.1 Device Support .................................................... 17
11.2 Documentation Support ........................................ 17
11.3 Trademarks........................................................... 17
11.4 Electrostatic Discharge Caution............................ 17
11.5 Glossary................................................................ 17
12 Mechanical, Packaging, and Orderable
Information........................................................... 18

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (October 2012) to Revision E Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
Deleted Applications bullet for MP3 Players .......................................................................................................................... 1
Changed front-page graphic .................................................................................................................................................. 1
Changed Pin Configuration and Functions section; updated table format ............................................................................ 4
Changed "free-air temperature" to "junction temperature" in Absolute Maximum Ratings condition statement.................... 5
Deleted Dissipation Ratings table .......................................................................................................................................... 5
Changed Thermal Information table; updated thermal resistance values for all packages ................................................... 5
Changes from Revision C (July 2011) to Revision D Page
Updated Figure 5.................................................................................................................................................................... 7
Changes from Revision B (December, 2010) to Revision C Page
Added footnote 2 to Absolute Maximum Ratings table .......................................................................................................... 5
Changed output current limit typical and maximum specifications......................................................................................... 6
Deleted previous Figure 12, Current Limit vs Input Voltage typical characteristic................................................................. 7
Changes from Revision A (April, 2010) to Revision B Page
Removed TLV701xx device references throughout document .............................................................................................. 1
Changed minimum output voltage available from 0.7 V to 1.2 V........................................................................................... 1
Added footnote (1).................................................................................................................................................................. 1
Deleted V
< 1 V specification............................................................................................................................................ 6
OUT
Deleted Active pulldown resistance parameter...................................................................................................................... 6
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Changed Figure 4 title ............................................................................................................................................................ 7
Changed Figure 5 title ............................................................................................................................................................ 7
Removed TLV701xx block diagram...................................................................................................................................... 11
Revised Shutdown section................................................................................................................................................... 11
Updated Application Information section to reflect minimum output voltage availability of 1.2 V ........................................ 13
Deleted references to TLV701xx throughout Application Information.................................................................................. 13
Changed footnote 2 for Ordering Information table to reflect minimum output voltage of 1.2 V ......................................... 17
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: TLV700
OUT
N/C
(1)
IN
GND
EN
1
2
3
5
4
OUT
N/C
(1)
IN
GND
EN
1
2
3 4
5
EN
N/C
(1)
N/C
(1)
6
5
4
IN
GND
OUT
1
2
3
TLV700
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015

5 Pin Configuration and Functions

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DSE Package
6-Pin WSON
Top View
DCK Package
5-Pin SC70
Top View
DDC Package
5-Pin SOT
Top View
(1) No connection.
Pin Functions
PIN
NAME WSON SC70 SOT
IN 1 1 1 I to assure stability and good transient performance. See Input and Output
GND 2 2 2 Ground pin
EN 6 3 3 I puts the regulator into shutdown mode and reduces operating current to 1 μA,
NC 4, 5 4 4 No connection. This pin can be tied to ground to improve thermal dissipation.
OUT 3 5 5 O pin to ground to assure stability. See Input and Output Capacitor Requirements for
I/O DESCRIPTION
Input pin. A small, 1-μF ceramic capacitor is recommended from this pin to ground
Capacitor Requirements for more details.
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V nominal.
Regulated output voltage pin. A small, 1-μF ceramic capacitor is needed from this more details.
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SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015

6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)
V
IN
Voltage V
Maximum output current I
V
EN OUT
OUT
Output short-circuit duration Indefinite
Temperature °C
Operating junction, T Storage, T
stg
J
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VENabsolute maximum rating is VIN+ 0.3 V or 6 V, whichever is less.

6.2 ESD Ratings

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V
(ESD)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Electrostatic discharge V
Charged device model (CDM), per JEDEC specification JESD22-C101,
(2)
all pins
(1)
MIN MAX UNIT
–0.3 6 –0.3 6
(2)
V
–0.3 6
Internally limited
–55 150 –55 150
VALUE UNIT
(1)
±2000
±500

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V V I
OUT
IN OUT
2 5.5 V
1.2 4.8 V 0 200 mA

6.4 Thermal Information

TLV700
THERMAL METRIC
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
R
θJC(bot)
Junction-to-ambient thermal resistance 307.6 235.9 321.3 Junction-to-case (top) thermal resistance 79.1 61.9 207.9 Junction-to-board thermal resistance 93.7 54 281.5 Junction-to-top characterization parameter 1.3 0.8 42.4 Junction-to-board characterization parameter 92.8 53.4 284.8 Junction-to-case (bottom) thermal resistance n/a n/a 142.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(1)
DCK [SC70] DDC [SOT] DSE [WSON] UNIT
5 PINS 5 PINS 6 PINS
°C/W
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6.5 Electrical Characteristics

At VIN= V
OUT(nom)
unless otherwise noted. Typical values are at TJ= 25°C.
V
IN
V
OUT
ΔV
OUT(ΔVIN)
ΔV
OUT(ΔIOUT)
V
DO
I
CL
I
GND
I
SHDN
PSRR Power-supply rejection ratio 68 dB
V
n
t
STR
V
EN(high)
V
EN(low)
I
EN
UVLO Undervoltage lockout VINrising 1.9 V
T
sd
T
J
(1) VDOis measured for devices with V (2) Start-up time = time from EN assertion to 0.98 × V
+ 0.3 V or 2 V (whichever is greater); I
= 10 mA, VEN= 0.9 V, C
OUT
= 1 μF, and TJ= –40°C to +125°C,
OUT
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 2 5.5 V DC output accuracy –40°C TJ≤ +125°C –2% 2%
V
Line regulation 1 5 mV
OUT(nom)
I
OUT
Load regulation 0 mA I
VIN= 0.98 × V V
OUT
Dropout voltage
(1)
VIN= 0.98 × V V
OUT
VIN= 0.98 × V V
OUT
Output current limit V
Ground pin current μA
Ground pin current (shutdown)
OUT
I
OUT
I
OUT
VEN≤ 0.4 V, VIN= 2 V 400 nA VEN≤ 0.4 V, 2 V ≤ VIN≤ 4.5 V 1 2 μA VIN= 2.3 V, V
I
OUT
Output noise voltage 48 μV Start-up time
(2)
BW = 100 Hz to 100 kHz, VIN= 2.3 V, V
C
OUT
Enable pin high (enabled) 0.9 V
+ 0.3 V VIN≤ 5.5 V,
= 10 mA
200 mA 1 15 mV
OUT
, I
, I
, I
OUT
OUT
OUT
= 50 mA,
= 100 mA,
= 200 mA,
43
85 mV
175 250
220 860 mA
= 2.8 V
= 2.8 V
= 2.35 V = 0.9 × V
OUT(nom)
OUT(nom)
OUT(nom)
OUT(nom)
= 0 mA 31 55 = 200 mA, VIN= V
= 1.8 V,
= 1 μF, I
OUT
= 1.8 V, I
OUT
= 200 mA 100 μs
OUT
= 10 mA, f = 1 kHz
+ 0.5 V 270
OUT
= 10 mA
OUT
IN
Enable pin low (disabled) 0 0.4 V Enable pin current VIN= VEN= 5.5 V 0.04 0.5 μA
Thermal shutdown temperature °C
Shutdown, temperature increasing 160 Reset, temperature decreasing 140
Operating junction temperature –40 125 °C
OUT(nom)
2.35 V.
OUT(nom)
.
RMS
V
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1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
OutputVoltage(V)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature( C)
°
I =200mA
I =10mA
I =150mA
OUT
OUT
OUT
0 30 60 90 120 150 180 210
Output Current (mA)
180
160
140
120
100
80
60
40
20
0
Dropout Voltage (mV)
+125 C
+85 C +25 C
40 C-
° ° ° °
0 40 60 100 120 140 180 200
OutputCurrent(mA)
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
OutputVoltage(V)
+125 C
+85 C +25 C
40 C-
° ° ° °
20 80 160
250
200
150
100
50
0
DropoutVoltage(mV)
2.25 2.75 3.25 3.75 4.25
4.75
InputVoltage(V)
+125 C
+85 C +25 C
40 C-
° ° ° °
I =200mA
OUT
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
InputVoltage(V)
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
OutputVoltage(V)
+125 C
+85 C +25 C
40 C-
° ° ° °
I =10mA
OUT
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
InputVoltage(V)
1.90
1.88
1.86
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
OutputVoltage(V)
+125 C
+85 C +25 C
40 C-
° ° ° °
I =200mA
OUT
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6.6 Typical Characteristics

Over operating temperature range (TJ= –40°C to +125°C), VIN= V VEN= VIN, C
= 1 μF, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
Figure 1. TLV70018 Line Regulation Figure 2. TLV70018 Line Regulation
OUT(nom)
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
+ 0.5 V or 2 V, whichever is greater; I
OUT
TLV700
= 10 mA,
Figure 3. TLV70018 Load Regulation Figure 4. Dropout Voltage vs Input Voltage
Figure 5. Dropout Voltage vs Output Current, V
Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 7
OUT
= 4.8 V
Figure 6. TLV70018 Output Voltage vs Temperature
Product Folder Links: TLV700
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8
InputVoltage(V)
80
70
60
50
40
30
20
10
0
PSRR(dB)
10kHz
100kHz
1kHz
100
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
10 100
1k 10k 100k 1M 10M
Frequency(Hz)
I =150mA
OUT
I =10mA
OUT
V V =0.5V
IN OUT
-
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
InputVoltage(V)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
ShutdownCurrent( A)m
+125 C
+85 C +25 C
° ° °
40
35
30
25
20
15
10
5
0
GroundPinCurrent( A)m
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature( C)
°
I =0mA
OUT
2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
InputVoltage(V)
50
45
40
35
30
25
20
15
10
5
0
GroundPinCurrent( A)m
+125 C
+85 C +25 C
40 C-
° ° ° °
I =0mA
OUT
+125 C
+85 C +25 C
40 C-
° ° ° °
300
250
200
150
100
50
0
GroundPinCurrent( A)m
0 20 40 60 80 100 120 140 160 180 200
OutputCurrent(mA)
TLV700
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
Typical Characteristics (continued)
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Over operating temperature range (TJ= –40°C to +125°C), VIN= V VEN= VIN, C
Figure 7. TLV70018 Ground Pin Current vs Input Voltage
= 1 μF, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
OUT(nom)
+ 0.5 V or 2 V, whichever is greater; I
Figure 8. TLV70018 Ground Pin Current vs Load
OUT
= 10 mA,
Figure 9. TLV70018 Ground Pin Current vs Temperature
Figure 11. TLV70018 Power-Supply Ripple Rejection vs
Frequency
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Figure 10. TLV70018 Shutdown Current vs Input Voltage
Figure 12. TLV70018 Power-Supply Ripple Rejection vs
Input Voltage
Product Folder Links: TLV700
1V/div
5mV/div
1ms/div
V
OUT
SlewRate=1V/ sm
V
IN
2.9V
2.3V
I 200mA
OUT
=
1V/div
5mV/div
1ms/div
V
OUT
V
IN
2.7V
2.3V
I 1mA
OUT
=
SlewRate=1V/ sm
20mA/div
5mV/div
10 s/divm
V
OUT
VIN=2.3V
I
OUT
10mA
0mA
t =t =1 s
R F
m
50mA/div
20mV/div
10 s/divm
V
OUT
VIN=2.3V
I
OUT
50mA
0mA
t =t =1 s
R F
m
10
1
0.1
0.01
0
OutputSpectralNoiseDensity( V/ )m Hz
Ö
10 100
1k 10k 100k 1M 10M
Frequency(Hz)
I =10mA C =C =1 F
OUT
m
IN OUT
100mA/div
50mV/div
10 s/divm
V
OUT
VIN=2.1V
I
OUT
200mA
0mA
t =t =1 s
R F
m
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Typical Characteristics (continued)
TLV700
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
Over operating temperature range (TJ= –40°C to +125°C), VIN= V VEN= VIN, C
Figure 13. TLV70018 Output Spectral Noise Density vs
= 1 μF, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
Output Voltage
OUT(nom)
+ 0.5 V or 2 V, whichever is greater; I
OUT
= 10 mA,
Figure 14. TLV70018 Load Transient Response
Figure 15. TLV70018 Load Transient Response Figure 16. TLV70018 Load Transient Response
Figure 17. TLV70018 Line Transient Response Figure 18. TLV70018 Line Transient Response
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1V/div
10mV/div
1ms/div
V
OUT
V
IN
5.5V
2.1V
I 200mA
OUT
=
SlewRate=1V/ sm
1V/div
200ms/div
V
OUT
V
IN
I 1mA
OUT
=
TLV700
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
Typical Characteristics (continued)
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Over operating temperature range (TJ= –40°C to +125°C), VIN= V VEN= VIN, C
= 1 μF, unless otherwise noted. Typical values are at TJ= 25°C.
OUT
Figure 19. TLV70018 Line Transient Response Figure 20. TLV70018 VINRamp-Up, Ramp-Down Response
OUT(nom)
+ 0.5 V or 2 V, whichever is greater; I
OUT
= 10 mA,
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Thermal
Shutdown
Current
Limit
UVLO
Bandgap
IN
EN
OUT
LOGIC
GND
TLV700xxSeries
TLV700
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SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015

7 Detailed Description

7.1 Overview

The TLV700 series of LDO linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides overall 2% accuracy. Low output noise, very high PSRR, and low dropout voltage make this series of devices ideal for most battery-operated handheld equipment. All device versions have integrated thermal shutdown, current limit, and undervoltage lockout (UVLO).

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Internal Current Limit

The TLV700 internal current limit helps to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of the output voltage. In such a case, the output voltage is not regulated, and is V ICLuntil thermal shutdown is triggered and the device turns off. As the device cools down, it is turned on by the
OUT
= ICL× R
. The PMOS pass transistor dissipates (VIN– V
LOAD
OUT
internal thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and thermal shutdown. See Thermal Protection for more details.
The PMOS pass element in the TLV700 has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting to 5% of the rated output current is recommended.

7.3.2 Shutdown

The enable pin (EN) is active high. The device is enabled when voltage at EN pin goes above 0.9 V. The device is turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, EN can be connected to the IN pin.
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) ×
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Feature Description (continued)

7.3.3 Dropout Voltage

The TLV700 uses a PMOS pass transistor to achieve low dropout. When (VIN– V
) is less than the dropout
OUT
voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the R
of the PMOS pass element. VDOscales approximately with output current because the PMOS device
DS(on)
behaves as a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as (VIN– V
) approaches dropout.
OUT
This effect is shown in Figure 12 in Typical Characteristics.

7.3.4 Undervoltage Lockout (UVLO)

The TLV700 uses a UVLO circuit to keep the output shut off until internal circuitry is operating properly.

7.4 Device Functional Modes

7.4.1 Normal Operation

The device regulates to the nominal output voltage under the following conditions:
The input voltage is greater than the nominal output voltage added to the dropout voltage.
The output current is less than the current limit.
The input voltage is greater than the UVLO voltage.

7.4.2 Dropout Operation

If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this condition, the output voltage is the same the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device is in a triode state and no longer regulates the output voltage of the LDO. Line or load transients in dropout may result in large output voltage deviations.
Table 1 lists the conditions that lead to the different modes of operation.
Table 1. Device Functional Mode Comparison
OPERATING MODE
Normal mode VIN> V
Dropout mode VIN< V
Current limit VIN> UVLO I
V
OUT(nom) OUT(nom)
IN
PARAMETER
+ V
DO
+ V
DO
I
OUT
I
OUT OUT
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