Texas Instruments TLV2341IPWR, TLV2341IPWLE, TLV2341IP, TLV2341IDR, TLV2341ID Datasheet

TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
T
A
= –40°C to 85°C...2 V to 8 V
D
Fully Characterized at 3 V and 5 V
D
Single-Supply Operation
D
Common-Mode Input-Voltage Range Extends Below the Negative Rail and up to V
DD
–1 V at 25°C
D
Output Voltage Range Includes Negative Rail
D
High Input Impedance...10
12
Typ
D
Low Noise...25 nV/√Hz Typically at f = 1 kHz (High-Bias Mode)
D
ESD-Protection Circuitry
D
Designed-In Latch-Up Immunity
D
Bias-Select Feature Enables Maximum Supply Current Range From 17 µA to
1.5 mA at 25°C
1 2 3 4
8 7 6 5
OFFSET N1
IN– IN+
GND
BIAS SELECT V
DD
OUT OFFSET N2
D OR P PACKAGE
(TOP VIEW)
1 2 3 4
8 7 6 5
OFFSET N1
IN– IN+
GND
BIAS SELECT V
DD
OUT OFFSET N2
PW PACKAGE
(TOP VIEW)
description
The TLV2341 operational amplifier has been specifically developed for low-voltage, single-supply applications and is fully specified to operate over a voltage range of 2 V to 8 V. The device uses the Texas Instruments silicon-gate LinCMOS technology to facilitate low-power, low-voltage operation and excellent offset-voltage stability . LinCMOS technology also enables extremely high input impedance and low bias currents allowing direct interface to high-impedance sources.
The TLV2341 offers a bias-select feature, which allows the device to be programmed with a wide range of different supply currents and therefore different levels of ac performance. The supply current can be set at 17 µA, 250 µA, or 1.5 mA, which results in slew-rate specifications between 0.02 and 2.1 V/ µ s (at 3 V).
The TLV2341 operational amplifiers are especially well suited to single-supply applications and are fully specified and characterized at 3-V and 5-V power supplies. This low-voltage single-supply operation combined with low power consumption makes this device a good choice for remote, inaccessible, or portable battery-powered applications. The common-mode input range includes the negative rail.
The device inputs and outputs are designed to withstand –100-mA currents without sustaining latch-up. The TLV2341 incorporates internal ESD-protection circuits that prevents functional failures at voltages up to 2000 V as tested under MIL-STD 883 C, Methods 3015.2; however, care should be exercised in handling these devices as exposure to ESD may result in the degradation of the device parametric performance.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
VIOmax AT 25°C
SMALL
OUTLINE
(D)
PLASTIC
DIP
(P)
TSSOP
(PW)
CHIP
FORM
(Y)
–40°C to 85°C 8 mV TLV2341ID TLV2341IP TLV2341IPWLE TLV2341Y
The D package is available taped and reeled. Add R suffix to the device type (e.g., TL V2341IDR). The PW package is only available left-end taped and reeled (e.g., TLV2341IPWLE).
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
LinCMOS is a trademark of Texas Instruments Incorporated.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
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bias-select feature
The TL V2342 offers a bias-select feature that allows the user to select any one of three bias levels, depending on the level of performance desired. The tradeoffs between bias levels involve ac performance and power dissipation (see Table 1).
Table 1. Effect of Bias Selection on Performance
MODE
TYPICAL PARAMETER VALUES
TA = 25°C, VDD = 3 V
HIGH BIAS RL = 10 k
MEDIUM BIAS
RL = 100 k
LOW BIAS RL = 1 M
UNIT
P
D
Power dissipation 975 195 15 µW SR Slew rate 2.1 0.38 0.02 V/µs V
n
Equivalent input noise voltage at f = 1 kHz 25 32 68 nV/Hz B
1
Unity-gain bandwidth 790 300 27 kHz
φ
m
Phase margin 46° 39° 34° A
VD
Large-signal differential voltage amplification 11 83 400 V/mV
bias selection
Bias selection is achieved by connecting BIAS SELECT to one of three voltage levels (see Figure 1). For medium-bias applications, it is recommended that the bias-select pin be connected to the midpoint between the supply rails. This procedure is simple in split-supply applications since this point is ground. In single-supply applications, the medium-bias mode necessitates using a voltage divider as indicated in Figure 1. The use of large-value resistors in the voltage divider reduces the current drain of the divider from the supply line. However, large-value resistors used in conjunction with a large-value capacitor require significant time to charge up to the supply midpoint after the supply is switched on. A voltage other than the midpoint may be used if it is within the voltages specified in the following table.
To the Bias-Select Pin
1 M
High
Medium
Low
V
DD
1 M
0.01 µF
BIAS MODE
BIAS-SELECT VOLTAGE
(single supply)
Low
Medium
High
V
DD
1 V to VDD –1 V
GND
Figure 1. Bias Selection for Single-Supply Applications
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
high-bias mode
In the high-bias mode, the TL V2341 series feature low offset voltage drift, high input impedance, and low noise. Speed in this mode approaches that of BiFET devices but at only a fraction of the power dissipation.
medium-bias mode
The TL V2341 in the medium-bias mode features a low offset voltage drift, high input impedance, and low noise. Speed in this mode is similar to general-purpose bipolar devices but power dissipation is only a fraction of that consumed by bipolar devices.
low-bias mode
In the low-bias mode, the TL V2341 features low offset voltage drift, high input impedance, extremely low power consumption, and high differential voltage gain.
ORDER OF CONTENTS
TOPIC
BIAS MODE
Schematic all Absolute maximum ratings all Recommended operating conditions all Electrical characteristics
Operating characteristics Typical characteristics
high
(Figures 2 – 31)
Electrical characteristics Operating characteristics Typical characteristics
medium
(Figures 32 – 61)
Electrical characteristics Operating characteristics Typical characteristics
low
(Figures 62 – 91)
Parameter measurement information all Application information all
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
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TLV2341Y chip information
This chip, when properly assembled, displays characteristics similar to the TL V2341. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS.
+
OUT
IN+
IN–
V
DD
(7)
(3)
(2)
(6)
(4)
GND
(1)
(5)
OFFSET N1
OFFSET N2
(8)
BIAS SELECT
48
55
(8) (7)(2) (1)
(6)(5)(4)
(3)
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
equivalent schematic
P3
P1
R1
P2 R2
P4 P5
R6
P9B
P9A
P6A P6B P7B P7A P8
P10
N11
N12
N13
N10
N9
N7
R7R4R3
N1 N2
N3
R5
C1
D1 D2
N6
N4
V
DD
OFFSETN1OFFSET
N2
OUT GND BIAS
SELECT
IN–
IN+
P11
P12
N5
COMPONENT COUNT
Transistors Diodes Resistors Capacitors
27
2 7 1
Includes the amplifier and all ESD, bias, and trim circuitry
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
DD
(see Note 1) 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage (see Note 2) V
DD±
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(any input) –0.3 V to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, I
I
±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) T
A
= 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
–40°C to 85° C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may effect device reliability .
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at the noninverting input with respect to the inverting input.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
T
25°C DERATING FACTOR T
= 85°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
D 725 mW 5.8 mW/°C 377 mW P 1000 mW 8.0 mW/°C 520 mW
PW 525 mW 4.2 mW/° C 273 mW
recommended operating conditions
MIN MAX UNIT
Supply voltage, V
DD
2 8 V
p
VDD = 3 V –0.2 1.8
Common-mode input voltage, V
IC
VDD = 5 V –0.2 3.8
V
Operating free-air temperature, T
A
–40 85 °C
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
HIGH-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
PARAMETER
TEST
T
A
VDD = 3 V VDD = 5 V
UNIT
CONDITIONS
MIN TYP MAX MIN TYP MAX
p
VO = 1 V, V
= 1 V,
25°C 0.6 8 1.1 8
VIOInput offset voltage
IC
,
RS = 50 Ω, RL = 10 k
Full range 10 10
mV
Average temperature of input 25°C to
°
α
VIO
g
offset voltage 85°C
2.7
2.7µV/°C
p
V
= 1 V,
25°C 0.1 0.1
p
IIOInput offset current (see Note 4)
O
,
VIC = 1 V
85°C 22 1000 24 1000
pA
p
V
= 1 V,
25°C 0.6 0.6
p
IIBInput bias current (see Note 4)
O
,
VIC = 1 V
85°C 175 2000 200 2000
pA
°
–0.2
–0.3
–0.2
–0.3
Common-mode input voltage range
25°C
t
o 2
t
o
2.3
t
o 4
t
o
4.2
V
V
ICR
gg
(see Note 5)
–0.2
–0.2
Full range
t
o
1.8
t
o
3.8
V
p
VIC = 1 V,
25°C 1.75 1.9 3.2 3.7
VOHHigh-level output voltage
V
ID
=
100 mV
,
IOH = –1 mA
Full range 1.7 3
V
p
VIC = 1 V,
25°C 120 150 90 150
VOLLow-level output voltage
V
ID
= –
100 mV
,
IOL = 1 mA
Full range 190 190
mV
Large-signal differential
VIC = 1 V,
25°C 3 11 5 23
A
VD
gg
voltage amplification
R
L
= 10 k,
See Note 6
Full range 2 3.5
V/mV
VO = 1 V,
25°C 65 78 65 80
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
m
i
n,
RS = 50
Full range 60 60
dB
Supply-voltage rejection ratio
VIC = 1 V,
25°C 70 95 70 95
k
SVR
ygj
(VDD/VIO)
V
O
= 1 V,
RS = 50
Full range 65 65
dB
I
I(SEL)
Bias select current V
I(SEL) = 0
25°C –1.2 –1.4 µA
pp
VO = 1 V,
25°C 325 1500 675 1600
IDDSupply current
V
IC
= 1 V,
No load
Full range 2000 2200
µ
A
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
HIGH-BIAS MODE
operating characteristics at specified free-air temperature, V
DD
= 3 V
TLV2341I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
VIC = 1 V,
V
I(PP)
= 1 V,
p
25°C 2.1
SR
Slew rate at unity gain
R
L
=
10 k
,
See Figure 92
C
L
=
20 pF
,
85°C
1.7
V/µs
p
f = kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 93
S
,
25°C
25
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 170
BOMMaximum output-swing bandwidth
OOH
,
RL = 10 k,
L
,
See Figure 92
85°C
145
kH
z
V
= 10 mV, C
= 20 pF,
25°C 790
B1Unity-gain bandwidth
I
,
RL = 10 k,
L
,
See Figure 94
85°C 690
kH
z
V
= 10 mV
,
f = B
,
–40°C 53°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
49°
See Figure 94
85°C 47°
operating characteristics at specified free-air temperature, VDD = 5 V
TLV2341I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 3.6
V
IC
= 1 V,
RL = 10 k,
V
I(PP)
= 1
V
85°C 2.8
SR
Slew rate at unity gain
L
,
CL = 20 pF,
25°C 2.9
V/µs
See Figure 92
V
I(PP)
= 2.5
V
85°C 2.3
p
f = 1 kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 93
S
,
25°C
25
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 320
BOMMaximum output-swing bandwidth
OOH
,
RL = 10 k,
L
,
See Figure 92
85°C
250
kH
z
V
= 10 mV, C
= 20 pF,
25°C 1.7
B1Unity-gain bandwidth
I
,
RL = 10 k,
L
,
See Figure 94
85°C
1.2
MH
z
V
= 10 mV
,
f = B
,
–40°C 49°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 10 k,
25°C
46°
See Figure 94
85°C 43°
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
HIGH-BIAS MODE
electrical characteristics, T
A
= 25°C
TLV2341I
PARAMETER TEST CONDITIONS
VDD = 3 V VDD = 5 V
UNIT
MIN TYP MAX MIN TYP MAX
V
IO
Input offset voltage
VO = 1 V, RS = 50 ,
VIC = 1 V, RL = 10 k
0.6 8 1.1 8 mV
I
IO
Input offset current (see Note 4) VO = 1 V, VIC = 1 V 0.1 0.1 pA
I
IB
Input bias current (see Note 4) VO = 1 V, VIC = 1 V 0.6 0.6 pA
–0.2 –0.3 –0.2 –0.3
V
ICR
C
ommon-mode input voltage
to to to to
V
ICR
range (see Note 5)
2 2.3 4 4.2
p
VIC = 1 V,
VID = 100 mV ,
VOHHigh-level output voltage
I
OH
= –
1
mA
1.75
1.9
3.2
3.7
V
p
V
= 1 V, V
= –100 mV,
VOLLow-level output voltage
IC
,
IOL = 1 mA
ID
,
120
15090150
mV
A
VD
Large-signal differential voltage amplification
VIC = 1 V, See Note 6
RL = 10 k,
3 11 50 23 V/mV
V
= 1 V, V
= V
min,
CMRR
Common-mode rejection ratio
O
,
RS = 50
IC ICR
,
65786580dB
Supply-voltage rejection ratio V
= 1 V, V
= 1 V,
k
SVR
ygj
(VDD/VIO)
O
,
RS = 50
IC
,
70957095dB
I
I(SEL)
Bias select current V
I(SEL)
= 0 –1.2 –1.4 µA
pp
VO = 1 V, VIC = 1 V,
IDDSupply current
O
No load
IC
325
1500
675
1600µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
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TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Table of Graphs
FIGURE
V
IO
Input offset voltage Distribution 2,3
α
VIO
Input offset voltage temperature coefficient Distribution 4,5
vs Output current 6
V
OH
High-level output voltage
vs Supply voltage
7
OH
gg
g
vs Temperature 8 vs Common-mode input voltage 9
p
vs Common mode in ut voltage
vs Temperature
9
10, 12
VOLLow-level output voltage
vs Differential input voltage
,
11
vs Low-level output current 13 vs Supply voltage 14
A
VD
Large-signal differential voltage amplification
yg
vs Temperature 15
VD
gg g
vs Frequency 26, 27
I
IB
Input bias current vs Temperature 16
I
IO
Input offset current vs Temperature 16
V
IC
Common-mode input voltage vs Supply voltage 17
pp
vs Supply voltage 18
IDDSupply current
yg
vs Temperature 19 vs Supply voltage 20
SR
Slew rate
yg
vs Temperature 21
Bias select current vs Supply voltage 22
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency 23
vs Temperature 24
B1Unity-gain bandwidth
vs Supply voltage 25 vs Supply voltage 28
φ
m
Phase margin
yg
vs Temperature 29
φ
m
g
vs Load capacitance 30
V
n
Equivalent input noise voltage vs Frequency 31 Phase shift vs Frequency 26, 27
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
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TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 2
50
40
20
10
0
30
–1 0 1
Percentage of Units – %
2345
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
VIO – Input Offset Voltage – mV
VDD = 3 V TA = 25°C P Package
–5 –4 –3 –2
Figure 3
50
40
20
10
0
30
–1 0 1602345
Percentage of Units – %
VIO – Input Offset Voltage – mV
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
VDD = 5 V TA = 25°C P Package
–5 –4 –3 –2
Figure 4
–10 0 2
Percentage of Units – %
46810
α
VIO
– Temperature Coefficient – µV/°C
50
40
20
10
0
30
VDD = 3 V TA = 25°C to 85°C P Package
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
–8 –6 –4 –2
Figure 5
α
VIO
– Temperature Coefficient – µV/°C
Percentage of Units – %
10 0246810
50
40
20
10
0
30
60
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
VDD = 5 V TA = 25°C to 85°C P Package Outliers: (1) 20.5 mV/°C
–8 –6 –4 –2
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 6
V0H – High-Level Output Voltage – V
V
OH
3
2
1
0
0 – 2– 4– 6
4
5
– 8
IOH – High-Level Output Current – mA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VIC = 1 V VID = 100 mV TA = 25°C
VDD = 3 V
VDD = 5 V
Figure 7
V0H – High-Level Output Voltage – V
V
OH
4
2
0
8
6
02468
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
VIC = 1 V VID = 100 mV RL = 1 M TA = 25°C
Figure 8
1.8
1.2
0.6
0
2.4
3
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– 75 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
V0H – High-Level Output Voltage – V
V
OH
VDD = 3 V VIC = 1 V VID = 100 mV
IOH = –500 µA IOH = –1 mA IOH = –2 mA IOH = –3 mA IOH = –4 mA
Figure 9
VOL – Low-Level Output V oltage – mV
V
OL
500
400
300
01 2
600
700
34
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VIC – Common-Mode Input Voltage – V
VDD = 5 V IOL = 5 mA TA = 25°C
VID = –100 mV
VID = –1 V
600
650
550
450
350
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 10
– 75 – 50 – 25 0 25 50 75 100 125
185
150
100
75
50
125
200
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
VOL – Low-Level Output V oltage – mV
V
OL
VDD = 3 V VIC = 1 V VID = –100 mV IOL = 1 mA
Figure 11
400
200
100
0
0
600
700
800
500
300
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VOL – Low-Level Output V oltage – mV
V
OL
VID – Differential Input Voltage – V
VDD = 5 V VIC = |VID/2| IOL = 5 mA TA = 25°C
–1 –2 –3 –4 –5 –6 –7 –8
Figure 12
400
200
100
0
600
700
800
500
300
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
900
– 75 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
VOL – Low-Level Output V oltage – mV
V
OL
VDD = 5 V VIC = 0.5 V VID = –1 V IOL = 5 mA
Figure 13
0.5
0.4
0.2
0.1 0
0.9
0.3
0123456
0.7
0.6
0.8
1
78
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VOL – Low-Level Output Voltage – V
V
OL
IOL – Low-Level Output Current – mA
VIC = 1 V VID = –100 mV TA = 25°C
VDD = 3 V
VDD = 5 V
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 14
02468
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
40
30
0
20
50
10
RL = 10 k
TA = –40°C
TA = 25°C
TA = 85°C
60
– Large-Signal Differential Voltage A
VD
Amplification – V/mV
Figure 15
TA – Free-Air Temperature – °C
20 15
35
30
45
50
10
40
25
5
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
VDD = 3 V
RL = 10 k
0
VDD = 5 V
– Large-Signal Differential Voltage A
VD
Amplification – V/mV
Figure 16
INPUT BIAS CURRENT AND INPUT OFFSET
CURRENT
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
IIB and IIO – Input Bias and Offset Currents – pA
I
IB
I
IO
10
4
10
3
10
2
10
1
1
0.1 25 45 65 85 105 125
VDD = 3 V VIC = 1 V See Note A
I
IB
I
IO
35 55 75 95 115
NOTE: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 17
COMMON-MODE INPUT VOLTAGE
POSITIVE LIMIT
vs
SUPPLY VOLTAGE
4
2
0
8
6
02468
V
DD
– Supply Voltage – V
VIC – Common-Mode Input Voltage – V
IC
V
TA = 25°C
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 18
1.2
0.8
0.4
0
0246
1.6
2
8
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
IDD – Supply Current – mA
DD
I
TA = 25°C
TA = –40°C
VIC = 1 V VO = 1 V No Load
TA = 85°C
Figure 19
IDD – Supply Current – mA
DD
I
1
0.5
0
–75 0 25 50
1.5
2
75 100 125
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
VIC = 1 V VO = 1 V No Load
VDD = 3 V
1.75
0.75
0.25
1.25
–50 –25
VDD = 5 V
Figure 20
02468
SLEW RATE
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
4
2
1
0
6
3
SR – Slew Rate – V/us
5
sµV/
8
7
V
I(PP)
= 1 V AV = 1 RL = 10 k CL = 20 pF TA = 25°C
Figure 21
4
2
1
0
6
3
5
8
7
–75 –50 –25 0 25 50 75 100 125
SLEW RATE
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
V
I(PP)
= 1 V AV = 1 RL = 10 k CL = 20 pF
VDD = 5 V
VDD = 3 V
SR – Slew Rate – V/ussµV/
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 22
Bias Select Current – nA
– 1.2
024 6
– 3
8
– 2.4
– 1.8
– 0.6
VDD – Supply Voltage – V
BIAS SELECT CURRENT
vs
SUPPLY VOLTAGE
TA = 25°C V
I(SEL)
= 0
Aµ
Figure 23
10 10 1000 10000
3
2
1
0
4
5
f – Frequency – kHz
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
RL = 10 k
TA = –40°C
TA = 85°C
TA = 25°C
0
VDD = 3 V
VDD = 5 V
– Maximum Peak-to-Peak Output Voltage – V
V
O(PP)
Figure 24
–75 –50 –25 0 25 50 75 100 125
B1 – Unity-Gain Bandwidth – MHz
1.1
2.3
2.9
3.5
1.7
0.5
B
1
VDD = 3 V
VI = 10 mV RL = 10 k CL = 20 pF
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
VDD = 5 V
Figure 25
1.3
0.9
0.7
0.5
1.7
1.9
1.5
1.1
2.1
012345678
V
I
= 10 mV RL = 10 k CL = 20 pF TA = 25°C
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
0.3
0.1
B1 – Unity-Gain Bandwidth – MHz
B
1
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
10 100 1 K 10 K 100 K 1 M
f – Frequency – Hz
10 M
Phase Shift
–60°
–30°
0°
30°
60°
90°
120°
150°
180°
10
7
10
6
10
5
10
4
10
3
10
2
10
1
0.1
VDD = 3 V RL = 10 k CL = 20 pF TA = 25°C
A
VD
Phase Shift
1
– Large-Signal Differential Voltage Amplification A
VD
Figure 26
10
7
10
6
10
5
10
4
10
3
10
2
10
1
1
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
10 100 1 k 10 k 100 k 1 M 10 M
f – Frequency – Hz
Phase Shift
–60°
–30°
0°
30°
60°
90°
120°
150°
180°
A
VD
Phase Shift
0.1
VDD = 5 V RL = 10 k CL = 20 pF TA = 25°C
– Large-Signal Differential Voltage Amplification A
VD
Figure 27
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
18
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Figure 28
024 68
om – Phase Margin
PHASE MARGIN
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
φ
m
VI = 10 mV RL = 10 k CL = 20 pF TA = 25°C
53°
51°
49°
47°
45°
Figure 29
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
–75 –50 –25 –0 25 50 75 100 125
TA – Free-Air Temperature – °C
VI = 10 mV RL = 10 k CL = 20 pF
om – Phase Margin
φ
m
60° 58°
56° 54°
52° 50°
48° 46°
44° 42°
40°
VDD = 5 V
VDD = 3 V
Figure 30
020406080100
PHASE MARGIN
vs
LOAD CAPACITANCE
om – Phase Margin
φ
m
CL – Load Capacitance – pF
VDD = 5 V
VI = 10 mV RL = 10 k TA = 25°C
50°
45°
40°
35°
30°
25°
10 30 50 70 90
VDD = 3 V
Figure 31
f – Frequency – Hz
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
1 10 100 1000
Vn – Equivalent Input Noise Voltage – nV Hz
V
n
nV/ Hz
200
100
0
300
400
RS = 20 TA = 25°C
VDD = 5 V
VDD = 3 V
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
19
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MEDIUM-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
PARAMETER
TEST
T
A
VDD = 3 V VDD = 5 V
UNIT
CONDITIONS
MIN TYP MAX MIN TYP MAX
VO = 1 V, V
= 1 V
,
25°C 0.6 8 1.1 8
V
IO
Input offset voltage
V
IC
1
V,
RS = 50 ,
mV
S
RL = 100 k
Full range
10
10
Average temperature coefficient of 25°C to
°
α
VIO
g
input offset voltage 85°C
1
1.7µV/°C
p
V
= 1 V,
25°C 0.1 0.1
p
IIOInput offset current (see Note 4)
O
,
VIC = 1 V
85°C 22 1000 24 1000
pA
p
V
= 1 V,
25°C 0.6 0.6
p
IIBInput bias current (see Note 4)
O
,
VIC = 1 V
85°C 175 2000 200 2000
pA
°
–0.2
–0.3
–0.2
–0.3
Common-mode input voltage range
25°C
to2to
2.3
to4to
4.2
V
V
ICR
gg
(see Note 5)
–0.2
–0.2
Full range
to
1.8
to
3.8
V
p
VIC = 1 V,
25°C 1.75 1.9 3.2 3.9
VOHHigh-level output voltage
V
ID
=
100 mV
,
IOH = –1 mA
Full range 1.7 3
V
p
VIC = 1 V,
25°C 115 150 95 150
VOLLow-level output voltage
V
ID
= –
100 mV
,
IOL = 1 mA
Full range 190 190
mV
Large-signal differential
VIC = 1 V,
25°C 25 83 25 170
A
VD
gg
voltage amplification
R
L
=
100 k
,
See Note 6
Full range 15 15
V/mV
VO = 1 V,
25°C 65 92 65 91
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
RS = 50
Full range 60 60
dB
Supply-voltage rejection ratio
VIC = 1 V,
25°C 70 94 70 94
k
SVR
ygj
(VDD/VIO)
V
O
= 1 V,
RS = 50
Full range 65 65
dB
I
I(SEL)
Bias select current V
I(SEL) = 0
25°C –100 –130 nA
pp
VO = 1 V,
25°C 65 250 105 280
IDDSupply current
V
IC
= 1 V,
No load
Full range 360 400
µ
A
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
20
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MEDIUM-BIAS MODE
operating characteristics at specified free-air temperature, V
DD
= 3 V
TLV2341I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
VIC = 1 V,
V
I(PP)
= 1 V,
p
25°C 0.38
SR
Slew rate at unity gain
R
L
=
100 k
,
See Figure 92
C
L
=
20 pF
,
85°C
0.29
V/µs
p
f = kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 93
S
,
25°C
32
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 34
BOMMaximum output-swing bandwidth
OOH
,
RL = 100 k,
L
,
See Figure 92
85°C
32
kH
z
V
= 10 mV, C
= 20 pF,
25°C 300
B1Unity-gain bandwidth
I
,
RL = 100 k,
L
,
See Figure 94
85°C 235
kH
z
V
= 10 mV
,
f = B
,
–40°C 42°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 100 k,
25°C
39°
See Figure 94
85°C 36°
operating characteristics at specified free-air temperature, VDD = 5 V
TLV2341I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 0.43
V
IC
= 1 V,
RL = 100 k,
V
I(PP)
= 1
V
85°C 0.35
SR
Slew rate at unity gain
L
,
CL = 20 pF,
25°C 0.40
V/µs
See Figure 92
V
I(PP)
= 2.5
V
85°C 0.32
p
f =1 kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 93
S
,
25°C
32
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 55
BOMMaximum output-swing bandwidth
OOH
,
RL = 100 k,
L
,
See Figure 92
85°C
45
kH
z
V
= 10 mV, C
= 20 pF,
25°C 525
B1Unity-gain bandwidth
I
,
RL = 100 k,
L
,
See Figure 94
85°C
370
kH
z
V
= 10 mV
,
f = B
,
–40°C 43°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 100 k,
25°C
40°
See Figure 94
85°C 38°
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
21
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MEDIUM-BIAS MODE
electrical characteristics, T
A
= 25°C
TLV2341I
PARAMETER TEST CONDITIONS
VDD = 3 V VDD = 5 V
UNIT
MIN TYP MAX MIN TYP MAX
V
IO
Input offset voltage
VO = 1 V, RS = 50 ,
VIC = 1 V, RL = 100 k
0.6 8 1.1 8 mV
I
IO
Input offset current (see Note 4) VO = 1 V, VIC = 1 V 0.1 0.1 pA
I
IB
Input bias current (see Note 4) VO = 1 V, VIC = 1 V 0.6 0.6 pA
Common-mode input voltage
–0.2
–0.3
–0.2
–0.3
V
ICR
g
range (see Note 5)
to2to
2.3
to4to
4.2
V
p
V
= 1 V, V
= 100 mV ,
VOHHigh-level output voltage
IC
,
IOH = –1 mA
ID
,
1.75
1.9
3.2
3.9
V
p
V
= 1 V, V
= –100 mV,
VOLLow-level output voltage
IC
,
IOL = 1 mA
ID
,
115
15095150
mV
A
VD
Large-signal differential voltage amplification
VIC = 1 V, See Note 6
RL = 100 k,
25 83 25 170 V/mV
V
= 1 V, V
= V
min,
CMRR
Common-mode rejection ratio
O
,
RS = 50
IC ICR
,
65926591dB
Supply-voltage rejection ratio V
= 1 V, V
= 1 V,
k
SVR
ygj
(VDD/VID)
O
,
RS = 50
IC
,
70947094dB
I
I(SEL)
Bias select current V
I(SEL)
= 0 –100 –130 nA
pp
VO = 1 V, VIC = 1 V,
IDDSupply current
O
No load
IC
65
250
105
280µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
22
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Table of Graphs
FIGURE
V
IO
Input offset voltage Distribution 32, 33
α
VIO
Input offset voltage temperature coefficient Distribution 34, 35
vs Output current 36
V
OH
High-level output voltage
vs Supply voltage
37
OH
gg
g
vs Temperature 38 vs Common-mode input voltage 39
p
vs Common mode in ut voltage
vs Temperature
39
40, 42
VOLLow-level output voltage
vs Differential input voltage
,
41
vs Low-level output current 43 vs Supply voltage 44
A
VD
Large-signal differential voltage amplification
yg
vs Temperature 45
VD
gg g
vs Frequency 56, 57
I
IB
Input bias current vs Temperature 46
I
IO
Input offset current vs Temperature 46
V
IC
Common-mode input voltage vs Supply voltage 47
pp
vs Supply voltage 48
IDDSupply current
yg
vs Temperature 49 vs Supply voltage 50
SR
Slew rate
yg
vs Temperature 51
Bias select current vs Supply current 52
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency 53
vs Temperature 54
B1Unity-gain bandwidth
vs Supply voltage 55 vs Supply voltage 58
φ
m
Phase margin
yg
vs Temperature 59
φ
m
g
vs Load capacitance 60
V
n
Equivalent input noise voltage vs Frequency 61 Phase shift vs Frequency 56, 57
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
23
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 32
50
40
20
10
0
30
–1 0 1
Percentage of Units – %
2345
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
VIO – Input Offset Voltage – mV
VDD = 3 V TA = 25°C P Package
–5 –4 –3 –2
Figure 33
50
40
20
10
0
30
–1 0 1602345
Percentage of Units – %
VIO – Input Offset Voltage – mV
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
VDD = 5 V TA = 25°C P Package
–5 –4 –3 –2
Figure 34
–10 0 2
Percentage of Units – %
46810
α
VIO
– Temperature Coefficient – µV/°C
50
40
20
10
0
30
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
–8 –6 –4 –2
VDD = 3 V TA = 25°C to 85°C P Package
Figure 35
α
VIO
– Temperature Coefficient – µV/°C
Percentage of Units – %
10 0246810
50
40
20
10
0
30
60
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
VDD = 5 V TA = 25°C to 85°C P Package Outliers: (1) 33 mV/°C
–8 –6 –4 –2
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
24
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 36
V0H – High-Level Output Voltage – V
V
OH
3
2
1
0
0
4
5
IOH – High-Level Output Current – mA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VDD = 3 V
VDD = 5 V
VIC = 1 V VID = 100 mV TA = 25°C
–2 –4 –6 –8
Figure 37
V0H – High-Level Output Voltage – V
V
OH
4
2
0
8
6
02468
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
VIC = 1 V VID = 100 mV RL = 100 k TA = 25°C
Figure 38
1.8
1.2
0.6
0
2.4
3
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
VDD = 3 V VIC = 1 V VID = 100 mV
V0H – High-Level Output Voltage – V
V
OH
IOH = –500 µA IOH = –1 mA IOH = –2 mA IOH = –3 mA IOH = –4 mA
Figure 39
VOL – Low-Level Output V oltage – mV
V
OL
500
400
300
01 2
600
700
34
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VIC – Common-Mode Input Voltage – V
VDD = 5 V IOL = 5 mA TA = 25°C
VID = –100 mV
VID = –1 V
650
550
450
350
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
25
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 40
–75 –50 –25 0 25 50 75 100 125
125
110
80 65 50
185
95
155
140
170
200
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
VOL – Low-Level Output V oltage – mV
V
OL
VDD = 3 V VIC = 1 V VID = –100 mV IOL = 1 mA
Figure 41
400
200
100
0
0–2–4
600
700
800
–6 –8
500
300
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VOL – Low-Level Output V oltage – mV
V
OL
VID – Differential Input Voltage – V
VDD = 5 V VIC = |VID/2| IOL = 5 mA TA = 25°C
Figure 42
400
200
100
0
600
700
800
500
300
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
900
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
VOL – Low-Level Output V oltage – mV
V
OL
VDD = 5 V VIC = 0.5 V VID = –1 V IOL = 5 mA
Figure 43
500
400
200 100
0
900
300
0123456
700
600
800
1000
78
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VOL – Low-Level Output V oltage – mV
V
OL
IOL – Low-Level Output Current – mA
VDD = 5 V
VIC = 1 V VID = –100 mV TA = 25°C
VDD = 3 V
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
26
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 44
02468
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
200 150
350
0
300
450
500
100
400
250
50
RL = 100 k
TA = –40°C
TA = 25°C
TA = 85°C
– Large-Signal Differential Voltage A
VD
Amplification – V/mV
Figure 45
200 150
350
300
450
500
100
400
250
50
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
VDD = 5 V
VDD = 3 V
RL = 100 k
0
TA – Free-Air Temperature – °C
– Large-Signal Differential Voltage A
VD
Amplification – V/mV
Figure 46
INPUT BIAS CURRENT AND INPUT OFFSET CURREN
T
vs
FREE-AIR TEMPERATURE
TA – Free-sAir Temperature – °C
IIB and IIO – Input Bias and Offset Currents – pA
I
IB
I
IO
10
4
10
3
10
2
10
1
1
.01
25 45 65 85 105 125
VDD = 3 V VIC = 1 V See Note A
I
IB
I
IO
NOTE A: The typical values of input bias current and input offset
current below 5 pA are determined mathematically.
Figure 47
COMMON-MODE INPUT VOLTAGE POSITIVE LIMIT
vs
SUPPLY VOLTAGE
4
2
0
8
6
02468
V
DD
– Supply Voltage – V
VIC – Common-Mode Input Voltage
IC
V
TA = 25°C
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
27
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 48
IDD – Supply Current – uA
100
50
25
0
02 4
150
175
200
68
125
75
VDD – Supply Voltage – V
DD
I
Aµ
250
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VIC = 1 V VO = 1 V No Load
TA = –40°C
TA = 25°C
TA = 85°C
Figure 49
75
50
25
0 –75 –50 –25 0 25 50
100
125
150
75 100 125
TA – Free-Air Temperature – °C
175
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
VIC = 1 V VO = 1 V No Load
VDD = 5 V
VDD = 3 V
IDD – Supply Current – uA
DD
I
Aµ
Figure 50
02468
0.7
0.5
0.4
0.3
0.9
0.6
SR – Slew Rate – V/us
0.8
sµV/
VIC = 1 V V
I(PP)
= 1 V AV = 1 RL = 100 k CL = 20 pF TA = 25°C
VDD – Supply Voltage – V
SLEW RATE
vs
SUPPLY VOLTAGE
Figure 51
0.7
0.5
0.4
0.3
0.9
0.6
0.8
–75 –50 –25 0 25 50 75 100 125
VDD = 5 V
VDD = 3 V
VIC = 1 V V
I(PP)
= 1 V AV = 1 RL = 100 k CL = 20 pF
0.2
TA – Free-Air Temperature – °C
SLEW RATE
vs
FREE-AIR TEMPERATURE
SR – Slew Rate – V/us
sµV/
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
28
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 52
VDD – Supply Voltage – V
– 150
– 120
– 30
0
024 6
Bias Select Current – nA
BIAS SELECT CURRENT
vs
SUPPLY VOLTAGE
8
– 90
– 180
– 60
TA = 25°C V
I(SEL)
= 1/2 V
DD
– 300 – 270 – 240
– 210
Figure 53
10 10 100 1000
3
2
1
0
4
5
f – Frequency – kHz
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
RL = 100 k
TA = –40°C
VDD = 3 V
TA = 85°C
TA = 25°C
VDD = 5 V
– Maximum Peak-to-Peak Output Voltage – V
V
O(PP)
Figure 54
–75 –50 –25 0 25 50 75 100
600
400
300
200
800
900
1000
700
500
VDD = 5 V
VDD = 3 V
VI = 10 mV RL = 100 k CL = 20 pF
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
B1 – Unity-Gain Bandwidth – kHz
B
1
125
Figure 55
B1 – Unity-Gain Bandwidth – kHz
B
1
600
400
300
200
800
900
700
500
1000
012345678
V
I
= 10 mV RL = 100 k CL = 20 pF TA = 25°C
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
29
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
10
7
10
6
10
5
10
4
10
3
10
2
10
1
1
0.1 1 10 100 1 k 10 k 100 k
f – Frequency – Hz
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
1 M
Phase Shift
60°
30°
90°
120°
150°
180°
Phase Shift
A
VD
VDD = 3 V RL = 100 k CL = 20 pF TA = 25°C
–60°
–30°
– Large-Signal Differential Voltage Amplification
A
VD
0°
Figure 56
1 10 100 1 k 10 k 100 k 1 M
10
7
10
6
10
5
10
4
10
3
10
2
10
1
0.1
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
f – Frequency – Hz
Phase Shift
VDD = 5 V RL = 100 k CL = 20 pF TA = 25°C
1
60°
30°
90°
–60°
–30°
0°
120°
150°
180°
Phase Shift
A
VD
– Large-Signal Differential Voltage Amplification A
VD
Figure 57
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
30
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Figure 58
VDD – Supply Voltage – V
01234 56
PHASE MARGIN
vs
SUPPLY VOLTAGE
78
V
I
= 10 mV RL = 100 k CL = 20 pF TA = 25°C
om – Phase Margin
φ
m
50° 48°
46°
44° 42° 40° 38°
36°
34° 32°
30°
Figure 59
TA – Free-Air Temperature – °C
– 75 – 25 0 50 100 125– 50 25 75
VDD = 3 V
VI = 10 mV RL = 100 k CL = 20 pF
VDD = 5 V
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
om – Phase Margin
φ
m
45°
43°
41°
39°
37°
35°
Figure 60
om – Phase Margin
φ
m
44°
42°
40°
38°
36°
34°
32°
30°
0204060
PHASE MARGIN
vs
LOAD CAPACITANCE
80 100
VI = 10 mV TA = 25°C RL = 100 k
VDD = 3 V
VDD = 5 V
CL – Load Capacitance – pF
28°
10 30 50 70 90
Figure 61
200
150
100
0
110
250
f – Frequency – Hz
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
300
1000100
RS = 20 TA = 25°C
VDD = 3 V
50
Vn – Equivalent Input Noise Voltage – nV Hz
V
n
nV/ Hz
VDD = 5 V
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
31
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
LOW-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
PARAMETER
TEST
T
A
VDD = 3 V VDD = 5 V
UNIT
CONDITIONS
MIN TYP MAX MIN TYP MAX
p
VO = 1 V, V
I
= 1 V,
25°C 0.6 8 1.1 8
VIOInput offset voltage
IC
,
RS = 50 , RL = 1 M
Full range 10 10
mV
Average temperature of 25°C to
°
α
VIO
g
input offset voltage 85°C
1
1.1µV/°C
p
V
= 1 V,
25°C 0.1 0.1
p
IIOInput offset current (see Note 4)
O
,
VIC = 1 V
85°C 22 1000 24 1000
pA
p
V
= 1 V,
25°C 0.6 0.6
p
IIBInput bias current (see Note 4)
O
,
VIC = 1 V
85°C 175 2000 200 2000
pA
°
–0.2
–0.3
–0.2
–0.3
Common-mode input
25°C
to2to
2.3
to4to
4.2
V
V
ICR
voltage range (see Note 5)
–0.2
–0.2
Full range
to
1.8
to
3.8
V
p
VIC = 1 V,
25°C 1.75 1.9 3.2 3.8
VOHHigh-level output voltage
V
ID
=
100 mV
,
IOH = –1 mA
Full range 1.7 3
V
p
VIC = 1 V,
25°C 115 150 95 150
VOLLow-level output voltage
V
ID
= –
100 mV
,
IOL = 1 mA
Full range 190 190
mV
Large-signal differential
VIC = 1 V,
25°C 50 400 50 520
A
VD
gg
voltage amplification
R
L
= 1 M,
See Note 6
Full range 50 50
V/mV
VO = 1 V,
25°C 65 88 65 94
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
RS = 50
Full range 60 60
dB
Supply-voltage rejection ratio
VIC = 1 V,
25°C 70 86 70 86
k
SVR
ygj
(VDD/VIO)
V
O
=
1 V
,
RS = 50
Full range 65 65
dB
I
I(SEL)
Bias select current V
I(SEL) = 0
25°C 10 65 nA
pp
VO = 1 V,
25°C 5 17 10 17
IDDSupply current
V
IC
= 1 V,
No load
Full range 27 27
µ
A
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, V
O(PP)
= 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
32
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
LOW-BIAS MODE
operating characteristics at specified free-air temperature, V
DD
= 3 V
TLV2341I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
VIC = 1 V,
V
I(PP)
= 1 V,
p
25°C 0.02
SR
Slew rate at unity gain
R
L
=
1 M
,
See Figure 92
C
L
=
20 pF
,
85°C
0.02
V/µs
p
f = kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 93
S
,
25°C
68
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 2.5
BOMMaximum output-swing bandwidth
OOH
,
RL = 1 M,
L
,
See Figure 92
85°C
2
kH
z
V
= 10 mV, C
= 20 pF,
25°C 27
B1Unity-gain bandwidth
I
,
RL = 1 M,
L
,
See Figure 94
85°C 21
kH
z
V
= 10 mV,f = B
,
–40°C 39°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
34°
See Figure 94
85°C 28°
operating characteristics at specified free-air temperature, VDD = 5 V
TLV2341I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 0.03
V
IC
= 1 V,
RL = 1 M,
V
I(PP)
= 1
V
85°C 0.03
SR
Slew rate at unity gain
L
,
CL = 20 pF,
25°C 0.03
V/µs
See Figure 92
V
I(PP)
= 2.5
V
85°C 0.02
p
f =1 kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 93
S
,
25°C
68
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 5
BOMMaximum output-swing bandwidth
OOH
,
RL = 1 M,
L
,
See Figure 92
85°C
4
kH
z
V
= 10 mV, C
= 20 pF,
25°C 85
B1Unity-gain bandwidth
I
,
RL = 1 M,
L
,
See Figure 94
85°C
55
kH
z
V
= 10 mV
,
f = B
,
–40°C 38°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
34°
See Figure 94
85°C 28°
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
33
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
LOW-BIAS MODE
electrical characteristics, T
A
= 25°C
TLV2341Y
PARAMETER TEST CONDITIONS
VDD = 3 V VDD = 5 V
UNIT
MIN TYP MAX MIN TYP MAX
V
IO
Input offset voltage
VO = 1 V, RS = 50 ,
VIC = 1 V, RL = 1 M
0.6 8 1.1 8 mV
I
IO
Input offset current (see Note 4)
VO = 1 V, VIC = 1 V 0.1 0.1 pA
I
IB
Input bias current (see Note 4)
VO = 1 V, VIC = 1 V 0.6 0.6 pA
–0.2 –0.3 –0.2 –0.3
V
ICR
C
ommon-mode input voltage
to to to to
V
ICR
range (see Note 5)
2 2.3 4 4.2
p
V
= 1 V, V
= 100 mV ,
VOHHigh-level output voltage
IC
,
IOH = –1 mA
ID
,
1.75
1.9
3.2
3.8
V
p
V
= 1 V, V
= –100 mV,
VOLLow-level output voltage
IC
,
IOL = 1 mA
ID
,
115
15095150
mV
A
VD
Large-signal differential voltage amplification
VIC = 1 V, See Note 6
RL = 1 M,
50 400 50 520 V/mV
V
= 1 V, V
= V
min,
CMRR
Common-mode rejection ratio
O
,
RS = 50
IC ICR
,
65886594dB
Supply-voltage rejection ratio V
= 3 V to 5 V, V
= 1 V,
k
SVR
ygj
(VDD/VID)
DD
,
VO = 1 V,
IC
,
RS = 50
70867086dB
I
I(SEL)
Bias select current V
I(SEL)
= 0 10 65 nA
pp
VO = 1 V, VIC = 1 V,
IDDSupply current
O
No load
IC
51710
17µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
34
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Table of Graphs
FIGURE
V
IO
Input offset voltage Distribution 62, 63
α
VIO
Input offset voltage temperature coefficient Distribution 64, 65
vs Output current 66
V
OH
High-level output voltage
vs Supply voltage
67
OH
gg
g
vs Temperature 68 vs Common-mode input voltage 69
p
vs Common mode in ut voltage
vs Temperature
69
70, 72
VOLLow-level output voltage
vs Differential input voltage
,
71
vs Low-level output current 73 vs Supply voltage 74
A
VD
Large-signal differential voltage amplification
yg
vs Temperature 75
VD
gg g
vs Frequency 86, 87
I
IB
Input bias current vs Temperature 76
I
IO
Input offset current vs Temperature 76
V
IC
Common-mode input voltage vs Supply voltage 77
pp
vs Supply voltage 78
IDDSupply current
yg
vs Temperature 79 vs Supply voltage 80
SR
Slew rate
yg
vs Temperature 81
Bias select current vs Supply current 82
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency 83
vs Temperature 84
B1Unity-gain bandwidth
vs Supply voltage 85 vs Supply voltage 88
φ
m
Phase margin
yg
vs Temperature 89
φ
m
g
vs Load capacitance 90
V
n
Equivalent input noise voltage vs Frequency 91 Phase shift vs Frequency 86, 87
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
35
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 62
50
40
20
10
0
30
–1 0 1
Percentage of Units – %
2345
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
VIO – Input Offset Voltage – mV
VDD = 3 V TA = 25°C P Package
–5 –4 –3 –2
Figure 63
50
40
20
10
0
30
–1 0 1
70
60
2345
Percentage of Units – %
VIO – Input Offset Voltage – mV
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
VDD = 5 V TA = 25°C P Package
–5 –4 –3 –2
Figure 64
–8 –6 –4 –2
–10 0 2
Percentage of Units – %
46810
50
40
20
10
0
30
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
VDD = 3 V TA = 25°C to 85°C P Package
α
VIO
– Temperature Coefficient – µV/°C
Figure 65
α
VIO
– Temperature Coefficient – µV/°C
Percentage of Units – %
10 0246810
50
40
20
10
0
30
70
60
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
VDD = 5 V TA = 25°C to 85°C P Package Outliers: (1) 19.2 mV/°C (1) 12.1 mV/°C
–8 –6 –4 –2
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
36
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 66
V0H – High-Level Output Voltage – V
V
OH
3
2
1
0
0
4
5
IOH – High-Level Output Current – mA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VDD = 3 V
VDD = 5 V
VIC = 1 V VID = 100 mV TA = 25°C
–2 –4 –6 –8
Figure 67
V0H – High-Level Output Voltage – V
V
OH
4
2
0
8
6
02468
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
VIC = 1 V VID = 100 mV RL = 1 M TA = 25°C
Figure 68
1.8
1.2
0.6
0
2.4
3
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
V0H – High-Level Output Voltage – V
V
OH
VDD = 3 V VIC = 1 V VID = 100 mV
IOH = – 500 µA IOH = –1 mA IOH = –2 mA IOH = –3 mA IOH = –4 mA
Figure 69
VOL – Low-Level Output V oltage – mV
V
OL
500
400
350
300
01 2
600
650
700
34
550
450
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VIC – Common-Mode Input Voltage – V
VID = –1 V
VID = –100 mV
VDD = 5 V IOL = 5 mA TA = 25°C
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
37
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 70
–75 –50 –25 0 25 50 75 100 125
125
110
80 65 50
185
95
155
140
170
200
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
VOL – Low-Level Output V oltage – mV
V
OL
VDD = 3 V VIC = 1 V VID = –100 mV IOL = 1 mA
Figure 71
400
200
100
0
0–2–4
600
700
800
–6 –8
500
300
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VOL – Low-Level Output V oltage – mV
V
OL
VID – Differential Input Voltage – V
VDD = 5 V VIC = |VID/2| IOL = 5 mA TA = 25°C
Figure 72
400
200
100
0
600
700
800
500
300
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
900
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
VOL – Low-Level Output V oltage – mV
V
OL
VDD = 5 V VIC = 0.5 V VID = –1 V IOL = 5 mA
Figure 73
0.5
0.4
0.2
0.1 0
0.9
0.3
0123456
0.7
0.6
0.8
1
78
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VOL – Low-Level Output V oltage – mV
V
OL
IOL – Low-Level Output Current – mA
VIC = 1 V VID = –1 V TA = 25°C
VDD = 3 V
VDD = 5 V
TLV2341, TLV2341Y LinCMOS PROGRAMMABLE LOW-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
38
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 74
VDD – Supply Voltage – V
1000
800
200
0
024 6
1400
1800
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
2000
8
600
1600
1200
400
TA = –40°C
TA = 25°C
RL = 1 M
TA = 85°C
– Large-Signal Differential Voltage A
VD
Amplification – V/mV
Figure 75
–75
TA – Free-Air Temperature – °C
0 25 50 75 100 125
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
RL = 1 M
VDD = 5 V
VDD = 3 V
1000
800
200
0
1400
1800
2000
600
1600
1200
400
–50 –25
– Large-Signal Differential Voltage A
VD
Amplification – V/mV
Figure 76
INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
IIB and IIO – Input Bias and Offset Currents – pA
I
IB
I
IO
10
4
10
3
10
2
10
1
1
0.1 25 45 65 85 105 125
VDD = 3 V VIC = 1 V See Note A
I
IB
I
IO
35 55 75 95 115
NOTE A: The typical values of input bias current and input offset
current below 5 pA are determined mathematically.
Figure 77
COMMON-MODE INPUT VOLTAGE
POSITIVE LIMIT
vs
SUPPLY VOLTAGE
4
2
0
8
6
02468
V
DD
– Supply Voltage – V
VIC – Common-Mode Input Voltage
IC
V
TA = 25°C
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 78
IDD – Supply Current – uA
DD
I
Aµ
20
10
5
0
30
35
40
25
15
VDD – Supply Voltage – V
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
45
02468
V
IC
= 1 V VO = 1 V No Load
TA = –40°C
TA = 25°C
TA = 85°C
Figure 79
15
10
5
0
20
25
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
30
TA – Free-Air Temperature – °C
–75 –50 –25 0 25 50 75 100 125
VIC = 1 V VO = 1 V No Load
VDD = 5 V
VDD = 3 V
IDD – Supply Current – uA
DD
I
Aµ
Figure 80
0.04
0.02
0.01
0
0.06
0.03
02468
0.05
SLEW RATE
vs
SUPPLY VOLTAGE
0.07
VDD – Supply Voltage – V
VIC = 1 V V
I(PP)
= 1 V AV = 1 RL = 1 M CL = 20 pF TA = 25°C
SR – Slew Rate – V/us
sµV/
Figure 81
0.04
0.02
0.01
0
0.06
0.07
0.05
0.03
SLEW RATE
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
VIC = 1 V V
I(PP)
= 1 V AV = 1 RL = 1 M CL = 20 pF
VDD = 5 V
VDD = 3 V
SR – Slew Rate – V/us
sµV/
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 82
60
0
024 6
Bias Select Current – nA
150
8
120
90
30
VDD – Supply Voltage – V
BIAS SELECT CURRENT
vs
SUPPLY VOLTAGE
TA = 25°C V
I(SEL)
= V
DD
Figure 83
3
2
1
0
4
f – Frequency – kHz
5
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
0.1 1 10 100
RL = 1 M
TA = –40°C
VDD = 3 V
TA = 85°C
VDD = 5 V
TA = 25°C
– Maximum Peak-to-Peak Output Voltage – V
V
O(PP)
Figure 84
B1 – Unity-Gain Bandwidth – kHz
80
50
35
20
110
125
140
95
65
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
B
1
VI = 10 mV RL = 1 M CL = 20 pF
VDD = 5 V
VDD = 3 V
Figure 85
70
60
40 30 20
110
50
0123456
90
80
100
120
78
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
B1 – Unity-Gain Bandwidth – MHz
B
1
VI = 10 mV RL = 1 M CL = 20 pF TA = 25°C
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
1 10 100 1 k 10 k 100 k
f – Frequency – Hz
1 M
Phase Shift
–60°
–30°
0°
30°
60°
90°
120°
150°
180°
10
7
10
6
10
5
10
4
10
3
10
2
10
1
0.1
VDD = 3 V CL = 20 pF RL = 1 M TA = 25°C
A
VD
Phase Shift
1
– Large-Signal Differential Voltage Amplification A
VD
Figure 86
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
1 10 100 1 k 10 k 100 k 1 M
f – Frequency – Hz
Phase Shift
–60°
–30°
0°
30°
60°
90°
120°
150°
180°
10
6
10
5
10
4
10
3
10
2
10
1
1
A
VD
Phase Shift
10
7
0.1
VDD = 5 V CL = 20 pF RL = 1 M TA = 25°C
– Large-Signal Differential Voltage Amplification A
VD
Figure 87
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Figure 88
02468
PHASE MARGIN
vs
SUPPLY VOLTAGE
VDD – Supply Voltage – V
VI = 10 mV RL = 1 M CL = 20 pF TA = 25°C
om – Phase Margin
φ
m
42°
40°
38°
36°
30°
34°
32°
Figure 89
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
VI = 10 mV RL = 1 M CL = 20 pF
VDD = 3 V
VDD = 5 V
om – Phase Margin
φ
m
40° 38° 36°
30°
34° 32°
28° 26° 24° 22°
20°
Figure 90
om – Phase Margin
φ
m
40° 38° 36°
30°
34° 32°
28° 26° 24° 22°
20°
0 102030405060708090100
PHASE MARGIN
vs
LOAD CAPACITANCE
CL – Load Capacitance – pF
VDD = 3 V
VI = 10 mV RL = 1 M TA = 25°C
VDD = 5 V
Figure 91
0
f – Frequency – Hz
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
100
75
25
125
175
200
50
150
1 10 100 1000
VDD = 3 V, 5 V RS = 20 TA = 25°C
Vn – Equivalent Input Noise Voltage – nV Hz
V
n
nV/ Hz
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
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PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TL V2341 is optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result.
– +
– +
V
DD
V
I
C
L
R
L
V
O
V
DD+
V
DD–
V
I
V
O
C
L
R
L
(a) SINGLE SUPPLY
(b) SPLIT SUPPL Y
Figure 92. Unity-Gain Amplifier
– +
– +
1/2 V
DD
V
DD
20
20
2 k
2 k
V
DD+
V
DD–
V
OV
O
20
20
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 93. Noise-Test Circuits
– +
– +
10 k
1/2 V
DD
100
V
O
V
DD
V
I
V
I
100
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
10 k
V
DD+
V
DD–
C
L
C
L
V
O
Figure 94. Gain-of-100 Inverting Amplifier
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PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TL V2341 operational amplifier , attempts to measure the input bias current can result in erroneous readings. The bias current at normal ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid erroneous measurements:
Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 95). Leakages that would otherwise flow to the inputs are shunted away.
Compensate for the leakage of the test socket by actually performing an input bias current test (using a
picoammeter) with no device in the test socket. The actual input bias current can then be calculated by subtracting the open-socket leakage readings from the readings obtained with a device in the test socket.
Many automatic testers as well as some bench-top operational amplifier testers use the servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage drop across the series resistor is measured and the bias current is calculated). This method requires that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible using this method.
V = V
IC
8
5
1
4
Figure 95. Isolation Metal Around Device Inputs (P package)
low-level output voltage
To obtain low-level supply-voltage operation, some compromise is necessary in the input stage. This compromise results in the device low-level output voltage being dependent on both the common-mode input voltage level as well as the differential input voltage level. When attempting to correlate low-level output readings with those quoted in the electrical specifications, these two conditions should be observed. If conditions other than these are to be used, please refer to the Typical Characteristics section of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This parameter is actually a calculation using input offset voltage measurements obtained at two different temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device and the test socket. This moisture results in leakage and contact resistance which can cause erroneous input offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the moisture also covers the isolation metal itself, thereby rendering it useless. These measurements should be performed at temperatures above freezing to minimize error.
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
– +
TLE2426
V
O
V
I
R1
R2
V
DD
Figure 97. Inverting Amplifier With
Voltage Reference
V
O
+ ǒ
VDD–V
I
2
Ǔ
R2 R1
)
V
DD
2
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OPERATIONAL AMPLIFIERS
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PARAMETER MEASUREMENT INFORMATION
generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion. The full-peak response is defined as the maximum output frequency , without regard to distortion, above which full peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified in this data sheet and is measured using the circuit of Figure 92. The initial setup involves the use of a sinusoidal input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained (Figure 96). A square wave is used to allow a more accurate determination of the point at which the maximum peak-to-peak output is reached.
(d) f > B
OM
(c) f = B
OM
(b) BOM > f > 100 Hz(a) f = 100 Hz
Figure 96. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and lower temperatures.
APPLICATION INFORMATION
single-supply operation
While the TLV2341 performs well using dual­power supplies (also called balanced or split supplies), the design is optimized for single­supply operation. This includes an input common­mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage range extends down to 2 V, thus allowing operation with supply levels commonly available for TTL and HCMOS.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that is above ground. This virtual ground can be generated using two large resistors, but a preferred technique is to use a virtual-ground generator such as the TLE2426. The TLE2426 supplies an accurate voltage equal to V
DD
/2, while consuming very little power and is
suitable for supply voltages of greater than 4 V.
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APPLICATION INFORMATION
single-supply operation (continued)
The TL V2341 works well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended:
Power the linear devices from separate bypassed supply lines (see Figure 98); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic.
Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, RC decoupling may be necessary in high-frequency applications.
– +
Logic Logic Logic
Power Supply
– +
Logic Logic Logic
Power Supply
(a) COMMON-SUPPLY RAILS
(b) SEPARATE-BYPASSED SUPPLY RAILS (preferred)
Figure 98. Common Versus Separate Supply Rails
input offset voltage nulling
The TLV2341 offers external input offset null control. Nulling of the input offset voltage can be achieved by adjusting a 25-k potentiometer connected between the offset null terminals with the wiper connected as shown in Figure 99. The amount of nulling range varies with the bias selection. In the high-bias mode, the nulling range allows the maximum offset voltage specified to be trimmed to zero. In low-bias and medium-bias modes, total nulling may not be possible.
V
DD
25 k
N1
N2
– +
25 k
N1
N2
– +
(a) SINGLE SUPPLY
(b) SPLIT SUPPL Y
GND
Figure 99. Input Offset Voltage Null Circuit
TLV2341, TLV2341Y
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OPERATIONAL AMPLIFIERS
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APPLICATION INFORMATION
bias selection
Bias selection is achieved by connecting the bias-select pin to one of the three voltage levels (see Figure 100). For medium-bias applications, it is recommended that the bias-select pin be connected to the midpoint between the supply rails. This is a simple procedure in split-supply applications, since this point is ground. In single-supply applications, the medium-bias mode necessitates using a voltage divider as indicated. The use of large-value resistors in the voltage divider reduces the current drain of the divider from the supply line. However, large-value resistors used in conjunction with a large-value capacitor require significant time to charge up to the supply midpoint after the supply is switched on. A voltage other than the midpoint may be used if it is within the voltages specified in the following table.
BIAS MODE
BIAS-SELECT VOLTAGE
(single supply)
Low V
DD
Medium 1 V to VDD –1 V
High GND
Figure 100. Bias Selection for Single-Supply Applications
input characteristics
The TL V2341 is specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation. The lower the range limit includes the negative rail, while the upper range limit is specified at V
DD
–1 V at TA = 25°C and at VDD –1.2 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TL V2341 good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of operation.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLV2341 is well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias-current requirements and cause a degradation in device performance. It is good practice to include guard rings around inputs (similar to those of Figure 95 in the Parameter Measurement Information section). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input (see Figure 101).
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
To BIAS SELECT
Low
High
Medium
1 M
V
DD
1 M
0.01 µF
– +
Figure 102. Compensation for Input Capacitance
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APPLICATION INFORMATION
input characteristics (continued)
– +
– +
– +
(a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER
(c) UNITY-GAIN AMPLIFIER
V
O
V
I
V
O
V
O
V
I
V
I
Figure 101. Guard-Ring Schemes
noise performance
The noise specifications in operational amplifiers circuits are greatly dependent on the current in the first-stage differential amplifier . The low input bias-current requirements of the TLV2341 results in a very low noise current, which is insignificant in most applications. This feature makes the device especially favorable over bipolar devices when using values of circuit impedance greater than 50 k, since bipolar devices exhibit greater noise currents.
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for oscillation, caution is appropriate. Most oscillation problems result from driving capacitive loads and ignoring stray input capacitance. A small-value capacitor connected in parallel with the feedback resistor is an effective remedy (see Figure 102). The value of this capacitor is optimized empirically.
electrostatic-discharge protection
The TLV2341 incorporates an internal electro­static-discharge (ESD)-protection circuit that prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be exercised, however, when handling these devices as exposure to ESD may result in the degradation of the device parametric performance. The protection circuit also causes the input bias currents to be temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TL V2341 inputs and output are designed to withstand –100-mA surge currents without sustaining latch-up; however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not by
– +
V
O
C
L
V
I
2.5 V
TA = 25°C f = 1 kHz V
I(PP)
= 1 V
–2.5 V
– +
RP+
VDD*
V
O
IF)
IL)
I
P
IP = Pullup Current Required by the Operational Amplifier (typically 500 µA)
V
O
V
DD
R
P
I
P
I
F
I
L
R
L
V
I
R1
R2
Figure 103. Resistive Pullup to Increase V
OH
Figure 104. Test Circuit for Output Characteristics
TLV2341, TLV2341Y
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APPLICATION INFORMATION
design be forward biased. Applied input and output voltage should not exceed the supply voltage by more that 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of latch-up occurring increases with increasing temperature and supply voltages.
output characteristics
The output stage of the TLV2341 is designed to sink and source relatively high amounts of current (see Typical Characteristics). If the output is subjected to a short-circuit condition, this high-current capability can cause device damage under certain conditions. Output current capability increases with supply voltage.
Although the TLV2341 possesses excellent high-level output voltage and current capability, methods are available for boosting this capability if needed. The simplest method involves the use of a pullup resistor (R
P
) connected from the output to the positive supply rail (see Figure 103). There are two disadvantages to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on resistance between approximately 60 and 180 , depending on how hard the operational amplifier input is driven. With very low values of R
P
, a voltage offset from 0 V at the output occurs. Secondly , pullup resistor R
P
acts as a drain load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the output current.
All operating characteristics of the TLV2341 are measured using a 20-pF load. The device drives higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower frequencies thereby causing ringing, peaking, or even oscillation (see Figures 105, 106 and 107). In many cases, adding some compensation in the form of a series resistor in the feedback loop alleviates the problem.
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output characteristics (continued)
(a) CL = 20 pF, RL = NO LOAD (b) CL = 130 pF, RL = NO LOAD (c) CL = 150 pF, RL = NO LOAD
Figure 105. Effect of Capacitive Loads in High-Bias Mode
(a) CL = 20 pF, RL = NO LOAD (b) CL = 170 pF, RL = NO LOAD (c) CL = 190 pF, RL = NO LOAD
Figure 106. Effect of Capacitive Loads in Medium-Bias Mode
(a) CL = 20 pF, RL = NO LOAD (b) CL = 260 pF, RL = NO LOAD
(c) CL = 310 pF, RL = NO LOAD
Figure 107. Effect of Capacitive Loads in Low-Bias Mode
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