Texas Instruments TL074ACN, TL074ACNS, TL074ACDR, TL074ACJ, TL074ACD Datasheet

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Low Power Consumption

D

Wide Common-Mode and Differential
Voltage Ranges

D

Low Input Bias and Offset Currents

D

Output Short-Circuit Protection

D

Low Total Harmonic Distortion

0.003% Typ

D

Low Noise

V

n

= 18 nV/√Hz Typ at f = 1 kHz

D

High Input Impedance...JFET Input Stage

D

Internal Frequency Compensation

D

Latch-Up-Free Operation

D

High Slew Rate...13 V/µs Typ

D

Common-Mode Input Voltage Range
Includes V

CC+

description

The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_
series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low
noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier
features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single
monolithic chip.

The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.

AVAILABLE OPTIONS

PACKAGE

T

A

VIOmax
AT 25°C

SMALL

OUTLINE

(D)

†

CHIP

CARRIER

(FK)

CERAMIC

DIP

(J)

CERAMIC

DIP

(JG)

PLASTIC

DIP

(N)

PLASTIC

DIP

(P)

TSSOP

PACKAGE

(PW)

FLAT

PACKAGE

(W)

10 mV TL071CD TL071CP TL071CPWLE

10 mV

6 mV

TL071CD

TL071ACD

— — — —

TL071CP

TL071ACP

TL071CPWLE

—

—

3 mV TL071BCD TL071BCP —

10 mV TL072CD TL072CP TL072CPWLE

0°C t

o

°

10 mV

6 mV

TL072CD

TL072ACD

— — — —

TL072CP

TL072ACP

TL072CPWLE

—

—

70°C

3 mV TL072BCD TL072BCP —

10 mV TL074CD TL074CN TL074CPWLE

10 mV

6 mV

TL074CD

TL074ACD

— — —

TL074CN

TL074ACN

—

TL074CPWLE

—

—

3 mV TL074BCD TL074BCN —

TL071ID — TL071IP

–

40°C t

o

°

6 mV

TL071ID

TL072ID

— — —

—

TL071IP

TL072IP

— —

85°C

TL074ID TL074IN —

°

6 mV TL071MFK — TL071MJG — — —

–

55°C to

°

6 mV

—

TL072MFK — TL072MJG — TL072MP

—

—

125 C

9 mV TL074MFK TL074MJ — TL074MN — TL074MW

†

The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL071CDR). The PW package is only available left-ended
taped and reeled (e.g., TL072CPWLE).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright  1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NC
2OUT
NC
2IN–
NC

1IN+

NC

V

CC+

NC

2IN+

NC
V

CC+

NC
OUT
NC

3212019

910111213

4
5
6
7
8

18
17
16
15
14

NC

1IN–

NC

1IN+

NC

(TOP VIEW)

NC

1OUT

NCNCNC

NC

NC

2IN+

CC –

V

CC +

V

1
2
3
4
5
6
7

14
13
12

11

10

9
8

1OUT

1IN–
1IN+

V

CC +

2IN+
2IN–

2OUT

4OUT
4IN–
4IN+
V

CC –

3IN+
3IN–
3OUT

TL074, TL074A, TL074B

D, J, N, OR PW PACKAGE

TL074 ...W PACKAGE

(TOP VIEW)

NC – No internal connection

3212019

910111213

4
5
6
7
8

18
17
16
15
14

NC

IN–

NC

IN+

NC

TL071

FK PACKAGE

(TOP VIEW)

NC

OFFSET N1

NCNCNC

NC

NC

OFFSET N2

NC

CC –

V

TL072

FK PACKAGE

3212019

910111213

4
5
6
7
8

18
17
16
15
14

4IN+
NC
V

CC –

NC
3IN+

TL074

FK PACKAGE

(TOP VIEW)

1IN –

1OUT

NC

3IN–

4IN –

2IN–

NC

3OUT

4OUT

2OUT

1
2
3
4

8
7
6
5

OFFSET N1

IN–
IN+

V

CC –

NC
V

CC+
OUT
OFFSET N2

TL071, TL071A, TL071B

D, JG, P, OR PW PACKAGE

(TOP VIEW)

1
2
3
4

8
7
6
5

1OUT

1IN–
1IN+

V

CC –

V

CC +

2OUT
2IN–
2IN+

TL072, TL072A, TL072B

D, JG, P, OR PW PACKAGE

(TOP VIEW)

symbols

+

–

+

–

IN+

IN–

OUT

IN+

IN–

OUT

TL072 (each amplifier)
TL074 (each amplifier)

TL071

OFFSET N1

OFFSET N2

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

schematic (each amplifier)

C1

V

CC+

IN +

V

CC–

1080 Ω

1080 Ω

IN –

TL071 Only

64 Ω

128 Ω

64 Ω

All component values shown are nominal.

OFFSET

NULL

(N1)

OFFSET

NULL

(N2)

OUT

18 pF

COMPONENT COUNT

†

COMPONENT

TYPE

TL071 TL072 TL074

Resistors 11 22 44

Resistors

Transistors

1114222844

56
JFET 2 4 6
Diodes 1 2 4
Capacitors 1 2 4
epi-FET 1 2 4

†

Includes bias and trim circuitry

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage, V

CC+

(see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Supply voltage, V

CC–

(see Note 1) –18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Differential input voltage, V

ID

(see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage, V

I

(see Notes 1 and 3) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Duration of output short circuit (see Note 4) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

A

: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J, JG, or W package 300°C. . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, or PW package 260°C. . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V

CC+

and V

CC–

.

2. Differential voltages are at IN+ with respect to IN–.

3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.

4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING

FACTOR

DERATE

ABOVE T

A

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

TA = 125°C

POWER RATING

D (8 pin) 680 mW 5.8 mW/°C 33°C 465 mW 378 mW N/A

D (14 pin) 680 mW 7.6 mW/°C60°C 604 mW 490 mW N/A

FK 680 mW 11.0 mW/°C88°C 680 mW 680 mW 273 mW

J 680 mW 11.0 mW/°C88°C 680 mW 680 mW 273 mW

JG 680 mW 8.4 mW/°C69°C 672 mW 546 mW 210 mW

N 680 mW 9.2 mW/°C76°C 680 mW 597 mW N/A
P 680 mW 8.0 mW/°C65°C 640 mW 520 mW N/A

PW (8 pin) 525 mW 4.2 mW/°C70°C 525 mW N/A N/A

PW (14 pin) 700 mW 5.6 mW/°C70°C 700 mW N/A N/A

W 680 mW 8.0 mW/°C 65°C 640 mW 520 mW 200 mW

TL071, TL071A, TL071B, TL072

TL072A, TL072B, TL074, TL074A, TL074B

LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

• 5

electrical characteristics, V

CC

±

= ±15 V (unless otherwise noted)

TL071C TL071AC TL071BC TL071I

TL071C

TL072C

TL071AC

TL072AC

TL071BC

TL072BC

TL071I

TL072I

PARAMETER

TEST CONDITIONS

†

T

A

‡

TL074C TL074AC TL074BC TL074I

UNIT

MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX

p

25°C 3 10 3 6 2 3 3 6

VIOInput offset voltage

V

O

= 0,

R

S

= 50

Ω

Full range 13 7.5 5 8

mV

α

VIO

T emperature
coefficient of input
offset voltage

VO = 0, RS = 50 Ω Full range 18 18 18 18 µV/°C

25°C 5 100 5 100 5 100 5 100 pA

I

IO

I

nput offset curren

t

V

O

=

0

Full range 10 2 2 2 nA

p

25°C 65 200 65 200 65 200 65 200 pA

I

IB

I

nput bias curren

t

§

V

O

=

0

Full range 7 7 7 20 nA

–12 –12 –12 –12

V

ICR

C

ommon-mode
p

25°C ±11

12

to

±11

12

to

±11

12

to

±11

12

to

V

ICR

in ut voltage range

15 15 15 15

p

RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5 ±12 ± 13.5 ±12 ±13.5

V

OM

Maximum eak

output voltage

RL ≥ 10 kΩ

±12 ±12 ±12 ±12 V

swing

RL ≥ 2 kΩ

Full range

±10 ±10 ±10 ±10

Large-signal

25°C 25 200 50 200 50 200 50 200

A

VD

diff

erential voltage

amplification

V

O

=

±10 V

,

R

L

≥ 2 kΩ

Full range 15 25 25 25

V/mV

B

1

Unity-gain
bandwidth

25°C 3 3 3 3 MHz

r

i

Input resistance 25°C 10

12

10

12

10

12

10

12

Ω

Common-mode

VIC = V

ICR

min,

°

CMRR

rejection ratio

VO = 0,

RS = 50 Ω

25°C70100751007510075100

dB

Supply-voltage

VCC = ±9 V to ±15 V,

°

k

SVR

rejection ratio

(∆V

CC±

/∆VIO)

VO = 0,

RS = 50 Ω

25°C70100801008010080100

dB

Supply current

°

I

CC

y

(each amplifier)

V

O

=

0,No load

25°C

1.4

2.5

1.4

2.5

1.4

2.5

1.4

2.5

mA

VO1/V

O2

Crosstalk
attenuation

AVD = 100 25°C 120 120 120 120 dB

†

All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified.

‡

Full range is TA = 0°C to 70°C for TL07_C,TL07_AC, TL07_BC and is TA = –40°C to 85°C for TL07_I.

§

Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 4. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics, V

CC

±

= ±15 V (unless otherwise noted)

TL071M

PARAMETER

TEST CONDITIONS

†

T

‡

TL072M

TL074M

UNIT

A

MIN TYP MAX MIN TYP MAX

p

25°C 3 6 3 9

VIOInput offset voltage

V

O

=

0

,

R

S

=

50 Ω

Full range 9 15

mV

α

VIO

T emperature coef ficient of
input offset voltage

VO = 0, RS = 50 Ω Full range 18 18 µV/°C

25°C 5 100 5 100 pA

I

IO

I

nput offset curren

t

V

O

=

0

Full range 20 20 nA

p

25°C 65 200 65 200 pA

I

IB

I

nput bias curren

t

‡

V

O

=

0

50 50 nA

V

ICR

Common-mode input
voltage range

25°C ±11

–12

to

15

±11

–12

to

15

V

RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5

V

OM

Maximum peak output

RL ≥ 10 kΩ

±12 ±12 V

voltage swing

RL ≥ 2 kΩ

Full range

±10 ±10

Large-signal differential

25°C 35 200 35 200

A

VD

gg

voltage amplification

V

O

=

±10 V

,

R

L

≥ 2 kΩ

15 15

V/mV

B

1

Unity-gain bandwidth TA = 25°C 3 3 MHz

r

i

Input resistance TA = 25°C 10

12

10

12

Ω

Common-mode rejection

VIC = V

ICR

min,

°

CMRR

ratio

VO = 0,

RS = 50 Ω

25°C80868086

dB

Supply-voltage rejection

VCC = ±9 V to ±15 V,

°

k

SVR

ratio (∆V

CC±

/∆VIO)

VO = 0, RS = 50 Ω

25°C80868086

dB

I

CC

Supply current (each
amplifier)

VO = 0, No load 25°C 1.4 2.5 1.4 2.5 mA

VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB

†

Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in
Figure 4. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible.

‡

All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range is
TA = –55°C to 125°C.