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About This Manual
Preface
This manual is written to provide information about the evaluation module of
the fully differential amplifier under test. Additionally, this document provides
a good example of PCB design for high speed applications. The user should
keep in mind the following points.
The design of the high-speed amplifier PCB is an elegant and sensitive
process. Therefore, the user must approach the PCB design with care and
awareness. It is recommend that the user initially review the datasheet of the
device under test. It is also helpful to review the schematic and layout of the
THS4131 EVM to determine the design techniques used in the evaluation
board. In addition, it is recommended that the user review the application note
Fully-Differential Amplifiers
insight about differential amplifiers. This application note reviews the
differential amplifiers and presents calculations for various filters
(literature number SLOA054B) to gain more
.
How to Use This Manual
-
-
-
Chapter 1—Introduction and Description
Chapter 2—Using the THS4131 EVM
Chapter 3—General High-Speed Amplifier Design Considerations
Read This First
iii
Related Documentation From Texas Instruments
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.
Related Documentation From Texas Instruments
-
THS4131 data sheet (literature number SLOS318)
-
THS4131 application report (literature number SLOA054A),
Fully-Differential Amplifiers
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
The Texas Instruments THS4131 evaluation module (EVM) helps designers
evaluate the performance of the THS4131 operational amplifier. Also, this
EVM is a good example of high-speed PCB design.
This document details the Texas Instruments THS4131 high-speed
operational amplifier evaluation module (EVM). It includes a list of EVM
features, a brief description of the module illustrated with a series of schematic
diagrams, EVM specifications, details on connecting and using the EVM, and
a discussion of high-speed amplifier design considerations.
This EVM enables the user to implement various circuits to clarify the available
configurations presented by the schematic of the EVM. In addition, the
schematic of the default circuit has been added to depict the components
mounted on the EVM when it is received by the customer. This configuration
correlates to the single input/differential output signal.
Other sample circuits are presented to show how the user can implement other
circuit configurations such as differential input/differential output signal,
transformer utilization on the input and output terminals, VICR level shifter,
and Butterworth filter with multiple feedback. The user may be able to create
and implement circuit configurations in addition to those presented in this
document using the THS4131 EVM.
The THS4131 EVM is a good example of PCB design and layout for
high-speed operational amplifier applications. It is a complete circuit for the
high-speed operational amplifier. The EVM is made of the THS4131
high-speed operational amplifier, a number of passive components, and
various features and footprints that enable the user to experiment, test, and
verify various operational amplifier circuit implementations. The board
measures 4.5 inches in length by 2.5 inches in width.
populated for a single-ended input amplifier (see Figure 1-2 for populated
circuits). The outputs (V
ended. Gain is set to one and can be changed by changing the ratios of the
feedback and gain resistors (see the device datasheet for recommended
resistor values). The user may populate various footprints on the evaluation
module board to verify filter designs or perform other experiments. Each input
is terminated with a 50-Ω resistor to provide correct line-impedance matching.
1.2Evaluation Module Features
THS4131 high-speed operational amplifier EVM features include:
Initially, this board is
and VO–) can be tested differentially or single
O+
J
Voltage supply operation range: 5-V to ±15-V operation (see the
device data sheet)
J
Single and differential input and output capability
J
Nominal 50-Ω input and output termination resistors. They can be
configured according to the application requirement.
J
V
direct input control (see schematic and the device data sheet)
OCM
J
V
pin can be controlled via transformer center-tap (see
OCM
schematic)
J
Shutdown pin control, JU1 (if applicable to the device, see the device
data sheet)
J
Input and output transformer footprints for changing single-ended
signals to differential signals
J
Footprint for high-precision, balanced feedback and gain resistors
(0.01% or better)
J
Footprints for low-pass filter implementation (see application note
SLOA054A)
J
Footprints for antialiasing filter implementation (see application note
SLOA054A)
J
Differential probe terminals on input and output nodes for differential
probe insertion
1-2
J
Various GND and signal test points on the PCB
J
Circuit schematic printed on the back of the EVM
J
A good example of high-speed amplifier PCB design and layout
Introduction and Description
1.3THS4131 EVM Specifications
THS4131 EVM Specifications
Supply voltage range, ±V
Supply current, I
Output drive, I
(see the device data sheet). . . . . . . . . . . . . . . . . . . . . . . .
For complete THS4131 amplifier IC specifications, parameter measurement
information, and additional application information, see the THS4131 data
sheet, TI literature number SLOS318.
1.4Schematic of the Populated Circuit (Default Configuration)
For verification of jumper locations and other bypass components, see the
complete EVM schematic in Figure 1–2.
Figure 1–1.Schematic of the Populated Circuit on the EVM (Default Configuration)
R6B
C1
402 Ω
V
OCM
C4
V
CC
+
THS4131
–
V
CC–
R6a
Rx4
0 Ω
Rx5
0 Ω
R10
49.9 Ω
Rx6
49.9 Ω
R4b
JU4
–
+
0 Ω
R4a
0 Ω
C6
50 Ω
Source
V
AC
RX3
49.9 Ω
JU3
R1b
R1a
0 Ω
24.9 Ω
RX1
0 Ω
IN
0 Ω
Rx0
R3b
374 Ω
R3a
374 Ω
402 Ω
NOTE: Default populated footprints on the EVM from the input nodes to the output terminals Gain = 1
Introduction and Description
1-3
THS4131 EVM Schematic
1.5THS4131 EVM Schematic
Figure 1–2.Schematic
1-4
Introduction and Description
Additional Sample Schematics
1.6Additional Sample Schematics
For verification of jumper locations and other bypass components, see the
complete EVM schematic in Figure 1–2.
Figure 1–3.Fully-Differential In/Fully-Differential Out, Without Transformer
R3B
R6b
C4
V
CC
+
THS4131
–
V
CC–
R6a
.
Rx4
R4b
–
+
0 Ω
R4a
0 Ω
0 Ω
Rx5
0 Ω
C6
V
AC
50 Ω
Source
IN
RX1
0 Ω
RX2
0 Ω
R1b
0 Ω
R16 Termination
Resistor
R1a
0 Ω
C1
R3a
Note:Fully-differential in / fully-differential out signal path.
Journal for the information on the termination resistors
V
OCM
See the Texas Instruments February 2001 Analog Applications
It is recommended that the user perform the following exercises to learn the
usage of the EVM. This practice helps the user learn about the various
terminals on the EVM and their function. In addition, it suggests the
components and equipment needed to operate the EVM.
One double-output dc power supply (±5 V, 100 mA output minimum)
-
Two dc current meters with resolution to 1 mA and capable of the
maximum current the dc power supply can supply. If available, set the
current limit on the dc power supply to 100 mA.
Note: Some power supplies incorporate current meters which may be
applicable to this test.
-
50-Ω source impedance function generator (1 MHz, 10 VPP sine wave)
2) Make sure the dc power supply is turned off before proceeding to the next
step.
3) Connect the positive (+) terminal of the power supply to the positive (+)
terminal of the current meter number 1.
4) Connect the negative (–) terminal of the current meter number 1 to the
V
CC+
5) Connect the common ground terminal of the power supply to the ground
GND on the EVM (J9).
6) Connect the negative (–) terminal of the power supply to the negative (–)
terminal of the second current meter.
7) Connect the positive (+) terminal of the current meter number 2 to the V
of the EVM (J8).
of the EVM (J7).
CC–
Figure 2–1.Power Supply Connection
CURRENT
METER 2
+–+–
J8 V
CC–
J7 V
CC+
Figures are not drawn to scale.
POWER SUPPLY
GND–5V+5V
EVM
THS4131
CURRENT
METER 1
J9 GND
J6 V
OCM
2-2
Using the THS4131 EVM
2.3Input and Output Setup
1) Ensure that JU3, JU4, and JU1 are
2) Set the function generator to generate a 1 MHz, ±0.5 V (1 VPP) sine wave
with no dc offset.
3) Turn off the function generator before proceeding to the next step.
4) Using a BNC-to-SMA cable, connect the function generator to J1 (VI+) on
the EVM.
5) Using a BNC-to-SMA cable, connect the oscilloscope to J3 (VO–) on the
EVM.
6) Using a BNC-to-SMA cable, connect the oscilloscope to J4 (VO+) on the
EVM. Set the oscilloscope to 0.5 V/division and a time-base of 0.2
µs/division.
Note: The oscilloscope must be set to use a 50-Ω input impedance for
proper results.
Figure 2–2.Signal Connections
FUNCTION
GENERATOR
1 MHz
1 V
PP
0 V Offset
50 Ω Source
Impedance
OUT
J1 V
in+
J3 V
not installed
out–
(open circuit)
OSCILLOSCOPE
50 Ω Impedance
CH-1CH-2
.
Figures are not drawn to scale.
THS4131 EVM
J4 V
out+
Using the THS4131 EVM
2-3
2.4Testing the EVM Setup
1) Turn on the dc power supply.
2) Verify that both the +5 V (current meter 1) and the –5 V (current meter 2)
currents are below 20 mA.
Caution:
Currents above 20 mA indicate a possible short or a wrong resistor value
on the PCB. Do not proceed until this situation is corrected.
3) Turn on the function generator.
4) Verify the oscilloscope is showing two 1 MHz sine waves with amplitude
of ±0.125 V. The dc offset of the signal must be below 50 mV.
Note: V
OUT+
attenuation of the scope should be set to 6 dB for a gain of one. Otherwise,
the output will show a
at the 50-Ω termination resistor.
Use Figure 3 as a reference for the input and output signals.
Figure 2–3.Driver 1 Output Signal
C1
C2
C3
THS4131
and V
should be 180 degrees out of phase. The internal
OUT–
gain of one-half
due to the voltage division occurring
2-4
Using the THS4131 EVM
2.5Power Down Verification
This EVM is used to evaluate devices with and without the shutdown function.
Therefore, this step is only applicable if the device has a shutdown function.
Please see the data sheet for power-down verification.
1) Insert the jumper JU1 to power down the device. The current consumption
(dc current meters) should drop to less than 1.5 mA. Remember to discount the current flow through the 10-kΩ pullup resistor on the EVM when
calculating the device current consumption in the shutdown mode.
2) Turn off the power supply and disconnect the wiring.
3) Turn off the function generator and disconnect the wiring.
4) Basic operation of the operational amplifier and its EVM is complete.
2.6Measuring the Frequency Response
This EVM is designed to easily interface with network analyzers. Jumpers J3
and J4 facilitate the use and insertion of the differential probes at the input and
output nodes. It is important to consider the following steps to ensure optimal
performance in terms of bandwidth, phase margin, gain, and peaking
1) Connect the power supply according to the power supply set up (section
2.2)
2) Use proper load values. Loads directly effect the performance of the
differential operational amplifier (the suggested value is 200 Ω
differentially, 100 Ω on each output node).
Caution:
Incorrect connections cause excessive current flow and may damage
the device.
3) Place the GND connection of the probe as close as possible to the output
nodes. Use the GND holes on the EVM. The GND holes create a shorter
route to the GND plane and output nodes.
4) Place the probe at the input nodes, set the power level of the network
analyzer to the proper level (information in the data sheet typically is
produced at –20 dBm power level), and calibrate the network analyzer.
Note:
If a differential probe is used, verify that resistors R1a, R1b, R4b, and R4a
are in place. The resistors are 0 Ω values providing the path to the differential
probe terminals.
5) Place the probe at the output nodes (if a differential probe is used, insert
the probe into the provided jumper), and measure the frequency
response.
Using the THS4131 EVM
2-5
Butterworth Filter
Note:
Transformers are used to change the single ended signals to differential signal or vice versa. On this EVM, they can be populated according to the application or the experiment. The V
to the center-tap of the transformer, or maybe set via an external source such
as V
of a data converter. If the V
ref
source, it will be set at the center point of the power supply . For example, if
±5 sources are used, the V
2.7Butterworth Filter
An example of a Butterworth filter implemented with multiple feedback architecture is provided. The following circuit is implemented on the EVM board.
The following figures represent the circuit configuration and the component
values. The corner frequency of the filter (–3dB) is set at 1 MHz.
For verification of jumper locations and other bypass components, see the
complete EVM schematic in Figure 1–2.
Figure 2–4.Multiple Feedback Filter Circuit
pin of the device may be connected
OCM
pin is not connected to an external
OCM
level will be set to zero.
OCM
–1 dBm
AC
787 Ω
220 pF
787 Ω
787 Ω
732 Ω
732 Ω
787 Ω
100 pF
V
CC
+
THS4131
–
V
EE
100 pF
5 V
–
+
–5 V
100 Ω
100 Ω
2-6
Using the THS4131 EVM
Figure 2–5.Gain vs Phase
Butterworth filter with multiple feedback frequency response.
The THS4131 EVM layout has been designed for use with high-speed signals
and can be used as an example when designing PCBs incorporating the
THS4131. Careful attention has been given to component selection,
grounding, power supply bypassing, and signal path layout. Disregarding
these basic design considerations could result in less than optimum
performance of the THS4131 high-speed operational amplifier.
Surface-mount components were selected because of the extremely low lead
inductance associated with this technology. This helps minimize both stray
inductance and capacitance. Also, because surface-mount components are
physically small, the layout can be very compact.
T antalum power supply bypass capacitors at the power input pads help supply
currents needed for rapid, large signal changes at the amplifier output. The
0.1-µF power supply bypass capacitors were placed as close as possible to
the IC power input pins in order to minimize the return path impedance. This
improves high frequency bypassing and reduces harmonic distortion.
A proper ground plane on both sides of the PCB should be used with
high-speed circuit design. This provides low-inductive ground connections for
return current paths. In the area of the amplifier input pins, however, the
ground plane should be removed to minimize stray capacitance and reduce
ground plane noise coupling into these pins. This is especially important for
the inverting pin while the amplifier is operating in the noninverting mode.
Because the voltage at this pin swings directly with the noninverting input
voltage, any stray capacitance would allow currents to flow into the ground
plane. This could cause possible gain error and/or oscillation. Capacitance
variations at the amplifier input pin of greater than 1 pF can significantly affect
the response of the amplifier.
In general, it is best to keep signal lines as short and as straight as possible.
Incorporation of microstrip or stripline techniques is also recommended when
signal lines are greater than 1 inch in length. These traces must be designed
with a characteristic impedance of either 50 Ω or 75 Ω, as required by the
application. Such a signal line must also be properly terminated with an
appropriate resistor.
General High-Speed Amplifier Design Considerations
3-1
Finally , proper termination of all inputs and outputs must be incorporated into
the layout. Unterminated lines, such as coaxial cable, can appear to be a
reactive load to the amplifier. By terminating a transmission line with its
characteristic impedance, the amplifier’s load then appears to be purely
resistive, and reflections are absorbed at each end of the line. Another
advantage of using an output termination resistor is that capacitive loads are
isolated from the amplifier output. This isolation helps minimize the reduction
in the amplifier’s phase-margin and improves the amplifier stability resulting
in reduced peaking and settling times.
3-2
General High-Speed Amplifier Design Considerations
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