Texas Instruments SN65HVD257 User Manual

User's Guide

SLLU172–August 2012

SN65HVD257 CAN EVM:

Functional Safety and Redundant CAN Network

This User Guide details the SN65HVD257 CAN EVM (Controller Area Network Evaluation Module)
transceiver operation. It comes with two SN65HVD257 CAN transceivers factory installed, set up in a
redundant (parallel) CAN bus configuration. The EVM may be reconfigured by a user for other CAN
topologies. This User’s Guide explains the EVM configurations for basic redundant CAN evaluation, and
includes various load and termination settings.

Contents

1 Introduction .................................................................................................................. 2

1.1 Overview ............................................................................................................ 2

1.2 Example Using the SN65HVD257 in a Redundant Physical Layer CAN Network Topology ............ 2

2 SN65HVD257 CAN EVM .................................................................................................. 4

3 SN65HVD257 EVM Setup and Operation for Redundant (Parallel Networks) ..................................... 7

3.1 Overview and Basic Operation Settings ........................................................................ 7

3.2 Using CAN Bus Load and Termination Configuration ......................................................... 9

3.3 Using CAN Bus Protection and Filtering Configuration ...................................................... 10

3.4 Using Customer Installable IO Options for Current Limiting, Pull up or down, Noise Filtering ......... 11

3.5 Using customer installable IO options for 3.3V IO ........................................................... 11

4 SN65HVD257 EVM Configuration for Two Independent Networks ................................................. 12

4.1 Transceiver 1 Header (JMP3) .................................................................................. 12

4.2 Transceiver 2 Header (JMP7) .................................................................................. 12

5 Bill of Material (BOM) ..................................................................................................... 14

List of Figures

1 SN65HVD257 Basic Block Diagram and Pin Out....................................................................... 2

2 Typical SN65HVD257 Node To Build A Redundant Physical Layer Topology ..................................... 3

3 Typical Redundant Physical Layer Topology Using SN65HVD257 .................................................. 3

4 SN65HVD257 CAN EVM Top............................................................................................. 4

5 CAN EVM Schematic....................................................................................................... 5

6 Loopback Node 1 (JMP5 to JMP12) .................................................................................... 13

7 Loopback Node 2 (JMP10 to JMP13) .................................................................................. 13

List of Tables

1 SN65HVD257 CAN EVM Connections .................................................................................. 6

2 Main Supply and IO Header (JMP1) Connections ..................................................................... 7

3 CAN Bus Termination Configuration ..................................................................................... 9

4 CAN Bus Protection and Filtering Configuration ...................................................................... 10

5 EVM Digital IO Configuration ............................................................................................ 11

6 EVM Digital IO Configuration ............................................................................................ 11

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1

S

CANH

CANL

FAULT

TXD

GND

V

CC

RXD

FAULT

DTO

DTO

Introduction

1 Introduction

1.1 Overview

Texas Instruments offers a broad portfolio of High Speed (HS) CAN transceivers compatible with the
ISO11898-2 and ISO11898-5 High Speed CAN standards. These include 5V VCConly, 3.3V VCConly, 5V
VCCwith IO level shifting and galvanic isolated CAN transceivers. These CAN transceiver families include
product mixes with varying features such as low power standby modes with and without wake up, silent
modes, loop back and diagnostic modes.

The Texas Instruments SN65HVD257 CAN EVM helps designers evaluate the operation and performance
of the SN65HVD257 CAN transceiver. The SN65HVD257 includes many features for functional safety
network implementation such as redundant CAN networks. The SN65HVD257 CAN EVM also provides
PCB footprints for different bus terminations, bus filtering, and protection concepts. The EVM is provided
with two SN65HVD257 devices installed. A separate EVM is available for the other CAN transceivers,
SN65HVD255 CAN EVM, and another EVM uses the galvanic isolated CAN transceiver family (ISO1050).

The SN65HVD257 meets the ISO1189-2 High Speed CAN (Controller Area Network) Physical Layer
standard (transceiver). It is designed as a next-generation CAN for the SN65HVD251 and ISO1050, but
with added features for functional safety networks such as redundant networks. It has very fast loop times
with a wide range of bus loading, allowing for data rates up to 1 megabit per second (Mbps) in long and
highly loaded networks and higher data rates in small networks. The device includes many protection
features to provide device and CAN network robustness. The device has two modes: normal mode and
silent mode, selected on pin 8. The FAULT pin indicates TXD dominant time out, RXD dominant time out,
thermal shut down and under voltage faults.

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Figure 1. SN65HVD257 Basic Block Diagram and Pin Out

1.2 Example Using the SN65HVD257 in a Redundant Physical Layer CAN Network Topology

CAN is designed for standard linear bus topology using 120Ω twisted pair cabling. The SN65HVD257
CAN device includes several features that allow use of the CAN physical layer in nonstandard topologies
with only one CAN link layer controller (μP) interface. The SN65HVD257 allows much greater flexibility in
the physical topology of the bus while reducing the digital controller and software costs. The combination
of RXD dominant time out and the FAULT output provides great flexibility, control and monitoring of these
applications.

A simple example of this flexibility is to use two SN65HVD257 devices combined logically in parallel via an
AND gate to build a redundant (parallel) physical layer (cabling and transceivers) CAN network. Adding a

2

logic XOR with a filter adds automatic detection for a fault where one of the 2 networks goes open
(recessive) in addition to the faults detected by the SN65HVD257.

To allow CAN’s bit-wise arbitration to work, the RXD outputs of the transceivers must be connected via
AND gate logic so that the link layer logic (μP) receives a dominant bit (low) from any of the branches; the
transceivers appear to the link layer and above as a single physical network. The RXD dominant time out
(DTO) feature prevents a bus stuck dominant fault in a single branch from taking down the entire network
by returning the RXD pin for the transceivers on the branch with the fault to the recessive state (high) after

SN65HVD257 CAN EVM: Functional Safety and Redundant CAN Network SLLU172–August 2012

Copyright © 2012, Texas Instruments Incorporated

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Bus 1 Bus 2

µP

SN65HVD257

RXD2

TDX

FLT2

SN65HVD257

FLT1

S1

S2

FLT3

RXD1

RXD

1A 2A

µP

SN65HVD257

RXD2

TDX

FLT2

SN65HVD257

FLT1

S1

S2

FLT3

RXD1

RXD

1n 2n

µP

SN65HVD257

RXD2

TDX

FLT2

SN65HVD257

FLT1

S1

S2

FLT3

RXD1

RXD

1n 2n

µP

SN65HVD257

RXD2

TDX

FLT2

SN65HVD257

FLT1

S1

S2

FLT3

RXD1

RXD

1Z 2Z

µP

SN65HVD257

RXD2

TDX

FLT2

SN65HVD257

FLT1

S1

S2

FLT3

Bus 1 Bus 2

RXD1

RXD

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Introduction

the t

RXD_DTO

time. The remaining branch of the network continues to function. The FAULT pin of the
transceivers on the branch with the fault shows this via the FAULT output to their host processors, which
will diagnose the failure condition. The S-pin (silent mode pin) may be used to put a branch in silent mode
to check each branch for other faults, including to look for bus open (recessive) faults. For automatic
detection of a branch being open (recessive), an XOR gate may be used to combine the RXD outputs of
both branches. During dominant bits (low), were the branches do not match the XOR, the circuit outputs a
logic high. A small RC filter on the output eliminates false outputs due to small timing differences in the
branches and transceivers. This XOR and the FAULT outputs of the transceivers could be connected to
edge triggered interrupt pins on the host microprocessor to enter specialize software routines if there is an
issue on the redundant network.

Thus it is possible build up a robust and redundant CAN network topology in a very simple and low cost
manner. These concepts can be expanded into other more complicated and flexible CAN network
topologies to solve various other system-level challenges with a networked infrastructure.

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Figure 2. Typical SN65HVD257 Node To Build A Redundant Physical Layer Topology

Figure 3. Typical Redundant Physical Layer Topology Using SN65HVD257

Copyright © 2012, Texas Instruments Incorporated

3

SN65HVD257 CAN EVM

2 SN65HVD257 CAN EVM

The EVM consists of 2 CAN bus “nodes” and the necessary logic to build functional safety networks. It is
pre-configured for redundant CAN network applications with the 2 CAN bus “nodes”, including the AND
gate to combine the RXD output from both buses and the XOR gate and filter (50kHz) to detect a bus
open fault. The EVM has simple connections to all necessary pins of the CAN transceiver devices and the
necessary logic to create a redundant network. Jumpers are provided where necessary to provide
flexibility for device pin and CAN bus configuration. There are test points (loops) for all main points where
probing is necessary for evaluation such as GND, VCC, TXD, RXD, CANH, CANL, S, FAULT. The EVM
supports many options for CAN bus configuration. It is pre-configured with two 120Ω resistors that may be
connected on the bus via jumpers; a single resistor is used with the EVM as a terminated line end (CAN is
defined for 120Ω impedance twisted pair cable) or both resistors in parallel for electrical measurements
representing the 60Ω load the transceiver “sees” in a properly terminated network (120Ω termination
resistors at both ends of the cable). If the application requires “split” termination, TVS diodes for protection
or Common Mode (CM) Choke the EVM has footprints available for these components via customer
installation of the desired component(s).

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Figure 4. SN65HVD257 CAN EVM Top

4

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Place near DUT Pin

LOOPBACK

S1

RXD1

FLT1

S1

RXDprime

TXDA

TXD1

TXDprime

TXDA

RXD1

RXD2

TXDprime

RXD2

TXDB

TXDprime

RXD1

FLT1

TXDprime

RXDprime

S2

FLT2

S1

TXD1

RXD1

FLT1

S2

TXD2

FLT2

RXD2

RXD2

FLT2

S2

TXD2

TXDprime

TXDB

FAULT3

RXD2

RXD1

FAULT3

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

RXD2

R28

DNI

C16

DNI

R44

10k

1

JMP2

HIGH

S1

LOW

C23

DNI

C21

DNI

D5

DNI

1

2

3

C19

DNI

C5

DNI

R11

0

TP4

CANH

1

R39

0

A

B

Y

VCC

GND

G08

U3

1

2

3 5

4

R40

4.7k

R14

330

TP20

CANH

1

C14

.1uF

R33

120

R1

4.7k

R24

DNI

C3

DNI

R27

0

C4

DNI

A

B

Y

VCC

GND

G86

U6

1

2

5

4

3

1

JMP1

S1

FLT1

GND

TXD

GND

RXD

GND

VCC

S2

FLT2

GND

FLT3

1

JMP10

GND

CANH2

CANL2

GND

R16

4.7k

R3

0

C29

0.1uF

C25

DNI

D1

DNI

1

2

3

C10

DNI

TP16

GND

1

R7 0

C2

DNI

R29

DNI

R35

0

R2

0

TP21

RXD

1

C24

DNI

R21

0

TP11

CANL

1

1

JMP7

S2

TXD2

GND

RXD2

FLT2

C26

DNI

L1

1

4

2

3

R8

0

A

B

Y

VCC

GND

G08

U4

1

2

3 5

4

1

JMP8

HIGH

S2

LOW

TP22

CANL

1

TP17

CANH

1

TP15

GND

1

TP8

RXD

1

TP1

GND

1

C17

DNI

U1

SN65HVD257

TXD1GND2Vcc3RXD

4

FLT

5

CANL

6

CANH

7

S

8

C13

1uF

R10

DNI

R17

0

U5

SN65HVD257

TXD1GND2Vcc3RXD

4

FLT

5

CANL

6

CANH

7

S

8

R19

330

C1

DNI

TP7

CANH

1

1

JMP5

GND

CANH1

CANL1

GND

1

JMP6

R6

330

R30

330

C9

0.1uF

R38

330

TP6

S

1

R12

120

1

JMP11

R45

10k

R47

3.3k

D3

GREEN

21

TP14

GND.

1

TP23

FAULT

1

R46

10k

R20

0

TP12

VCC

1

C28

1nF

TP9

CANL

1

C7

4.7uF

TP10

FAULT

1

1

JMP3

S1

TXD1

GND

RXD1

FLT1

C15

DNI

C20

DNI

TB1

1

2

R22

DNI

1

JMP4

R43

10k

C6

DNI

R26

0

TP2

GND

1

C27

4.7uF

A

B

Y

VCC

GND

G08

U2

1

2

3 5

4

R15

0

R9

120

TP19

S

1

1

JMP9

C12

10uF

R5

DNI

TP24

CANL

1

1

JMP13

R18

DNI

R32

0

R4

DNI

1

JMP12

R41

10k

C11

DNI

D7

1

1

3

3

2

2

R31 0

TP13

GND

1

D2

DNI

1

2

3

R13

DNI

L2

1

4

2

3

TP18

TXD

1

C22

DNI

R36

120

R42

10k

D4

DNI

1

2

3

TP5

TXD

1

TP3

GND

1

C8

0.1uF

R23

DNI

D6

1

1

3

3

2

2

R37

DNI

C18

0.1uF

R25

4.7k

R34

DNI

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Figure 5. CAN EVM Schematic

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SN65HVD257 CAN EVM

5

SN65HVD257 CAN EVM

Connection Type Description

JMP1 12 pin header
JMP2 3 pin jumper S Mode Pin Control for transceiver 1
JMP3 5 pin header

JMP4 2 pin jumper

JMP5 4 pin header Connection for access to transceiver 1 CAN bus output: CANH1, CANL1, GND, GND

JMP6 2 pin jumper CAN termination to represent the combined 60Ω load for CAN transceiver parametric

JMP7 5 pin header
JMP8 3 pin jumper S Mode Pin Control for transceiver 2

JMP9 2 pin jumper

JMP10 4 pin header Connection for access to transceiver 2 CAN bus output: CANH2, CANL2, GND, GND.

JMP11 2 pin jumper CAN termination to represent the combined 60Ω load for CAN transceiver parametric

JMP12 2 pin jumper Next to JMP5 to allow jumping CAN bus 1 to CAN bus 2
JMP13 2 pin jumper Next to JMP10 to allow jumping CAN bus 1 to CAN bus 2

TB1 VCCsupply and GND connection for the EVM
TP1 Test Point GND test point

TP2 Test Point GND test point
TP3 Test Point GND test point
TP4 Test Point CANH (bus 1) test point
TP5 Test Point TXD, transceiver 1, test point
TP6 Test Point S, transceiver 1, test point
TP7 Test Point CANH (bus 1) via 330Ω serial resistor test point
TP8 Test Point RXD, transceiver 1, test point
TP9 Test Point CANL (bus 1) test point

TP10 Test Point FAULT (transceiver 1) test point

TP7 Test Point CANL (bus 1) via 330Ω serial resistor test point
TP12 Test Point Vcc test point
TP13 Test Point GND test point
TP14 Test Point GND test point
TP15 Test Point GND test point
TP16 Test Point GND test point
TP17 Test Point CANH (bus 2) test point
TP18 Test Point TXD, transceiver 2, test point
TP19 Test Point S, transceiver 2, test point
TP20 Test Point CANH (bus 2) via 330Ω serial resistor test point
TP21 Test Point RXD, transceiver 2, test point
TP22 Test Point CANL (bus 2) test point
TP23 Test Point FAULT (transceiver 2) test point
TP24 Test Point CANL (bus 2) via 330Ω serial resistor test point

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Table 1. SN65HVD257 CAN EVM Connections

Connection for access to all critical digital IO, supply and GND for driving the the CAN
transceivers externally with test equipment or interfaced to a processor EVM

Connection for access to all critical digital IO of the single transceiver 1 (bus) when EVM is used
for 2 separate buses

Connect 120Ω CAN termination to the bus. Used separately for a single termination if EVM is at
end of the CAN bus and termination isn’t in the cable. Used in combination with JMP6 to get to
second CAN termination to represent the combined 60Ω load for CAN transceiver parametric
measurement.

Connect 120Ω CAN termination to the bus. Used in combination with JMP4 to get to second
measurement.

Connection for access to all critical digital IO of the single transceiver 2 (bus) when EVM is used
for 2 separate buses

Connect 120Ω CAN termination to the bus. Used separately for a single termination if EVM is at
end of the CAN bus and termination is not in the cable. Used in combination with JMP6 to get to
second CAN termination to represent the combined 60Ω load for CAN transceiver parametric
measurement.

Connect 120Ω CAN termination to the bus. Used in combination with JMP4 to get to second
measurement.

2 pin terminal

block

6

SN65HVD257 CAN EVM: Functional Safety and Redundant CAN Network SLLU172–August 2012

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