TEXAS INSTRUMENTS ONET4211LD Technical data

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ONET4211LD
SLLS688 – NOVEMBER 2005
155 Mbps to 4.25 Gbps LASER DRIVER
FEATURES APPLICATIONS
4.25 Gbps
Bias Current Programmable From 1 mA
to 100 mA
Modulation Current Programmable From 5 mA
to 85 mA
APC and Fault Detection
Fault Mode Selection The ONET4211LD is a laser driver for multiple fiber
Bias and Photodiode Current Monitors
CML Data Inputs
Temperature Compensation of Modulation
Current
Single 3.3-V Supply
Surface-Mount, Small-Footprint, 4 mm × 4 mm
24-Lead QFN Package
A
SONET/SDH Transmission Systems
Fibre Channel Optical Modules
Fiber Optic Data Links
Digital Cross-Connects
Optical Transmitters
DESCRIPTION
optic applications up to 4.25 Gbps. The device accepts CML input data and provides bias and modulation currents for driving a laser diode. Also provided are automatic power control (APC), temperature compensation of modulation current, fault detection, and current monitor features.
The device is available in a small-footprint, 4 mm × 4 mm 24-pin QFN package. The circuit requires a single 3.3-V supply.
This power-efficient laser driver is characterized for operation from –40 ° C to 85 ° C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
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B0092-01
VCC
GND
DIN+
DIN-
MOD+
MOD-
MODSET
Current Modulator
OUTPOL
MODTC
BIAS
MONB
IBMAX
MONP
PD
APCSET
SDOWN
DISABLE
CAPC
FLTMODE
Input Buffer Stage
Modulation Current Generator
MODCTRLMODSET
IMODEN
MODTC
IMODMON
Reference
Voltage
and Bias
Generation
VCC
GND
4
3
Bias Current Generator
BIASIBMAX
IBEN IBMON IBSET
MONB
Control
IMODEN
IMODMON
IBEN
IBMON
DISABLE
SDOWN
APCCTRL
APCMON
FLTMODE
Automatic Power Control
(APC)
IBSET
APCMON
APCCTRL
MONP
APCSET
PD
CAPC
ONET4211LD
SLLS688 – NOVEMBER 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
DETAILED DESCRIPTION
BLOCK DIAGRAM
A simplified block diagram of the ONET4211LD is shown in Figure 1 . This compact, low-power, 4.25-Gbps laser driver circuit consists of a high-speed data path and a
bias-and-control block. The function of the data path is to buffer the input data and then modulate the laser diode current according to
the input data stream. The bias-and-control block generates the laser diode bias current, contains automatic power control (APC) to
maintain constant optical output power, generates a modulation current that can be temperature compensated, and controls power on during start-up and shutdown after failure detection. The circuit design is optimized for high-speed and low-voltage operation (3.3 V).
The main circuit blocks are described in detail in the following paragraphs.
2
Figure 1. Simplified Block Diagram of the ONET4211LD
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IPD[A] P
AVG
[W]
MON
[AW]
R
APCSET
[]
4.69 V
IPD[A]
4.69 V
P
AVG
[W]
MON
[AW]
I
BIASMAX
[A]
343 V
R
BIASMAX
[]
V
MONB
[V]
R
MONB
[] I
BIAS
[A]
68
ONET4211LD
SLLS688 – NOVEMBER 2005
DETAILED DESCRIPTION (continued)
HIGH-SPEED DATA PATH
The high-speed data path consists of an input buffer stage and a current modulator. The input buffer stage takes CML-compatible differential signals. It provides on-chip, 50- termination to VCC.
AC-coupling may be used at the DIN+ and DIN- inputs. The laser diode current modulator consists mainly of two common-emitter output transistors and the required
driver circuitry. According to the input data stream, the modulation current is sunk at the MOD+ or the MOD– pin. Modulation current setting is performed by means of the modulation current generator block, which is supervised
by the control circuit block. The laser diode can be either ac- or dc-coupled. In either case, the maximum modulation current is 85 mA. The
modulation output is optimized for driving a 20- load. For optimum power efficiency, the laser driver does not provide any on-chip back-termination.
BIAS AND CONTROL
The bias-and-control circuitry consists of the bandgap voltage and bias generation block, the bias current generator, the automatic power control block, and the supervising control circuitry.
BANDGAP VOLTAGE AND BIAS GENERATION
The bandgap voltage reference provides the process- and temperature-independent reference voltages needed to set bias current, modulation current, and photodiode reference current. Additionally, this block provides the biasing for all internal circuits.
AUTOMATIC POWER CONTROL
The ONET4211LD laser driver incorporates an APC loop to compensate for the changes in laser threshold current over temperature and lifetime. The internal APC is enabled when resistors are connected to the IBMAX and APCSET pins. A back-facet photodiode mounted in the laser package is used to detect the average laser output power. The photodiode current IPDthat is proportional to the average laser power can be calculated by using the laser-to-monitor transfer ratio, ρ
In closed-loop operation, the APC modifies the laser diode bias current by comparing IPDwith a reference current I
APCSET
R
and generates a bias compensation current. IPDcan be programmed by selecting the external resistor
APCSET
according to:
The bias compensation current subtracts from the maximum bias current to maintain the monitor photodiode current. The maximum bias current is programmed by the resistor connected to IBMAX:
An external pin, MONB, is provided as a bias current monitor output. A fraction of the bias current (1/68) is mirrored and develops a voltage drop across an external resistor to ground, R given as:
If the voltage at MONB is greater than the programmed threshold, a fault mode occurs. MONP is also provided as a photocurrent monitor output. The photodiode current, IPD, is mirrored and develops a
voltage across an external resistor to ground, R
and the average power, P
MON
. The voltage at MONP is given as:
MONP
:
AVG
. The voltage at MONB is
MONB
(1)
(2)
(3)
(4)
3
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V
MONP
[V] R
MONP
[] IPD[A]
I
MOD
[A]
265 V
R
MODSET
[]
1
24
R
MODTC
[]
630 ppm
T[oC] T0[oC]
ONET4211LD
SLLS688 – NOVEMBER 2005
DETAILED DESCRIPTION (continued)
If the voltage at MONP is greater than the programmed threshold, a fault mode occurs. As with any negative-feedback system design, care must be taken to ensure stability of the loop. The loop
bandwidth must not be too high, in order to minimize pattern-dependent jitter. The dominant pole is determined by the capacitor C C
adds another pole to the system, and thus it must be small enough to maintain stability. The recommended
PD
value for this capacitance is C The internal APC loop can be disabled by connecting a 100-k resistor from APCSET to VCC and leaving PD
open. In open-loop operation, the laser diode current is set by I
MODULATION CURRENT GENERATOR
The modulation current generator defines the tail current of the modulator, which is sunk from either MOD+ or MOD–, depending on the data pattern. The modulation current consists of a current I temperature T0= 60 ° C (set by the resistor R the resistor R
Note that the reference temperature, T0, and the temperature compensation set by R To reduce the variation, I potentiometer.
MODTC
. The recommended value for C
APC
50 pF.
PD
. The modulation current can be estimated as follows:
can be calibrated over temperature and set with a microcontroller DAC or digital
MOD
MODSET
APC
) and a temperature-dependent modulation current defined by
is 200 nF. The capacitance of the monitor photodiode
BIASMAX
and I
.
MODSET
MODTC
at a reference
MOD0
vary from part to part.
(5)
(6)
CONTROL
The function of this block is to control the start-up sequence, detect faults, detect tracking failure of the APC loop, and provide disable control. The laser driver has a controlled start-up sequence which helps prevent transient glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is low, and the APC loop is open. Once V generator circuitry are activated (if DISABLE is low). The slow-start circuitry gradually brings up the current delivered to the laser diode. From the time when V current reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during power on, the slow-start circuitry does not activate until DISABLE is negated.
reaches ~2.8 V, the laser diode bias generator and modulation current
CC
reaches ~2.8 V until the modulation current and bias
CC
FAULT DETECTION
The fault detection circuitry monitors the operation of the ONET4211LD. If FLTMODE is set to a low level, (hard-fault mode) this circuitry disables the bias and modulation circuits and latches the SDOWN output on detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of T VCC.
Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized. If FLTMODE is set to a high level (soft-fault mode), a fault is indicated at the SDOWN output; however, the bias
and modulation circuits are not disabled. The SDOWN output is reset once the fault-causing condition disappears. Toggling DISABLE or VCC is not required.
A functional representation of the fault-detection circuitry is shown in Figure 2 .
) or by toggling
RES
4
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B0093-01
DISABLE
SDOWN
Inverter
Inverter
MUX
MUX
IBEN
IMODEN
MONP
MONB
I1
I0
I0
I1
VCC
I
PD
I
BIAS/68
1.25 V
2.8 V
Comparator
Comparator
Flipflop
CMOS
Buffer
Comparator
APCSET
MODSET
MODTC
IBMAX
APCSET
MODSET
MODTC
RES
T Counter
RES
-
-
S
-
Q
Q
Q
Q
Q
Q
+
+
R
+
SHORT
START
IBMAX
FLTMODE
Short Circuit
to VCC or
GND Detect
+
-
+
-
DETAILED DESCRIPTION (continued)
ONET4211LD
SLLS688 – NOVEMBER 2005
A fault mode is produced if the laser cathode is grounded and the photocurrent causes MONP to exceed its programmed threshold. Another fault mode can be produced if the laser diode end-of-life condition causes excessive bias current and photocurrent that results in monitor voltages (MONP, MONB) being greater than their programmed threshold. Other fault modes can occur if there are any I/O pin single-point failures (short to VCC or
Figure 2. Functional Representation of the Fault Detection Circuitry
GND) and the monitor voltages exceed their programmed threshold (see Table 1 ).
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ONET4211LD
SLLS688 – NOVEMBER 2005
DETAILED DESCRIPTION (continued)
Table 1. Response to I/O-Pin Shorts to VCC or GND
PIN
Response to Short to GND Response to Short to V
APCSET SDOWN latched high, I
I
disabled unaffected
MOD
BIAS SDOWN latched high, I
disabled unaffected CAPC No fault No fault, I DIN+ No fault, I DIN– No fault, I
MOD MOD
DISABLE Normal circuit operation Normal circuit operation Normal circuit operation Normal circuit operation IBMAX SDOWN latched high, I
I
disabled and I
MOD
MOD+ SDOWN latched high, I
I
disabled unaffected
MOD
MOD– SDOWN latched high, I
I
disabled unaffected
MOD
MODSET SDOWN latched high, I
I
disabled unaffected
MOD
MODTC SDOWN latched high, I
I
disabled unaffected
MOD
MONB No fault SDOWN latched high, I
MONP No fault SDOWN latched high, I
OUTPOL No fault, polarity reverses No fault No fault, polarity reverses No fault PD No fault, I
MOD
SDOWN No fault No fault No fault No fault
FLTMODE = LOW FLTMODE = HIGH
Response to Short to GND Response to Short to V
CC
and No fault, I
BIAS
MOD
No fault, I
disabled No fault No fault, I disabled No fault No fault, I
and SDOWN latched high, I
BIAS
and No fault SDOWN high, I
BIAS
and No fault SDOWN high, I
BIAS
and No fault, I
BIAS
and No fault SDOWN high, I
BIAS
and I
and I
MOD
MOD
MOD
unaffected No fault, I
unaffected SDOWN high, I
MOD
goes to zero SDOWN high, I
BIAS
goes to zero No fault, I
BIAS
SDOWN high, I
disabled unaffected
disabled SDOWN high, I
MOD
disabled unaffected
disabled unaffected
goes to zero No fault, I
BIAS
BIAS
No fault SDOWN high, I
BIAS
No fault SDOWN high, I
BIAS
MOD MOD MOD
MOD
and I
BIAS
MOD
MOD
No fault
No fault, I
unaffected No fault, I disabled No fault disabled No fault
MOD
SDOWN high, I
No fault
No fault
No fault, I
No fault
MOD
BIAS
BIAS
BIAS
and I
BIAS
unaffected No fault, I
CC
unaffected
MOD
goes to zero
BIAS
unaffected
MOD
disabled
MOD
and I
BIAS
BIAS
goes to zero
BIAS
and I
MOD
MOD
PACKAGE
For the ONET4211LD, a small-footprint, 4-mm × 4-mm, 24-lead QFN package is used, with a lead pitch of 0,5 mm. The pinout is shown in Figure 3 .
To achieve the required low thermal resistance of about 38 K/W, which keeps the maximum junction temperature below 115 ° C, a good thermal connection of the exposed die pad is mandatory.
6
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P0024-03
GND
DISABLE
VCC
APCSET
MOD-
OUTPOL
MOD+
IBMAX
VCC
CAPC
BIAS
PD
18
17
16
15
14
13
1
2
3
4
5
6
GND
MONP
VCC
MONB
DIN+
SDOWN
DIN-
FLTMODE
VCC
MODSET
GND
MODTC
24 23 22 21 20 19
7 8 9 10 11 12
RGE PACKAGE
(TOP VIEW)
ONET4211LD
SLLS688 – NOVEMBER 2005
Figure 3. Pinout of the ONET4211LD in a 4-mm × 4-mm, 24-Lead QFN Package (Top View)
TERMINAL FUNCTIONS
TERMINAL
NAME NO.
APCSET 23 Analog-in Set photodiode reference current with resistor to GND. BIAS 13 Analog-out Laser-diode bias-current sink. Connect to laser cathode. CAPC 20 Analog APC loop capacitor DIN+ 3 CML-in Non-inverted data input. On-chip, 50- terminated to VCC. DIN– 4 CML-in Inverted data input. On-chip, 50- terminated to VCC. DISABLE 24 LVTTL-in Disable modulation and bias-current outputs. FLTMODE 10 CMOS-in Fault mode selection input. If a low level is applied to this pin, any fault event is latched and the
GND 1, 6, 18, EP Supply Circuit ground. The exposed die pad (EP) must be grounded. IBMAX 21 Analog-in Set maximum laser diode current with resistor to GND. MOD+ 15 Analog-out Laser modulation current output. Connect to laser cathode. Avoid usage of vias on board. MOD– 16 Analog-out Complementary laser modulation current output. Connect to VCC adjacent to anode of laser
MODSET 11 Analog-in Set temperature-independent modulation current with resistor to GND. MODTC 12 Analog-in Set modulation-current temperature compensation with resistor to GND. MONB 8 Analog-out Bias current monitor. Sources 1/68 of the bias current. MONP 7 Analog-out Photodiode current monitor. Sources a current identical to the photodiode current. OUTPOL 22 LVTTL-in Alters modulation current output polarity. Open or high: normal polarity; low: inverted polarity.
PD 19 Analog-in Monitor photodiode input. Connect to photodiode anode for APC. Sinks the photodiode current
SDOWN 9 LVTTL-out Fault detection flag VCC 2, 5, 14, 17 Supply 3.3-V, ± 10% supply voltage
TYPE DESCRIPTION
bias and modulation currents are disabled in a fault condition. Toggling of DISABLE or VCC resets the fault condition. If pin is set to a high level, fault events are flagged at the SDOWN output but not latched. The bias and modulation currents are not disabled. SDOWN is reset once the fault condition disappears.
diode. Avoid usage of vias on board.
OUTPOL is pulled up internally. Normal polarity: when DIN+ is high, current is sunk into MOD+.
to GND.
7
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ONET4211LD
SLLS688 – NOVEMBER 2005
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
V
CC
I
IBIAS
I
, I
IMOD+
IMOD–
I
PD
V
, V
DIN+
DIN–,VDISABLE
V
, V
MONP
FLTMODE
V
, V
CAPC
V V V
IBMAX
, V
APCSET MOD+ BIAS
MODTC
, V
MOD–
, V
MONB
, V
SDOWN
, V
, Voltage at CAPC, IBMAX, MODSET, APCSET, MODTC
MODSET
ESD
T
J,max
T
STG
T
A
T
LEAD
Supply voltage Current into BIAS –20 mA to 120 mA Current into MOD+, MOD– 20 mA to 120 mA Current into PD –5 mA to 5 mA
, Voltage at DIN+, DIN–, DISABLE, MONB, MONP, FLTMODE, SDOWN
Voltage at MOD+, MOD– Voltage at BIAS ESD rating at all pins except MOD+, MOD– 2 kV (HBM) ESD rating at MOD+, MOD- 1 kV (HBM) Maximum junction temperature 150 ° C Storage temperature range –65 ° C to 150 ° C Characterized free-air operating temperature range –40 ° C to 85 ° C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(2)
(2)
(2)
(1)
(2)
(2)
0.6 V to VCC + 1.5 V
–0.3 V to 4 V
–0.3 V to 4V
–0.3 V to 3 V
1 V to 3.5 V
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