TEXAS INSTRUMENTS ONET4211LD Technical data

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ONET4211LD

SLLS688 – NOVEMBER 2005

155 Mbps to 4.25 Gbps LASER DRIVER

FEATURES APPLICATIONS

• Multirate Operation From 155 Mbps up to

4.25 Gbps

• Bias Current Programmable From 1 mA

to 100 mA

• Modulation Current Programmable From 5 mA

to 85 mA

• APC and Fault Detection

• Fault Mode Selection The ONET4211LD is a laser driver for multiple fiber

• Bias and Photodiode Current Monitors

• CML Data Inputs

• Temperature Compensation of Modulation

Current

• Single 3.3-V Supply

• Surface-Mount, Small-Footprint, 4 mm × 4 mm

24-Lead QFN Package

A

• SONET/SDH Transmission Systems

• Fibre Channel Optical Modules

• Fiber Optic Data Links

• Digital Cross-Connects

• Optical Transmitters

DESCRIPTION

optic applications up to 4.25 Gbps. The device
accepts CML input data and provides bias and
modulation currents for driving a laser diode. Also
provided are automatic power control (APC),
temperature compensation of modulation current,
fault detection, and current monitor features.

The device is available in a small-footprint, 4 mm × 4
mm 24-pin QFN package. The circuit requires a
single 3.3-V supply.

This power-efficient laser driver is characterized for
operation from –40 ° C to 85 ° C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2005, Texas Instruments Incorporated

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B0092-01

VCC

GND

DIN+

DIN-

MOD+

MOD-

MODSET

Current Modulator

OUTPOL

MODTC

BIAS

MONB

IBMAX

MONP

PD

APCSET

SDOWN

DISABLE

CAPC

FLTMODE

Input Buffer Stage

Modulation Current Generator

MODCTRLMODSET

IMODEN

MODTC

IMODMON

Reference

Voltage

and Bias

Generation

VCC

GND

4

3

Bias Current Generator

BIASIBMAX

IBEN IBMON IBSET

MONB

Control

IMODEN

IMODMON

IBEN

IBMON

DISABLE

SDOWN

APCCTRL

APCMON

FLTMODE

Automatic Power Control

(APC)

IBSET

APCMON

APCCTRL

MONP

APCSET

PD

CAPC

ONET4211LD

SLLS688 – NOVEMBER 2005

These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

DETAILED DESCRIPTION

BLOCK DIAGRAM

A simplified block diagram of the ONET4211LD is shown in Figure 1 .
This compact, low-power, 4.25-Gbps laser driver circuit consists of a high-speed data path and a

bias-and-control block.
The function of the data path is to buffer the input data and then modulate the laser diode current according to

the input data stream.
The bias-and-control block generates the laser diode bias current, contains automatic power control (APC) to

maintain constant optical output power, generates a modulation current that can be temperature compensated,
and controls power on during start-up and shutdown after failure detection. The circuit design is optimized for
high-speed and low-voltage operation (3.3 V).

The main circuit blocks are described in detail in the following paragraphs.

2

Figure 1. Simplified Block Diagram of the ONET4211LD

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IPD[A]  P

AVG

[W]  

MON

[AW]

R

APCSET

[] 

4.69 V

IPD[A]



4.69 V

P

AVG

[W]  

MON

[AW]

I

BIASMAX

[A] 

343 V

R

BIASMAX

[]

V

MONB

[V] 

R

MONB

[]  I

BIAS

[A]

68

ONET4211LD

SLLS688 – NOVEMBER 2005

DETAILED DESCRIPTION (continued)

HIGH-SPEED DATA PATH

The high-speed data path consists of an input buffer stage and a current modulator.
The input buffer stage takes CML-compatible differential signals. It provides on-chip, 50- Ω termination to VCC.

AC-coupling may be used at the DIN+ and DIN- inputs.
The laser diode current modulator consists mainly of two common-emitter output transistors and the required

driver circuitry. According to the input data stream, the modulation current is sunk at the MOD+ or the MOD– pin.
Modulation current setting is performed by means of the modulation current generator block, which is supervised

by the control circuit block.
The laser diode can be either ac- or dc-coupled. In either case, the maximum modulation current is 85 mA. The

modulation output is optimized for driving a 20- Ω load.
For optimum power efficiency, the laser driver does not provide any on-chip back-termination.

BIAS AND CONTROL

The bias-and-control circuitry consists of the bandgap voltage and bias generation block, the bias current
generator, the automatic power control block, and the supervising control circuitry.

BANDGAP VOLTAGE AND BIAS GENERATION

The bandgap voltage reference provides the process- and temperature-independent reference voltages needed
to set bias current, modulation current, and photodiode reference current. Additionally, this block provides the
biasing for all internal circuits.

AUTOMATIC POWER CONTROL

The ONET4211LD laser driver incorporates an APC loop to compensate for the changes in laser threshold
current over temperature and lifetime. The internal APC is enabled when resistors are connected to the IBMAX
and APCSET pins. A back-facet photodiode mounted in the laser package is used to detect the average laser
output power. The photodiode current IPDthat is proportional to the average laser power can be calculated by
using the laser-to-monitor transfer ratio, ρ

In closed-loop operation, the APC modifies the laser diode bias current by comparing IPDwith a reference current
I

APCSET

R

and generates a bias compensation current. IPDcan be programmed by selecting the external resistor

APCSET

according to:

The bias compensation current subtracts from the maximum bias current to maintain the monitor photodiode
current. The maximum bias current is programmed by the resistor connected to IBMAX:

An external pin, MONB, is provided as a bias current monitor output. A fraction of the bias current (1/68) is
mirrored and develops a voltage drop across an external resistor to ground, R
given as:

If the voltage at MONB is greater than the programmed threshold, a fault mode occurs.
MONP is also provided as a photocurrent monitor output. The photodiode current, IPD, is mirrored and develops a

voltage across an external resistor to ground, R

and the average power, P

MON

. The voltage at MONP is given as:

MONP

:

AVG

. The voltage at MONB is

MONB

(1)

(2)

(3)

(4)

3

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V

MONP

[V]  R

MONP

[]  IPD[A]

I

MOD

[A] 

265 V

R

MODSET

[]





1 



24 

R

MODTC

[]

 630 ppm







T[oC]  T0[oC]





ONET4211LD

SLLS688 – NOVEMBER 2005

DETAILED DESCRIPTION (continued)

If the voltage at MONP is greater than the programmed threshold, a fault mode occurs.
As with any negative-feedback system design, care must be taken to ensure stability of the loop. The loop

bandwidth must not be too high, in order to minimize pattern-dependent jitter. The dominant pole is determined
by the capacitor C
C

adds another pole to the system, and thus it must be small enough to maintain stability. The recommended

PD

value for this capacitance is C
The internal APC loop can be disabled by connecting a 100-k Ω resistor from APCSET to VCC and leaving PD

open. In open-loop operation, the laser diode current is set by I

MODULATION CURRENT GENERATOR

The modulation current generator defines the tail current of the modulator, which is sunk from either MOD+ or
MOD–, depending on the data pattern. The modulation current consists of a current I
temperature T0= 60 ° C (set by the resistor R
the resistor R

Note that the reference temperature, T0, and the temperature compensation set by R
To reduce the variation, I
potentiometer.

MODTC

. The recommended value for C

APC

≤ 50 pF.

PD

. The modulation current can be estimated as follows:

can be calibrated over temperature and set with a microcontroller DAC or digital

MOD

MODSET

APC

) and a temperature-dependent modulation current defined by

is 200 nF. The capacitance of the monitor photodiode

BIASMAX

and I

.

MODSET

MODTC

at a reference

MOD0

vary from part to part.

(5)

(6)

CONTROL

The function of this block is to control the start-up sequence, detect faults, detect tracking failure of the APC loop,
and provide disable control. The laser driver has a controlled start-up sequence which helps prevent transient
glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is low, and
the APC loop is open. Once V
generator circuitry are activated (if DISABLE is low). The slow-start circuitry gradually brings up the current
delivered to the laser diode. From the time when V
current reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during
power on, the slow-start circuitry does not activate until DISABLE is negated.

reaches ~2.8 V, the laser diode bias generator and modulation current

CC

reaches ~2.8 V until the modulation current and bias

CC

FAULT DETECTION

The fault detection circuitry monitors the operation of the ONET4211LD. If FLTMODE is set to a low level,
(hard-fault mode) this circuitry disables the bias and modulation circuits and latches the SDOWN output on
detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of T
VCC.

Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized.
If FLTMODE is set to a high level (soft-fault mode), a fault is indicated at the SDOWN output; however, the bias

and modulation circuits are not disabled. The SDOWN output is reset once the fault-causing condition
disappears. Toggling DISABLE or VCC is not required.

A functional representation of the fault-detection circuitry is shown in Figure 2 .

) or by toggling

RES

4

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B0093-01

DISABLE

SDOWN

Inverter

Inverter

MUX

MUX

IBEN

IMODEN

MONP

MONB

I1

I0

I0

I1

VCC

I

PD

I

BIAS/68

1.25 V

2.8 V

Comparator

Comparator

Flipflop

CMOS

Buffer

Comparator

APCSET

MODSET

MODTC

IBMAX

APCSET

MODSET

MODTC

RES

T Counter

RES

-

-

S

-

Q

Q

Q

Q

Q

Q

+

+

R

+

SHORT

START

IBMAX

FLTMODE

Short Circuit

to VCC or

GND Detect

+

-

+

-

DETAILED DESCRIPTION (continued)

ONET4211LD

SLLS688 – NOVEMBER 2005

A fault mode is produced if the laser cathode is grounded and the photocurrent causes MONP to exceed its
programmed threshold. Another fault mode can be produced if the laser diode end-of-life condition causes
excessive bias current and photocurrent that results in monitor voltages (MONP, MONB) being greater than their
programmed threshold. Other fault modes can occur if there are any I/O pin single-point failures (short to VCC or

Figure 2. Functional Representation of the Fault Detection Circuitry

GND) and the monitor voltages exceed their programmed threshold (see Table 1 ).

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ONET4211LD

SLLS688 – NOVEMBER 2005

DETAILED DESCRIPTION (continued)

Table 1. Response to I/O-Pin Shorts to VCC or GND

PIN

Response to Short to GND Response to Short to V

APCSET SDOWN latched high, I

I

disabled unaffected

MOD

BIAS SDOWN latched high, I

disabled unaffected
CAPC No fault No fault, I
DIN+ No fault, I
DIN– No fault, I

MOD
MOD

DISABLE Normal circuit operation Normal circuit operation Normal circuit operation Normal circuit operation
IBMAX SDOWN latched high, I

I

disabled and I

MOD

MOD+ SDOWN latched high, I

I

disabled unaffected

MOD

MOD– SDOWN latched high, I

I

disabled unaffected

MOD

MODSET SDOWN latched high, I

I

disabled unaffected

MOD

MODTC SDOWN latched high, I

I

disabled unaffected

MOD

MONB No fault SDOWN latched high, I

MONP No fault SDOWN latched high, I

OUTPOL No fault, polarity reverses No fault No fault, polarity reverses No fault
PD No fault, I

MOD

SDOWN No fault No fault No fault No fault

FLTMODE = LOW FLTMODE = HIGH

Response to Short to GND Response to Short to V

CC

and No fault, I

BIAS

MOD

No fault, I

disabled No fault No fault, I
disabled No fault No fault, I

and SDOWN latched high, I

BIAS

and No fault SDOWN high, I

BIAS

and No fault SDOWN high, I

BIAS

and No fault, I

BIAS

and No fault SDOWN high, I

BIAS

and I

and I

MOD

MOD

MOD

unaffected No fault, I

unaffected SDOWN high, I

MOD

goes to zero SDOWN high, I

BIAS

goes to zero No fault, I

BIAS

SDOWN high, I

disabled unaffected

disabled SDOWN high, I

MOD

disabled unaffected

disabled unaffected

goes to zero No fault, I

BIAS

BIAS

No fault SDOWN high, I

BIAS

No fault SDOWN high, I

BIAS

MOD
MOD
MOD

MOD

and I

BIAS

MOD

MOD

No fault

No fault, I

unaffected No fault, I
disabled No fault
disabled No fault

MOD

SDOWN high, I

No fault

No fault

No fault, I

No fault

MOD

BIAS

BIAS

BIAS

and I

BIAS

unaffected No fault, I

CC

unaffected

MOD

goes to zero

BIAS

unaffected

MOD

disabled

MOD

and I

BIAS

BIAS

goes to zero

BIAS

and I

MOD

MOD

PACKAGE

For the ONET4211LD, a small-footprint, 4-mm × 4-mm, 24-lead QFN package is used, with a lead pitch of 0,5
mm. The pinout is shown in Figure 3 .

To achieve the required low thermal resistance of about 38 K/W, which keeps the maximum junction temperature
below 115 ° C, a good thermal connection of the exposed die pad is mandatory.

6

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P0024-03

GND

DISABLE

VCC

APCSET

MOD-

OUTPOL

MOD+

IBMAX

VCC

CAPC

BIAS

PD

18

17

16

15

14

13

1

2

3

4

5

6

GND

MONP

VCC

MONB

DIN+

SDOWN

DIN-

FLTMODE

VCC

MODSET

GND

MODTC

24 23 22 21 20 19

7 8 9 10 11 12

RGE PACKAGE

(TOP VIEW)

ONET4211LD

SLLS688 – NOVEMBER 2005

Figure 3. Pinout of the ONET4211LD in a 4-mm × 4-mm, 24-Lead QFN Package (Top View)

TERMINAL FUNCTIONS

TERMINAL

NAME NO.

APCSET 23 Analog-in Set photodiode reference current with resistor to GND.
BIAS 13 Analog-out Laser-diode bias-current sink. Connect to laser cathode.
CAPC 20 Analog APC loop capacitor
DIN+ 3 CML-in Non-inverted data input. On-chip, 50- Ω terminated to VCC.
DIN– 4 CML-in Inverted data input. On-chip, 50- Ω terminated to VCC.
DISABLE 24 LVTTL-in Disable modulation and bias-current outputs.
FLTMODE 10 CMOS-in Fault mode selection input. If a low level is applied to this pin, any fault event is latched and the

GND 1, 6, 18, EP Supply Circuit ground. The exposed die pad (EP) must be grounded.
IBMAX 21 Analog-in Set maximum laser diode current with resistor to GND.
MOD+ 15 Analog-out Laser modulation current output. Connect to laser cathode. Avoid usage of vias on board.
MOD– 16 Analog-out Complementary laser modulation current output. Connect to VCC adjacent to anode of laser

MODSET 11 Analog-in Set temperature-independent modulation current with resistor to GND.
MODTC 12 Analog-in Set modulation-current temperature compensation with resistor to GND.
MONB 8 Analog-out Bias current monitor. Sources 1/68 of the bias current.
MONP 7 Analog-out Photodiode current monitor. Sources a current identical to the photodiode current.
OUTPOL 22 LVTTL-in Alters modulation current output polarity. Open or high: normal polarity; low: inverted polarity.

PD 19 Analog-in Monitor photodiode input. Connect to photodiode anode for APC. Sinks the photodiode current

SDOWN 9 LVTTL-out Fault detection flag
VCC 2, 5, 14, 17 Supply 3.3-V, ± 10% supply voltage

TYPE DESCRIPTION

bias and modulation currents are disabled in a fault condition. Toggling of DISABLE or VCC
resets the fault condition. If pin is set to a high level, fault events are flagged at the SDOWN
output but not latched. The bias and modulation currents are not disabled. SDOWN is reset
once the fault condition disappears.

diode. Avoid usage of vias on board.

OUTPOL is pulled up internally. Normal polarity: when DIN+ is high, current is sunk into MOD+.

to GND.

7

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ONET4211LD

SLLS688 – NOVEMBER 2005

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

V

CC

I

IBIAS

I

, I

IMOD+

IMOD–

I

PD

V

, V

DIN+

DIN–,VDISABLE

V

, V

MONP

FLTMODE

V

, V

CAPC

V
V
V

IBMAX

, V

APCSET
MOD+
BIAS

MODTC

, V

MOD–

, V

MONB

, V

SDOWN

, V

, Voltage at CAPC, IBMAX, MODSET, APCSET, MODTC

MODSET

ESD

T

J,max

T

STG

T

A

T

LEAD

Supply voltage
Current into BIAS –20 mA to 120 mA
Current into MOD+, MOD– – 20 mA to 120 mA
Current into PD –5 mA to 5 mA

, Voltage at DIN+, DIN–, DISABLE, MONB, MONP, FLTMODE, SDOWN

Voltage at MOD+, MOD–
Voltage at BIAS
ESD rating at all pins except MOD+, MOD– 2 kV (HBM)
ESD rating at MOD+, MOD- 1 kV (HBM)
Maximum junction temperature 150 ° C
Storage temperature range –65 ° C to 150 ° C
Characterized free-air operating temperature range –40 ° C to 85 ° C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(2)

(2)

(2)

(1)

(2)

(2)

0.6 V to VCC + 1.5 V

–0.3 V to 4 V

–0.3 V to 4V

–0.3 V to 3 V

1 V to 3.5 V

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SLLS688 – NOVEMBER 2005

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

V

CC

T

A

Supply voltage 3 3.3 3.6 V
Operating free-air temperature –40 85 ° C

DC ELECTRICAL CHARACTERISTICS

over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

CC

I

VCC

I

BIAS

I

BIAS-OFF

VID Differential input signal 200 1600 mVp-p

V

PD

(1) Absolute accuracy refers to part-to-part variation.

Supply voltage 3 3.3 3.6 V

I

= 30 mA, I

MOD

I

)

Supply current

BIAS

I

MOD

I

BIAS

= 60 mA, I

)

= 20 mA (excluding I

BIAS

= 100 mA (excluding I

BIAS

,

MOD

,

MOD

22 mA

Bias current range 100 mA

Bias off-current 25 µ A

Bias overshoot 10%

DISABLE = high or hard-fault mode; V

3.5 V
During module hot plugging. V

must be ≤ 0.8 s

CC

turnon time

≤

BIAS

Bias current temperature stability APC open loop –480 480 ppm/ ° C

I

≥ 1 mA –15% 15%

Bias current absolute accuracy

Bias current monitor gain, I

(1)

/I

BIAS

MONB

MONB and MONP threshold range 1 1.25 1.35 V

PD current monitor gain, IPD/I

MONP

BIAS

I

= 1 mA, TA= 25 ° C ± 15%

BIAS

A fault is never detected for V
a fault always occurs for V

MONB/P

≤ 1 V and

MONB/P

≥ 1.35 V

68 mA/ mA

1 mA/mA

SDOWN output high voltage IOH= 100 µ A sourcing 2.4 V

SDOWN output low voltage IOL= 1 mA sinking 0.4 V

DISABLE input impedance 4.7 7.4 10 k Ω

DISABLE input high voltage 2 V

DISABLE input low voltage 0.8 V

Monitor diode voltage 1.6 V

Monitor diode dc current range 18 1500 µ A

ONET4211LD

45 mA

AC ELECTRICAL CHARACTERISTICS

Typical operating condition is at V
over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Data rate 4.25 Gbps

I

MOD

I

MOD-OFF

(1) Absolute accuracy refers to part-to-part variation.

Modulation current range 5 85 mA
Modulation off-current DISABLE = high or hard-fault occurred 25 µ A

Modulation current stability –600 600 ppm/ ° C
Modulation current absolute

accuracy

(1)

= 3.3 V, I

CC

= 30 mA, I

MOD

Current into MOD+/MOD– pin;
V

MOD+

I

MOD

I

MOD

= 20 mA and TA= 25 ° C.

BIAS

, V

≥ 0.6 V

MOD–

= 10 mA ± 40%
= 80 mA ± 25%

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ONET4211LD

SLLS688 – NOVEMBER 2005

AC ELECTRICAL CHARACTERISTICS (continued)

Typical operating condition is at V
over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Modulation current
temperature compensation

t

r

t

f

t

OFF

t

ON

t

INIT

t

FAULT

t

RESET

DJ Deterministic jitter

Output rise time (20% to 80%) V
Output fall time (80% to 20%) V

Disable assert time (see Figure 4 ) currents fall below the maximum limits of 0.06 5 µ s

Disable negate time (see Figure 5 ) 200 µ s

Time to initialize 200 µ s
Fault assert time Time from fault to SDOWN rising edge 3.3 50 µ s

DISABLE reset (see Figure 6 )

Output overshoot/undershoot –29% 29%
Random jitter I

(3)

= 3.3 V, I

CC

(2)

= 30 mA, I

MOD

R

MODTC

R

MODTC
MOD+
MOD+

Time from rising edge of DISABLE until output
I

MOD-OFF

Time from falling edge of DISABLE until output
is 90% of nominal

From power on or negation of SDOWN using
DISABLE

Maximum spike pulse duration at DISABLE
being ignored

DISABLE high time required to reset SDOWN 20 µ s

MOD

10 mA ≤ I
at 4.25 Gbps

10 mA ≤ I
equivalent pattern at 2.67 Gbps

K28.5 pattern at 1.06 Gbps 5 ps
223– 1 PRBS or equivalent pattern at 155 10 ps

Mbps

= 20 mA and TA= 25 ° C.

BIAS

= 3.125 k Ω 8300
open 630

≥ 1 V, V
≥ 1 V, V

and I

≥ 1 V, I

MOD–

≥ 1 V, I

MOD–

BIAS-OFF

= 30 mA 35 55 ps

MOD

= 30 mA 35 55 ps

MOD

10 µ s

= 60 mA 0.6 0.9 ps

≤ 60 mA, with K28.5 pattern

MOD

≤ 60 mA, with 223–1 PRBS or

MOD

15 30 ps

13 32 ps

ppm/ ° C

RMS

p-p

p-p

p-p
p-p

(2) For a given external resistor connected to the MODTC pin, the modulation-current temperature compensation varies due to part-to-part

variations.

(3) Jitter measured at positive edge and negative edge crossing of eye diagram.

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t

OFF

t

t

t

t

V

HIGH

V

HIGH

I

MOD

I

BIAS

V

LOW

V

LOW

I

MOD-OFF

I

BIAS-OFF

SDOWN

DISABLE

I

MOD

I

BIAS

T0102-01

ONET4211LD

SLLS688 – NOVEMBER 2005

Figure 4. DISABLE Assert Time TOFF

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t

ON

t

t

t

t

V

HIGH

V

HIGH

I

MOD

I

BIAS

V

LOW

V

LOW

I

MOD-OFF

I

BIAS-OFF

SDOWN

DISABLE

I

MOD

I

BIAS

T0103-01

ONET4211LD

SLLS688 – NOVEMBER 2005

Figure 5. DISABLE Negate Time TON

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t

RESET

t

RESET

t

ON

t

t

t

t

V

HIGH

V

HIGH

I

MOD

I

BIAS

V

LOW

V

LOW

I

MOD-OFF

I

BIAS-OFF

SDOWN

DISABLE

I

MOD

I

BIAS

T0104-01

ONET4211LD

SLLS688 – NOVEMBER 2005

Figure 6. SDOWN Reset Time TRESET

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Time [50ps/Div]

Single−Ended Output Voltage

[50mV/Div]

G001

Time [100ps/Div]

Single−Ended Output Voltage

[50mV/Div]

Time [100ps/Div]

Single−Ended Output Voltage

[50mV/Div]

G002

Time [200ps/Div]

Single−Ended Output Voltage

[50mV/Div]

Time [200ps/Div]

Single−Ended Output Voltage

[50mV/Div]

G003

Modulation Current − mA

0

10

20

30

40

50

60

10 15 20 25 30 35 40 45 50 55 60

Deterministic Jitter Including PWD − ps

p−p

G004

ONET4211LD

SLLS688 – NOVEMBER 2005

Typical operating condition is at V

CC

TYPICAL CHARACTERISTICS

= 3.3 V, I

MOD

= 30 mA, I

= 20 mA and TA= 25 ° C (unless otherwise noted)

BIAS

ELECTRICAL EYE-DIAGRAM AT 4.25 Gbps ELECTRICAL EYE-DIAGRAM AT 2.125 Gbps

WITH K28.5 PATTERN WITH K28.5 PATTERN

Figure 7. Figure 8.

ELECTRICAL EYE-DIAGRAM AT 1.0625 Gbps DETERMINISTIC JITTER

WITH K28.5 PATTERN vs

MODULATION CURRENT

14

Figure 9. Figure 10.

www.ti.com

Modulation Current − mA

0.0

0.5

1.0

1.5

2.0

2.5

3.0

10 15 20 25 30 35 40 45 50 55 60

Random Jitter − ps

RMS

G005

TA − Free-Air Temperature − °C

0.0

0.5

1.0

1.5

2.0

2.5

3.0

−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90

Random Jitter − ps

RMS

G006

Modulation Current − mA

20

30

40

50

60

70

80

10 15 20 25 30 35 40 45 50 55 60

Rise Time and Fall Time − ps

G007

Fall Time

Rise Time

Bias Current − mA

10

11

12

13

14

15

16

17

18

19

20

10 15 20 25 30 35 40 45 50 55 60

Bias Monitor Current Gain − mA/A

G008

Typical operating condition is at V

RANDOM JITTER RANDOM JITTER

MODULATION CURRENT TEMPERATURE

TYPICAL CHARACTERISTICS (continued)

= 3.3 V, I

CC

vs vs

Figure 11. Figure 12.

MOD

= 30 mA, I

= 20 mA and TA= 25 ° C (unless otherwise noted)

BIAS

ONET4211LD

SLLS688 – NOVEMBER 2005

RISE TIME AND FALL TIME BIAS-MONITOR CURRENT GAIN I

vs vs

MODULATION CURRENT BIAS CURRENT I

BIAS

Figure 13. Figure 14.

/I

MONB

BIAS

15

www.ti.com

R

BIASMAX

− External Resistor − kΩ

0

20

40

60

80

100

120

0 10 20 30 40 50 60 70 80 90 100

I

BIAS

− Bias Current − mA

G009

R

MODSET

− External Resistor − kΩ

0

10

20

30

40

50

60

70

80

90

100

0 10 20 30 40 50 60 70 80 90 100

I

MOD

− Modulation Current − mA

G010

R

APCSET

− External Resistor − kΩ

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0 10 20 30 40 50 60 70 80 90 100

I

PD

− Monitor Diode Current − mA

G011

TA − Free-Air Temperature − °C

0.0

0.5

1.0

1.5

2.0

2.5

3.0

−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90

Photodiode Monitor Gain − mA/mA

G012

ONET4211LD

SLLS688 – NOVEMBER 2005

Typical operating condition is at V

TYPICAL CHARACTERISTICS (continued)

= 3.3 V, I

CC

MOD

= 30 mA, I

= 20 mA and TA= 25 ° C (unless otherwise noted)

BIAS

BIAS CURRENT I

BIAS

EXTERNAL RESISTOR R

Figure 15. Figure 16.

MONITOR DIODE CURRENT I
EXTERNAL RESISTOR R

IN OPEN-LOOP MODE MODULATION CURRENT I

vs vs

BIASMAX

vs vs

PD

APCSET

EXTERNAL RESISTOR R

PHOTODIODE MONITOR GAIN I

TEMPERATURE

MOD

MODSET

/I

MONP

PD

16

Figure 17. Figure 18.

www.ti.com

TA − Free-Air Temperature − °C

10

12

14

16

18

20

−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90

Bias Current Monitor Gain − mA/A

G013

TA − Free-Air Temperature − °C

10

20

30

40

50

60

70

80

−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90

Supply Current − mA

G014

V

SDOWN

Time [500 ns/Div]

V

DISABLE

I

MOD+

I

BIAS

∆t = 2.15 µs

G016

TA − Free-Air Temperature − °C

10

20

30

40

50

60

70

80

−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90

Modulation Current − mA

G015

R

MODTC

= ∞ Ω (Open)

R

MODTC

= 5.6 kΩ

R

MODTC

= 3.1 kΩ

V

SDOWN

V

DISABLE

I

MOD+

I

BIAS

∆t = 236 µs

G017

Time [100 µs/Div]

V

SDOWN

V

DISABLE

I

MOD+

I

BIAS

∆t = 12.8 µs

G018

Time [5 µs/Div]

Typical operating condition is at V

TYPICAL CHARACTERISTICS (continued)

= 3.3 V, I

CC

MOD

= 30 mA, I

= 20 mA and TA= 25 ° C (unless otherwise noted)

BIAS

ONET4211LD

SLLS688 – NOVEMBER 2005

BIAS CURRENT MONITOR GAIN I

vs vs

/I

MONB

BIAS

SUPPLY CURRENT (excl. I

MOD

TEMPERATURE TEMPERATURE

Figure 19. Figure 20.

MODULATION CURRENT vs TEMPERATURE DISABLE ASSERT TIME T

FOR DIFFERENT SETTINGS OF R

MODTC

and I

OFF

)

BIAS

DISABLE NEGATE TIME T

Figure 21. Figure 22.

ON

SHUTDOWN RESET TIME T

Figure 23. Figure 24.

RESET

17

www.ti.com

S0154-01

ONET4211LD

24-Lead QFN

Monitor

Photodiode

Laser
Diode

GND

VCC

MOD–

MOD+

VCC

BIAS

DISABLE

APCSET

OUTPOL

IBMAX

CAPC

PD

GND

R

APCSET

R

BIASMAX

R

MONPRMONB

R

MODSETRMONTC

C

APC

VCC

DIN+

20 W

R

D

DIN–

VCC

GND

MONP

MONB

SDOWN

FLTMODE

MODSET

MODTC

DISABLE

VCC

FLTMODE

SDOWN

DIN+

DIN–

MONP

MONB

OUTPOL

ONET4211LD

SLLS688 – NOVEMBER 2005

APPLICATION INFORMATION

Figure 25 shows the ONET4211LD connected with a dc-coupled interface to the laser diode; alternatively, the

ONET4211LD laser driver can be ac-coupled.

the ONET4211LD and the Laser Diode

Figure 25. Basic Application Circuit With DC-Coupled Interface Between

APC loop instability can occur with large inductive loading on the BIAS pin. To ensure loop stability in this case, it
is recommended to connect a 1-nF capacitor to ground at the BIAS pin.

18

www.ti.com

IPD[A]  P

AVG

[W]  

MON

[AW]

R

APCSET

[] 

4.69 V

IPD[A]



4.69 V

P

AVG

[W]  

MON

[AW]

R

APCSET

[] 

4.69 V

P

AVG

[W]  

MON

[AW]



4.69 V

5 mW  0.05 mAmW

 18.75 k

I

MOD

[A] 

P

pp

[W]

[WA]



2  P

AVG

[W] 

r

e

1

r

e

1

[WA]

I

MOD



2  5 mW 

6.31

6.31

0.2 mWmA

 36.3 mA

I

MOD

[A]  I

MOD0

[A] 1  TC T[oC]  T0[oC]



SLLS688 – NOVEMBER 2005

APPLICATION INFORMATION (continued)

SELECT A LASER

In the design example according to Figure 25 , the ONET4211LD is dc-coupled to a typical communication-grade
laser diode capable of operating at 4.25 Gb/s with the following specifications shown in Table 2 .

Table 2. Laser Diode Specifications

PARAMETER VALUE UNITS

λ Wavelength 1310 nm
P

Average Optical Output Power 5 mW

AVG

I

Threshold current 10 mA

TH

ρ

Laser-to-monitor transfer 0.05 mA/mW

MON

η Laser slope efficiency 0.2 mW/mA

SELECT APCSET RESISTOR

When the APC loop is activated, the desired average optical output power P
the monitor diode and by the APCSET resistor R
and the average optical output power P

The R

APCSET

resistor is calculated by Equation 8 :

is given by Equation 7 :

AVG

. The relation between the monitor photodiode current I

APCSET

is defined by characteristics of

AVG

ONET4211LD

PD

(7)

For the laser diode specified in Table 2 and the desired average optical output power of 5 mW, R
calculated as in Equation 9 :

Note that the monitor photodiode current IPDmust not exceed 1.5 mA, corresponding to a minimum APCSET
resistor R

APCSET,MIN

= 3.1 k Ω .

SELECT MODSET RESISTOR

Modulation current I
optical power P

. I

AVG

Using the laser diode parameters from Table 2 and assuming an extinction ratio re= 8 dB ( ≈ 6.3) for an average
optical power P

AVG

The modulation current is adjustable, with a selectable temperature coefficient TC according to the relation:

where T is the ambient temperature in ° C and T0is the reference temperature (T
The temperature coefficient TC of the modulation current is typically adjustable between 630 ppm/ ° C and 8300

ppm/ ° C.
For calculation of the required external resistor R

the formula can be modified as follows:

is dependent on the required optical output peak-to-peak power P

MOD

can be calculated using the laser slope efficiency η and the desired extinction ratio re:

MOD

p-p

= 5 mW, the required modulation current results as:

= 60 ° C).

0

MODSET

for a given modulation current and a given temperature,

or the average

(8)

APCSET

is

(9)

(10)

(11)

(12)

19

www.ti.com

R

MODSET

[] 

265 V

I

MOD

[A]





1  TC T[oC]  T0[oC]





R

MODSET

[] 

265 V

36.3 mA





1 

4000 ppm

o

C



(

25oC  60oC

)



 6.3 k

TC

LD



1

o

C







2

[WA]  1[WA]



1

[WA] T2[

o

C]  T1[oC]



 10

6

TC

LD



0.15 mWmA  0.2 mWmA

0.2 mWmA  (85oC  25oC)

 106  4167

1

o

C

R

MODTC



24 

(

TC  630 ppm

)





1

o

C





o

C

R

MODTC



24 

4167 ppm 630 ppm

o

C

o

C

 6.8 k

I

BIASMAX

[A]  I

THMAX

[A]

R

BIASMAX

[] 

343 V

I

BIASMAX

[A]



343 V

I

THMAX

[A]

ONET4211LD

SLLS688 – NOVEMBER 2005

If 4000 ppm/ ° C is the desired temperature coefficient and the modulation current from the preceding example,

36.3 mA, is required at a temperature of 25 ° C, the MODSET resistor R

Note that the modulation current I
corresponding to a minimum MODSET resistor R

must not exceed 85 mA over the complete temperature range,

MOD

MODSET,MIN

= 3.1 k Ω .

MODSET

SELECT MODTC RESISTOR

The R
the decreased slope efficiency of the laser at a higher temperature. The temperature coefficient TC
can be calculated using the slope efficiency η

Equation 15 :

As an example, for the laser in Table 2 , the slope efficiency at temperature T
temperature T
TC

of the laser can be calculated:

LD

resistor is used to program a modulation temperature coefficient that can be used to compensate for

MODTC

at temperature T

= 85 ° C, the slope efficiency is η

2

1

= 0.15 mW/mA. The corresponding temperature coefficient

2

1

is given by Equation 14 .

and η

at temperature T

2

= 25 ° C is η1= 0.2 mW/mA. At

1

of the laser

LD

as shown in

2

(13)

(14)

(15)

The MODTC resistor R

MODTC

can be used to compensate the laser temperature coefficient TC
maintain the same optical output swing within a range of 630 ppm up to 8300 ppm. For this, R
programmed as follows:

To compensate for the decreased slope efficiency of the laser in Table 2 , TC must be 4167 ppm/ ° C.
This leads to the following MODTC resistor R

:

MODTC

SELECT BIASMAX RESISTOR

The BIASMAX resistor R
To calculate R

BIASMAX

BIASMAX

, the maximum threshold current at 85 ° C and end of life must be determined. The

maximum bias current for the dc-coupled interface can be approximated by Equation 19 .

R

BIASMAX

can be set by Equation 20 .

For the example laser diode, the maximum threshold current is 40 mA at 85 ° C. Therefore, R
approximated by Equation 21 .

is used to limit the bias current applied to the laser diode.

MODTC

BIASMAX

LD

(16)

in order to

may be

(17)

(18)

(19)

(20)

can be

20

www.ti.com

R

BIASMAX



343 V

40 mA

 8.6 k

V

MONB

[V] 

R

MONB

[]  I

BIAS

[A]

68



768   I

BIAS

[A]

68

 11.29   I

BIAS

[A]

V

MONP

[V]  R

MONP

[]  IPD[A]  200   IPD[A]

ONET4211LD

SLLS688 – NOVEMBER 2005

(21)

SELECT V

AND V

MONB

RANGE

MONP

Monitoring the bias current is achieved by taking the fractional (1/68) bias current and developing a voltage
across an external resistor to ground. Equation 22 provides the value for V

for a resistor value equal to

MONB

768 Ω .

Monitoring of the photo current is achieved by taking a mirror of IPDand developing a voltage across an external
resistor to ground. Equation 23 provides the value for V

for a resistor equal to 200 Ω .

MONP

LASER DIODE INTERFACE

The output stage of the ONET4211LD is optimized for driving a 20- Ω load. The combination of a damping
resistor, RD, along with the resistance of the laser diode, must be 20 Ω for impedance matching. The suggested
typical value for R
optimize performance.

is 6 Ω to 15 Ω . A bypass capacitor of 10 nF placed close to the laser anode also helps to

D

(22)

(23)

21

PACKAGE OPTION ADDENDUM

www.ti.com

16-Dec-2005

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

ONET4211LDRGER ACTIVE QFN RGE 24 3000 Green (RoHS &

no Sb/Br)

ONET4211LDRGERG4 ACTIVE QFN RGE 24 3000 Green (RoHS &

no Sb/Br)

ONET4211LDRGET ACTIVE QFN RGE 24 250 Green (RoHS &

no Sb/Br)

ONET4211LDRGETG4 ACTIVE QFN RGE 24 250 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-2-260C-1 YEAR

CU NIPDAU Level-2-260C-1 YEAR

CU NIPDAU Level-2-260C-1 YEAR

CU NIPDAU Level-2-260C-1 YEAR

(3)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
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Addendum-Page 1

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