Texas Instruments OMAP5910 Reference Manual

OMAP5910 Dual-Core Processor
MicroWire Interface
Reference Guide
Literature Number: SPRU686
October 2003
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About This Manual
This serial synchronous interface can drive two serial external components. For the external devices, this interface is compatible with the MicroWire standard and is seen as the master.
Notational Conventions
This document uses the following conventions.
- Hexadecimal numbers are shown with the suffix h. For example, the
Preface
Read This First
following number is 40 hexadecimal (decimal 64): 40h.
Related Documentation From Texas Instruments
The following documents describe the OMAP5910 device and related peripherals. Copies of these documents are available on the Internet at
www.ti.com. Tip: Enter the literature number in the search box provided at
www.ti.com.
OMAP5910 Dual-Core Processor MPU Subsystem Reference Guide (litera-
ture number SPRU671)
OMAP5910 Dual-Core Processor DSP Subsystem Reference Guide
(literature number SPRU672)
OMAP5910 Dual-Core Processor Memory Interface Traffic Controller Reference Guide (literature number SPRU673)
OMAP5910 Dual-Core Processor System D MA Controller Reference Guide
(literature number SPRU674)
OMAP5910 Dual-Core Processor LCD Controller Reference Guide (litera-
ture number SPRU675)
OMAP5910 Dual-Core Processor Universal Asynchronous Receiver/Transmitter ( U A RT) Devices Reference Guide (literature number
SPRU676)
5OMAP5910SPRU686
Trademarks
Related Documentation From Texas Instruments / Trademarks
OMAP5910 Dual-Core Processor Universal Serial Bus (USB) and Frame Adjustment Counter (FAC) Reference Guide (literature number SPRU677)
OMAP5910 Dual-Core Processor Clock Generation and System Reset Management Reference Guide (literature number SPRU678)
OMAP5910 Dual-Core Processor General-Purpose Input/Output (GPIO) Reference Guide (literature number SPRU679)
OMAP5910 Dual-Core Processor MMC/SD Reference Guide (literature
number SPRU680)
OMAP5910 Dual-Core Processor Inter-Integrated Circuit (I2C) Controller Reference Guide (literature number SPRU681)
OMAP5910 Dual-Core Processor Timer Reference Guide (literature number
SPRU682)
OMAP5910 Dual-Core Processor Inter-Processor Communication Reference Guide (literature number SPRU683)
OMAP5910 Dual-Core Processor Camera Interface Reference Guide
(literature number SPRU684)
OMAP5905 Dual-Core Processor Multichannel Serial Interface (MCSI) Reference Guide (literature number SPRU685)
OMAP5910 Dual-Core Processor Micro-Wire Interface Reference Guide
(literature number SPRU686)
OMAP5910 Dual-Core Processor Real-Time Clock (RTC) Reference Guide
(literature number SPRU687)
OMAP5910 Dual-Core Processor HDQ/1-Wire Interface Reference Guide
(literature number SPRU688)
OMAP5910 Dual-Core Processor PWL, PWT, and LED Peripheral Reference Guide (literature number SPRU689)
OMAP5910 Dual-Core Processor Multi ch an ne l B u f f er ed Seria l Port ( M cB SP ) Reference Guide (literature number SPRU708)
Trademarks
OMAP and the OMAP symbol are trademarks of Texas Instruments.
6 OMAP5910 SPRU686
Contents
Contents
1 MicroWire Interface 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 MicroWire Registers 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Protocol Description 19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Example of Protocol Using a Serial EEPROM (XL93LC66) 21. . . . . . . . . . . . . . . . . . . . . . . .
1.3.1 Read Cycle 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3.2 Write Cycle 22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Example of Protocol Using an LCD Controller (COP472-3) 23. . . . . . . . . . . . . . . . . . . . . . . .
1.4.1 Loading Sequence 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Example of Protocol Using the Autotransmit Mode 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Example of the Autotransmit Mode With DMA Support 26. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures
1 Block Diagram 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Behavior of a X25C02 EEPROM Read Cycle 20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Behavior of a XL93LC66 EEPROM Read Cycle 20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Read Cycle in the Autotransmit Mode 26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1 MicroWire Registers 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Transmit-Data Register (TDR) 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Receive-Data Register (RDR) 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Control-and-Status Register (CSR) 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Setup Register 1 (SR1) 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Setup Register 2 (SR2) 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Setup Register 3 (SR3) 17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Setup Register 4 (SR4) (Read/Write) 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 Setup Register 5 (SR5) (Read/Write) 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7SPRU686
8 SPRU686
1 MicroWire Interface
This serial synchronous interface can drive two serial external components. For the external devices, this interface is compatible with the MicroWire standard and is seen as the master (see Figure 1).
A transmit DMA mode is available.
Figure 1. Block Diagram
MicroWire Interface
Clock register
MPUXOR_CK
IPB
Clock
enable
Setup registers
Controlandstatus
register
Clock
divider
UWIRE.CS[3:0]
1.1 MicroWire Registers
The starting address in the peripheral range (hex) is FFFB:3000
Table 1 lists the MicroWire registers. Table 2 through Table 9 describe the individual registers.
Control
logic
2
UWIRE.SCLK
DMA_REQ to system DMA_REQ[6:0]
Inth lvl2 (2,3) - edge
Transmit data register
(16 bits)
Receive data register
(16 bits)
UWIRE.SDO
UWIRE.SDI
Table 1. MicroWire Registers
Register Description R/W Size Address Offset
TDR Transmit data register W 16 bits FFFB:3000 0x00
RDR Receive data register R 16 bits FFFB:3000 0x00
9MicroWire InterfaceSPRU686
MicroWire Interface
Table 1. MicroWire Registers (Continued)
Register OffsetAddressSizeR/WDescription
CSR Controland status register R/W 16 bits FFFB:3000 0x04
SR1 Setup register 1 R/W 16 bits FFFB:3000 0x08
SR2 Setup register 2 R/W 16 bits FFFB:3000 0x0C
SR3 Setup register 3 R/W 16 bits FFFB:3000 0x10
SR4 Setup register 4 R/W 16 bits FFFB:3000 0x14
SR5
Setup register 5 R/W 16 bits FFFB:3000 0x18
Table 2. Transmit-Data Register (TDR)
Bits Field Description
150 TD Data to transmit Undefined
Whatever its size, the word must be aligned on the most significant bit (MSB) side.
Note:
The MSB (bit 15) is the first transmitted bit.
Reset Value
Table 3. Receive-Data Register (RDR)
Bits Field Description
150 RD Received data Undefined
Whatever its size, the word is aligned on the least significant bit (LSB) side.
Note:
The LSB (bit 0) is the last received bit.
MicroWire Interface10 SPRU686
Reset Value
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