Texas Instruments JM38510-65803BFA, JM38510-65803BEA, SN54HC139J, SN74HC139D, SN74HC139DR Datasheet
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OUTPUTS
G
SN54HC139, SN74HC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMUL TIPLEXERS
SCLS108B – DECEMBER 1982 – REVISED MA Y 1997
D
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
D
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
D
Package Options Include Plastic
Small-Outline (D), Thin Shrink
Small-Outline (PW), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
The ’HC139 are designed for high-performance
memory-decoding or data-routing applications
requiring very short propagation delay times. In
high-performance memory systems, these
decoders can minimize the effects of system
decoding. When employed with high-speed
memories utilizing a fast enable circuit, the delay
time of these decoders and the enable time of the
memory are usually less than the typical access
time of the memory . This means that the effective
system delay introduced by the decoders is
negligible.
The ’HC139 comprise two individual 2-line to
4-line decoders in a single package. The
active-low enable (G
line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered
inputs, each of which represents only one
normalized load to its driving circuit.
) input can be used as a data
SN54HC139 ...J OR W PACKAGE
SN74HC139 . . . D, N, OR PW PACKAGE
SN54HC139 . . . FK PACKAGE
1B
1Y0
NC
1Y1
1Y2
NC – No internal connection
(TOP VIEW)
1G
1
1A
2
1B
3
1Y0
4
5
1Y1
6
1Y2
7
1Y3
GND
8
(TOP VIEW)
1A1GNC
3212019
4
5
6
7
8
910111213
1Y3
GND
NC
16
15
14
13
12
11
10
9
CC
V
2Y3
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
2G
18
17
16
15
14
2Y2
2A
2B
NC
2Y0
2Y1
The SN54HC139 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74HC139 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
FUNCTION TABLE
INPUTS
SELECT
B A Y0 Y1 Y2 Y3
H X X H H H H
L L LLHHH
L L HHLHH
L H LHHLH
L H H H H H L
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54HC139, SN74HC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMUL TIPLEXERS
SCLS108B – DECEMBER 1982 – REVISED MA Y 1997
logic symbols (alternatives)
X/Y
2
1A
3
1B
1
1G
14
2A
13
2B
15
2G
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, PW, and W packages.
1
2
EN
†
4
12
11
10
1Y0
5
1Y1
6
1Y2
7
1Y3
2Y0
2Y1
2Y2
9
2Y3
1A
1B
1G
2A
2B
2G
2
3
1
14
13
15
0
1
2
3
logic diagram (positive logic)
1
1G
DMUX
0
G
1
0
0
1
3
2
3
4
1Y0
5
1Y1
12
11
10
4
1Y0
5
1Y1
6
1Y2
7
1Y3
2Y0
2Y1
2Y2
9
2Y3
2
1A
3
1B
15
2G
14
2A
13
2B
Pin numbers shown are for the D, J, N, PW, and W packages.
12
11
10
6
1Y2
7
1Y3
2Y0
2Y1
2Y2
9
2Y3
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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