Texas Instruments INA333, INA333AIDRGT Datasheet

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50kW
A
1
A
3
V
OUT
V
IN-
6
REF
5
RFIFilteredInputs
2
V+
7
V-
4
1
8
50kW
A
2
V
IN+
RFIFilteredInputs
3
INA333
R
G
G=1+
100kW
R
G
RFIFilteredInputs
RFIFilteredInputs
INA333
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...................................................................................................................................................................................................... SBOS445 – JULY 2008
Micro-Power (50 µ A), Zer ø -Drift, Rail-to-Rail Out
Instrumentation Amplifier
1

FEATURES DESCRIPTION

2
LOW OFFSET VOLTAGE: 25 µ V (max), G 100
LOW DRIFT: 0.1 µ V/ ° C, G 100
LOW NOISE: 50nV/ Hz, G 100
HIGH CMRR: 100dB (min), G 10
LOW INPUT BIAS CURRENT: 200pA (max)
SUPPLY RANGE: +1.8V to +5.5V
INPUT VOLTAGE: (V ) +0.1V to (V+) 0.1V
OUTPUT RANGE: (V ) +0.05V to (V+) 0.05V
LOW QUIESCENT CURRENT: 50 µ A
OPERATING TEMPERATURE: 40 ° C to +125 ° C
RFI FILTERED INPUTS
MSOP-8 AND DFN-8 PACKAGES

APPLICATIONS

BRIDGE AMPLIFIERS
ECG AMPLIFIERS
PRESSURE SENSORS
MEDICAL INSTRUMENTATION
PORTABLE INSTRUMENTATION
WEIGH SCALES
THERMOCOUPLE AMPLIFIERS
RTD SENSOR AMPLIFIERS
DATA ACQUISITION
The INA333 is a low-power, precision instrumentation amplifier offering excellent accuracy. The versatile 3-op amp design, small size, and low power make it ideal for a wide range of portable applications.
A single external resistor sets any gain from 1 to
1000. The INA333 is designed to use an industry-standard gain equation: G = 1 + (100k /R
The INA333 provides very low offset voltage (25 µ V, G 100), excellent offset voltage drift (0.1 µ V/ ° C, G 100), and high common-mode rejection (100dB at G 10). It operates with power supplies as low as
1.8V ( ± 0.9V), and quiescent current is only 50 µ A ideal for battery-operated systems. Using autocalibration techniques to ensure excellent precision over the extended industrial temperature range, the INA333 also offers exceptionally low noise density (50nV/ Hz) that extends down to dc.
The INA333 is available in both MSOP-8 and DFN-8 surface-mount packages and is specified over the TA= 40 ° C to +125 ° C temperature range.
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1
2 All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2008, Texas Instruments Incorporated
V
IN-
V
IN+
V-
R
G
V+
V
OUT
1
2
3
4
8
7
6
5
INA333
R
G
REF
R
G
V
IN-
V
IN+
V-
R
G
V+
V
OUT
REF
1
2
3
4
8
7
6
5
Exposed
Thermal DiePad
on
Underside
INA333
INA333
SBOS445 – JULY 2008 ......................................................................................................................................................................................................
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
INA333
MSOP-8 DGK I333
(2)
DFN-8
DRG I333A
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com .
(2) Available Q4, 2008.

ABSOLUTE MAXIMUM RATINGS

(1)
INA333 UNIT
Supply voltage +7 V Analog input voltage range Output short-circuit Operating temperature range, T Storage temperature range, T Junction temperature, T
(2)
(3)
A
A
J
(V – ) – 0.3 to (V+) + 0.3 V
Continuous – 40 to +150 ° C – 65 to +150 ° C
+150 ° C
Human body model (HBM) 4000 V
ESD rating Charged device model (CDM) 1000 V
Machine model (MM) 200 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should
be current limited to 10mA or less.
(3) Short-circuit to ground.

PIN CONFIGURATIONS

DGK PACKAGE
MSOP-8
(TOP VIEW)
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DRG PACKAGE
DFN-8
(TOP VIEW)
INA333
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ELECTRICAL CHARACTERISTICS: V
...................................................................................................................................................................................................... SBOS445 – JULY 2008
= +1.8V to +5.5V
S
Boldface limits apply over the specified temperature range, TA= – 40 ° C to +125 ° C.
At TA= +25 ° C, RL= 10k , V
(1)
INPUT
Offset voltage, RTI
vs Temperature ± 0.1 ± 0.5/G µ V/ ° C
vs Power supply PSR 1.8V VS≤ 5.5V ± 1 ± 5/G ± 5 ± 15/G µ V/V
Long-term stability See note Turn-on time to specified V Impedance
Differential Z
Common-mode Z Common-mode voltage range V Common-mode rejection CMR DC to 60Hz
G = 1 VCM= (V – ) + 0.1V to (V+) – 0.1V 80 90 dB
G = 10 VCM= (V – ) + 0.1V to (V+) – 0.1V 100 110 dB
G = 100 VCM= (V – ) + 0.1V to (V+) – 0.1V 100 115 dB
G = 1000 VCM= (V – ) + 0.1V to (V+) – 0.1V 100 115 dB
INPUT BIAS CURRENT
Input bias current I
vs Temperature See Typical Characteristic curve pA/ ° C
Input offset current I
vs Temperature See Typical Characteristic curve pA/ ° C INPUT VOLTAGE NOISE
Input voltage noise e
f = 10Hz 50 nV/ Hz
f = 100Hz 50 nV/ Hz
f = 1kHz 50 nV/ Hz
f = 0.1Hz to 10Hz 1 µ V Input current noise i
f = 10Hz 100 fA/ Hz
f = 0.1Hz to 10Hz 2 pA
GAIN
Gain equation G 1 + (100k /RG) V/V Range of gain 1 1000 V/V Gain error VS= 5.5V, (V – ) + 100mV VO≤ (V+) – 100mV
G = 1 ± 0.01 ± 0.1 %
G = 10 ± 0.05 ± 0.25 %
G = 100 ± 0.07 ± 0.25 %
G = 1000 ± 0.25 ± 0.5 %
(1) Total VOS, Referred-to-input = (V (2) RTI = Referred-to-input. (3) 300-hour life test at +150 ° C demonstrated randomly distributed variation of approximately 1 µ V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(2)
OSI
= 0, and G = 1, unless otherwise noted.
REF
V
OSI
IN IN
CM
B
OS
NI
N
) + (V
OSI
/G).
OSO
INA333
± 10 ± 25/G ± 25 ± 75/G µ V
(3)
See Typical characteristics
100 || 3 G || pF 100 || 3 G || pF
VO= 0V (V – ) + 0.1 (V+) – 0.1 V
± 70 ± 200 pA
± 50 ± 200 pA
G = 100, RS= 0
PP
PP
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INA333
SBOS445 – JULY 2008 ......................................................................................................................................................................................................
ELECTRICAL CHARACTERISTICS: V
= +1.8V to +5.5V (continued)
S
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Boldface limits apply over the specified temperature range, TA= – 40 ° C to +125 ° C.
At TA= +25 ° C, RL= 10k , V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT GAIN (continued) Gain vs Temperature
G = 1 ± 1 ± 5 ppm/ ° C
(4)
G > 1
Gain nonlinearity VS= 5.5V, (V – ) + 100mV VO≤ (V+) – 100mV
G = 1 to 1000 RL= 10k 10 ppm
OUTPUT
Output voltage swing from rail Capacitive load drive 500 pF Short-circuit current I
FREQUENCY RESPONSE
Bandwidth, – 3dB
G = 1 150 kHz G = 10 35 kHz G = 100 3.5 kHz G = 1000 350 Hz
Slew rate SR VS= 5V, VO= 4V Step
G = 1 0.16 V/ µ s G = 100 0.05 V/ µ s
Settling time to 0.01% t
G = 1 V G = 100 V
Settling time to 0.001% t
G = 1 V G = 100 V
Overload recovery 50% overdrive 75 µ s
REFERENCE INPUT
R
IN
Voltage range V – V+ V
POWER SUPPLY
Voltage range
Single +1.8 +5.5 V Dual ± 0.9 ± 2.75 V
Quiescent current I
vs Temperature 80 µ A
TEMPERATURE RANGE
Specified temperature range – 40 +125 ° C Operating temperature range – 40 +150 ° C Thermal resistance θ
MSOP 100 ° C/W DFN 65 ° C/W
(4) Does not include effects of external resistor RG. (5) See Typical Characteristics curve, Output Voltage Swing vs Output Current (Figure 29 ).
(5)
= 0, and G = 1, unless otherwise noted.
REF
SC
S
S
Q
JA
INA333
± 15 ± 50 ppm/ ° C
VS= 5.5V, RL= 10k See note
(5)
50 mV
Continuous to common – 40, +5 mA
= 4V 50 µ s
STEP
= 4V 400 µ s
STEP
= 4V 60 µ s
STEP
= 4V 500 µ s
STEP
300 k
VIN= VS/2 50 75 µ A
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Product Folder Link(s): INA333
-25.0
InputOffsetVoltage( V)m
Population
V =5.5V
S
-2.5
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
-5.0
-7.5
-10.0
-12.5
-15.0
-17.5
-20.0
-22.5
25.0
-0.10
InputVoltageOffsetDrift( V/ C)m °
Population
0.10
V =5.5V
S
-
0.01
0
0.0
1
0.02
0.03
0.04
0.0
5
0.06
0.07
0.08
0.09
- 20.0
- 30.0
- 40.0
- 50.0
- 60.0
- 70.0
- 80.0
- 90.0
-
75.0
OutputOffsetVoltage( V)m
Population
V =5.5V
S
-7.5
0
7.5
15.0
22.5
30.0
37.5
45.0
52.5
60.0
67.5
-15.0
-22.5
-30.0
-37.5
-45.0
-52.5
-60.0
-67.5
75.0
-0.50
OutputVoltageOffsetDrift( V/ C)m °
Population
0.50
V =5.5V
S
-
0.05
0
0.0
5
0.10
0.15
0.20
0.2
5
0.30
0.35
0.40
0.45
-0.10
-0.15
-0.20
- 50.2
-
0.30
-0.35
-0.40
-0.45
Time(1s/div)
Gain=1
Noise(1 V/div)m
0
5
10
15
20
25
-
-
-
-
-
0
0.5
1.0
1.5
V (V)
CM
V ( V)m
OS
5.0
2.0
V =5V
S
3.0 4.02.5 3.5 4.5
V =1.8V
S
INA333
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...................................................................................................................................................................................................... SBOS445 – JULY 2008

TYPICAL CHARACTERISTICS

At TA= +25 ° C, RL= 10k , V
INPUT OFFSET VOLTAGE ( – 40 ° C to +125 ° C)
Figure 1. Figure 2.
OUTPUT OFFSET VOLTAGE ( – 40 ° C to +125 ° C)
= 0, and G = 1, unless otherwise noted.
REF
INPUT VOLTAGE OFFSET DRIFT
OUTPUT VOLTAGE OFFSET DRIFT
Figure 3. Figure 4.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE 0.1Hz TO 10Hz NOISE
Figure 5. Figure 6.
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Time(1s/div)
Gain=100
Noise(0.5 V/div)m
1000
100
10
1
0.1
1
10
100
1k
Frequency(Hz)
VoltageNoiseDensity(nV/ )
Ö
Hz
10k
CurrentNoise
OutputNoise
InputNoise
TotalInput-ReferredNoise=
(InputNoise) +
2
(OutputNoise)
G
2
1000
100
10
1
CurrentNoiseDensity(f )A/Ö
Hz
Time(25 s/div)m
Gain=1
OutputVoltage(1V/div)
0.012
0.008
0.004
0
0.004
0.008
0.012
-
-
-
0
1.0
V (V)
OUT
DCOutputNonlinearityError(%FSR)
5.5
2.0 3.0 4.0
0.5 1.5 2.5 3.5 4.5 5.0
G=1000 G=100 G=10 G=1
Time(100 s/div)m
Gain=100
OutputVoltage(1V/div)
Time(10 s/div)m
Gain=1
OutputVoltage(50mV/div)
INA333
SBOS445 – JULY 2008 ......................................................................................................................................................................................................
At TA= +25 ° C, RL= 10k , V
0.1Hz TO 10Hz NOISE SPECTRAL NOISE DENSITY
NONLINEARITY ERROR LARGE SIGNAL RESPONSE
TYPICAL CHARACTERISTICS (continued)
= 0, and G = 1, unless otherwise noted.
REF
Figure 7. Figure 8.
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Figure 9. Figure 10.
LARGE-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE
Figure 11. Figure 12.
Product Folder Link(s): INA333
Time(100 s/div)m
Gain=100
OutputVoltage(50mV/div)
10000
1000
100
10
1
10
100
Gain(V/V)
Time( s)m
1000
0.01%
0.001%
0.1%
Time(50 s/div)m
Gain=1
Supply(1V/div)
Supply
V
OUT
V (50 V/div)m
OUT
80
60
40
20
0
20
40
60
-
-
-
10
100
1k
10k
Frequency(Hz)
Gain(dB)
1M
G=1
G=1000
G=100
G=10
100k
10
8
6
4
2
0
2
4
6
8
10
-
-
-
-
-
-50
-25
0
25
50
75
100
Temperature( C)°
CMRR(
V/V)
m
G=100,
G=1000
150
V = 2.75V
S
±
V = 0.9V±
S
125
G=1
G=10
-100
CMRR( V/V)m
Population
100
V =5.5V
S
-10
0
10
20
30
40
50
60
70
80
90
-20
-30
-40
-50
-60
-70
-80
-90
INA333
www.ti.com
...................................................................................................................................................................................................... SBOS445 – JULY 2008
At TA= +25 ° C, RL= 10k , V
SMALL-SIGNAL STEP RESPONSE SETTLING TIME vs GAIN
STARTUP SETTLING TIME GAIN vs FREQUENCY
TYPICAL CHARACTERISTICS (continued)
= 0, and G = 1, unless otherwise noted.
REF
Figure 13. Figure 14.
Figure 15. Figure 16.
COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO vs TEMPERATURE
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Figure 17. Figure 18.
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