Single Chip With Easy Interface Between
UART and Serial-Port Connector of IBM
PC/AT and Compatibles
D
Meets or Exceeds the Requirements of
ANSI Standard TIA/EIA-232-F and ITU
Recommendation V.28
D
Designed to Support Data Rates up to
120 kbit/s
D
Pinout Compatible With SN75C185 and
SN75185
D
ESD Protection to 2 kV on Bus Terminals
D
Package Options Include Plastic
DB, DW, OR N PACKAGE
(TOP VIEW)
V
DD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
Small-Outline (DW), Shrink Small-Outline
(DB) Packages, and DIPs (N)
description
The GD75232 combines three drivers and five receivers from TI trade-standard SN75188 and SN75189
bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the
SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the
UART and serial-port connector of an IBM PC/AT and compatibles. The bipolar circuits and processing of
the GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent power and
external passive components relative to the SN75C185.
The GD75232 complies with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V .28 standards.
These standards are for data interchange between a host computer and a peripheral at signaling rates up to
20 kbit/s. The switching speeds of the GD75232 are fast enough to support rates up to 120 kbit/s with lower
capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected unless the
designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling
rates up to 120 kbit/s, use of ANSI TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is
recommended.
The GD75232 is characterized for operation over the temperature range of 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI is a trademark of Texas Instruments Incorporated.
IBM and PC/AT are trademarks of International Business Machines Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
1
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206C – MA Y 1995 – REVISED JULY 1998
logic symbol
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
†
2
3
4
5
6
7
8
9
schematic (each driver)
To Other Drivers
V
DD
19
18
17
16
15
14
13
12
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
logic diagram (positive logic)
2
3
4
5
6
7
8
9
9.4 kΩ11.6 kΩ
19
18
17
16
15
14
13
12
RY1RA1
RY2RA2
RY3RA3
DA1DY1
DA2DY2
RY4RA4
DA3DY3
RY5RA5
Input DAx
4.2 kΩ
GND
To Other
Drivers
V
SS
To Other Drivers
Resistor values shown are nominal.
10.4 kΩ
75.8 Ω
320 Ω
68.5 Ω3.3 kΩ
DYx Output
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematic (each receiver)
MULTIPLE RS-232 DRIVERS AND RECEIVERS
9 kΩ5 kΩ
2 kΩ
SLLS206C – MA Y 1995 – REVISED JULY 1998
To Other Receivers
V
CC
1.66 kΩ
RYx Output
GD75232
Input RAx
Resistor values shown are nominal.
3.8 kΩ
10 kΩ
GND
To Other Receivers
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
Supply voltage, V
Input voltage range, V
Driver output voltage range, V
Receiver low-level output current, I
Package thermal impedance, θ
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to the network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
Propagation delay time, low- to high-level output107250ns
PLH
t
Propagation delay time, high- to low-level output
PHL
t
Transition time, low- to high-level output
TLH
t
Transition time, high- to low-level output1660ns
THL
t
Propagation delay time, low- to high-level output100160ns
PLH
t
Propagation delay time, high- to low-level output
PHL
t
Transition time, low- to high-level output
TLH
t
Transition time, high- to low-level output1550ns
THL
CL = 50 pF,RL = 5 kΩ,
See Figure 6
CL = 15 pF,RL = 1.5 kΩ,
See Figure 6
42150ns
175350ns
60100ns
90175ns
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206C – MA Y 1995 – REVISED JULY 1998
PARAMETER MEASUREMENT INFORMATION
I
OS(L)
GD75232
V
DD
V
CC
V
I
V
O
V
SS
–I
VDD or GND
OS(H)
VSS or GND
RL = 3 kΩ
Figure 1. Driver Test Circuit for VOH, VOL, I
V
DD
V
I
IH
V
I
–I
IL
V
I
CC
OS(H)
, and I
OS(L)
V
SS
Figure 2. Driver Test Circuit for IIH and I
t
THL
1.5 V
90%
t
50%
VOLTAGE WAVEFORMS
V
DD
Input
V
CC
Pulse
Generator
R
See Note A
V
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
L
SS
C
L
(see Note B)
Input
Output
PHL
10%
IL
1.5 V
50%
10%
Figure 3. Driver Test Circuit and Voltage Waveforms
t
PLH
90%
t
TLH
3 V
0 V
V
V
OH
OL
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206C – MA Y 1995 – REVISED JULY 1998
PARAMETER MEASUREMENT INFORMATION
V
DD
V
V
I
V
SS
CC
Pulse
Generator
See Note A
V
DD
Input
V
CC
V
SS
TEST CIRCUIT
Figure 4. Receiver Test Circuit for I
V
DD
V
CC
VIT, V
I
V
OL
V
SS
I
OL
V
OH
Figure 5. Receiver Test Circuit for VIT, VOH, and V
t
THL
50%
90%
t
50%
10%
VOLTAGE WAVEFORMS
Input
C
R
L
L
(see Note B)
Output
PHL
OS
–I
OH
OL
50%
10%
50%
t
PLH
90%
t
TLH
4 V
0 V
V
V
OH
OL
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
Figure 6. Receiver Propagation and Transition Times
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎ
VOLTAGE TRANSFER CHARACTERISTICS
12
VDD = 12 V, VSS = –12 V
9
VDD = 9 V, VSS = –9 V
6
VDD = 6 V, VSS = –6 V
3
MULTIPLE RS-232 DRIVERS AND RECEIVERS
DRIVER SECTION
20
16
12
8
4
VDD = 9 V
VSS = –9 V
TA = 25°C
GD75232
SLLS206C – MA Y 1995 – REVISED JULY 1998
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
VOL(VI = 1.9 V)
0
–3
O
V
VO – Output Voltage – V
–6
–9
–12
0
12
9
6
3
RL = 3 kΩ
TA = 25°C
VI – Input Voltage – V
Figure 7
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
I
(VI = 1.9 V)
OS(L)
0
–4
–8
O
I
IO – Output Current – mA
–12
–16
1.81.61.41.210.80.60.40.2
2
–20
–16
VOH(VI = 0.8 V)
VO – Output Voltage – V
3-kΩ
Load Line
12840–4–8–12
16
Figure 8
SLEW RATE
vs
LOAD CAPACITANCE
1000
µs
100
VDD = 9 V
VSS = – 9 V
RL = 3 kΩ
TA = 25°C
0
VDD = 9 V
VSS = –9 V
–3
VO = 0
–6
I
(VI = 0.8 V)
OS
–9
IOS – Short-Circuit Output Current – mA
I
–12
0
TA – Free-Air Temperature – ° C
OS(H)
Figure 9
10
SR – Slew Rate – V/
70605040302010
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
10
1000100
CL – Load Capacitance – pF
Figure 10
10000
9
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206C – MA Y 1995 – REVISED JULY 1998
TYPICAL CHARACTERISTICS
2.4
2.2
2
1.8
1.6
1.4
1.2
1
– Input Threshold Voltage – V
0.8
IT
V
0.6
0.4
6
5
INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
VIT
+
V
IT–
TA – Free-Air Temperature – ° C
Figure 11
NOISE REJECTION
VCC = 5 V
TA = 25°C
See Note A
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
2
1.8
1.6
1.4
1.2
1
0.8
0.6
– Input Threshold Voltage – V
IT
0.4
V
0.2
706050403020100
0
2
VCC – Supply Voltage – V
V
IT+
V
IT–
9876543
10
Figure 12
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
16
CC = 300 pF
4
3
Amplitude – V
NOTE A: This figure shows the maximum amplitude of a
CC = 12 pF
2
CC = 100 pF
1
0
10
40100400 10004000
tw – Pulse Duration – ns
positive-going pulse that, starting from 0 V, does not
cause a change of the output level.
CC = 500 pF
10000
Figure 13
14
12
10
8
6
4
– Maximum Supply Voltage – V
DD
V
2
0
0
RL ≥ 3 kΩ (from each output to GND)
70605040302010
TA – Free-Air Temperature – ° C
Figure 14
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MULTIPLE RS-232 DRIVERS AND RECEIVERS
APPLICATION INFORMATION
GD75232
SLLS206C – MA Y 1995 – REVISED JULY 1998
Diodes placed in series with the V
and VSS leads protect the GD75232 in the fault condition in which the device
DD
outputs are shorted to ±15 V and the power supplies are at low and provide low-impedance paths to ground (see
Figure 15).
V
DD
V
Output
±15 V
GD75232GD75232
DD
V
SS
V
SS
Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F
10
9
8
7
6
5
4
3
2
1
–12 V
RI
DTR
CTS
TX
RTS
RX
DSR
DCD
12 V
C1
C2
5
9
C3
TIA/EIA-232-F
DB9S
Connector
6
1
TL16C450
ACE
43
RI
37
DTR
40
CTS
13
SO
36
RTS
11
SI
41
DSR
42
DCD
5 V
11
12
13
14
15
16
17
18
19
20
GND
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
V
CC
GD75232
V
SS
RA5
DY3
RA4
DY2
DY1
RA3
RA2
RA1
V
DD
Figure 16. Typical Connection
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
11
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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