Texas Instruments EV2014X, EV2014, BQ2014SN-D120TR, BQ2014SN-D120 Datasheet

bq2014

Gas Gauge IC with External Charge Control

Features

Conservative and repeatable measurement of available charge in rechargeable batteries

Charge control output operates an external charge controller such as the bq2004 Fast Charge IC

Designed for battery pack integration

- 120 A typical standby current

Display capacity via single-wire serial communication port or direct drive of LEDs

Measurements compensated for current and temperature

Self-discharge compensation using internal temperature sensor

User-selectable end-of-discharge threshold

Battery voltage, nominal available charge, temperature, etc. available over serial port

16-pin narrow SOIC

General Description

The bq2014 Gas Gauge IC is intended for battery-pack or in-system installation to maintain an accurate record of available battery charge. The IC monitors the voltage drop across a sense resistor connected in series between the negative battery terminal and ground to determine charge and discharge activity of the battery.

Self-discharge of NiMH and NiCd batteries is estimated based on an internal timer and temperature sensor. Compensations for battery temperature and rate of charge or discharge are applied to the charge, discharge, and self-discharge calculations to provide available charge information across a wide range of operating conditions. Battery capacity is automatically recalibrated, or “learned,” in the course of a discharge cycle from full to empty.

The bq2014 includes a charge control output that controls an external Fast Charge IC such as the bq2004.

Nominal Available Charge (NAC) may be directly indicated using a five-segment LED display.

The bq2014 supports a simple singleline bidirectional serial link to an external processor (with a common ground). The bq2014 outputs battery information in response to external commands over the serial link.

Internal registers include available charge, temperature, capacity, battery voltage, battery ID, battery status, and programming pin settings. To support subassembly testing, the outputs may also be controlled. The external processor may also overwrite some of the bq2014 gas gauge data registers.

The bq2014 may operate directly from three or four cells. With the REF output and an external transistor, a simple, inexpensive regulator can be built to provide VCC across a greater number of cells.

Pin Connections							Pin Names
							LCOM	LED common output	REF		Voltage reference output
							SEG1/PROG1 LED segment 1/		CHG		Charge control output
LCOM		1	16		VCC
								program 1 input
SEG1/PROG1		2	15		REF				DQ		Serial communications
SEG2/PROG2		3	14		CHG		SEG2/PROG2 LED segment 2/				input/output
								program 2 input
SEG3/PROG3		4	13		DQ				EMPTY		Empty battery indicator
SEG4/PROG4		5	12		EMPTY		SEG3/PROG3 LED segment 3/				output
								program 3 input
SEG5/PROG5		6	11		SB				SB		Battery sense input
							SEG4/PROG4 LED segment 4/
DONE		7	10		DISP
								program 4 input	DISP		Display control input
VSS		8	9		SR
							SEG5/PROG5 LED segment 5/		SR		Sense resistor input
	16-Pin Narrow SOIC							program 5 input
									VCC		3.0–6.5V
			PN201401.eps
							DONE	Fast charge complete
									VSS		System ground
12/95 C

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bq2014

Pin Descriptions

LCOM	LED common output
	Open-drain output switches VCC to source
	current for the LEDs. The switch is off dur-
	ing initialization to allow reading of the soft
	pull-up or pull-down programming resistors.
	LCOM is also in a high impedance state
	when the display is off.
SEG1–	LED display segment outputs (dual func-
SEG5	tion with PROG1—PROG5)
	Each output may activate an LED to sink
	the current sourced from LCOM.

PROG1– Programmed full count selection imputs

PROG5	(dual function with SEG1—SEG5)
	These three-level input pins define the pro-
	grammed full count (PFC) thresholds de-
	scribed in Table 2.
PROG3–	Gas gauge rate selection inputs (dual
PROG4	function with SEG3—SEG4)
	These three-level input pins define the pro-
	grammed full count (PFC) thresholds de-
	scribed in Table 2.
PROG5	Self-discharge rate selection (dual func-
	tion with SEG5)
	This three-level input pin defines the self-
	discharge compensation rate shown in Ta-
	ble 1.
CHG	Charge control output
	This open-drain output becomes active high
	when charging is allowed.
DONE	Fast charge complete
	This input is used to communicate the
	status of an external charge controller such
	as the bq2004 Fast Charge IC. Note: This
	pin must be pulled down to VSS using a
	200KΩ resistor.

SR		Sense resistor input
		The voltage drop (VSR) across the sense re-
		sistor RS is monitored and integrated over
		time to interpret charge and discharge activ-
		ity. The SR input is tied to the high side of
		the sense resistor. VSR < VSS indicates dis-
		charge, and VSR > VSS indicates charge. The
		effective voltage drop VSRO, as seen by the
		bq2014, is VSR + VOS (see Table 5).
		Display control input
DISP
		DISP	high disables the LED display.			DISP
		tied to VCC allows PROGX to connect di-
		rectly to VCC or VSS instead of through a
		pull-up or pull-down reistor.		DISP	floating
		allows the LED display to be active during
		a valid charge or during discharge if the
		NAC register is updated at a rate equiva-
		lent to VSRO ≤ -4mV. DISP low activates
		the display. See Table 1.
SB		Secondary battery input
		This input monitors the single-cell voltage
		potential through a high-impedance resis-
		tive divider network for the end-of-discharge
		voltage (EDV) thresholds,maximum charge
		voltage (MCV), and battery removed.
EMPTY		Battery empty output
		This open-drain output becomes high-
		impedance on detection of a valid final end-
		of-discharge voltage (VEDVF) and is low fol-
		lowing the next application of a valid charge.
DQ		Serial I/O pin
		This is an open-drain bidirectional pin.
REF		Voltage reference output for regulator
		REF provides a voltage reference output for
		an optional micro-regulator.
VCC		Supply voltage input
VSS		Ground

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bq2014

Functional Description

General Operation

The bq2014 determines battery capacity by monitoring the amount of charge input to or removed from a rechargeable battery. The bq2014 measures discharge and charge currents, estimates self-discharge, monitors the battery for low-battery voltage thresholds, and compensates for temperature and charge/discharge rates. The charge measurement is made by monitoring the voltage across a small-value series sense resistor between the battery’s negative terminal and ground. The available battery charge is determined by monitoring this voltage over time and correcting the measurement for the environmental and operating conditions.

Figure 1 shows a typical battery pack application of the bq2014 using the LED display capability as a chargestate indicator. The bq2014 is configured to display capacity in a relative display mode. The relative display mode uses the last measured discharge capacity of the battery as the battery “full” reference. The LED segments output a percentage of the available charge based on NAC and LMD. A push-button display feature is available for momentarily enabling the LED display.

The bq2014 monitors the charge and discharge currents as a voltage across a sense resistor (see RS in Figure 1). A filter between the negative battery terminal and the SR pin is required.

Figure 1. Battery Pack Application Diagram—LED Display,

3

bq2014

Voltage Thresholds

In conjunction with monitoring VSR for charge/discharge currents, the bq2014 monitors the single-cell battery potential through the SB pin. The single-cell voltage potential is determined through a resistor/divider network per the following equation:

R2 = N − 1

R3

where N is the number of cells, R2 is connected to the positive battery terminal, and R3 is connected to the negative battery terminal. The single-cell battery voltage is monitored for the end-of-discharge voltage (EDV) and for maximum cell voltage (MCV). EDV threshold levels are used to determine when the battery has reached an “empty” state, and the MCV threshold is used for fault detection during charging.

Two EDV thresholds for the bq2014 are programmable with the default values fixed at:

EDV1 (early warning) = 1.05V

EDVF (empty) = 0.95V

If VSB is below either of the two EDV thresholds, the associated flag is latched and remains latched, independent of VSB, until the next valid charge (as defined in the section entitled “Gas Gauge Operation”). The VSB value is also available over the serial port.

During discharge and charge, the bq2014 monitors VSR for various thresholds. These thresholds are used to compensate the charge and discharge rates. Refer to the count compensation section for details. EDV monitoring is disabled if VSR ≤ -250mV typical and resumes ½ second after VSR > -250mV.

EMPTY Output

The EMPTY output switches to high impedance when VSB < VEDF and remains latched until a valid charge occurs.

Reset

The bq2014 recognizes a valid battery whenever VSB is greater than 0.1V typical. VSB rising from below 0.25V or falling from above 2.25V (VMCV) resets the device. Reset can also be accomplished with a command over the serial port as described in the Reset Register section.

Temperature

The bq2014 internally determines the temperature in 10°C steps centered from -35°C to +85°C. The temperature steps are used to adapt charge and discharge rate

compensations, self-discharge counting, and available charge display translation. The temperature range is available over the serial port in 10°C increments as shown below:

TMPGG (hex)	Temperature Range
0x	< -30°C
1x	-30°C to -20°C
2x	-20°C to -10°C
3x	-10°C to 0°C
4x	0°C to 10°C
5x	10°C to 20°C
6x	20°C to 30°C
7x	30°C to 40°C
8x	40°C to 50°C
9x	50°C to 60°C
Ax	60°C to 70°C
Bx	70°C to 80°C
Cx	> 80°C

Layout Considerations

The bq2014 measures the voltage differential between the SR and VSS pins. VOS (the offset voltage at the SR pin) is greatly affected by PC board layout. For optimal results, the PC board layout should follow the strict rule of a single-point ground return. Sharing high-current ground with small signal ground causes undesirable noise on the small signal nodes. Additionally:

The capacitors (C2 and C3) should be placed as close as possible to the SB and VCC pins, respectively, and their

paths to VSS should be as short as possible. A high-quality ceramic capacitor of 0.1µf is recommended for VCC.

The sense resistor (R1, C1) should be placed as close as possible to the SR pin.

The sense resistor (R16) should be as close as possible to the bq2014.

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bq2014

Gas Gauge Operation

The operational overview diagram in Figure 2 illustrates the operation of the bq2014. The bq2014 accumulates a measure of charge and discharge currents, as well as an estimation of self-discharge. Charge and discharge currents are temperature and rate compensated, whereas self-discharge is only temperature compensated.

The main counter, Nominal Available Charge (NAC), represents the available battery capacity at any given time. Battery charging increments the NAC register, while battery discharging and self-discharge decrement the NAC register and increment the DCR (Discharge Count Register).

The Discharge Count Register (DCR) is used to update the Last Measured Discharge (LMD) register only if a complete battery discharge from full to empty occurs without any partial battery charges. Therefore, the bq2014 adapts its capacity determination based on the actual conditions of discharge.

The battery's initial capacity is equal to the Programmed Full Count (PFC) shown in Table 2. Until LMD is updated, NAC counts up to but not beyond this threshold during subsequent charges. This approach allows the gas gauge to be charger-independent and compatible with any type of charge regime.

Many actions in the bq2014 are triggered by detection of a “valid charge.” NAC is stored in an asynchronous, 2- byte counter; the lower byte is NACL and the upper byte is NACH. A valid charge has occurred anytime the

charge lasts long enough to cause an increment in NACH. Small increments of charging are not considered “valid” if they result in counts in NACL but do not generate a roll-over (carry) that increments NACH. NACL is reset anytime the counter direction changes from down to up, so the number of counts required to cause a roll-over and a valid charge is always 256. The counter may be incrementing by 2, 4, 8, or more counts per increment, however, depending on the scaling factors selected. Therefore, a valid charge may be constituted by a smaller number of counter increments.

1.Last Measured Discharge (LMD) or learned battery capacity:

LMD is the last measured discharge capacity of the battery. On initialization (application of VCC or battery replacement), LMD = PFC. During subsequent discharges, the LMD is updated with the latest measured capacity in the Discharge Count Register (DCR) representing a discharge from full to below EDV1. A qualified discharge is necessary for a capacity transfer from the DCR to the LMD register. The LMD also serves as the 100% reference threshold used by the relative display mode.

2.Programmed Full Count (PFC) or initial battery capacity:

The initial LMD and gas gauge rate values are programmed by using PROG1—PROG4. The bq2014 is configured for a given application by selecting a PFC value from Table 2. The correct PFC may be

Inputs

Charge

Discharge

Self-Discharge

Current

Current

Timer

Rate and

Rate and

Temperature

Temperature

Temperature

Compensation

Compensation

Compensation

- -

+

+

+

Nominal

Last

Discharge

Main Counters

Available

< Measured

Count

Qualified

and Capacity

Charge

Discharged

Register

(NAC)

(LMD)

Transfer

(DCR)

Reference (LMD)

Temperature Step,

Temperature

Translation

Other Data

Outputs

Chip-Controlled

Serial

Available Charge

Port

LED Display

FG201002.eps

Figure 2. Operational Overview

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bq2014

determined by multiplying the rated battery capacity in mAh by the sense resistor value:

Battery capacity (mAh) * sense resistor (Ω) =

PFC (mVh)

Selecting a PFC slightly less than the rated capacity for absolute mode provides capacity above the full reference for much of the battery's life.

Example: Selecting a PFC Value

Given:

Sense resistor = 0.1Ω

Number of cells = 6

Capacity = 2200mAh, NiCd battery

Current range = 50mA to 2A

Relative display mode Serial port only Self-discharge = C64

Voltage drop over sense resistor = 5mV to 400mV

Therefore:

2200mAh 0.1Ω = 220mVh

Select:

PFC = 33792 counts or 211mVh

PROG1 = float

PROG2 = float

PROG3 = float

PROG4 = low

PROG5 = float

DONE = low

Table 1. bq2014 Programming

Pin Connection	PROG5 Self-Discharge Rate	DISP Display State
H	Disabled		LED disabled
Z	NAC	LED enabled on discharge when
	64	VSRO < -4mV or during a valid charge
L	47			LED on
	NAC

Table 2. bq2014 Programmed Full Count mVh Selections

			Programmed		PROG4 = L
PROGx			Full					PROG4 = Z
			Count
1		2	(PFC)	PROG3 = H	PROG3 = Z	PROG3 = L	PROG3 = H	PROG3 = Z	PROG3 = L	Units
-		-	-	Scale =	Scale =	Scale =	Scale =	Scale =	Scale =	mVh/
				1/80	1/160	1/320	1/640	1/1280	1/2560	count
H		H	49152	614	307	154	76.8	38.4	19.2	mVh
H		Z	45056	563	282	141	70.4	35.2	17.6	mVh
H		L	40960	512	256	128	64.0	32.0	16.0	mVh
Z		H	36864	461	230	115	57.6	28.8	14.4	mVh
Z		Z	33792	422	211	106	53.0	26.4	13.2	mVh
Z		L	30720	384	192	96.0	48.0	24.0	12.0	mVh
L		H	27648	346	173	86.4	43.2	21.6	10.8	mVh
L		Z	25600	320	160	80.0	40.0	20.0	10.0	mVh
L		L	22528	282	141	70.4	35.2	17.6	8.8	mVh
VSR equivalent to 2				90	45	22.5	11.25	5.6	2.8	mV
	counts/s (nom.)

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bq2014

The initial full battery capacity is 211mVh (2110mAh) until the bq2014 “learns” a new capacity with a qualified discharge from full to EDV1.

3.Nominal Available Charge (NAC):

NAC counts up during charge to a maximum value of LMD and down during discharge and selfdischarge to 0. NAC is reset to 0 on initialization and on the first valid charge after EDV = 1. To prevent overstatement of charge during periods of overcharge, NAC stops incrementing when NAC = LMD.

4.Discharge Count Register (DCR):

The DCR counts up during discharge independent of NAC and could continue increasing after NAC has decremented to 0 until VSB < EDV1. Prior to NAC = 0 (empty battery), both discharge and selfdischarge increment the DCR. After NAC = 0, only discharge increments the DCR. The DCR resets to 0 when NAC = LMD. The DCR does not roll over but stops counting when it reaches FFFFh.

The DCR value becomes the new LMD value on the first charge after a valid discharge to VEDV1 if:

No valid charges have occurred during the period between NAC = LMD and EDV1 detected.

The self-discharge count is not more than 4096 counts (8% to 18% of PFC, specific percentage threshold determined by PFC).

The temperature is ≥ 0°C when the EDV1 level is reached during discharge.

The valid discharge flag (VDQ) indicates whether the present discharge is valid for LMD update.

Charge Counting

Charge activity is detected based on a positive voltage on the VSR input. The bq2014 determines charge activity sustained at a continuous rate equivalent to VSRO (VSR + VOS) > VSRQ. Once a valid charge is detected, charge counting continues until VSRO falls below VSRQ. VSRQ is a programmable threshold (as described in the

Digital Magnitude Filter section) and has a default value of 375 V. If charge activity is detected, the bq2014

increments the NAC at a rate proportional to VSRO. If enabled, the bq2014 then activates an LED display. Charge actions increment the NAC after compensation for charge rate and temperature.

Charge Control

Charge control is provided by the CHG output. This output is asserted continuously when NAC > 0.94 LMD. CHG is also asserted when a valid charge is detected (CHGS in the FLGS1 register is also set). CHG is low when NAC < 0.94 LMD and there is no valid charge activity.

DONE Input

When the bq2014 detects a valid charge complete with an active-high signal on the DONE input, NAC is set to LMD for NAC64 (NiCd) self-discharge setting. NAC is set to 94% of LMD (if NAC is below 94%) for NAC47 (NiMH) self-discharge setting. VDQ is set along with DONE.

Discharge Counting

All discharge counts where VSRO < VSRD cause the NAC register to decrement and the DCR to increment if EDV1 = 0. Exceeding the fast discharge threshold (FDQ) if the rate is equivalent to VSRO < -4mV activates the display, if enabled. The display becomes inactive after VSRO rises above -4mV. VSRD is a programmable

threshold as described in the Digital Magnitude Filter section. The default value for VSRD is -300 V.

Self-Discharge Estimation

The bq2014 continuously decrements NAC and increments DCR for self-discharge based on time and temperature. The self-discharge count rate is programmed to be a nominal 164 * NAC or 1 47 NAC per day or disabled as selected by PROG5. This is the rate for a battery whose temperature is between 20°C–30°C. The NAC register cannot be decremented below 0.

Count Compensations

The bq2014 determines fast charge when the NAC updates at a rate of ≥ 2 counts/sec. Charge and discharge activity is compensated for temperature and charge/discharge rate before updating the NAC and/or DCR. Selfdischarge estimation is compensated for temperature before updating the NAC or DCR.

Charge Compensation

Two charge efficiency compensation factors are used for trickle charge and fast charge. Fast charge is defined as a rate of charge resulting in ≥ 2 NAC counts/sec (≥ 0.15C to 0.32C depending on PFC selections; see Table 2). The compensation defaults to the fast charge factor until the actual charge rate is determined.

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