Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck
Controller, 2-A LDO, Buffered Reference
Check for Samples: TPS51216
1
FEATURES
2
•Synchronous Buck Controller (VDDQ)
– Conversion Voltage Range: 3 V to 28 V
– Output Voltage Range: 0.7 V to 1.8 V
– 0.8% V
– D-CAP™ Mode for Fast Transient Response
– Selectable 300 kHz/400 kHz Switching
Frequencies
– Optimized Efficiency at Light and Heavy
Loads with Auto-skip Function
– Supports Soft-Off in S4/S5 States
– OCL/OVP/UVP/UVLO Protections
– Powergood Output
•2-A LDO(VTT), Buffered Reference(VTTREF)
– 2-A (Peak) Sink and Source Current
– Requires Only 10-μF of Ceramic Output
Capacitance
– Buffered, Low Noise, 10-mA VTTREF
Output
– 0.8% VTTREF, 20-mV VTT Accuracy
– Support High-Z in S3 and Soft-Off in S4/S5
•Thermal Shutdown
•20-Pin, 3 mm × 3 mm, QFN Package
Accuracy
REF
TPS51216
SLUSAB9A –NOVEMBER 2010–REVISED APRIL 2013
DESCRIPTION
The TPS51216 provides a complete power supply for
DDR2, DDR3 and DDR3L memory systems in the
lowest total cost and minimum space. It integrates a
synchronous buck regulator controller (VDDQ) with a
2-A sink/source tracking LDO (VTT) and buffered low
noise reference (VTTREF). The TPS51216 employs
D-CAP™ mode coupled with 300 kHz/400 kHz
frequenciesforease-of-useandfasttransient
response.TheVTTREF tracksVDDQ/2within
excellent 0.8% accuracy. The VTT, which provides 2A sink/source peak current capabilities, requires only
10-μFofceramiccapacitance.Inaddition,a
dedicated LDO supply input is available.
The TPS51216 provides rich useful functions as well
as excellent power supply performance. It supports
flexible power state control, placing VTT at high-Z in
S3 and discharging VDDQ, VTT and VTTREF (softoff) in S4/S5 state. Programmable OCL with low-side
MOSFETR
DS(on)
thermal shutdown protections are also available.
The TPS51216 is available in a 20-pin, 3 mm × 3
mm, QFN package and is specified for ambient
temperature from –40°C to 85°C.
sensing,OVP/UVP/UVLOand
APPLICATIONS
•DDR2/DDR3/DDR3L Memory Power Supplies
•SSTL_18, SSTL_15, SSTL_135 and HSTL
Termination
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2D-CAP is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testingof all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
www.ti.com
ORDERING INFORMATION
T
A
PACKAGEPINS
–40°C to 85°CPlastic Quad Flat Pack (20 pin QFN)20
ORDERABLE DEVICEOUTPUTMINIMUM
NUMBERSUPPLYQUANTITY
TPS51216RUKRTape and reel3000
TPS51216RUKTMini reel250
(1)
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
PGOOD–0.36
Junction temperature range, T
Storage temperature range, T
J
STG
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal unless otherwise noted.
(3) Voltage values are with respect to the SW terminal.
DRVH14OHigh-side MOSFET gate driver output.
DRVL11OLow-side MOSFET gate driver output.
GND7–Signal ground.
MODE19IConnect resistor to GND to configure switching frequency and discharge mode. (See Table 2)
PGND10–Gate driver power ground. R
PGOOD20OPowergood signal open drain output. PGOOD goes high when VDDQ output voltage is within the target range.
REFIN8I
SW13I/O High-side MOSFET gate driver return. R
S317IS3 signal input. (See Table 1)
S516IS5 signal input. (See Table 1)
TRIP18IConnect resistor to GND to set OCL at V
VBST15IHigh-side MOSFET gate driver bootstrap voltage input. Connect a capacitor from the VBST pin to the SW pin.
VDDQSNS9IVDDQ output voltage feedback. Reference input for VTTREF. Also serves as power supply for VTTREF.
VLDOIN2IPower supply input for VTT LDO. Connect VDDQ in typical application.
VREF6O1.8-V reference output.
VTT3OVTT 2-A LDO output. Need to connect 10μF or larger capacitance for stability.
VTTGND4–Power ground for VTT LDO.
VTTREF5OBuffered VTT reference output. Need to connect 0.22μF or larger capacitance for stability.
VTTSNS1IVTT output voltage feedback.
V5IN12I5-V power supply input for internal circuits and MOSFET gate drivers.
Thermal
pad
I/ODESCRIPTION
current sensing input(+).
DS(on)
Reference input for VDDQ. Connect to the midpoint of a resistor divider from VREF to GND. Add a capacitor for
stable operation.
current sensing input(–).
DS(on)
/8. Output 10-μA current at room temperature, TC= 4700 ppm/°C.