TEXAS INSTRUMENTS CY74FCT163952 Technical data
1CY74FCT163952
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT163952
CY74FCT163H952
SCCS048 - March 1997 - Revised March 2000
Features
• Low power, pin-compatible replacement for LCX and
LPT families
• 5V tolerant inputs and outputs
• 24 mA balanced drive outputs
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for reduced noise
• FCT-C speed at 4.4 ns
• Latch-up performance exceedsJEDEC standard no. 17
• Typical output skew < 250 ps
• Industrial temperature range of –40˚C to +85˚C
• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)
• Typical
Std 883D
•V
• ESD (HBM) > 2000V
CY74FCT163H952
• Bus hold on data inputs
• Eliminates the need for external pull-up or pull-down
resistors
• Devices with bus hold are not recommended for translating rail-to-rail CMOS signals to 3.3V logic levels
V
olp
= 2.7V to 3.6V
CC
(groundbounce)performanceexceedsMil
16-Bit Registered Transceivers
Functional Description
These 16-bit registered transceivers are high-speed,
low-powerdevices. 16-bit operation is achievedby connecting
the control lines of the two 8-bit registered transceivers
together. For data flow from bus A-to-B,
to allow data to be stored when CLKAB transitions from
LOW-to-HIGH. The stored data will be present on the output
when
OEAB is LOW.Control of data from B-to-A is similar and
is controlled by using the
CEBA, CLKBA, and OEBA inputs.
The outputs are 24-mA balanced output drivers with current
limiting resistors to reduce the need for external terminating
resistors and provide for minimal undershoot and reduced
ground bounce.
The CY74FCT163H952 has “bus hold” on the data inputs,
whichretains the input’s laststatewhenever the sourcedriving
the input goes to high impedance. This eliminatesthe needfor
pull-up/down resistors and prevents floating inputs.
The CY74FCT163952 is designed with inputs and outputs
capable of being driven by 5.0V buses, allowing its use in
mixed voltage systems as a translator. The outputs are also
designed with a power off disable feature enabling its use in
applications requiring live insertion.
CEAB must be LOW
Logic Block Diagrams; CY74FCT163952, CY74FCT163H952
1B1
CEBA
2
CLKBA
2
OEAB
2
CEAB
2
CLKAB
2
OEBA
2
2A1
C
CE
D
C
CE
D
TO7 OTHERCHANNELS
CEBA
1
CLKBA
1
OEAB
1
CEAB
1
CLKAB
1
OEBA
1
1A1
C
CE
D
C
CE
D
TO7 OTHERCHANNELS
Pin Configuration
OEAB
1
CLKAB
1
CEAB
1
GND
1A1
1A2
V
CC
1A3
1A4
1A5
CEAB
2
CLKAB
2
OEAB
2
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
2A7
2A8
GND
CC
2B1
SSOP/TSSOP
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OEBA
1
CLKBA
1
CEBA
1
GND
1B1
1B2
V
CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
V
CC
2B7
2B8
GND
CEBA
2
CLKBA
2
OEBA
2
Copyright © 2000, Texas Instruments Incorporated
CY74FCT163952
CY74FCT163H952
Pin Description
Name Description
OEAB A-to-B Output Enable Input (Active LOW)
OEBA B-to-A Output Enable Input (Active LOW)
CEAB A-to-B Clock Enable Input (Active LOW)
CEBA B-to-A Clock Enable Input (Active LOW)
CLKAB A-to-B Clock Input
CLKBA B-to-A Clock Input
A A-to-B Data Inputs or B-to-A Three-State
Outputs
B B-to-A Data Inputs or A-to-B Three-State
Outputs
Function Table
For A-to-B (Symmetric with B-to-A)
CEAB CLKAB OEAB A B
H X L X B
X L L X B
L L L L
L L H H
X X H X Z
[1]
[1]
[2, 3]
Inputs Outputs
[4]
[4]
Maximum Ratings
[5, 6]
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ..................................–55°C to +125°C
Ambient Temperature with
Power Applied .............................................–55°C to +125°C
Supply Voltage Range......................................0.5V to +4.6V
DC Input Voltage............................................–0.5V to +7.0V
DC Output Voltage .........................................–0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin)........................ –60 to +120 mA
Power Dissipation.......................................................... 1.0W
Operating Range
Range
Industrial –40°C to +85°C 2.7V to 3.6V
Ambient
Temperature V
CC
Electrical Characteristics for Non Bus Hold Devices Over the Operating Range V
Parameter Description Test Conditions Min. Typ.
V
IH
V
IL
V
H
V
IK
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
OFF
I
CC
∆I
CC
Notes:
1. On the CY74FCT163H952, these pins have bus hold.
2. A-to-B data flow is shown: B-to-A data flow is similar but uses,
3. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. = LOW-to-HIGH Transition. Z = HIGH Impedance.
4. Level of B before the indicated steady-state input conditions were established.
5. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature.
6. With the exception of inputs with bus hold, unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground,
7. Typical values are at VCC=3.3V, TA = +25˚C ambient.
8. This parameter is specified but not tested.
9. Not more than one output should be shortedat a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
10. Per TTL driven input; all other inputs at VCC or GND.
Input HIGH Voltage All Inputs 2.0 5.5 V
Input LOW Voltage 0.8 V
Input Hysteresis
[8]
Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V
Input HIGH Current VCC=Max., VI=5.5 ±1 µA
Input LOW Current VCC=Max., VI=GND ±1 µA
High Impedance Output Current
(Three-State Output pins)
High Impedance Output Current
(Three-State Output pins)
Short Circuit Current
[9]
Power-Off Disable VCC=0V, V
Quiescent Power Supply Current VIN≤0.2V,
Quiescent Power Supply Current
VCC=Max., V
VCC=Max., V
VCC=Max., V
OUT
V
IN>VCC
–0.2V
VIN=VCC–0.6V
=5.5V ±1 µA
OUT
=GND ±1 µA
OUT
=GND –60 –135 –240 mA
OUT
≤4.5V ±100 µA
VCC=Max. 0.1 10 µA
[10]
VCC=Max. 2.0 30 µA
(TTL inputs HIGH)
CEBA, CLKBA, and OEBA.
=2.7V to 3.6V
CC
[7]
100 mV
Max. Unit
2
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