Texas Instruments CD74ACT20M96, CD74ACT20M, CD74AC20M96, CD74AC20M, CD54ACT20F3A Datasheet

1

Data sheet acquired from Harris Semiconductor
SCHS229A

Features

• Typical Propagation Delay

- 6ns at V

CC

= 5V, TA = 25oC, CL = 50pF

• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015

• SCR-Latchup-Resistant CMOS Process and Circuit
Design

• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply

• ±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

Description

The CD74AC20 and ’ACT20 are dual 4-input NAND gates that
utilize Advanced CMOS Logic technology.

Pinout

CD54ACT20

(CERDIP)

CD74AC20, CD74ACT20

(PDIP, SOIC)

TOP VIEW

Functional Diagram

Ordering Information

PART

NUMBER

TEMP.

RANGE (oC) PACKAGE

CD74AC20E -55 to 125 14 Ld PDIP
CD74AC20M -55 to 125 14 Ld SOIC
CD54ACT20F3A -55 to 125 14 Ld CERDIP
CD74ACT20E -55 to 125 14 Ld PDIP
CD74ACT20M -55 to 125 14 Ld SOIC

NOTES:

1. When ordering,use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.

2. Waf eranddie for this part number is availablewhichmeets all elec­trical specifications. Please contactyour local TI sales officeor cus­tomer service for ordering information.

1A
1B

NC

1C
1D
1Y

GND

V

CC

2D
2C
NC
2B
2A
2Y

1
2
3
4
5
6
7

14
13
12

11

10

9
8

TRUTH TABLE

INPUTS OUTPUTS

nA nB nC nD nY

LXXX H
XLXX H
XXLX H
XXXL H
HHHH L

X = Don’t Care

1A

1C

2A

2B

2D

1

4

5

9

12

13

6

2Y

1Y

8

1D

GND = 7
V

CC

= 14

NC = 3, 11

2C

1B

2

10

September 1998 - Revised May 2000

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.

Copyright

© 2000, Texas Instruments Incorporated

CD74AC20,

CD54/74ACT20

Dual 4-Input NAND Gate

[ /Title
(CD74
AC20,
CD74
ACT20
)
/Sub­ject
(Dual
4-Input
NAND
Gate)
/Autho
r ()
/Key­words
(Har­ris
Semi­con­ductor,
Advan
ced
CMOS
,Harris
Semi­con­ductor,
Advan
ced
TTL)
/Cre­ator ()

2

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, I

IK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, I

OK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, I

O

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, I

CC orIGND

(Note 3) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V

CC

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

Thermal Resistance (Typical, Note 5) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. For up to 4 outputs per device, add ±25mA for each additional output.

4. Unless otherwise specified, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

PARAMETER SYMBOL

TEST

CONDITIONS

V

CC

(V)

25

o

C

-40oC TO
85oC

-55oC TO
125oC

UNITSV

I

(V) IO(mA) MIN MAX MIN MAX MIN MAX

AC TYPES

High Level Input Voltage V

IH

- - 1.5 1.2 - 1.2 - 1.2 - V
3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

Low Level Input Voltage V

IL

- - 1.5 - 0.3 - 0.3 - 0.3 V
3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

High Level Output Voltage V

OH

VIH or V

IL

-0.05 1.5 1.4 - 1.4 - 1.4 - V

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

(Note 6, 7)

5.5 - - 3.85 - - - V

-50

(Note 6, 7)

5.5----3.85 - V

CD74AC20, CD54/74ACT20