Texas Instruments BQ4013YMA-85, BQ4013YMA-70N, BQ4013YMA-70, BQ4013YMA-120, BQ4013MA-85 Datasheet

...

bq4013/Y

128Kx8 Nonvolatile SRAM

Features

Data retention for at least 10

➤

years without power

Automatic write-protection during

➤

power-up/power-down cycles

Conventional SRAM operation,

➤

including unlimited write cycles

Internal isolation of battery be

➤

fore power application

Industry standard 32-pin DIP

➤

pinout

Pin Connections

General Description

The CMOS bq4013/Y is a nonvolatile 1,048,576-bit static RAM organized as 131,072 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility coupled with the unlimited write cy cles of standard SRAM.

The control circuitry constantly

monitors the single 5V supply for an

out-of-tolerance condition. When V

falls out of tolerance, the SRAM

is unconditionally write-protected to prevent inadvertent write operation.

At this time the integral energy source is switched on to sustain the memory until after V

returns valid.

Pin Names

A0–A

Address inputs

–DQ7Data input/output

Chip enable input

The bq4013/Y uses an extremely low standby current CMOS SRAM, coupled with a small lithium coin cell to provide nonvolatility without long write-cycle times and the write-cycle limitations associated with EEPROM.

The bq4013/Y requires no external

circuitry and is socket-compatible with industry-standard SRAMs and most EPROMs and EEPROMs.

NC No connect

Write enable input

Supply voltage input

Output enable input

Ground

Selection Guide

Maximum

Part

Number

bq4013MA -85 85 -5% bq4013YMA -85 85 -10%

bq4013MA-120 120 -5% bq4013YMA-120 120 -10%

9/96 D

Access

Time (ns)

Negative

Supply

Tolerance

Part

Number

bq4013YMA -70 70 -10%

Maximum

Access

Time (ns)

Negative

Supply

Tolerance

bq4013/Y

Functional Description

When power is valid, the bq4013/Y operates as a stan dard CMOS SRAM. During power-down and power-up cycles, the bq4013/Y acts as a nonvolatile memory, auto matically protecting and preserving the memory con tents.

Power-down/power-up control circuitry constantly moni tors the V V

. The bq4013 monitors for V

PFD

use in systems with 5% supply tolerance. The bq4013Y monitors for V with 10% supply tolerance.

When V tomatically write-protects the data. All outputs become high impedance, and all inputs are treated as “don’t care.” If a valid access is in process at the time of power-fail detection, the memory cycle continues to com pletion. If the memory cycle fails to terminate within time t

WPT

supply for a power-fail-detect threshold

= 4.37V typical for use in systems

PFD

falls below the V

, write-protection takes place.

PFD

= 4.62V typical for

PFD

threshold, the SRAM au

Block Diagram

As V circuitry switches to the internal lithium backup supply, which provides data retention until valid V

When V

cell voltage, the supply is switched back to V

continues for a time t processor stabilization. Normal memory operation may

resume after this time.

The internal coin cell used by the bq4013/Y has an ex tremely long shelf life and provides data retention for more than 10 years in the absence of system power.

As shipped from Unitrode, the integral lithium cell of

the MA-type module is electrically isolated from the

memory. (Self-discharge in this condition is approxi mately 0.5% per year.) Following the first application of V

provides data retention on subsequent power-downs.

falls past V

returns to a level above the internal backup

ramps above the V

, this isolation is broken, and the lithium backup cell

and approaches 3V, the control

PFD

is applied.

threshold, write-protection

PFD

(120ms maximum) to allow for

CER

. After

Power

128K x 8

SRAM

Block

Power-Fail

Control

A0–A

DQ0–DQ

CON

Lithium Cell

BD-42

bq4013/Y

Truth Table

Mode CE WE OE I/O Operation Power

Not selected H X X High Z Standby

Output disable L H H High Z Active

Read L H L D

Write L L X D

OUT

Absolute Maximum Ratings

Symbol Parameter Value Unit Conditions

OPR

STG

BIAS

SOLDER

Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation

DC voltage applied on VCCrelative to V

DC voltage applied on any pin excluding V relative to V

Operating temperature

Storage temperature

Temperature under bias

-0.3 to 7.0 V

0 to +70 °C Commercial

-40 to +85 °C Industrial “N”

-40 to +70 °C Commercial

-40 to +85 °C Industrial “N”

-10 to +70 °C Commercial

-40 to +85 °C Industrial “N”

Soldering temperature +260 °C For 10 seconds

should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to con ditions beyond the operational limits for extended periods of time may affect device reliability.

Active

+ 0.3

≤

bq4013/Y

Recommended DC Operating Conditions (T

A=TOPR

)

Symbol Parameter Minimum Typical Maximum Unit Notes

Supply voltage

Supply voltage 0 0 0 V

Input low voltage -0.3 - 0.8 V

Input high voltage 2.2 - VCC+ 0.3 V

4.5 5.0 5.5 V bq4013Y

4.75 5.0 5.5 V bq4013

Note: Typical values indicate operation at TA= 25°C.

DC Electrical Characteristics (T

A=TOPR, VCCmin

≤

CCmax)

≤

Symbol Parameter Minimum Typical Maximum Unit Conditions/Notes

SB1

SB2

PFD

Input leakage current - -

Output leakage current - -

AVIN=VSSto V

=VIHor OE =VIHor

Output high voltage 2.4 - - V IOH= -1.0 mA

Output low voltage - - 0.4 V IOL= 2.1 mA

Standby supply current - 4 7 mA CE =V

Standby supply current - 2.5 4 mA

Operating supply current - 75 105 mA

Power-fail-detect voltage

4.55 4.62 4.75 V bq4013

4.30 4.37 4.50 V bq4013Y

CE 0V≤V or V

- 0.2V,

≥

0.2V,

≤

≥

Min. cycle, duty = 100%, CE

=VIL,I

I/O

Supply switch-over voltage - 3 - V

- 0.2V

= 0mA

Note: Typical values indicate operation at TA= 25°C, VCC= 5V.

Capacitance (T

= 25°C, F = 1MHz, VCC= 5.0V)

Symbol Parameter Minimum Typical Maximum Unit Conditions

I/O

Input/output capacitance - - 10 pF Output voltage = 0V

Input capacitance - - 10 pF Input voltage = 0V

Note: These parameters are sampled and not 100% tested.

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