Tektronix TDS 654C, TDS 680C, TDS 684C, TDS 694C Datasheet
TDS 694C, TDS 684C,
TDS 680C, TDS 654C
Digital Real-Time
™
Oscilloscopes
FEATURES AND BENEFITS
3 GHz, 1 GHz and 500 MHz
Bandwidth to Work with the Fastest
Signals in Today’s Digital Designs
10 GS/s and 5 GS/s Sample Rate on
all Channels Simultaneously for Full
Bandwidth Single-shot Capture
Histograms and Measurement
Statistics to More Fully Characterize
Design Performance
Support for Java
Packages
Hard Disk Drive Storage (option)
APPLICATIONS
Validation and Characterization of
High Speed Digital Designs
™
Applications
Whether you are working on
next generation microprocessor designs, high-speed data
communications equipment,
or in high-energy physics
research, the TDS 694C captures your fastest signals with
the best fidelity and resolution available. Its 3 GHz
bandwidth preserves your
waveform’s fast rising edges
and accurately shows signal
details. With 10 GS/s digitizing rate simultaneously on all
four channels and a high-stability timebase, the TDS 694C
makes your critical timing
measurements with the highest resolution and accuracy
– even channel-to-channel
measurements made in a single acquisition.
The TDS 600C oscilloscopes
incorporate all the advanced
trigger features you expect in
a high performance oscilloscope. The TDS 694C can be
configured for cross triggering with a Tektronix TLA 700
Logic Analyzer.
The TDS 600C oscilloscopes
give you the total solution to
your digital design characterization and debugging needs.
Now you have the tool you
need to verify design margins, characterize setup and
hold times, and measure
clock-to-data skew on the
fastest digital designs.
The TDS 600C offers 29 automatic measurements, with
measurement statistics, to
make your design verification
and characterization job
much faster and easier.
Available Java-based application packages for Jitter Analysis, Disk Drive measurements
and Processor Specification
measurements provide customized measurements and
analysis capability. The
TDS 600C gives you the performance and features you
need to get your job done
faster and more thoroughly.
Telecommunications/Data
Communications Design
High Energy Physics
Copyright © 1999 Tektronix, Inc. All rights reserved.
TDS 600 Series
Characteristics
TDS 654C TDS 680C TDS 684C TDS 694C
Total Channels 4 2 + 2 4 4
Sample Rate 5 GS/s 5 GS/s 5 GS/s 10GS/s
(all channels simultaneously)
Real-time Bandwidth 500MHz 1 GHz 1 GHz 3GHz
Maximum Record Length 15,000 pts 15,000 pts 15,000 pts 120,000pts
per Channel
Vertical Resolution 1mV/div – 10V/div 1mV/div – 10 V/div 1mV/div – 10V/div 10mV/div – 1V/div
Time Measurement Accuracy <50ps @ 5GS/s <50ps @ 5 GS/s <50ps @ 5GS/s 15 ps @ 10GS/s
Histograms and Measurement Std. Std. Std. Std.
Statistics
Standard Probes 4 P6243 None None None
Display Type 7 in. color 7 in. mono 7 in. color 7 in. color
GPIB Port, RS-232 & Centronics Std. Std. Std. Std.
VGA Std. Color Std. Mono Std. Color Std. Color
Hard Disk Drive Opt. Opt. Opt. Opt.
TIME BASE SYSTEM
VERTICAL SYSTEM
Time Bases – Main and Delayed.
Time/div Range – 200ps/div to 10 s/div.
Except TDS694C: 100ps/div to 10 s/div.
Time Base Accuracy – Over Any Interval
>1 ms ±100ppm. Except TDS 694C: Over
any interval > 1 ms ± 10ppm.
Time Interval Measurement Accuracy –
TDS 654C/680C/684C: ±[(0.2/sample rate)
+ (100ppm x |Reading|)] single shot.
(≈ 50ps @ 5GS/s)
TDS 694C: ±[(0.15/sample rate) + (10ppm
x |Reading|)] single shot. (≈ 15ps @
10GS/s)
Record Length per Channel – 500 to
15,000 pts. Except TDS 694C: 500 to
30,000 pts. (optional: 120,000 pts.)
Trigger Jitter – 8ps RMS (typical).
Pre-Trigger Position – 0% to 100% of
Record.
Channel to Channel Deskew Range –
±25 ns.
Vertical Resolution – 8-Bits (>11-Bits with
averaging).
Vertical Sensitivity – 1mV/div to 10V/div.
Except TDS 694C: 10mV/div to 1V/div.
Maximum Input Voltage – 300V CAT II;
±400V peak. Derate at 20dB/decade above
1MHz. Except TDS 694C: 5V RMS.
DC Gain Accuracy – ±1.50%. Except
TDS 694C: ±1.0%.
Position Range – ±5 divs.
Offset –
±1V from 1 to 99.5mV/div, ±10V from
100mV to 995mV/div, ±100V from 1V to
10V/div.
Except TDS 694C: ±0.5 V from 10 to
50mV/div, ±0.25V from 50.5 to
100mV/div, ±5V from 101mV to
500mV/div, ±2.5V from 505mV to 1V/div.
Bandwidth Selections – 20MHz, 250MHz,
and Full. Except TDS 694C: Full only.
Input Impedance Selections – 1 MΩ in
parallel with 10pF, or 50 Ω (AC and DC
coupling). Except TDS 694C: 50 Ω
(DC coupled).
Input Coupling – AC, DC or GND. Except
TDS 694C: DC or GND.
AC Coupled Low Frequency Limit (Except
TDS 694C) – <10Hz when AC, 1MΩ
coupled. <200kHz when AC, 50 Ω coupled.
ACQUISITION MODES
Peak Detect – High frequency and random
glitch capture. Captures glitches of 1ns
using acquisition hardware at all real-time
sampling rates. TDS 694C captures glitches
of 100 ps.
Sample – Sample data only.
Envelope – Max/min values acquired over
one or more acquisitions.
Average – Waveform data from 2 to 10,000
waveforms (selectable) is averaged.
Single Sequence – Use RUN/STOP button
to capture a single triggered acquisition at a
time, which may be automatically saved to
NVRAM with AutoSave.
TRIGGERING SYSTEM
TRIGGER TYPES
EDGE (Main and Delayed) –
Conventional level-driven trigger. Positive or
negative slope on any channel or rear panel
auxiliary input. Coupling selections: DC, AC,
noise reject, HF reject, LF reject.
LOGIC (Main) –
PATTERN: Specifies a logical combination
(AND, OR, NAND, NOR) of the four input
channels (high, low, don’t care). Trigger
when pattern stays true or false for a specified time.
STATE: Any logical pattern of channels 1, 2,
and 3 (AUX1 on TDS680C) plus a clock
edge on channel 4 (AUX2 on TDS680C).
Triggerable on rising or falling clock edge.
SETUP/HOLD: Trigger on violations of both
setup time and hold time between clock and
data which are on two input channels.
PULSE (Main) –
GLITCH: Trigger on or reject glitches of
positive, negative, or either polarity. Minimum glitch width is 1.0ns with 200ps
resolution.
RUNT: Trigger on a pulse that crosses one
threshold but fails to cross a second threshold before crossing the first again.
WIDTH: Trigger on width of positive or negative pulse either within or out of selectable
time limits (1ns to 1 s).
SLEW RATE: Trigger on pulse edge rates
that are either faster or slower than a set
rate. Edges can be rising, falling, or either.
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