bc635VME/bc350VXI
Time and Frequency
Processor
Revision E
User’s Guide
8500-0019
January, 2004
bc635VME/bc350VXI
TIME AND FREQUENCY PROCESSOR
TABLE OF CONTENTS
SECTION PAGE
CHAPTER ONE
INTRODUCTION
1.0 General.................................................................................................................................. 1-1
1.1 Key Features ......................................................................................................................... 1-1
1.2 Physical Overview ................................................................................................................ 1-2
1.3 Specifications........................................................................................................................ 1-3
1.3.1 Time Code Reader .......................................................................................................1-3
1.3.2 Time Code Generator................................................................................................... 1-3
1.3.3 Bus Characteristics ......................................................................................................1-3
1.3.4 Digital Inputs ............................................................................................................... 1-3
1.3.5 External 10MHz Input/Output ..................................................................................... 1-4
1.3.6 Digital Outputs............................................................................................................. 1-4
1.3.7 Oscillator Control Output ............................................................................................ 1-4
1.4 Environmental Specifications ...............................................................................................1-4
1.5 Functional Overview............................................................................................................. 1-4
1.5.1 Time ............................................................................................................................. 1-4
1.5.1.1 Time Sync Mode................................................................................................. 1-4
1.5.1.2 Time Format........................................................................................................ 1-5
1.5.1.3 Set Time.............................................................................................................. 1-5
1.5.1.4 Set Year...............................................................................................................1-5
1.5.1.5 Set Local Offset ..................................................................................................1-5
1.5.1.6 Set Propagation Delay ........................................................................................ 1-5
1.5.1.7 Days ....................................................................................................................1-6
1.5.2 Time Code..................................................................................................................... 1-7
1.5.2.1 Decode ................................................................................................................1-7
1.5.2.2 Generate .............................................................................................................. 1-7
1.5.3 Signals.......................................................................................................................... 1-7
1.5.3.1 Heartbeat (Periodic) Output................................................................................ 1-7
1.5.3.2 Strobe Output...................................................................................................... 1-7
1.5.3.3 Event Input.......................................................................................................... 1-8
1.5.3.4 Frequency Output ............................................................................................... 1-8
1.5.4 Interrupts...................................................................................................................... 1-8
1.5.5 Oscillator Parameters................................................................................................... 1-8
1.5.6 Sync RTC Time to External Time ............................................................................... 1-8
1.5.7 Board Reset.................................................................................................................. 1-8
Symmetricom Inc bc635VME/bc350VXI Time and Frequency Processor (Rev. E) i
TABLE OF CONTENTS
CHAPTER TWO
INSTALLATION AND SETUP
2.0 VME/VXI Compatibility Switches....................................................................................... 2-1
2.1 VMEbus Base Address Selection ......................................................................................... 2-2
2.2 bc350VXI Logical Address Selection .................................................................................. 2-2
2.3 Jumpers ................................................................................................................................. 2-3
2.4 Installation ............................................................................................................................ 2-5
CHAPTER THREE
INTERFACES
3.0 General.................................................................................................................................. 3-1
3.1 Data Input and Output........................................................................................................... 3-1
CHAPTER FOUR
FIFO DATA PACKETS
4.0 General.................................................................................................................................. 4-1
4.1 Writing Data Packets ............................................................................................................ 4-1
4.1.1 Packet “A” - Select TFP Operational Mode ................................................................ 4-2
4.1.2 Packet “B” Set Major Time ......................................................................................... 4-4
4.1.3 Packet “C” Command Input......................................................................................... 4-5
4.1.4 Packet “D” Load D/A Converter ................................................................................. 4-5
4.1.5 Packet “F” Heartbeat (Periodic) Control ..................................................................... 4-6
4.1.6 Packet “G” Offset Control ........................................................................................... 4-9
4.1.7 Packet “H” Set Time Code Format for Mode 0......................................................... 4-10
4.1.8 Packet “I” Clock Source Select ................................................................................. 4-10
4.1.9 Packet “J” Send Data TO GPS Receiver ................................................................... 4-10
4.1.10 Packet “K” Select Generator Code .......................................................................... 4-11
4.1.11 Packet “L” Set Real Time Clock ............................................................................. 4-11
4.1.12 Packet “M” Local Time Offset Select (GPS Modes Only) ..................................... 4-12
4.1.13 Packet “O” Request Data From The TFP ................................................................ 4-13
4.1.14 Packet “P” Path Selection ........................................................................................ 4-15
4.1.14.1 Bit Descriptions .............................................................................................. 4-15
4.1.14.2 Upper Nibble Bit Descriptions ....................................................................... 4-16
4.1.15 Packet “Q” Set Disciplining Gain............................................................................ 4-17
4.1.16 Packet “S” Set Year ................................................................................................. 4-17
ii
bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
TABLE OF CONTENTS
CHAPTER FIVE
PROGRAMMING EXAMPLES
5.0 General.................................................................................................................................. 5-1
5.1 Reading Time on Demand .................................................................................................... 5-1
5.2 External Event Time Capture ............................................................................................... 5-2
5.3 Program Periodic Frequency of 1000 HZ............................................................................. 5-2
5.4 Set Mode 1 and the Major Time ........................................................................................... 5-3
5.5 Select Mode 0 (IRIGB)and Advance TFP 2.5 Milliseconds ................................................ 5-3
CHAPTER SIX
INPUTS AND OUTPUTS
6.0 Inputs and Outputs ................................................................................................................ 6-1
CHAPTER SEVEN
ADJUSTMENTS
7.0 General.................................................................................................................................. 7-1
Symmetricom Inc bc635VME/bc350VXI Time and Frequency Processor (Rev. E)
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TABLE OF CONTENTS
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bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
CHAPTER ONE
INTRODUCTION
1.0 GENERAL
The bc635VME/bc350VXI Time and Frequency Processor User’s Guide provides the following
information:
• Introduction and key feature description.
• Installation and setup.
• Detailed operation and programming interfaces.
• Input and output signals.
• Programming examples.
1.1 KEY FEATURES
The Time and Frequency Processor (TFP) has been designed with the following key features:
• Time on demand (days through 0.1 microseconds) with zero latency. This feature is
implemented with hardware registers which latch the current time upon host request.
• Event logging (days through 0.1 microseconds). This feature is implemented with a second
set of hardware registers. Time is captured on a positive or negative input edge.
• Six operational modes are supported. Modes are distinguished by the reference source.
Mode Source Of Synchronization
Timecode – IRIG-A IRIG-B XR3 2137 NASA 36
0
Free running - on board VCXO used as reference.
1
1 PPS - accepts input one pulse per second.
2
RTC - uses battery backed on board real time clock IC.
3
GPS (optional) - double wide configuration including GPS receiver.
5
(obsolete)
GPS (optional) - uses GPS receiver/antenna (receiver in antenna).
6
Symmetricom Inc bc635VME/bc350VXI Time and Frequency Processor (Rev. E) 1-1
CHAPTER ONE
• Provides an output clock synchronized to the selected reference; programmable 1, 5, or
10MHz TTL.
• All modes of operation are supplemented by flywheel operation. For example, if
synchronization source is lost, the TFP will continue to function at the last known reference
rate.
• Generates synchronized IRIG B timecode. Modulated and DC level shift formats are
produced simultaneously. Also generates IRIG H DC level shift.
• Programmable frequency output (periodics) is provided. The output frequency is 10,000,000
/ (n1 * n2). 1<n1<65536 & 1<n2<65536.
• A time coincidence strobe output is provided. Programmable from hours through
milliseconds. This strobe also has an each second mode programmable to milliseconds.
• Five maskable interrupt sources are supported. IRQ levels one through seven are
programmable.
Int. # Source Of Interrupt
0
1
2
3
4
External event input has occurred.
Periodic output has occurred.
Time coincidence strobe has occurred.
One second epoch (1PPS output) has occurred.
Output data packet is available.
• Time-of-day, hours, minutes, and seconds are displayed on front panel LED's.
• Most inputs and outputs are accessible via the P2 connector.
1.2 PHYSICAL OVERVIEW
The TFP is a B size module (6U X 160 mm). Operation is controlled by a block of thirty-two
D16 registers written and read by the host via the VMEbus (A16 : D16). The TFP is available in
two versions. The bc635VME is intended for use in a VMEbus system with most I/O signals
available on rows A and C of the P2 connector. The bc350VXI is intended for use in a VXIbus
system, and is shipped without a P2 connector. A dip switch is used to select VME or VXI
compatibility. In VMEbus systems the register block can be located on any 64 byte boundary.
In VXIbus systems the register block can be located at any of the 256 logical addresses (A15 and
A14 must be high). The logical address is returned during an interrupt acknowledge cycle.
1-2 bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
1.3 SPECIFICATIONS
1.3.1 TIMECODE READER
INTRODUCTION
Format – AM
Carrier Range
Modulation Ratio
Input Amplitude
Input Impedance
Format - DCLS
Carrier Range
Input Amplitude
Input Impedance
IRIG B XR3 2137 NASA 36.
+/- 50ppm.
3:1 to 6:1.
0.5 to 5 volts peak to peak.
10KΩ AC coupled.
IRIG A IRIG B NASA 36.
+/- 50ppm.
TTL/CMOS Compatible
10KΩ DC coupled.
1.3.2 TIMECODE GENERATOR
Format - AM
Modulation Ratio
Output Amplitude
Format - DCLS
DC Level Shift
IRIG B.
3:1.
0 to 10 volts peak to peak, adjusted by VR1, into 50Ω.
IRIG B IRIG H
TTL/CMOS compatible, into 50Ω.
1.3.3 BUS CHARACTERISTICS
Address Space
Data Transfer
Interrupter
Power
A16, AM codes $29 and $2D, 64 bytes.
D16.
D08(0), I(1-7), ROAK.
+5 @ 1.5amps +12 @ 50 milliamp -12 @ 30 milliamp
1.3.4 DIGITAL INPUTS
Event Capture
TTL/CMOS positive or negative edge triggered.
20 nanoseconds minimum width 250 nanoseconds minimum period.
Input impedance 10KΩ
External 1PPS
TTL/CMOS positive edge on time.
Twenty nanoseconds minimum width.
Input impedance 10KΩ
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CHAPTER ONE
1.3.5 EXTERNAL 10MHz INPUT/OUTPUT
10MHz Input
TTL/CMOS 45% To 55% Duty Cycle.
1.5 To 4 Volts Peak-To-Peak, AC coupled 2.5KHz impedance.
Note: When an ovenized onboard oscillator is used, the external 10MHz input feature is
disabled. Instead the output of the ovenized oscillator appears on this pin. It can only
drive a single high impedance load.
1.3.6 DIGITAL OUTPUTS
1PPS
Periodics
Strobe
1, 5, 10MHz Clock
TTL/CMOS positive edge on time, 200mS positive pulse, into 50Ω.
TTL/CMOS positive edge on time, into 50Ω. (See section 4.1.5)
TTL/CMOS positive edge on time, 1mS positive pulse, into 50Ω.
TTL/CMOS positive edge on time, 5 & 10MHz square wave, 1MHz
80/20 duty cycle, into 50Ω.
1.3.7 OSCILLATOR CONTROL OUTPUT
Control Range
Transfer Coefficient
0 – 5V
Positive
1.4 ENVIRONMENTAL SPECIFICATIONS
Temperature
Operating 0 to 70o centigrade.
Non-Operating -30 to +85o centigrade.
Relative Humidity
Altitude
Operating 85% @ +85 o C, 1000 hours.
Operating -400 to 18,000 meters MSL.
1.5 FUNCTIONAL OVERVIEW
This section describes the functions provided by the bc635VME/bc350VXI Time and Frequency
Processor (TFP).
1.5.1 TIME
This function controls how the TFP card acquires and maintains time data. These functions
allow the user to select where to obtain time data, whether or not to manipulate the time data and
how to present the time data to the user system.
1.5.1.1 TIME SYNC MODE
This allows the user to select the operating mode (time source) of the TFP device. Available
modes are Time Code Decoding, Freerunning, External 1PPS, RTC & GPS (Optional).
1-4 bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
INTRODUCTION
1.5.1.2 TIME FORMAT
The event time capture and time registers of the TFP default to the decimal time format. The
major time registers are divided into 4 bit fields for each decimal digit of days, hours minutes
and seconds. For the GPS mode only, the time registers can operate in the binary format where
major time is represented as seconds since the GPS epoch.
1.5.1.3 SET TIME
This function allows the user to set the time on the TFP device. Decimal time values can be
entered into the time registers. This function is typically used when operating in either the
Freerunning or External 1PPS modes. While the function may be used when operating in Time
code or GPS modes, subsequent time data received from the selected reference source will
overwrite the loaded time.
1.5.1.4 SET YEAR
This function allows the user to set the year data. Typically, this function is used when the board
is operating in time code decoding mode. Many time code formats (including standard IRIG B)
do not include year information in the data. Using this function will allow the TFP device to
extract the time of year data from the time code source while using year information provided by
the user. The board will decode the year and roll over the days for a leap year (365-366-001) or a
non-leap year (365-001). The supported range is 1990 – 2037. The board will follow the input
time source if the input rollover day sequence does not match the board rollover day sequence as
defined by the programmed year.
1.5.1.5 SET LOCAL OFFSET
This function allows the user to program a local offset of 1-hour increments into the TFP device.
If the local offset value is nonzero, the device will adjust any reference timing information in
order to maintain a local time in TFP clock. Use of this function only affects the time data in the
TIME registers described in paragraph 3.1.
1.5.1.6 SET PROPAGATION DELAY
This function allows the user to command the TFP device to compensate for propagation delays
introduced by the currently selected reference source. For example, when the unit is operating in
Time code decoding mode, a long cable run could result in the input time code having a
propagation delay. The delay value is programmable in units of 100ns and has an allowed range
from –9999999 through +9999999.
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CHAPTER ONE
1.5.1.7 DAYS
When a time source signal is not present at board power up, the board will begin counting at day
000. The TFP can be operated to count days in two modes. For the default Day 000 Invalid
Mode, the TFP will not accept an input day of 000. Table 1 shows the possible combinations of
input source data and current board state on the left side, and the result of the day rollover on the
right side. Note that the table includes such combinations as where the board is set to a non-leap
year, but the source is in a leap year.
Table 1 Day 000 Invalid Mode
Combination
number
1.1.1 99 Timecode N/A 000 99 Freerun lost track
1.1.2 99 Timecode 99 365 – 001 99 - 00 365 – 001
1.1.3 99 Timecode 00 366 – 001 99 - 00 366 – 001
1.2.1 99 Freerun N/A 365 99 - 00 365 – 001
1.2.2 99 Freerun N/A 366 99 - 00 366 – 001
2.1.1 00 Timecode 00 365 – 366 00 365 – 366
2.1.2 00 Timecode 99 365 – 001 00 365 – 001 1
2.1.3 00 Timecode 00 366 – 001 00 - 01 366 – 001
2.2.1 00 Freerun N/A 365 00 365 – 366
2.2.2 00 Freerun N/A 366 01 366 – 001
Note 1: Day went to 366 for about one second, then went to day 001
Board
year
Input mode Source
Year
Source day Board year Board day Notes
For the optional Accept Day 000 Mode, the TFP will accept an input source with an input day of
000. Table 2 shows the possible combinations for this mode.
Table 2 Accept Day 000 Mode
Combination
number
3.1.1 99 Timecode N/A 000 99 000 – 001
3.1.2 99 Timecode 99 364 – 365 99 364 – 365
3.1.3 99 Timecode 99 365 – 001 99 – 00 365 – 001
3.1.4 99 Timecode 00 365 – 366 99 – 00 365 – 366
3.1.5 99 Timecode 00 366 – 001 99 – 00 366 – 001
3.2.1 99 Freerun N/A 000 99 000 – 001
3.2.2 99 Freerun N/A 364 99 364 – 365
3.2.3 99 Freerun N/A 365 99 – 00 365 – 000
3.2.4 99 Freerun N/A 366 99 – 00 366 – 000
4.1.1 00 Timecode N/A 000 – 001 00 000 – 001
4.1.2 00 Timecode 00 365 – 366 00 365 – 366
4.1.3 00 Timecode 00 366 – 001 00 – 01 366 – 001
4.1.4 00 Timecode 99 365 – 001 00 365 – 001
4.2.1 00 Freerun N/A 000 00 000 – 001
4.2.2 00 Freerun N/A 365 00 365 – 366
4.2.3 00 Freerun N/A 366 00 - 01 366 – 367
Note 2: Day went to 000 for about one second, then went to day 001
Board
year
Input mode Input Year Input day Board year Board day Notes
2
2
2
2
2
2
1.5.2 TIME CODE
1-6 bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
INTRODUCTION
This function group provides access to functions controlling TFP card operation while decoding
time code. These functions allow the user to control both the time code decoding and time code
generating circuits of the device.
1.5.2.1 DECODE
This function allows the user to select the format and modulation types associated with an input
timing signal. These values control how the device attempts to decode the input time code.
These values may be set regardless of the mode but will only be used in time code decoding
mode. The format defines the type of the time code data. The modulation defines the envelope
for the signal and which input pin the signal will be extracted from. The default format is IRIG
B and the default modulation envelope is AM (amplitude modulated).
1.5.2.2 GENERATE
This function allows the user to select the format of the time code that will be generated by the
TFP device. The time code generator supports IRIG B and IRIG H DCLS.
1.5.3 SIGNALS
This group provides access to functions that control various hardware timing signals either
decoded or generated by the TFP card.
1.5.3.1 HEARTBEAT (PERIODIC) OUTPUT
This function allows the user to command the TFP to produce a clock signal at a specified
frequency. The heartbeat signal, also referred to as a periodic, can be either synchronous or
asynchronous to the internal 1PPS epoch in the TFP device. This functionality is implemented
in hardware on the TFP device by an Intel 82C54 counter timer chip. The heartbeat circuit has
two 16 bit divisors, which are clocked by the counter. As the output of the first divisor provides
the clock for the second divisor, manipulating the divisor values results in various duty cycles.
The output of this circuitry is capable of creating a VME bus interrupt. See Section 4.1.5 for a
description of how to program the heartbeat output.
1.5.3.2 STROBE OUTPUT
This function allows the user to command the TFP to produce a hardware signal at a particular
time, or at a particular point during a 1 second interval. When major/minor mode is selected, a
hardware signal will be produced when the internal time of the TFP device matches the values
entered for the major and minor strobe registers. The major time in hours, minutes and seconds
may be supplied in addition to the milliseconds loaded in the minor strobe register. When minor
mode is selected, a strobe signal is produced every second when the internal millisecond count in
the TFP device matches the value entered in the minor strobe register. The output of this
circuitry is capable of creating a VME bus interrupt.
Symmetricom Inc bc635VME/bc350VXI Time and Frequency Processor (Rev. E) 1-7
CHAPTER ONE
1.5.3.3 EVENT INPUT
This function allows the user to command the TFP device to monitor a hardware timing signal.
The source for the signal can be either the External Event input on the device or the output of the
Heartbeat (Periodic) mentioned earlier in this chapter. The External Event signal capture may be
set to occur on either the rising or falling edge. The Heartbeat signal capture is always on the
rising edge. When a signal occurs in the selected format, the time at which the signal occurred is
loaded into the event time registers. The capture lockout checkbox can be used to control
whether or not subsequent signals will overwrite the data in the event time registers. The output
of this circuitry is capable of creating a VME bus interrupt.
1.5.3.4 FREQUENCY OUTPUT
This function allows the user to control the frequency signal output by the TFP device. The
available frequencies are 1, 5 and 10 MHz. The default state of this output is 10MHz.
1.5.4 INTERRUPTS
This function allows the user to control the generation of VME bus interrupts by the TFP device.
If the latch event time function is enabled, the TFP will latch the time in the event time registers
when an interrupt is detected. The user may query the event time registers to see when a
particular event occurred. The latch event time function should not be enabled when external
events are selected as these already latch the time in the event registers. Three control registers
are provided to control the VME interrupts.
1.5.5 OSCILLATOR PARAMETERS
This group allows the user to select an external oscillator or the on board oscillator, in addition
to enabling/disabling disciplining and jamsyncing. If disciplining and jamsyncing are disabled,
the oscillator control DAC can be programmed to hold the oscillator control voltage to a specific
value. When the TFP is synchronized to an input time source, the oscillator will be disciplined to
the input source signal.
1.5.6 SYNC RTC TIME TO EXTERNAL TIME
This function allows the user to force the Real Time Clock (RTC) time to the board time.
1.5.7 BOARD RESET
This function allows the user to reset the TFP device. This command is useful when starting a
test or in the case that unexpected behavior is observed from the card. This function is not used
during normal operation.
1-8 bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
CHAPTER TWO
INSTALLATION AND SETUP
2.0 VME/VXI COMPATIBILITY SWITCHES
The TFP is designed for both VMEbus and VXIbus compatibility. Switches SW2-3 and SW2-4
are used to select the bus protocol. To select VXIbus compatibility set SW2-3 and SW2-4 to the
OPEN or OFF position. To select VMEbus compatibility set SW2-3 and SW2-4 to the CLOSED
or ON position.
SW1 and SW2 Location
Revision A Through Revision D
1
SW1
8
P1
1
SW2
4
P2
Figure 2-1 Address Switches
SW1 and SW2 Location
Revision H
1
SW1
8
1
4
P1
SW2
P2
Switch SW2-3 controls the register block addressing within the A16 address space. With this
switch in the VXI position, address bits A14 and A15 must be one for A16 selection. Switch
SW1 is then used to select the logical address for the module. With SW2-3 in the VME position,
the module can be mapped to any 64 byte block in the A16 address space. SW2-1 and SW2-2
set the A14 and A15 address bits, and SW1 is used to set the A13 through A6 address bits.
Switch SW2-4 controls the status/ID byte returned during interrupt acknowledge cycles. With
SW2-4 in the VXI position, the Status/ID byte returned during interrupt acknowledge cycles is
the logical address set with SW1. When SW2-4 is in the VME position, the Status/ID byte
returned during interrupt acknowledge cycles is the user programmable vector loaded into the
VECTOR register (discussed in Chapter Three).
Symmetricom Inc bc635VME/bc350VXI Time and Frequency Processor (Rev. E) 2-1
CHAPTER TWO
2.1 VMEbus BASE ADDRESS SELECTION
Base address selection for the VMEbus requires the setting of switch SW1 (A6 through A13) and
SW2 (A14 and A15). The bc635VME occupies 64 bytes in the A16 address space and can be
freely located on any 64 byte boundary. The correspondence of the switch positions to the
address bits is illustrated in Table 2-1.
Table 2-1
Address Bits Switch Positions
SW2 SW1
Address Bit A15 A14 A13 A12 A11 A10 A09 A08 A07 A06
Switch Number 2187 654321A16 address range used.
(The BASE address is
on the left side.)
Example switch
00000000000x0000 - 0x003F
settings for SW1
and SW2.
1 = OPEN or
00000000010x0040 - 0x007F
OFF
0 = CLOSED or
00000000100x0080 - 0x00BF
ON
00000000110x00C0 - 0x00FF
00000001000x0100 - 0x013F
………………………… …
………………………… …
11111110110xEFC0 - 0xFEFF
11111111000xFF00 - 0xFF3F
11111111010xFF40 - 0xFF74
To select a base address, set each of the switches to the logical zero (CLOSED or ON) or the
logical one (OPEN or OFF) state.
2.2 bc350VXI LOGICAL ADDRESS SELECTION
Logical address selection for the VXIbus requires the setting of switch SW1 (A6 through A13).
The bc350VXI occupies 64 bytes in the A16 address space and can be located at any of the 256
logical addresses within the VXIbus. The correspondence between the switch positions and the
address bits, and the logical state corresponding to a switch setting follows the description
provided in Section 2.1
2-2 bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
INSTALLATION AND SETUP
2.3 JUMPERS (DEFAULT SETTING IN BOLD TYPE)
The jumper locations for the Rev. A through Rev. F TFP versions are shown in Figure 2-2. The
Rev. G and up along with the P100004 version jumpers are shown in Figure 2-3. The jumper
blocks are not drawn to scale in order to make the numbers more visible. It may be helpful to
refer to the schematic diagrams to obtain a clearer idea of the function of each jumper option.
JP1
With the jumper in the 1-2 position the TFP is configured to use DC level shift input timecode.
In the 3-4 or open position the TFP is configured to use modulated timecode.
JP2 (GPS Option)
In the 1-2 position the TFP is configured to use a single ended 1pps GPS input. In the 3-4
position the TFP is configured to use a differential 1pps GPS input.
JP3 (GPS Option)
In the 1-2 position the TFP is configured to use the ACUTIME Smart Antenna or SV-6 as the
GPS sensor. In the 3-4 position the TFP is configured to use the TANS as the GPS sensor.
The ACUTIME, SV-6, and TANS are GPS sensor options that are available from Symmetricom,
Inc. This jumper is not present on the P100004 model boards.
JP4
The jumpers in the JP4 group are designed to be moved as a pair. Positions 3-4 and 5-6 define
one configuration, and positions 1-2 and 7-8 define a second configuration. In the default
configuration the TFP is configured with an auxiliary RS-422 output. In the second
configuration the TFP is configured in a daisy-chain mode (the RS-422 input is jumpered to the
RS-422 output). This jumper set is intended to be used in a digital synchronization mode. At the
present time this mode has not been implemented. This jumper is not present on the P100004
model boards.
JP5
In the 1-2 position this jumper places a “100Ω” load between the RS-422 input lines. In the 3-4
position the “100Ω” load is bypassed. When the TFP is the terminal device on an RS-422 daisy
chain the load should be used. When the TFP is not at the end of the chain the load should be
omitted.
JP6
In the 1-2 position this jumper places GROUND on P2 pin C12. In the 2-3 position the 1, 5,
10MHz clock is driven out of P2 pin C12. On the model P100004 boards, this jumper is
implemented as a 2x2 pin block. A shunt on pins 2 and 4 enables the 10MHz output on P2 pin
C12. A shunt on pins 1 and 2 disables the output by grounding P2 pin C12.
Symmetricom Inc bc635VME/bc350VXI Time and Frequency Processor (Rev. E) 2-3
CHAPTER TWO
Jumper Location
Revision A and Revision B
1
34
1
34
2
JP2
2
JP1
P1
P2
Jumper Location
Revision D Through Revision F
JP2
JP1
JP3
2
1
34
1
34
2
2
1
34
1
34
1
34
2
JP5
2
JP4
P1
P2
Jumper Location
Revision G and Up
1 2
34
JP2
1
34
JP1
1
34
JP3
1
34
1
34
2
123
JP6
2
Figure 2-2 Jumper Locations I
2
JP5
2
JP4
P1
P2
Jumper Location
P100004 Models
1 2
34
JP2
1
34
JP1
1 2
34
2
1
34
JP5
P1
2
JP6
P2
Figure 2-3 Jumper Locations II
2-4 bc635VME/bc350VXI Time and Frequency Processor (Rev. E) Symmetricom Inc
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