Supermicro X11SPA-T operation manual

X11SPA-TF

X11SPA-T

USER'S MANUAL

Revision 1.0a

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The manufacturer

!

assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment
to update or to keep current the information in this manual, or to notify any person or organization of the updates.

Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE,
SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING,
REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

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State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: This product can expose you to chemicals including
lead, known to the State of California to cause cancer and birth
defects or other reproductive harm. For more information, go
to www.P65Warnings.ca.gov.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0a

Release Date: June 14, 2019

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2019 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11SPA-TF/-T motherboard.

About This Motherboard

The Supermicro X11SPA-TF/-T supports a single Intel® Xeon® Scalable-SP series processor
(Socket LGA 3647) with up to 28 cores and a thermal design power (TDP) of up to 205W.
Built with the Intel PCH C621 chipset, the X11SPA-TF/-T supports 6-channel, 12-DIMM
DDR4 ECC RDIMM/LRDIMM memory with speeds of up to 2933 MHz, four M.2 PCI-E 3.0
x4 slots, three RJ45 ports (two RJ45 LAN ports and one IPMI LAN port), and a Trusted
Platform Module (TPM) header. The X11SPA-TF/-T is optimized for high-performance and
high-end computing platforms that address the needs of next generation server applications.
Please note that this motherboard is intended to be installed and serviced by professional
technicians only. For processor/memory updates, please refer to our website at http://www.

supermicro.com/products/.

Notes: 1. X11SPA-TF supports 2nd Generation Intel Xeon Scalable-SP
(82xx/62xx/52xx/42xx/32xx series) processors. X11SPA-T supports 2nd Gen Intel
Xeon Scalable-SP (82xx/62xx/52xx/42xx/32xx series) and Intel Xeon W-32xx series
processors. 2. 2933 MHz memory is supported by 2nd Gen Intel Xeon Scalable-SP
(82xx/62xx series) processors only.

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and to prevent

damage done to the components or injury to yourself:

Warning! Indicates important information given to prevent equipment/property damage

or personal injury.

Warning! Indicates high voltage may be encountered while performing a procedure.

Important: Important information given to ensure proper system installation or to

relay safety precautions.

Note: Additional Information given to differentiate various models or provides infor­mation for proper system setup.

3

Super X11SPA-TF/-T User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Table of Contents

Table of Contents

Chapter 1 Introduction

1.1 Checklist ...............................................................................................................................7

1.2 Processor and Chipset Overview .......................................................................................17

1.3 Special Features ................................................................................................................18

1.4 System Health Monitoring ..................................................................................................18

1.5 ACPI Features ....................................................................................................................19

1.6 Power Supply .....................................................................................................................20

1.7 Serial Port ...........................................................................................................................20

1.8 Intel Optane DC Peristent Memory Overview ....................................................................20

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................21

2.2 Processor and Heatsink Installation ...................................................................................22

2.3 Motherboard Installation .....................................................................................................30

2.4 Memory Support and Installation .......................................................................................32

2.5 M.2 SSD Installation ...........................................................................................................39

2.6 Rear I/O Ports ....................................................................................................................42

2.7 Front Control Panel ............................................................................................................47

2.8 Connectors .........................................................................................................................52

2.9 Jumper Settings .................................................................................................................63

2.10 LED Indicators ...................................................................................................................67

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................70

3.2 Technical Support Procedures ...........................................................................................74

3.3 Frequently Asked Questions ..............................................................................................75

3.4 Battery Removal and Installation .......................................................................................76

3.5 Returning Merchandise for Service ....................................................................................77

Chapter 4 UEFI BIOS

4.1 Introduction .........................................................................................................................78

4.2 Main Setup .........................................................................................................................79

4.3 Advanced Setup Congurations .........................................................................................81

4.4 Event Logs .......................................................................................................................136

4.5 IPMI ..................................................................................................................................138

5

Super X11SPA-TF/-T User's Manual

4.6 Security .............................................................................................................................141

4.7 Boot .................................................................................................................................145

4.8 Save & Exit .......................................................................................................................148

Appendix A BIOS Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................152

B.2 SuperDoctor® 5 ................................................................................................................153

Appendix C Standardized Warning Statements

Battery Handling ..............................................................................................................154

Product Disposal .............................................................................................................156

Appendix D UEFI BIOS Recovery

D.1 Overview ...........................................................................................................................157

D.2 Recovering the UEFI BIOS Image ...................................................................................157

D.3 Recovering the BIOS Block with a USB Device ..............................................................158

Appendix E Conguring VROC RAID Settings

E.1 All Intel® VMD Controllers Features ................................................................................162

E.2 Conguring RAID Settings ...............................................................................................169

E.3 Use of Journaling Drive ....................................................................................................182

Appendix F Secure Boot Settings

F.1 Boot mode select Feature ................................................................................................186

F.2 Secure Boot/ Secure Boot Mode/ CSM Support Features ..............................................187

F.3 Secure Boot Settings .......................................................................................................188

F.4 Key Management Settings ...............................................................................................191

Appendix G Conguring iSCSI Settings

G.1 PCIe/PCI/PnP Features ....................................................................................................208

G.2 Conguring iSCSI Settings ...............................................................................................211

Appendix H Conguring Network Interface Card (NIC) Settings

H.1 Network Interface Card (NIC) Settings ............................................................................230

6

Chapter 1: Introduction

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.

In addition to the motherboard, several important parts that are included in the retail box are
listed below. If anything listed is damaged or missing, please contact your retailer.

1.1 Checklist

Main Parts List

Description Part Number Quantity

Supermicro Motherboard X11SPA-TF/-T 1

I/O Shield MCP-260-00042-0N 1

SATA Cables CBL-0044L 6

GPU to CPU Power Cable CBL-PWEX-0663 1

Quick Reference Guide MNL-2173-QRG 1

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: https://www.supermicro.com/wftp/driver/

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website

for possible updates to the manual revision level.

7

Super X11SPA-TF/-T User's Manual

Figure 1-1. X11SPA-TF/-T Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB revision

available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

8

Chapter 1: Introduction

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

CPU SLOT2 PCI-E 3.0 x8

CPU SLOT3 PCI-E 3.0 x16

Figure 1-2. X11SPA-TF Motherboard Layout

(not drawn to scale)

C

Universal ID

A

UID-SWUID-LED

JPAC1

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

AUDIO FP

CPU SLOT6 PCI-E 3.0 x8

CPU SLOT7 PCI-E 3.0 x16

JPWR4

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

HD AUDIO

FAN D

FAN C

JPL2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

USB6/7 (3.0)
USB3.1 Gen.1
IPMI_LAN

VGA
COM1

USB3.1 Gen.2
LAN1

JPL1

FAN6

FAN5

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

JP5

FAN4

12V_PUMP_PWR1

BAR CODE

J9702

J9701

JOH1-OH

JWD1

RAID Key Header

JL1

JPG1

JPME2

COM2

JD1

JTPM1

C

LE5

C

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

I-SATA1 I-SATA3
I-SATA0

JRK1

1

LE6

A

M.2-C03

M.2-C02

A

Intel C621

I-SATA5

I-SATA2 I-SATA4

I-SATA7
I-SATA6

JSD1

I-SGPIO2

PEX8747

I-SGPIO1

FAN B FAN A

PLX

(3.0)USB2/3

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

USB0/1

LE3

A

C

USB3.1 Gen.2

FAN3

JPI2C1

JP4

USB10 (3.1)
USB3.1 Gen.2

(3.1)USB11

FAN2

FAN1

JSTBY1

JF1

LEDPWR

A

C

IPMI

JPWR2

JIPMB1

BATTERY

JPWR1

+

Note: Components not documented are for internal testing only.

9

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

Quick Reference

SLOT3

SLOT2

LEDBMC

SLOT1

JSPDIF_OUT

JPAC1

SLOT4

AUDIO FP

SLOT6

SLOT5

UID-LED

SLOT7

JPWR4

Universal ID

UID-SW

C

A

UID-SWUID-LED

HD AUDIO

FAN C

FAN D

JPL2

USB4/5
(3.1 Gen1)
LAN2

USB6/7
(3.1 Gen1)

IPMI_LAN

VGA
COM1

USB8/9
(3.1 Gen2)
LAN1

M.2-C04
PCI-E 3.0 x4

J9701/J9702

JL1

JOH1-OH

JPG1
JPME2

M.2-C03
PCI-E 3.0 x4

M.2-C02
PCI-E 3.0 x4

JSD1

Notes:

LE6

JWD1

LE5

COM2

LE4

JD1

JTPM1

JSD2

JRK1

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

JSD2

JRK1

RAID Key Header

I-SATA1
I-SATA0

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

LE5

C

A

PCI-E 3.0 x4

M.2-C03

LE4

A

C

M.2-C02

PCI-E 3.0 x4

I-SATA1 I-SATA3
I-SATA0

1

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

I-SATA2 I-SATA4

I-SATA3
I-SATA2

I-SATA5
I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

I-SATA7
I-SATA6

I-SGPIO2

JPAC1

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SATA7
I-SATA6

I-SGPIO2

FAN B FAN A

FAN B

CPU SLOT6 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

FAN A

I-SGPIO1

USB2/3
(3.1 Gen1)

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

USB0/1

USB10

(3.1 Gen2)
USB11
(3.1 Gen2)

M.2-C01
PCI-E 3.0 x4

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

FAN2

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

JSTBY1

FAN2

FAN1

FAN1

JSTBY1

LE3

LEDPWR

C

JF1

JF1

VGA
COM1

A

JPWR2

LEDPWR

JPWR2

USB3.1 Gen.2
LAN1

FAN6

JIPMB1

IPMI

JIPMB1

JPUSB1

(3.1)USB8/9

JPWR3

JPL1

FAN5

JPUSB1

JPWR3
JPL1
FAN6

JVRM1

FAN5

JP5

JP5

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

FAN4

FAN4
12V_PUMP_PWR1

12V_PUMP_PWR1

CPU

FAN3

FAN3
DIMMD2
DIMMD1
DIMME2

DIMME1
DIMMF2

JPI2C1

DIMMF1

BATTERY

JPWR1

+

JPI2C1
JP4

BATTERY
JPWR1

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-

nections.

• " " indicates the location of Pin 1.

• Jumpers/LED indicators not indicated are used for testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

10

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

J9701, J9702 Manufacturing Mode Pins 1-2 (Normal)

JPAC1 Audio Enable/Disable Pins 1-2 (Enabled)

JPG1 VGA Enable/Disable Pins 1-2 (Enabled)

JPL1, JPL2 LAN1/LAN2 Enable/Disable Pins 1-2 (Enabled)

JPME2 Intel Manufacturing Mode Pins 1-2 (Normal)

JWD1 Watch Dog Function Enable Pins 1-2 (Reset)

LED Description Status

LE3, LE4, LE5, LE6 M.2 LED Blinking Green: Device Working

LEDBMC BMC Heartbeat LED Blinking Green: BMC Normal

LEDPWR Onboard Power LED Solid Green: Power On

UID-LED Unit Identier (UID) LED Blue on: Unit Identied

Connector Description

12V_PUMP_PWR1 12V 4-pin power connector for CPU liquid cooling pump

AUDIO FP Front Panel Audio Header

BATTERY Onboard Battery

COM1, COM2 COM1: COM Port (Back Panel), COM2: COM Header

PCI-Express x16 Slots

CPU SLOT1/3/5/7 PCI-E 3.0 x16

CPU SLOT2/4/6 PCI-E 3.0 x8 (in x16) PCI-Express x16 Slots (PCI-Express x8 link)

FAN1 ~ FAN6 CPU Fan Headers

FAN A ~ FAN D

HD AUDIO Back Panel High Denition Audio Ports

IPMI_LAN

I-SATA0 ~ 7 Intel Serial ATA (SATA 3.0) Ports 0~7 (6Gb/sec)

I-SGPIO1, I-SGPIO2 Serial General Purpose I/O Headers

JD1 Speaker/Power LED Indicator

JF1 Front Control Panel Header

JIPMB1 4-pin External I2C Header (for an IPMI card)

JL1 Chassis Intrusion Header

JOH1-OH Overheat LED Indicator

JP4, JP5 JP4: Enable/Disable USB10/11, JP5: Enable/Disable USB8/9

JPI2C1 Power Supply SMBus I2C Header

JPUSB1 Enable/Disable USB6/7 WakeUp

JPWR1/3/4 +12V 8-pin CPU Power Connectors (Required)

JPWR2 24-pin ATX Main Power Connector (Required)

*PCI-E SLOT1 will change to PCI-Express x8 link when either M.2-C03 or M.2-C04 is populated with an
SSD. PCI-E SLOT1 will be completely disabled when either M.2-C01 or M.2-C02 is populated with an SSD.

System Fan Headers

*The initial system fan speed must not be lower than 600 RPM.

Dedicated IPMI LAN Port

*For IPMI support, X11SPA-TF is via SPS, whereas X11SPA-T is via ME.

Note: The table above is continued on the next page.

11

Super X11SPA-TF/-T User's Manual

Connector Description

JRK1

JSD1, JSD2 SATA DOM (Disk-On-Module) Power Connectors

JSPDIF_OUT Sony/Philips Digital Interface (S/PDIF) Out Header

JSTBY1 Standby Power Header (5V)

JTPM1 Trusted Platform Module (TPM) Header

LAN1, LAN2 RJ45 1GbE/10GbE LAN Ports

PCI-E M.2-C01/C02/C03/C04 PCI-E 3.0 x4

UID-SW Unit Identier (UID) Switch

USB0/1 Front Access USB 2.0 Header

USB2/3 Front Access USB 3.1 Gen1 Header

USB4/5, USB6/7

USB8/9 Back Panel USB 3.1 Gen2 Ports

USB10/11 Front Access USB 3.1 Gen2 Headers (USB10: Type A, USB11: Type C)

VGA VGA Port

Intel RAID Key Header

*A VROC hardware key is required to enable an M.2 RAID card.

PCI-E M.2 Connectors (Small form factor devices and other portable devices for
high speed NVMe SSDs)

Back Panel USB 3.1 Gen1 Ports

*X11SPA-TF/-T does not support S3 or S4.
*Either U SB4/5 or US B6/7 will su pport sta ndby power.

12

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

•

Supports a single Intel Xeon Scalable-SP series processor with up to 28 cores and a thermal design power (TDP) of up

to 205W

Notes: 1. The X11SPA-TF/-T does not support FPGA or Fabric processors. 2. X11SPA-TF supports 2nd Gen Intel

Xeon Scalable-SP (82xx/62xx/52xx/42xx/32xx series) processors. X11SPA-T supports 2nd Gen Intel Xeon Scalable-

SP (82xx/62xx/52xx/42xx/32xx series) and Intel Xeon W-32xx series processors.

Memory

•

Up to 768GB of RDIMM, 3TB of 3DS RDIMM, 1.5TB of LRDIMM, and 3TB of 3DS LRDIMM DDR4 (288-pin) ECC memory

with speeds of up to 2933 MHz (2DPC) in twelve memory slots. (1DPC and 2DPC are recommended for memory

installation. Only selected 2nd Gen Intel Xeon Scalable-SP processors support Intel DC Persistent memory.)

Note: Memory speed support depends on the processors used in the system. 2933 MHz memory is supported by

the 2nd Gen Intel Xeon Scalable-SP (82xx/62xx series) processors only.

DIMM Size

• Up to 128GB at 1.2V

Note: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

•

Intel PCH C621

Expansion Slots

Four (4) PCI-Express 3.0 x16 Slots (CPU SLOT1, 3, 5, 7)

•

• Three (3) PCI-Express 3.0 x8 Slots (IN x16) (CPU SLOT2, 4, 6)

• Four (4) M.2 PCI-Express 3.0 x4 Slots (Supports M-Key 2280 and 22110)

Network

•

Intel X557 10G PHY

• Intel Ethernet Controller X722 for 10G BASE-T Ports

• One (1) Dedicated IPMI LAN located on the rear I/O panel

Baseboard Management Controller (BMC)

•

ASPEED AST2500 BMC

Graphics

•

Graphics controller via ASPEED AST2500 BMC

Note: The table above is continued on the next page.

13

Super X11SPA-TF/-T User's Manual

Motherboard Features

I/O Devices

•

Serial (COM) Port

• SATA 3.0 • Eight (8) SATA 3.0 ports at 6 Gb/s (I-SATA0~7 with RAID 0, 1, 5, 10)

• Video (VGA) Port • One (1) VGA connection on the rear I/O panel

Peripheral Devices

•

Two (2) front accessible USB 2.0 connections via one header (USB0/1)

• Two (2) front accessible USB 3.1 Gen1 connections via one header (USB2/3)

• Four (4) USB 3.1 Gen1 ports on the rear I/O panel (USB4/5, USB6/7)

• Two (2) USB 3.1 Gen2 ports on the rear I/O panel (USB8/9)

• Two (2) front accessible USB 3.1 Gen2 headers (USB10: Type A, USB11: Type C)

BIOS

•

256Mb AMI BIOS® SPI Flash BIOS

• ACPI 6.0, Plug and Play (PnP), BIOS rescue hot-key, riser card auto detection support, and SMBIOS 3.0 or later

• One (1) serial port on the rear I/O panel (COM1)

• One (1) front accessible serial port header (COM2)

Power Management

•

ACPI power management

• Power button override mechanism

• Power-on mode for AC power recovery

• Wake-on-LAN

• Power supply monitoring

System Health Monitoring

•

Onboard voltage monitoring for +12V, +5V, +3.3V, CPU, Memory, VBAT, +5V stdby, +3.3V stdby, +1.8V PCH, +1.05V

PCH, +1.0V PCH, CPU temperature, VRM temperature, LAN temperature, PCH temperature, system temperature, and

memory temperature

• 6 CPU switch phase voltage regulator

• CPU thermal trip support

• Platform Environment Control Interface (PECI)/TSI

Fan Control

•

Fan status monitoring via IPMI connections

• Single cooling zone

• Multi-speed fan control via onboard BMC

• Ten (10) 4-pin fan headers and one (1) 12V pump connector

System Management

•

Trusted Platform Module (TPM) support

• SuperDoctor® 5

• Chassis Intrusion header and detection

• Server Platform Service

Note: The table above is continued on the next page.

14

LED Indicators

Onboard Power LED

•

• UID LED

• BMC Heartbeat LED

• M.2 LED

Dimensions

•

13" (W) x 12" (L) EATX

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Chapter 1: Introduction

Motherboard Features

Note 3: If you purchase a Supermicro Out of Band (OOB) software license key

(Supermicro P/N: SFT-OOB-LIC), please DO NOT change the IPMI MAC address.

Note 4: X11SPA-T does not support Out of Band (OOB) ash BIOS.

Note 5: It is strongly recommended that you change BMC login information upon the

initial system power-on. The manufacture default username is ADMIN and the password

is ADMIN. For proper BMC conguration, please refer to https://www.supermicro.com/

products/nfo/les/IPMI/Best_Practices_BMC_Security.pdf.

15

Super X11SPA-TF/-T User's Manual

VPP (2.625) 5v
VDDQ (1.2) 12v

4 x M.2 SOCKET SSD

SLOT 6

PCI-E x8

IT8898*4

PCI-E x16

SLOT 7

RJ45(+U30*2)

RJ45(+U31*2)

LAN3
RTL8211FD-CG

DDR4

BMC Boot Flash

Temp Sensor
W83773G local and remote at SMBUS

RGRMI I

SPI

VGA CONN

VTT_M (0.6)

SLOT 2 SLOT 3 SLOT 4 SLOT 5

x8

x8

LAN2

LAN1 Springville i210AT

BMC
AST2500

COM1
Connector

SYSTEM POWER

FAN SPEED CTRL

Front Panel

PEX8747

IT8898*8

x8x8x8

AQC107(10Gb)

COM2
Header

x4 x4 x4 x4

IT8898*8

PCI-E x16

SLOT 1

x16

x8 x8

PCI-E x8 PCI-E x16 PCI-E x8

x8

x8

Figure 1-3.

System Block Diagram

VR13

VCCP0 12V

6+1+1 PHASE
205W

PCI-E x16 G3

x16

PCI-E x16 G3

x8

PCI-E x16 G3

PCI

-E

x16

PCI-E x4 G2

PCI-E x1 G2

-E

x1 G2

PCI

USB 2.0

ESPI

ESPI

Header

SPI (Reserved)

INTEL LGA3647

(Socket-P0)

DMI3

#8-11

#6

PCH

#5

C621

#14

SPI

Switch

SPI

TPM Header
Debug Card

BIOS

2133/2666 (2933) MHz

2133/2666 (2933) MHz

2133/2666 (2933) MHz

2133/2666 (2933) MHz

2133/2666 (2933) MHz

2133/2666 (2933) MHz

6.0 Gb/s

AZALIA

USB 2.0

PCI

-E

#0-3

-E

PCI

ASM2142/3142 USB3.1

DDR4 (CHA)

DDR4 (CHB)

DDR4 (CHC)

DDR4 (CHD)

DDR4 (CHE)

DDR4 (CHF)

#6

#5

#4

#3

#2

#1

#0

SATA

eSPI

x2 G2

x2 G2

NCT6796D
LPC I/O

Realtek ALC888S

Front USB 2.0 x2

#6

Rear USB 3.0 *2 (RTL)

#5

#4

Front USB 3.0 *2

#3

ASM2142/3142 USB 3.1

DIMMA1

DIMMA2

DIMMB1

DIMMB2

DIMMC1

DIMMC2

DIMMD1

DIMMD2

DIMME1

DIMME2

DIMMF1

DIMMF2

#7

#2

Rear USB 3.0 *2 (AQC)

#1

USB 3.1 Type A (Rear)

ASM1543

1 X USB Type A (Front)

ASM1543

USB 3.1 Type C
(Rear)

USB 3.1 Type C
(Front)

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

16

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel Xeon SP series (Socket P0-LGA3647)

processor and the Intel PCH C621 chipset, the X11SPA-TF/-T motherboard provides system

performance, power efciency, and feature sets to address the needs of next-generation

computer users.

With the support of the new Intel Microarchitecture 14nm Process Technology, the
X11SPA-TF/-T dramatically increases system performance for a multitude of server
applications.

The Intel PCH C621 chipset provides Enterprise SMBus support, including the following
features:

• DDR4 288-pin memory support

• Support for Management Engine (ME)

• Support of SMBus speeds of up to 400KHz for BMC connectivity

• Improved I/O capabilities to high-storage-capacity congurations

• SPI Enhancements

• Intel Node Manager 3.0 for advanced power monitoring, capping, and management for

BMC enhancement (see note below).

• BMC supports remote management, virtualization, and the security package for enterprise

platforms

Note: Node Manager support depends on the power supply used in your system.

Features Supported by Intel Xeon Scalable-SP Processors

Intel Xeon Scalable-SP processors support the following features:

• Intel AVX-512 instriction support to handle complex workloads

• 1.5x memory bandwidth increased to 6 channels

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Rich set of available IOs with increased PCI-E lanes (48 lanes)

• Integrated Intel Ethernet Connection X722 with iWARP RDMA

17

Super X11SPA-TF/-T User's Manual

New Features Supported by the 2nd Gen Intel Xeon Scalable-SP Processors

The 2nd Gen Intel Xeon Scalable-SP processors support the following features:

• Higher performance for a wider range of workloads with per-core performance increase

• Support of Optane

large capacity

TM

DC Persistnet Memory (DCPMM) with affordable, persistnet, and

• Up to 2933 MHz memory supported (Refer to Section 1.8 for more details.)

• Vector Neutral Network Instruction (VNNI) support for Accelerate Deep Learning & Articial

Intelligence (AI) workloads

• Speed Select Technology provides multiple CPU proles that can be set in the BIOS (This

feature is available on selected CPU SKUs).

• Seamless hardware security mitigations & performance/frequency exibility

Note: DCPMM memory and 2933 MHz memory are supported by 2nd Gen Intel Xeon
Scalable-SP processsors only.

1.3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

1.4 System Health Monitoring

Onboard Voltage Monitors

An onboard voltage monitor will scan the voltages of the onboard chipset, memory, CPU,
and battery continuously. If a voltage becomes unstable, a warning will be given, or an error

message will be sent to the screen. The user can adjust the voltage thresholds to dene the

sensitivity of the voltage monitor.

18

Chapter 1: Introduction

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors monitor temperatures and voltage settings of onboard processors
and the system in real time via the IPMI interface. Whenever the temperature of the CPU or

the system exceeds a user-dened threshold, system/CPU cooling fans will be turned on to

prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, be sure to provide adequate airow to

your system.

System Resource Alert

This feature is available when used with SuperDoctor 5 in the Windows® OS or in the Linux®
environment. SuperDoctor is used to notify the user of certain system events. For example,

you can congure SuperDoctor to provide you with warnings when system temperatures,
CPU temperatures, voltages, or fan speeds go beyond a predened range.

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system, including its hardware, operating
system, and application software. This enables the system to automatically turn on and off
peripherals such as CD-ROMs, network cards, hard disk drives, and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play, and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures,

while providing a processor architecture-independent implementation that is compatible with
Windows 2012/R2 and Windows 2016 operating systems.

19

Super X11SPA-TF/-T User's Manual

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates where
noisy power transmission is present.

The X11SPA-TF/-T motherboard accommodates a 24-pin ATX power supply. Although most

power supplies generally meet the specications required by the CPU, some are inadequate.

In addition, two 12V 8-pin power connections (JPWR1/ JPWR3) are also required to ensure
adequate power supply to the system.

Warning: To prevent damage to the power supply and the motherboard, please use
power supplies that contain 24-pin and 8-pin power connectors. Be sure to connect the
power supplies to the 24-pin power connector (JPWR2) and the 8-pin power connec­tor (JPWR1/ JPWR3/ JPWR4) when more than four of the PCI-E slots are populated.
Failure in doing so may void the manufacturer warranty on your power supply and
motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX power

supply Specication 2.02 or above. It must also be SSI compliant. For more information,

please refer to the website at http://www.ssiforum.org/.

1.7 Serial Port

The X11SPA-TF/-T motherboard supports two serial communication connections. COM port
(COM1) and header (COM2) can be used for input/output. The UART provides legacy speeds
with a baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250
K, 500 K, or 1 Mb/s, which support high-speed serial communication devices.

1.8 Intel Optane DC Peristent Memory Overview

Intel 2nd Generation Xeon Scalabale SP processors support new DCPMM (OptaneTM DC
Persistnet Memory Modules) technology that offers data persistence with higher capacity
than existing memory modules and lower latency than NVMe SSDs. DCPMM memory

provides hyper-speed storage capacity for high performance computing platform with exible
conguration options.

20

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your
system board, it is important to handle it very carefully. The following measures are generally

sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the motherboard by its edges only; do not touch its components, peripheral chips,

memory modules, or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your computer chassis provides excellent conduc-

tivity between the power supply, the case, the mounting fasteners, and the motherboard.

• Use only the correct type of onboard CMOS battery. Do not install the onboard battery

upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

21

Super X11SPA-TF/-T User's Manual

2.2 Processor and Heatsink Installation

The processor (CPU) and processor carrier should be assembled together rst to form

the processor carrier assembly. This will be attached to the heatsink to form the processor
heatsink module (PHM) before being installed onto the CPU socket.

Notes:

• Use ESD protection.

• Unplug the AC power cord from all power supplies after shutting down the system.

• Check that the plastic protective cover is on the CPU socket and none of the socket pins

are bent. If they are, contact your retailer.

• When handling the processor, avoid touching or placing direct pressure on the LGA lands

(gold contacts). Improper installation or socket misalignment can cause serious damage

to the processor or CPU socket, which may require manufacturer repairs.

• Thermal grease is pre-applied on a new heatsink. No additional thermal grease is needed.

• Refer to the Supermicro website for updates on processor support.

• All graphics in this manual are for illustrations only. Your components may look different.

The Intel Xeon SP Series Processor

Non-Fabric Model

22

Chapter 2: Installation

Overview of the Processor Carrier Assembly

The processor carrier assembly contains the Intel Xeon Non-Fabric (Non-F) processor and
a processor carrier.

1. Non-F Processor

2. Processor Carrier

Overview of the CPU Socket

The CPU socket is protected by a plastic protective cover.

1. Plastic Protective Cover

2. CPU Socket

23

Super X11SPA-TF/-T User's Manual

Overview of the Processor Heatsink Module

The Processor Heatsink Module (PHM) contains a heatsink, a processor carrier, and the
Intel Xeon Non-Fabric (Non-F) processor.

1. Heatsink with Thermal Grease

2. Processor Carrier

3. Non-F Processor

Processor Heatsink Module

Bottom View

24

Chapter 2: Installation

Creating the Non-F Model Processor Carrier Assembly

To install a Non-F model processor into the processor carrier, follow the steps below:

1. Hold the processor with the LGA lands (gold contacts) facing up. Locate the small, gold
triangle in the corner of the processor and the corresponding hollowed triangle on the
processor carrier. These triangles indicate pin 1. See the images below.

2. Using the triangles as a guide, carefully align and place Point A of the processor into

Point A of the carrier. Then gently ex the other side of the carrier for the processor to t

into Point B.

3. Examine all corners to ensure that the processor is rmly attached to the carrier.

CPU (Upside Down)
with CPU LGA Lands up

Align Point A of the CPU and
Point A of the Processor Carrier

Align CPU Pin 1

B

Align Point B of the CPU and
Point B of the Processor Carrier

A

Pin 1

B

A

Processor Carrier
(Upside Down)

Allow carrier to
latch onto CPU

B

A

Allow carrier to
latch onto CPU

Processor Carrier Assembly (Non-F Model)

Pin 1

25

Super X11SPA-TF/-T User's Manual

Assembling the Processor Heatsink Module

After creating the processor carrier assembly for the Non-F model processor, mount it onto
the heatsink to create the processor heatsink module (PHM):

1. Note the label on top of the heatsink, which marks the heatsink mounting holes as 1,
2, 3, and 4. If this is a new heatsink, the thermal grease has been pre-applied on the
underside. Otherwise, apply the proper amount of thermal grease.

2. Turn the heatsink over with the thermal grease facing up. Hold the processor carrier
assembly so the processor's gold contacts are facing up, then align the triangle on the
assembly with hole 1 of the heatsink. Press the processor carrier assembly down. The
plastic clips of the assembly will lock outside of holes 1 and 2, while the remaining clips
will snap into their corresponding holes.

3. Examine all corners to ensure that the plastic clips on the processor carrier assembly

are rmly attached to the heatsink.

Triangle on the CPU

Triangle on the
Processor Carrier

Plastic clips 1 and 2 lock
outside the heatsink’s
mounting holes

Non-Fabric Processor Carrier Assembly

(Upside Down)

Heatsink

(Upside Down)

2

2

1

1

Remaining plastic clips snap

into the other corner holes

2

1

of the heatsink

26

Chapter 2: Installation

Preparing the CPU Socket for Installation

This motherboard comes with a plastic protective cover installed on the CPU socket. Remove
it from the socket to install the Processor Heatsink Module (PHM). Gently pull up one corner
of the plastic protective cover to remove it.

CPU Socket with Plastic Protective Cover

Remove the plastic protective

cover from the CPU socket.

Do not touch or bend

the socket pins.

Socket Pins

27

Super X11SPA-TF/-T User's Manual

Installing the Processor Heatsink Module

After assembling the Processor Heatsink Module (PHM), install the PHM onto the CPU socket:

1. Align hole 1 of the heatsink with the printed triangle on the CPU socket. See the left
image below.

2. Make sure all four holes of the heatsink are aligned with the socket before gently placing
the heatsink on top.

3. With a T30 Torx-bit screwdriver, gradually tighten screws #1 - #4 to ensure even
pressure. The order of the screws is shown on the label on top of the heatsink. To
avoid damaging the processor or socket, do not use a force greater than 12 lbf-in when
tightening the screws.

4. Examine all corners to ensure that the PHM is rmly attached to the socket.

Oval C

Oval D

Small Guide Post

Large Guide Post

Printed Triangle

Mounting the Processor Heatsink Module
onto the CPU socket (on the motherboard)

#1

Use a torque
of 12 lbf-in

T30 Torx Screwdriver

#4

#2

#3

Tighten the screws in
the sequence of 1, 2, 3, 4

28

Chapter 2: Installation

Removing the Processor Heatsink Module

Before removing the processor heatsink module (PHM) from the motherboard, unplug the AC
power cord from all power supplies after shutting down the system. Follow the steps below
to remove the processor heatsink module:

1. Use a T30 Torx-bit screwdriver to loosen the four screws in a backwards sequence of
#4, #3, #2, and #1.

2. Gently lift the PHM upwards to remove it from the socket.

#1

Remove the screws in

the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

29

Super X11SPA-TF/-T User's Manual

2.3 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.

Tools Needed

Phillips

Screwdriver

(1)

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

M.2-C04
PCI-E 3.0 x4

BAR CODE

A

C

LE6

J9702

J9701

LE5

C

A

PCI-E 3.0 x4

M.2-C03

LE4

A

C

M.2-C02

PCI-E 3.0 x4

I-SATA1 I-SATA3
I-SATA0

1

Intel C621

I-SATA2 I-SATA4

JOH1-OH

JWD1

RAID Key Header

JTPM1

JL1

JD1

JPG1

JPME2

COM2

JSD2

JRK1

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

I-SATA7
I-SATA6

JPAC1

JSPDIF_OUT

JSD1

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

I-SGPIO2

I-SGPIO1

FAN B FAN A

Phillips Screws

(10)

C

Universal ID

A

UID-SWUID-LED

AUDIO FP

JPWR4

CPU SLOT6 PCI-E 3.0 x8

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

PLX

PEX8747

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

C

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

USB3.1 Gen.2

HD AUDIO

FAN D

(3.1)USB11

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

Standoffs (10)

Only if Needed

VGA

LEDPWR

C

COM1

A

JPWR2

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

JSTBY1

FAN2

JF1

FAN1

JPUSB1

(3.1)USB8/9

USB3.1 Gen.2

LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

Location of Mounting Holes

Notes: 1. To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lbf-in on each mounting screw during motherboard installation.

2. Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

30

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the back of the chassis, if applicable.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a pan head #6 screw into a mounting hole on the
motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or components might
look different from those shown in this manual.

31

Super X11SPA-TF/-T User's Manual

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules.

Important: Exercise extreme care when installing or removing DIMM modules to pre-

vent any possible damage.

Memory Support

The X11SPA-TF/-T supports up to 768GB of ECC RDIMM, 3TB of 3DS RDIMM, 1.5TB
of LRDIMM, and 3TB of 3DS LRDIMM DDR4 (288-pin) ECC memory with speeds of up
to 2933MHz in 12 memory slots. Refer to the tables below for the recommended DIMM
population order and additional memory information. (1DPC and 2DPC are recommended
for memory installation. Only selected 2nd Gen Intel Xeon Scalable-SP processors support
Intel DC Persistent memory.)

Note: 2933 MHz memory is supported by 2nd Generation Intel Xeon Scalable-SP
(82xx/62xx series) processors only.

Memory Installation Sequence

Memory modules for this motherboards are populated using the "Fill First" method. The blue

memory slot of each channel is considered the "rst DIMM module" of the channel, and the

black slot, the second module of the channel. When installing memory modules, be sure to

populate the blue memory slots rst, and then the black slots. To maximize memory capacity

and performance, please populate all DIMM slots on the motherboard, including all blue and
black slots.

General Memory Population Requirements

1. Be sure to use the memory modules of the same type and speed on the motherboard.
Mixing of memory modules of different types and speeds is not allowed.

2. Using unbalanced memory topology such as populating two DIMMs in one channel while
populating one DIMM in another channel on the same motherboard will result in reduced
memory performance.

3. Populating memory slots with a pair of DIMM modules of the same type and size will
result in interleaved memory, which will improve memory performance.

32

Chapter 2: Installation

DDR4 Memory Support for the 81xx/61xx/51xx/41xx/31xx
Platform

DDR4 Memory Support

Type

RDIMM SRx4 4GB 8GB 2666 2666 2666

RDIMM SRx8 8GB 16GB 2666 2666 2666

RDIMM DRx8 8GB 16GB 2666 2666 2666

RDIMM DRx4 16GB 32GB 2666 2666 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666 2666

LRDIMM QRx4 32GB 64GB 2666 2666 2666

LRDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666 2666

LRDIMM 3Ds 8Rx4 N/A 4H-128GB 2666 2666 2666

Ranks Per

DIMM & Data

Width

DIMM Capacity (GB)

DRAM Density

4Gb* 8Gb 1.2 V 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Channel

1 Slot Per Channel 2 Slots Per Channel

1DPC (1-DIMM

Per Channel)

(DPC)

1DPC (1-DIMM Per

Channel)

2DPC (2-DIMM Per

Channel)

DDR4 Memory Support for the 82xx/62xx/52xx/42xx/32xx
Platform (W-32xx is supported by X11SPA-T only)

DDR4 Memory Support

Ranks

Type

RDIMM SRx4 4GB 8GB 16GB 2933 2933 2933

RDIMM SRx8 8GB 16GB 32GB 2933 2933 2933

RDIMM DRx8 8GB 16GB 32GB 2933 2933 2933

RDIMM DRx4 16GB 32GB 64GB 2933 2933 2933

RDIMM 3Ds QRX4 N/A 2H-64GB 2H-128GB 2933 2933 2933

RDIMM 3Ds 8RX4 N/A 4H-128GB 4H-256GB 2933 2933 2933

LRDIMM QRx4 32GB 64GB 128GB 2933 2933 2933

LRDIMM 3Ds QRX4 N/A 2H-64GB 2H-128GB 2933 2933 2933

LRDIMM 3Ds 8Rx4 N/A 4H-128GB 4H-256GB 2933 2933 2933

Per DIMM

&

Data Width

DIMM Capacity (GB)

DRAM Density

4Gb* 8Gb 16Gb 1.2 V 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots Per Channel (SPC) and DIMMs Per Chan-

1 Slot Per Channel 2 Slots Per Channel

1DPC (1-DIMM

Per Channel)

nel (DPC)

1DPC (1-DIMM

Per Channel)

2DPC (2-DIMM

Per Channel)

33

Super X11SPA-TF/-T User's Manual

DIMM Population Guidelines for Optimal Performance

For optimal memory performance, follow the instructions listed in the tables below when
populating memory modules.

Key Parameters for DIMM Conguration

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), 3DS RDIMM, LRDIMM, 3DS LRDIMM

DIMM Construction non-3DS RDIMM Raw Cards: A/B (2Rx4), C (1Rx4), D (1Rx8), E (2Rx8)

3DS RDIMM Raw Cards: A/B (4Rx4)

non-3DS LRDIMM Raw Cards: D/E (4Rx4)

3DS LRDIMM Raw Cards: A/B (8Rx4)

DIMM Mixing Guidelines

General DIMM Mixing Guidelines

DIMM Mixing Rules

• All DIMMs must be DDR4 DIMMs.

• x4 and x8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different

channels, or across different sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across

different channels, or across different sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed Not Allowed Allowed

34

Chapter 2: Installation

Memory Population

Memory Population Table for the X11SPA-T/-TF (w/12 Slots) based on the
81xx/61xx/51xx/41xx/31xx and 82xx/62xx/52xx/42xx/32xx Platforms (W-32xx is supported by
X11SPA-T only)

Memory Population Table for the X11SPA-T/-TF (w/12 Slots)

Memory Population Sequence

1 CPU & 1 DIMM CPU1: P1-DIMMA1

1 CPU & 2 DIMMs CPU1: P1-DIMMA1/P1-DIMMD1

1 CPU & 3 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1

1 CPU & 4 DIMMs CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

1 CPU & 5 DIMMs

(Unbalanced: not recommended)

1 CPU & 6 DIMM CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

1 CPU & 7 DIMMs

(Unbalanced: not recommended)

1 CPU & 8 DIMMs CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1

1 CPU & 9 DIMMs

(Unbalanced: not recommended)

1 CPU & 10 DIMMs

(Unbalanced: not recommended)

1 CPU & 11 DIMMs

(Unbalanced: not recommended)

1 CPU & 12 DIMMs

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1

Note: Unbalanced memory conguration decreases memory performance and is not
recommended for the Supermicro motherboards.

35

Super X11SPA-TF/-T User's Manual

DCPMM Population Table for the X11UP Motherboards (w/12 Slots) based on the
82xx/62xx/52xx/42xx Platform

Symmetric Population within 1 CPU Socket

Modes P1-DIMMF1 P1-DIMMF2 P1-DIMME1 P1-DIMME2 P1-DIMMD1 P1-DIMMD2 P1-DIMMA2 P1-DIMMA1 P1-DIMMB2 P1-DIMMB1 P1-DIMMC2 P1-DIMMC1

AD DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 2-2-2

MM DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 2-2-2

AD + MM DRAM3 DCPMM DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 DCPMM DRAM3 2-2-2

AD DRAM1 - DRAM1 - DRAM1 DCPMM DCPMM DRAM1 - DRAM1 - DRAM1 2-1-1

MM DRAM2 - DRAM2 - DRAM2 DCPMM DCPMM DRAM2 - DRAM2 - DRAM2 2-1-1

AD + MM DRAM3 - DRAM3 - DRAM3 DCPMM DCPMM DRAM3 - DRAM3 - DRAM3 2-1-1

AD DRAM1 - DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 - DRAM1 2-2-1

MM DRAM1 - DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 - DRAM1 2-2-1

AD + MM DRAM3 - DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 - DRAM3 2-2-1

AD DCPMM - DRAM1 - DRAM1 - - DRAM1 - DRAM1 - DCPMM 1-1-1

MM DCPMM - DRAM1 - DRAM1 - - DRAM1 - DRAM1 - DCPMM 1-1-1

AD + MM DCPMM - DRAM3 - DRAM3 - - DRAM3 - DRAM3 - DCPMM 1-1-1

AD DCPMM - DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 - DCPMM 2-2-1

Asymmetric Population within 1 CPU Socket

Modes P1-DIMMF1 P1-DIMMF2 P1-DIMME1 P1-DIMME2 P1-DIMMD1 P1-DIMMD2 P1-DIMMA2 P1-DIMMA1 P1-DIMMB2 P1-DIMMB1 P1-DIMMC2 P1-DIMMC1

AD DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1

AD* DRAM1 - DRAM1 - DRAM1 - DCPMM DRAM1 - DRAM1 - DRAM1 2/1-1-1

Channel

Cong.

Channel

Cong.

Legend (for the two tables above)

DDR4 Type Capacity

DRAM1 RDIMM 3DS RDIMM LRDIMM 3DS LRDIMM

DRAM2 RDIMM - -

DRAM3 RDIMM 3DS RDIMM LRDIMM -

Refer to Validation Matrix (DDR4 DIMMs

validated with DCPMM) below.

Note: DDR4 single rank x8 is not available for DCPMM Memory Mode or App-Direct
Mode.

Legend (for the rst two tables above)

Capacity

DCPMM Any Capacity (Uniformly for all channels for a given conguration)

• For each individual population, rearrangements between channels are allowed as long as the resulting population is

compliant with the PDG rules for the 82xx/62xx/52xx/42xx platform.

• For each individual population, please use the same DDR4 DIMM in all slots.

• For each individual population, sockets are normally symmetric with exceptions for 1 DCPMM per socket and 1 DCPMM

per node case. Currently, DCPMM modules operate at 2666 MHz.

• No mixing of DCPMM and NVMDIMMs within the same platform is allowed.

• This DCPMM population guide targets a balanced DCPMM-to-DRAM-cache ratio in MM and MM + AD modes.

Validation Matrix (DDR4 DIMMs Validated w/DCPMM)

DIMM Type

RDIMM

LRDIMM 4Rx4 N/A 64GB

LRDIMM 3DS 8Rx4 (4H) N/A 128GB

Ranks Per DIMM

& Data Width

(Stack)

1Rx4 8GB 16GB

2Rx8 8GB 16GB

2Rx4 16GB 32GB

DIMM Capacity (GB)

DRAM Density

4Gb 8Gb

36

Chapter 2: Installation

General Guidelines for Optimizing Memory Performance

• The blue slots must be populated rst.

• Only populate DIMMA2 and DIMMD2 if the extra memory support is needed.

• Always use DDR4 memory of the same type, size, and speed.

• Mixed DIMM speeds can be installed. However, all DIMMs will run at the speed of the

slowest DIMM.

• The motherboard will support odd-numbered modules (one or three modules installed).

However, to achieve the best memory performance, a balanced memory population is
recommended.

C

Universal ID

A

UID-SWUID-LED

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

JSD2

JRK1

RAID Key Header

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

LE5

C

A

PCI-E 3.0 x4

M.2-C03

LE4

A

C

M.2-C02

PCI-E 3.0 x4

I-SATA1 I-SATA3
I-SATA0

1

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

I-SATA5

I-SATA2 I-SATA4

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SATA7
I-SATA6

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

FAN B FAN A

AUDIO FP

CPU SLOT6 PCI-E 3.0 x8

CPU SLOT7 PCI-E 3.0 x16

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

JPWR4

HD AUDIO

LE3

A

C

USB3.1 Gen.2

USB3.1 Gen.2
LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

DIMMC1

FAN D

FAN C

JPL2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

COM1

VGA

DIMMC2
DIMMB1

DIMMB2
DIMMA1

DIMMA2

FAN4

12V_PUMP_PWR1

FAN3

DIMMD2

DIMMD1
DIMME2

DIMME1
DIMMF2

JPI2C1

DIMMF1

JP4

USB10 (3.1)
USB3.1 Gen.2

(3.1)USB11

JSTBY1

FAN2

LEDPWR

A

C

JF1

FAN1

JPWR2

+

JIPMB1

BATTERY

IPMI

JPWR1

37

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

FAN BFAN A

FAN1

DIMM Installation

1. Insert the desired number of DIMMs
into the memory slots based on the
recommended DIMM population tables on
pages 33, 34, 35, and 36.

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

5. Press the notches on both ends of the
module straight down into the slot until the
module snaps into place.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

I-SATA2 I-SATA4

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

C

A

AUDIO FP

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

USB3.1 Gen.2

USB0/1

HD AUDIO

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JPL2

FAN D

FAN C

JP4

C

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

JSTBY1

JF1

VGA

COM1

LEDPWR

A

C

JPUSB1

(3.1)USB8/9
USB3.1 Gen.2
LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

DIMM Removal

Press both release tabs on the ends of the
DIMM module to unlock it. Once the DIMM
module is loosened, remove it from the
memory slot.

Notches

Release Tabs

Press both notches

straight down into

the memory slot.

38

1

2

1

2

1

2

Chapter 2: Installation

2.5 M.2 SSD Installation

The X11SPA-TF/T motherboard has four M.2 PCI-E 3.0 slots that support 2260, 2280, and
22110 SSD modules.

1. Loosen the screws and remove the
heatsink.

2. The default positions for the standoffs
are in the 2280 and 22110 mounting
holes.

3. The mounting screws on the bottom of
the motherboard secure the standoffs.

39

Super X11SPA-TF/-T User's Manual

1

2

1

2

1

2

1

2

2280 SSD Module Installation

1

2

2280

4.1. To install a 2280 SSD module,
insert it into the slot at a 30 degree
angle and press down.

4.2. With the cutoff circle at the end of
the module aligned with the standoff,
tighten the screw to secure the module.

2280

Go to step 5 to complete the installation.

2260 SSD Module Installation

1

2

2260

4.3. To prepare for a 2260 SSD module
installation, begin by repeating steps
1-3, then place the standoff and screw
underneath the motherboard in the hole
closest to the M.2 slot. To install the
module, insert it into the slot at a 30
degree angle and press down.

2260

4.4. With the cutoff circle at the end of
the module aligned with the standoff,
tighten the screw to secure the module.
Go to step 5 to complete the installation.

40

Chapter 2: Installation

1

2

22110 SSD Module Installation

1

2

22110

4.5. To install a 22110 SSD module, insert
it into the M.2 slot at a 30 degree angle
and align the cutoff circle at the end with
the standoff.

22110

4.6. Go to step 5 to complete the
installation.

5. Remove the plastic liner from the
heatsink's thermal pad.

6. With the thermal pad faced down, secure
the heatsink on top of the module with the
same screws removed in step 1.

41

Super X11SPA-TF/-T User's Manual

2.6 Rear I/O Ports

See Figure 2-1 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

C

Universal ID

A

UID-SWUID-LED

PLX

PEX8747

USB3.1 Gen.1

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

USB3.1 Gen.2

VGA

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

JSTBY1

JF1

LEDPWR

COM1

A

C

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JPL2

FAN D

FAN C

JP4

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

FAN1

JPUSB1

(3.1)USB8/9

USB3.1 Gen.2

LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

M.2-C04
PCI-E 3.0 x4

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

A

C

LE6

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

I-SATA2 I-SATA4

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

I-SGPIO1

FAN BFAN A

Figure 2-1. I/O Port Locations and Denitions

15

12

1 4 6 9

18

2

3

75

8

10

11

# Description # Description # Description

1 1Gb RJ45 Port 1 7 USB 3.1 Gen1 Port 7 13 Surround Out

2 USB 3.1 Gen2 Port 9 8 USB 3.1 Gen1 Port 6 14 S/PDIF Out

3 USB 3.1 Gen2 Port 8 (Type C) 9 10Gb RJ45 Port2 15 Line In

4 COM1 Port 10 USB 3.1 Gen1 Port 5 16 Line Out

5 VGA Port 11 USB 3.1 Gen1 Port 4 17 Mic In

6 Dedicated IPMI LAN Port 12 Center/LFE Out 18 UID Switch

13

14

16

17

42

Chapter 2: Installation

VGA Port

A video (VGA) port is located next to USB 3.1 Gen2 Port 8 (Type C) on the I/O back panel.
Refer to the motherboard layout below for the location.

COM Connections

Two COM connections (COM1/COM2) are located on the motherboard. COM1 is located on
the I/O back panel. COM2 is located next to M.2-C03 PCI-E 3.0 x4.

COM Connection

Pin Denitions

Pin# Denition Pin# Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

1

2

C

Universal ID

A

UID-SWUID-LED

PLX

USB3.1 Gen.1

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

VGA

COM1

USB3.1 Gen.2
LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

1. VGA Port

2. COM1 Port

3. COM2 Header

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JSTBY1

FAN2

LEDPWR

A

C

JF1

FAN1

JPWR1

JPWR2

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

PEX8747

JPG1

JPME2

COM2

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

I-SATA2 I-SATA4

Intel C621

JSD1

I-SATA5

I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

FAN B FAN A

JOH1-OH

JL1

JWD1

3

JD1

JTPM1

RAID Key Header

43

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

LAN Ports

Two RJ45 Ethernet LAN ports (LAN1/LAN2) are located on the I/O back panel. In addition,
a Dedicated IPMI LAN port is located above the USB6/7 ports on the I/O back panel. All of
these ports accept RJ45 cables. Please refer to Section 2.10 for LAN LED information.

LAN Port

Pin Denitions

Pin# Denition Pin# Denition

1 TD0- 11 P3V3_Dual

2 TD0+ 12 Act LED (Yellow)

3 TD1- 13

4 TD1+ 14

Link 1000

(Amber)

Link 100 LED

(Green)

5 TD2- 15 GND

6 TD2+ 16 GND

7 TD3- 17 GND

8 TD3+ 18 GND

9 COMMCT

10 GND

C

Universal ID

A

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

JPL2

FAN C

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

3

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

IPMI LAN Port

Pin Denitions

Pin# Denition Pin# Denition

9 19 GND

10 TD0+ 20

11 TD0- 21

12 TD1+ 22

Act LED

(Yellow)

Link 100 LED

(Green)

Link 1000 LED

(Amber)

13 TD1- 23 SGND

14 TD2+ 24 SGND

15 TD2- 25 SGND

16 TD3+ 26 SGND

17 TD3-

18 GND

1

1. LAN1

2. LAN2

3. IPMI LAN Port

USB3.1 Gen.2
LAN1

JPL1

FAN6

FAN5

(3.1)USB8/9

JPWR3

JPUSB1

JVRM1

JP5

FAN4

12V_PUMP_PWR1

VGA

COM1

RAID Key Header

JL1

JPG1

JD1

JTPM1

JPME2

COM2

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

Intel C621

I-SATA2 I-SATA4

PLX

PEX8747

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

M.2-C01
PCI-E 3.0 x4

JSD1

I-SATA5

I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

(3.0)USB2/3

USB3.1 Gen.1

FAN B FAN A

USB3.1 Gen.2

USB0/1

JP4

C

JSTBY1

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

LEDPWR

JF1

FAN1

JPWR2

A

C

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

44

Chapter 2: Installation

Universal Serial Bus (USB) Ports

There are four USB 3.1 Gen1 ports (USB4/5, USB6/7) and two USB 3.1 Gen2 ports (USB8/9)
located on the I/O back panel. The motherboard also has two front access USB 3.1 Gen2
headers (USB10, USB11), one front access USB 2.0 header (USB0/1), and one front access
USB 3.1 Gen1 header (USB2/3). The USB10 header is Type A and the USB11 header is
Type C. The onboard headers can be used to provide front side USB access with a cable
(not included).

Back Panel USB0/1 (2.0)

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 5 +5V

2 USB_N 6 USB_N

3 USB_P 7 USB_P

4 Ground 8 Ground

Front Panel USB2/3, 4/5, 6/7 (3.1 Gen1)

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 2 +5V

3 USB_N 4 USB_N

5 USB_P 6 USB_P

7 Ground 8 Ground

9 Key 10 NC

Universal ID

UID-SWUID-LED

JPAC1

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JSD1
I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

FAN B FAN A

CPU SLOT6 PCI-E 3.0 x8

(3.0)USB2/3

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

I-SATA2 I-SATA4

C

A

AUDIO FP

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

12

USB3.1 Gen.2

USB0/1

HD AUDIO

C

7

Back Panel USB8/9 (3.1 Gen2)

Pin Denitions

Pin# Denition Pin# Denition

1

VBUS 19 Power

2

Stda_SSRX- 18 USB3_RN

3

Stda_SSRX+ 17 USB3_RP

4

GND 16 GND

5

Stda_SSTX- 15 USB3_TN

6

Stda_SSTX+ 14 USB3_TP

7

GND 13 GND

8

D- 12 USB_N

9

D+ 11 USB_P

10 x

Front Panel USB10 (3.1 Gen2)

Pin Denitions

Pin# Denition Pin# Denition

1 VBUS 5 SSRX-

2 USB_N 6 SSRX+

3 USB_P 7 GND

USB3.1 Gen.2
LAN1

5

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JPL1

JVRM1

FAN5

JP5

VGA

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

43

COM1
USB4/5(3.0)
USB3.1 Gen.1
LAN2

JPL2

FAN D

FAN C

4 Ground 8 SSTX-

9 SSTX+

Back Panel USB11 (3.1 Gen2)

Pin Denitions

Pin# Denition Pin# Denition

A1 VBUS B1 Power

A2 D- B2 USB_N

FAN4

A3 D+ B3 USB_P

12V_PUMP_PWR1

A4 GND B4 GND

A5 Stda_SSRX- B5 USB3_RN

A6 Stda_SSRX+ B6 USB3_RP

A7 GND B7 GND

FAN3

A8 Stda_SSTX- B8 USB3_TN

A9 Stda_SSTX+ B9 USB3_TP

JPI2C1

1. USB0/1

JP4

6

JSTBY1

USB10 (3.1)

FAN2

LEDPWR

USB3.1 Gen.2

(3.1)USB11

A

C

JF1

FAN1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

2. USB2/3

3. USB4/5

4. USB6/7

5. USB8/9

6. USB10

7. USB11

45

Super X11SPA-TF/-T User's Manual

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch and an LED indicator are located on the motherboard. The UID

switch is located at UID-SW, which is next to the HD AUDIO ports on the back panel. The
UID-LED is located next to the switch. When you press the UID switch, the UID LED will be
turned on. Press the UID switch again to turn off the LED indicator. The UID indicator provides

easy identication of a system unit that may be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at http://www.
supermicro.com.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

M.2-C04
PCI-E 3.0 x4

A

C

LE6

UID Switch

Pin Denitions

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

12

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

UID LED

Pin Denitions

Color Status

Blue: On Unit Identied

USB3.1 Gen.2

LAN1

JPL1

FAN6

FAN5

(3.1)USB8/9

JPWR3

JVRM1

JPUSB1

JP5

FAN4

12V_PUMP_PWR1

1. UID Switch

2. UID LED

VGA

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN C

COM1

JOH1-OH

JWD1

RAID Key Header

JTPM1

JL1

JPG1

JPME2

COM2

JD1

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

Intel C621

I-SATA5

I-SATA2 I-SATA4

PLX

PEX8747

JSD1
I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

FAN B FAN A

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB3.1 Gen.2

USB0/1

JP4

C

JSTBY1

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

LEDPWR

JF1

FAN1

JPWR2

A

C

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

46

Chapter 2: Installation

2.7 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

C

Universal ID

A

UID-SWUID-LED

AUDIO FP

CPU SLOT6 PCI-E 3.0 x8

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

JPWR4

HD AUDIO

VGA

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

COM1

USB3.1 Gen.2
LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

CPU SLOT3 PCI-E 3.0 x16

JPAC1

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

MAC CODE

IPMI CODE

JOH1-OH

JWD1

BAR CODE

J9702

J9701

JTPM1

RAID Key Header

MAC CODE

JL1

JPG1

JPME2

COM2

JD1

JRK1

JSD2

LE4

A

C

PCI-E 3.0 x4

PCI-E 3.0 x4

1

M.2-C04
PCI-E 3.0 x4

A

C

LE6

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

Intel C621

I-SATA5

I-SATA2 I-SATA4

Power Button

Reset Button

PLX

I-SATA7
I-SATA6

PEX8747

JSD1

I-SGPIO2

I-SGPIO1

FAN B FAN A

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

C

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB3.1 Gen.2

USB0/1

JP4

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

FAN1

Figure 2-2. JF1 Header Pins

1 2

PWR

Reset

Ground

Ground

JSTBY1

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

LEDPWR

JF1

JPWR2

A

C

P3V3

UID-LED

P3V3_STBY

P3V3_STBY

P3V3_STBY_UID SW

P3V3

SW_NMI_N

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

X

Ground

19

20

47

Super X11SPA-TF/-T User's Manual

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting

both pins will power on/off the system. This button can also be congured to function as a

suspend button (with a setting in the BIOS - see Chapter 4). To turn off the power when the
system is in suspend mode, press the button for four seconds or longer. Refer to the table

below for pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case to reset the system. Refer to the table below for pin denitions.

Power Button

1

Reset Button

2

P3V3_STBY_UID SW

PWR

Reset

P3V3

UID-LED

P3V3_STBY

P3V3_STBY

1 2

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

Reset Button

1. PWR Button

2. Reset Button

P3V3

SW_NMI_N

PWR LED

X

19

20

X

Ground

48

Chapter 2: Installation

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

Overheat (OH)/Fan Fail LED

Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheating or fan failure.

Refer to the tables below for pin denitions.

OH/Fan Fail Indicator

State Denition

Off Normal

On Overheat

Flashing Fan Fail

Power Button

Reset Button

P3V3_STBY_UID SW

PWR

Reset

P3V3

UID-LED

P3V3_STBY

P3V3_STBY

Status

1 2

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

OH/Fan Fail LED

Pin Denitions (JF1)

Pin# Denition

7 Blue LED

8 OH/Fan Fail LED

1. Power Fail LED

2. OH/Fan Fail LED

1

2

P3V3

SW_NMI_N

PWR LED

X

19

20

X

Ground

49

Super X11SPA-TF/-T User's Manual

NIC1/NIC2 (LAN1/LAN2) LED

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to

display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

11 NIC 1 Activity LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to

show hard drive activity status. Refer to the table below for pin denitions.

Power Button

Reset Button

P3V3_STBY_UID SW

PWR

Reset

P3V3

UID-LED

P3V3_STBY

P3V3_STBY

1 2

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stdby

14 HDD Active

1. NIC2 Active LED

2. NIC1 Active LED

3. HDD LED

1

2

3

P3V3

SW_NMI_N

PWR LED

X

19

20

X

Ground

50

Chapter 2: Installation

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 PWR LED

NMI Button

The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer

to the table below for pin denitions.

Power Button

Reset Button

P3V3_STBY

PWR

Reset

P3V3

UID-LED

1 2

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NMI Button

1. Power LED

2. NMI Button

P3V3_STBY

P3V3_STBY_UID SW

P3V3

SW_NMI_N

2

NIC1 Active LED

HDD LED

PWR LED

X

19

20

X

Ground

1

51

Super X11SPA-TF/-T User's Manual

2.8 Connectors

Power Connections

ATX Power Supply Connector

The 24-pin power supply connector (JPWR2) meets the ATX SSI EPS 12V specication. You

must also connect the 8-pin processor power connectors to the power supply.

ATX Power 24-pin Connector

Pin Denitions

Pin# Denition Pin# Denition

13 +3.3V 1 +3.3V

14 -12V 2 +3.3V

15 Ground 3 Ground

16 PS_ON 4 +5V

17 Ground 5 Ground

18 Ground 6 +5V

19 Ground 7 Ground

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 Ground 12 +3.3V

Required Connection

C

Universal ID

A

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

USB3.1 Gen.2
LAN1

JPL1

FAN6

FAN5

(3.1)USB8/9

JPWR3

JPUSB1

JVRM1

JP5

FAN4

12V_PUMP_PWR1

1. JPWR2

VGA

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

COM1

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

JOH1-OH

JWD1

RAID Key Header

JL1

JD1

JTPM1

JPG1

JPME2

COM2

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

Intel C621

I-SATA5

I-SATA2 I-SATA4

PLX

PEX8747

JSD1
I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

FAN B FAN A

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

C

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB3.1 Gen.2

USB0/1

JP4

LEDPWR

C

1

JPWR2

A

JSTBY1

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

JF1

FAN1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

52

Chapter 2: Installation

FAN B FAN A

FAN1

8-Pin Power Connectors

JPWR1/JPWR3/JPWR4 are 8-pin 12V DC power inputs for the CPU on the X11SPA-TF/-T
motherboard. Besides the 24-pin ATX PWR (JPWR2), two 12V 8-pin power connections

(JPWR1/JPWR3) are required to ensure adequate power supply to the system. Refer to the
table below for pin denitions.

8-pin Power Connector

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 8 P12V (12V Power)

Required Connection

Important: Please connect the power supplies to the 24-pin power connector (JPWR2)

and the 8-pin power connectors (JPWR1/JPWR3/JPWR4) on the motherboard when
more than four of the PCI-E slots are populated. Failure to do so may void the manu­facturer warranty on your power supply and motherboard.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LEDBMC

M.2-C04
PCI-E 3.0 x4

C

LE6

LE5

C

M.2-C02

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

Universal ID

UID-SWUID-LED

3

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

VGA

COM1

JPUSB1

(3.1)USB8/9
USB3.1 Gen.2
LAN1

JPWR3

JPL1

2

JVRM1

FAN6

FAN5

JP5

1. JPWR1

2. JPWR3

3. JPWR4

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JSTBY1

FAN2

LEDPWR

A

C

JF1

JPWR1

JPWR2

1

53

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

FAN B FAN A

FAN1

Headers

Fan Headers

There are ten 4-pin fan headers (FAN1 ~ FAN6, FAN A ~ FAN D) on the motherboard. All
these 4-pin fan headers are backwards compatible with the traditional 3-pin fan headers.
However, fan speed control is available for 4-pin fan headers only by Thermal Management

via the IPMI 2.0 interface. Refer to the table below for pin denitions.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 2.5A/+12V (Red)

3 Tachometer

4 PWM_Control

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

JRK1

RAID Key Header

M.2-C04
PCI-E 3.0 x4

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

1

LEDBMC

C

LE6

LE5

C

M.2-C02

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

I-SATA7
I-SATA6

JPAC1

JSD1

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

2

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

1

I-SGPIO1

USB3.1 Gen.1

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

4

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

3

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

6

5

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

10

USB3.1 Gen.2
LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

9

JVRM1

FAN5

JP5

1. FAN A

2. FAN B

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

VGA

COM1

3. FAN C

FAN4

8

12V_PUMP_PWR1

4. FAN D

5. FAN1

6. FAN2

7. FAN3

8. FAN4

FAN3

7

9. FAN5

10. FAN6

JPI2C1

+

JIPMB1

BATTERY

IPMI

JSTBY1

FAN2

LEDPWR

A

C

JF1

JPWR1

JPWR2

54

Chapter 2: Installation

JWD1

JOH1-OH

SGPIO Headers

There are two Serial Link General Purpose Input/Output (I-SGPIO1 and I-SGPIO2) headers

located on the motherboard. Refer to the tables below for pin denitions.

I-SGPIO Header

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 Data

5 Load 6 Ground

7 Clock 8 NC

NC = No Connection

Disk-On-Module Power Connector

Two power connectors for SATA DOM (Disk-On-Module) devices are located at JSD1 and
JSD2. Connect appropriate cables here to provide power support for your Serial Link DOM
devices.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

M.2-C04
PCI-E 3.0 x4

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

4

JSD2

JRK1

1

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

A

C

LE6

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

I-SATA2 I-SATA4

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

I-SATA5

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

3

JSD1
I-SATA7
I-SATA6

CPU SLOT4 PCI-E 3.0 x8

2

I-SGPIO2

I-SGPIO1

FAN BFAN A

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

1

USB3.1 Gen.1

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

USB3.1 Gen.2

USB0/1

DOM Power

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

USB3.1 Gen.2

LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

VGA

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

COM1
USB4/5(3.0)
USB3.1 Gen.1
LAN2

JPL2

FAN D

FAN C

1. I-SGPIO1

2. I-SGPIO2

3. JSD1 (DOM PWR)

4. JSD2 (DOM PWR)

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

JP4

JSTBY1

USB10 (3.1)

FAN2

LEDPWR

USB3.1 Gen.2

(3.1)USB11

A

C

JF1

FAN1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

55

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

FAN B FAN A

FAN1

TPM/Port 80 Header

A Trusted Platform Module (TPM)/Port 80 header is located at JTPM1 to provide TPM support
and Port 80 connection. Use this header to enhance system performance and data security.

Refer to the table below for pin denitions. Please go to the following link for more information

on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

Trusted Platform Module Header

Pin Denitions

Pin# Denition Pin# Denition

1 +3.3V 2 SPI_CS#

3 RESET# 4 SPI_MISO

5 SPI_CLK 6 GND

7 SPI_MOSI 8 NC

9 +3.3V Stdby 10 SPI_IRQ#

C

Universal ID

A

UID-SWUID-LED

AUDIO FP

CPU SLOT6 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN C

VGA
COM1

USB3.1 Gen.2
LAN1

JPL1

FAN6

FAN5

(3.1)USB8/9

JPWR3

JPUSB1

JVRM1

FAN4

12V_PUMP_PWR1

1. TPM/Port 80 Header

JP5

PLX

PEX8747

JPG1

JPME2

COM2

LE4

A

C

JSD2

JRK1

LE5

C

A

PCI-E 3.0 x4

M.2-C03

M.2-C02

PCI-E 3.0 x4

I-SATA1 I-SATA3
I-SATA0

1

Intel C621

I-SATA2 I-SATA4

JSD1

I-SATA5

I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

JL1

JD1

1

JTPM1

RAID Key Header

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB3.1 Gen.2

USB0/1

JP4

C

JSTBY1

USB10 (3.1)

FAN2

LEDPWR

JPWR2

USB3.1 Gen.2

(3.1)USB11

A

C

JF1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

56

Chapter 2: Installation

Standby Power Header

The Standby Power header is located at JSTBY1 on the motherboard. You must have a card
with a Standby Power connector and a cable to use this feature. Refer to the table below

for pin denitions.

Standby Power Header

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

M.2-C04
PCI-E 3.0 x4

C

LE5

C

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

LE6

Intel C621

A

M.2-C03

M.2-C02

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

FAN B FAN A

Universal ID

CPU SLOT6 PCI-E 3.0 x8

(3.0)USB2/3

USB3.1 Gen.1

C

A

UID-SWUID-LED

AUDIO FP

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

USB0/1

JPWR4

HD AUDIO

LE3

A

C

USB3.1 Gen.2

VGA

LEDPWR

COM1

JPWR2

A

C

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

JP4

1

USB10 (3.1)
USB3.1 Gen.2

(3.1)USB11

JSTBY1

FAN2

JF1

FAN1

JPUSB1

(3.1)USB8/9
USB3.1 Gen.2
LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

1. Standby Power Header

57

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

Power SMB (I2C) Header

2

The Power System Management Bus (I

C) connector (JPI2C1) monitors the power supplies,

fans, and system temperatures. Refer to the table below for pin denitions.

Power SMB Header

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

4-pin BMC External I2C Header

A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate
cable to use the IPMB I2C connection on your system. Refer to the table below for pin

denitions.

External I2C Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

JRK1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

1

M.2-C04
PCI-E 3.0 x4

C

LE6

LE5

C

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

M.2-C02

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

JSD1
I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

I-SGPIO2

FAN B FAN A

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

VGA

COM1

USB3.1 Gen.2

LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

1. Power SMB Header

2. BMC External Header

FAN4

12V_PUMP_PWR1

FAN3

1

JPI2C1

+

JIPMB1

BATTERY

IPMI

2

JSTBY1

FAN2

LEDPWR

A

C

JF1

FAN1

JPWR1

JPWR2

58

Chapter 2: Installation

Chassis Intrusion Header

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to

the table below for pin denitions.

Chassis Intrusion Header

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

M.2-C04
PCI-E 3.0 x4

C

1

LE5

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

A

LE6

Intel C621

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

I-SATA2 I-SATA4

CPU SLOT2 PCI-E 3.0 x8

I-SATA5

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

JSD1
I-SATA7
I-SATA6

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

FAN B FAN A

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

USB3.1 Gen.2

VGA

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

JP4

JSTBY1

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

FAN1

COM1

LEDPWR

JPWR2

A

C

JF1

JPUSB1

(3.1)USB8/9

USB3.1 Gen.2

LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

1. Chassis Intrusion Header

59

Super X11SPA-TF/-T User's Manual

Power LED/Speaker Header

Pins 1-3 of JD1 are used for power LED indication, and pins 4-7 are for the speaker. Please
note that the speaker connector pins (4-7) are used with an external speaker. If you wish to
use the onboard speaker, you should close pins 6-7 with a cap. Refer to the tables below

for pin denitions.

PWR LED Connector

Pin Denitions

Pin# Signal

1 JD1_PIN1

2 FP_PWR_LED

3 FP_PWR_LED

Speaker Connector

Pin Denitions

Pin# Signal

4 P5V

5 Key

6 R_SPKPIN_N

7 R_SPKPIN

Overheat/Fan Fail LED Header

Header JOH1-OH is used to connect to an LED indicator to provide warnings of chassis
overheating and fan failure. This LED will blink when a fan failure occurs. Refer to the tables

below for pin denitions.

Overheat LED Header

Pin Denitions

Pin# Signal

Pull high to +3.3V

1

power through 330-ohm

resistor

2 OH Active

JPUSB1

1. PWR LED/Speaker Header

JP5

2. Overheat/Fan Fail LED Header

FAN4

12V_PUMP_PWR1

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

Overheat LED Header

Status

State Denition

Solid Overheat

Blinking Fan Fail

JPAC1

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

VGA

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN C

COM1

USB3.1 Gen.2
LAN1

JPL1

FAN6

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JOH1-OH

JWD1

RAID Key Header

JL1

JD1

JTPM1

JPG1

JPME2

COM2

2

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

1

JSD2

JRK1

1

LE5

C

A

M.2-C03

M.2-C02

I-SATA1 I-SATA3
I-SATA0

Intel C621

I-SATA5

I-SATA2 I-SATA4

PLX

PEX8747

JSD1
I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

FAN B FAN A

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB3.1 Gen.2

USB0/1

JP4

C

USB10 (3.1)
USB3.1 Gen.2

(3.1)USB11

JSTBY1

FAN2

LEDPWR

JPWR2

A

C

JF1

FAN1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

60

Chapter 2: Installation

SATA Ports

Eight SATA 3.0 ports are located on the X11SPA-TF/-T motherboard supported by the C621
chipset. These SATA ports support RAID 0, 1, 5, and 10. SATA ports provide serial-link signal
connections, which are faster than the connections of Parallel ATA.

Note: For more information on the SATA HostRAID conguration, please refer to the

Intel SATA HostRAID user's guide posted on our website at http://www.supermicro.com.

M.2 Slots

The X11SPA-TF/-T motherboard has four M.2 slots. M.2 was formerly known as Next
Generation Form Factor (NGFF) and serves to replace mini PCI-E. M.2 allows for a variety of

card sizes, increased functionality, and spatial efciency. The M.2 sockets on the motherboard

supports PCI-E 3.0 x4 (32 Gb/s) SSD cards in 2280 and 22110 form factors.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

M.2-C04
PCI-E 3.0 x4

C

LE5

C

I-SATA1 I-SATA3
I-SATA0

2
1

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

12

A

LE6

Intel C621

A

M.2-C03

11

M.2-C02

10

I-SATA2 I-SATA4

3

CPU SLOT2 PCI-E 3.0 x8

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

64
5

JPAC1

I-SATA7
I-SATA6

8
7

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

FAN B FAN A

Universal ID

UID-SWUID-LED

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

C

A

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

9

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

VGA

COM1

USB3.1 Gen.2
LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

1. I-SATA0

2. I-SATA1

FAN4

12V_PUMP_PWR1

3. I-SATA2

4. I-SATA3

5. I-SATA4

6. I-SATA5

FAN3

7. I-SATA6

8. I-SATA7

9. M.2-C01 PCI-E 3.0 x4

JPI2C1

+

JIPMB1

BATTERY

IPMI

JSTBY1

FAN2

LEDPWR

A

C

JF1

FAN1

JPWR1

JPWR2

10. M.2-C02 PCI-E 3.0 x4

11. M.2-C03 PCI-E 3.0 x4

12. M.2-C04 PCI-E 3.0 x4

61

Super X11SPA-TF/-T User's Manual

Intel RAID Key Header

Header JRK1 allows the user to enable RAID functions for NVMe connections. Refer to the

table below for pin denitions.

Intel RAID Key Header

Pin Denitions

Pin# Dention

1 GND

2 PU 3.3V Stdby

3 GND

4 PCH RAID KEY

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

1

JRK1

1

LEDBMC

M.2-C04
PCI-E 3.0 x4

C

LE6

LE5

C

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

M.2-C02

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

FAN B FAN A

Universal ID

UID-SWUID-LED

AUDIO FP

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

C

A

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

VGA

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

JSTBY1

FAN2

FAN1

COM1

LEDPWR

JPWR2

A

C

JF1

JPUSB1

(3.1)USB8/9
USB3.1 Gen.2
LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

1. Intel RAID Key Header

62

Chapter 2: Installation

2.9 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram

below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

JBT1 contact pads

63

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

Watchdog

Watchdog (JWD1) is a system monitor that can reboot the system when a software application
hangs. Close pins 1-2 to reset the system if an application hangs. Close pins 2-3 to generate
a non-maskable interrupt (NMI) signal for the application that hangs. Refer to the table below
for jumper settings. The Watchdog must also be enabled in the BIOS.

Watchdog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

VGA Enable/Disable

Jumper JPG1 allows the user to enable the onboard VGA connector. The default setting is
pins 1-2 to enable the connection. Refer to the table below for jumper settings.

X11SPA-TF

DESIGNED IN USA

REV:1.01

MAC CODE

IPMI CODE

BAR CODE

J9702

1

LICENSE

J9701

RAID Key Header

BIOS

JTPM1

MAC CODE

2

JL1

JPG1

JPME2

COM2

JD1

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

M.2-C04
PCI-E 3.0 x4

C

LE5

C

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

A

LE6

Intel C621

A

M.2-C03

M.2-C02

I-SATA2 I-SATA4

CPU SLOT2 PCI-E 3.0 x8

I-SATA5

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

JSD1
I-SATA7
I-SATA6

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

FAN B FAN A

Universal ID

CPU SLOT6 PCI-E 3.0 x8

(3.0)USB2/3

USB3.1 Gen.1

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

C

A

UID-SWUID-LED

AUDIO FP

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

USB0/1

JPWR4

HD AUDIO

LE3

A

C

USB3.1 Gen.2

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

JP4

JSTBY1

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

FAN1

VGA
COM1

LEDPWR

A

C

JF1

JPUSB1

(3.1)USB8/9
USB3.1 Gen.2
LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

1. Watchdog

2. VGA Enable/Disable

64

Chapter 2: Installation

ME Manufacturing Mode

Close pins 2-3 of Jumper JPME2 to bypass SPI ash security and force the system to operate
in the manufacturing mode, which will allow the user to ash the system rmware from a
host server for system setting modications. Refer to the table below for jumper settings.

The default setting is Normal.

Manufacturing Mode

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal (Default)

Pins 2-3 Manufacturing Mode

1Gb/10Gb LAN Enable/Disable

JPL1 and JPL2 allow the user to enable or disable the 1Gb/10Gb LAN Ports. The default
setting is Enabled.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

1

PCI-E 3.0 x4

LE4

A

C

PCI-E 3.0 x4

JSD2

JRK1

1

LEDBMC

M.2-C04
PCI-E 3.0 x4

C

LE6

LE5

C

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

M.2-C02

I-SATA2 I-SATA4

JPAC1

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

JSD1

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

FAN B FAN A

Universal ID

CPU SLOT6 PCI-E 3.0 x8

(3.0)USB2/3

USB3.1 Gen.1

1Gb/10Gb LAN Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

C

A

UID-SWUID-LED

AUDIO FP

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

USB0/1

JPWR4

HD AUDIO

LE3

A

C

USB3.1 Gen.2

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

3

JP4

JSTBY1

FAN2

JF1

FAN1

FAN D

(3.1)USB11

LEDPWR

VGA
COM1

A

C

JPUSB1

(3.1)USB8/9

USB3.1 Gen.2

LAN1

JPWR3

JPL1

2

JVRM1

FAN6

FAN5

1. Manufacturing Mode

JP5

2. 1Gb LAN Enable/Disable

3.10Gb LAN Enable/Disable

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

65

Super X11SPA-TF/-T User's Manual

USB Wake-Up

This jumper allows you to "wake up" the system by pressing a key on the USB keyboard or
by clicking the USB mouse of your system. Jumper JPUSB1 is used together with the USB
Wake-Up feature in BIOS. Both JPUSB1 and the BIOS setting must be enabled to use this
feature. The default setting is Enabled.

Note: Please be sure to remove all other USB devices from the USB ports whose
jumpers are set to disabled before the system goes into standby mode.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JOH1-OH

JL1

JWD1

JPG1

JPME2

COM2

JD1

JTPM1

RAID Key Header

LEDBMC

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

C

LE6

LE5

C

PCI-E 3.0 x4

M.2-C03

LE4

A

C

M.2-C02

PCI-E 3.0 x4

JSD2

I-SATA1 I-SATA3
I-SATA0

JRK1

1

A C

A

A

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

Intel C621

I-SATA5

I-SATA2 I-SATA4

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

JSD1
I-SATA7
I-SATA6

I-SGPIO2

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

FAN B FAN A

Universal ID

CPU SLOT6 PCI-E 3.0 x8

(3.0)USB2/3

USB3.1 Gen.1

C

A

UID-SWUID-LED

AUDIO FP

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

USB0/1

JPWR4

LE3

A

C

USB3.1 Gen.2

HD AUDIO

(3.1)USB11

VGA

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

JP4

USB10 (3.1)
USB3.1 Gen.2

JSTBY1

FAN2

FAN1

COM1

LEDPWR

JF1

JPWR2

A

C

JPUSB1

(3.1)USB8/9

1

USB3.1 Gen.2
LAN1

JPWR3

JPL1

JVRM1

FAN6

FAN5

JP5

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

1. JPUSB1

66

Chapter 2: Installation

2.10 LED Indicators

Unit ID LED

A rear UID LED indicator (UID-LED) is located near the UID switch on the I/O back panel.

This UID indicator provides easy identication of a system unit that may need service.

UID-LED

LED Indicator

LED Color Denition

Blue: On Unit Identied

LAN LEDs

Two LAN ports are located on the I/O back panel of the motherboard. This Ethernet LAN
port has two LEDs (Light Emitting Diode). The yellow LED indicates activity, while the Link
LED may be green, amber, or off to indicate the speed of the connection. Refer to the tables
below for more information.

LAN

Link
LED

Activity

LED

GLAN Activity Indicator

LED Settings

Color Status Denition

Yellow Flashing Active

JPAC1

JSPDIF_OUT

CPU SLOT3 PCI-E 3.0 x16

CPU SLOT4 PCI-E 3.0 x8

CPU SLOT5 PCI-E 3.0 x16

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

M.2-C04
PCI-E 3.0 x4

A

C

LE6

ASPEED
AST2500

CPU SLOT2 PCI-E 3.0 x8

1Gbit LAN Link Indicator

LED Settings

LED Color Denition

Off No Connection

Amber 100Mbps/10Mbps

Green 1 Gbps.

1

C

Universal ID

A

UID-SWUID-LED

AUDIO FP

HD AUDIO

CPU SLOT6 PCI-E 3.0 x8

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JPL2

FAN D

FAN C

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

10Gbit LAN Link Indicator

LED Settings

LED Color Denition

Off No Connection

Amber 5Gbps/2.5Gbps/1Gbps/100Mbps

Green 10 Gbps.

23

USB3.1 Gen.2

LAN1

JPL1

FAN6

FAN5

(3.1)USB8/9

JPWR3

JPUSB1

JVRM1

JP5

FAN4

12V_PUMP_PWR1

VGA
COM1

1. UID LED

2. LAN1 LEDs

3. LAN2 LEDs

JOH1-OH

JWD1

RAID Key Header

JTPM1

JL1

JPG1

JPME2

COM2

JD1

LE4

A

C

JSD2

JRK1

LE5

C

A

PCI-E 3.0 x4

M.2-C03

M.2-C02

PCI-E 3.0 x4

I-SATA1 I-SATA3
I-SATA0

1

Intel C621

I-SATA2 I-SATA4

PLX

PEX8747

JSD1

I-SATA5

I-SATA7
I-SATA6

I-SGPIO2

I-SGPIO1

FAN B FAN A

USB3.1 Gen.1

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

LE3

A

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB3.1 Gen.2

USB0/1

JP4

C

JSTBY1

USB10 (3.1)

FAN2

USB3.1 Gen.2

(3.1)USB11

LEDPWR

JF1

FAN1

JPWR2

A

C

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

67

Super X11SPA-TF/-T User's Manual

JWD1

JOH1-OH

IPMI LAN LEDs

In addition to LAN1 and LAN2, an IPMI LAN is also located on the I/O back panel. The amber
LED on the right indicates activity, while the green LED on the left indicates the speed of the
connection. Refer to the table below for more information.

IPMI LAN

Activity LEDLink LED

Link (left)

IPMI LAN LED

Color/State Denition

Green: Solid

Amber: Solid

100 Mbps

1Gbps

Activity (Right) Amber: Blinking Active

M.2 LEDs

M.2 LEDs are located at LE3, LE4, LE5, and LE6 on the motherboard. When a M.2 LED is
blinking, its corresponding M.2 device functions normally. Refer to the table below for more
information.

M.2 LED

LED Color Denition

Green: Blinking Device Working

C

Universal ID

A

UID-SWUID-LED

PLX

USB3.1 Gen.1

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

AUDIO FP

HD AUDIO

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1

FAN D

DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

2

LE3

A

C

(3.1)USB11

USB3.1 Gen.2

JPL2

FAN C

USB10 (3.1)
USB3.1 Gen.2

USB4/5(3.0)
USB3.1 Gen.1
LAN2

JP4

USB6/7(3.0)
USB3.1 Gen.1
IPMI_LAN

VGA
COM1

1

USB3.1 Gen.2
LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

1. IPMI LAN LEDs

2. LE3

3. LE4

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JSTBY1

FAN2

LEDPWR

A

C

JF1

FAN1

JPWR1

JPWR2

4. LE5

5. LE6

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

JRK1

RAID Key Header

M.2-C04
PCI-E 3.0 x4

4

PCI-E 3.0 x4

3

LE4

A

C

PCI-E 3.0 x4

JSD2

1

LEDBMC

C

LE6

5

LE5

C

M.2-C02

I-SATA1 I-SATA3
I-SATA0

ASPEED
AST2500

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

JSD1
I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

I-SGPIO2

FAN B FAN A

CPU SLOT5 PCI-E 3.0 x16

PEX8747

I-SGPIO1

68

Chapter 2: Installation

JWD1

JOH1-OH

Onboard Power LED

The Onboard Power LED is located at LEDPWR on the motherboard. When this LED is on,
the system is on. Be sure to turn off the system and unplug the power cord before removing
or installing any component. Refer to the table below for more information.

Onboard Power LED Indicator

LED Color Denition

Off

System Off (power cable not

connected)

Green System On

BMC Heartbeat LED

A BMC Heartbeat LED is located at LEDBMC on the motherboard. When LEDBMC is blinking,
the BMC is functioning normally. Refer to the table below for more information.

X11SPA-TF

DESIGNED IN USA

REV:1.01

BIOS

LICENSE

MAC CODE

MAC CODE

IPMI CODE

BAR CODE

J9702

J9701

JL1

JPG1

JPME2

COM2

JD1

JTPM1

JRK1

RAID Key Header

PCI-E 3.0 x4

1

LE4

A

C

PCI-E 3.0 x4

JSD2

1

M.2-C04
PCI-E 3.0 x4

C

LE6

LE5

C

I-SATA1 I-SATA3
I-SATA0

ASPEED

2

AST2500

LEDBMC

A C

CPU SLOT1 PCI-E 3.0 x16

CPU SLOT2 PCI-E 3.0 x8

A

Intel C621

A

M.2-C03

M.2-C02

I-SATA2 I-SATA4

CPU SLOT3 PCI-E 3.0 x16

I-SATA5

JPAC1

JSD1
I-SATA7
I-SATA6

JSPDIF_OUT

CPU SLOT4 PCI-E 3.0 x8

I-SGPIO2

FAN B FAN A

CPU SLOT5 PCI-E 3.0 x16

PLX

PEX8747

I-SGPIO1

USB3.1 Gen.1

BMC Heartbeat LED Indicator

LED Color Denition

Green: Blinking BMC Normal

C

Universal ID

A

UID-SWUID-LED

AUDIO FP

HD AUDIO

CPU SLOT6 PCI-E 3.0 x8

DIMMD2
DIMMD1
DIMME2
DIMME1
DIMMF2
DIMMF1

M.2-C01
PCI-E 3.0 x4

(3.0)USB2/3

USB0/1

JPWR4

CPU SLOT7 PCI-E 3.0 x16

DIMMC1
DIMMC2
DIMMB1
DIMMB2
DIMMA1
DIMMA2

LE3

A

C

USB3.1 Gen.2

USB4/5(3.0)

USB6/7(3.0)
USB3.1 Gen.1

USB3.1 Gen.1

IPMI_LAN

LAN2

JPL2

FAN D

FAN C

JP4

USB10 (3.1)
USB3.1 Gen.2

(3.1)USB11

JSTBY1

FAN2

LEDPWR

A

C

JF1

FAN1

USB3.1 Gen.2

LAN1

JPL1

FAN6

JPUSB1

(3.1)USB8/9

JPWR3

JVRM1

FAN5

JP5

1. Onboard Power LED

VGA

COM1

2. BMC Heartbeat LED

FAN4

12V_PUMP_PWR1

FAN3

JPI2C1

+

JIPMB1

BATTERY

IPMI

JPWR1

JPWR2

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Super X11SPA-TF/-T User's Manual

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing, or installing any non hot-swap hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard
and mouse.

3. Remove all add-on cards.

4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to
the motherboard.

No Power

1. Make sure that there are no short circuits between the motherboard and the chassis.

2. Make sure that the ATX power connectors are properly connected.

3. Check that the 115V/230V switch, if available, on the power supply is properly set.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

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Chapter 3: Troubleshooting

No Video

1. If the power is on, but you have no video, remove all add-on cards and cables.

2. Use the speaker to determine if any beep codes are present. Refer to Appendix A for
details on beep codes.

3. Remove all memory modules and turn on the system (if the alarm is on, check the
specs of memory modules, reset the memory or try a different one).

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and con-

tacting both pads on the CMOS clear jumper (JBT1). Refer to Section 2.8 in Chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure

in this chapter.

Memory Errors

When a no-memory beep code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and are properly
installed. See Chapter 2 for installation instructions. (For memory compatibility, refer
to the "Tested Memory List" link on the motherboard's product page to see a list of
supported memory.)

2. Check if different speeds of DIMMs have been installed. It is strongly recommended that
you use the same RAM type and speed for all DIMMs in the system.

3. Make sure that you are using the correct type of ECC DDR4 modules recommended by
the manufacturer.

4. Check for bad DIMM modules or slots by swapping a single module among all memory
slots and check the results.

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Super X11SPA-TF/-T User's Manual

Losing the System's Setup Conguration

1. Make sure that you are using a high-quality power supply. A poor-quality power supply
may cause the system to lose the CMOS setup information. Refer to Chapter 2 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Click on the "Tested Memory List" link on the motherboard's product page to
see a list of supported memory.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD/DVD.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

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Chapter 3: Troubleshooting

3. Using the minimum conguration for troubleshooting: Remove all unnecessary
components (starting with add-on cards rst), and use the minimum conguration (but

with the CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

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Super X11SPA-TF/-T User's Manual

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please note that as
a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it

is best to rst check with your distributor or reseller for troubleshooting services. They should
know of any possible problems with the specic system conguration that was sold to you.

1. Please go through the Troubleshooting Procedures and Frequently Asked Questions
(FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.

com/FAQ/index.php) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.com/

ResourceApps/BIOS_IPMI_Intel.html).

3. If you still cannot resolve the problem, include the following information when contacting
Supermicro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (This can be seen on the initial display when your system rst

boots up.)

• System conguration

4. An example of a Technical Support form is on our website at http://www.supermicro.com/

RmaForm/.

• Distributors: For immediate assistance, please have your account number ready when

placing a call to our Technical Support department. We can be reached by email at sup­[e-mail].

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Chapter 3: Troubleshooting

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The motherboard supports DDR4 ECC RDIMM, 3DS RDIMM, LRDIMM, or 3DS

LRDIMM modules. To enhance memory performance, do not mix memory modules of different
speeds and sizes. Please follow all memory installation instructions given on Section 2.4 in
Chapter 2.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://

www.supermicro.com/ResourceApps/BIOS_IPMI_Intel.html. Please check our BIOS warning

message and the information on how to update your BIOS on our website. Select your

motherboard model and download the BIOS le to your computer. Also, check the current

BIOS revision to make sure that it is newer than your BIOS before downloading. Please

unzip the BIOS le onto a bootable USB device. Run the batch le using the format FLASH.
BAT lename.rom from your bootable USB device to ash the BIOS. Then, your system will

automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent possible
system boot failure!

Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your
motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery
instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.

supermicro.com/support/manuals/.

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Super X11SPA-TF/-T User's Manual

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning: Please handle used batteries carefully. Do not damage the battery in any way; a

damaged battery may release hazardous materials into the environment. Do not discard a used

battery in the garbage or a public landll. Please comply with the regulations set up by your

local hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow steps 1 and 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Warning: When replacing a battery, be sure to only replace it with the same type.

OR

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Chapter 3: Troubleshooting

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a
Returned Merchandise Authorization (RMA) number. When returning the motherboard to
the manufacturer, the RMA number should be prominently displayed on the outside of the
shipping carton, and the shipping package is mailed prepaid or hand-carried. Shipping and
handling charges will be applied for all orders that must be mailed when service is complete.
For faster service, you can also request a RMA authorization online (http://www.supermicro.

com/RmaForm/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alternation, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Super X11SPA-TF/-T User's Manual

Chapter 4

UEFI BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored

on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to the BIOS that may not be reected

in this manual.

Starting the Setup Utility

To enter the BIOS Setup Utility, hit the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that the BIOS has default text messages built in. We retain the option to include, omit,
or change any of these text messages.) Settings printed in Bold are the default values.

" indicates a submenu. Highlighting such an item and pressing the <Enter> key will

A "
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F2>, <F3>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time
during the setup navigation process.

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Chapter 4: UEFI BIOS

4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen.
The Main BIOS setup screen is shown below and the following features will be displayed:

System Date/System Time

Use this feature to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in MM/DD/YYYY format. The time

is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is the BIOS build date after RTC reset.

Supermicro X11SPA-TF

BIOS Version

This feature displays the version of the BIOS ROM used in the system.

Build Date

This feature displays the date when the version of the BIOS ROM used in the system was built.

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Super X11SPA-TF/-T User's Manual

CPLD Version

This feature displays the Complex Programmable Logic Device version.

Memory Information

Total Memory

This feature displays the total size of memory available in the system.

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Chapter 4: UEFI BIOS

4.3AdvancedSetupCongurations

Use the arrow keys to select the Advanced menu and press <Enter> to access the submenu
items:

Warning: Take caution when changing the Advanced settings. An incorrect value, a very high
DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When
this occurs, revert to default manufacturer settings.

Boot Feature

Quiet Boot

Use this feature to select the screen display between the POST messages and the OEM logo
upon bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Disabled and Enabled.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to display
the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by
the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the <Numlock> key. The options are On and Off.

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Super X11SPA-TF/-T User's Manual

Wait For "F1" If Error

Use this feature to force the system to wait until the "F1" key is pressed if an error occurs.
The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this feature
is set to Immediate, the ROM BIOS of the host adapters will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adapters to function as
bootable disks. If this feature is set to Postponed, the ROM BIOS of the host adapters will not
capture Interrupt 19 immediately and allow the drives attached to these adapters to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

If this feature is enabled, the BIOS will automatically reboot the system from a specied boot

device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB Support

Enable this feature to use the USB keyboard and mouse during the Windows 7 installation
since the native XHCI driver support is unavailable. Use a SATA optical drive as a USB drive,
and USB CD/DVD drives are not supported. Disable this feature after the XHCI driver has
been installed in Windows. The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are Disabled and Enabled.

PowerConguration

Watch Dog Function

If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on
jumper settings when it is expired for more than ve minutes. The options are Disabled and
Enabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay Off for
the system power to remain off after a power loss. Select Power On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last power state before a power loss. The options are Stay Off, Power On,
and Last State.

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for four seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are Instant Off and 4 Seconds Override.

82

CPUConguration

The following CPU information will display:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

Chapter 4: UEFI BIOS

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Intel(R) Xeon(R) Gold 5118 CPU @ 2.30GHz

Hyper-Threading (ALL) (Available when supported by the CPU)

Select Enable to support Intel Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.

Cores Enabled

Use this feature to enable or disable CPU cores in the processor specied by the user. The

default setting is 0.

Monitor/Mwait

This feature allows the user to congure Monitor/Mwait. The options are Disable and Enable.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to enable the Execute-Disable Bit, which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,

thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor or

damage the system during an attack. The options are Disable and Enable. (Refer to the Intel
and Microsoft® websites for more information.)

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Super X11SPA-TF/-T User's Manual

Intel Virtualization Technology

Use this feature to enable the Vanderpool Technology. This technology allows the system to
run several operating systems simultaneously. The options are Disable and Enable.

PPIN Control

Select Unlock/Enable to use the Protected Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L2 cache to improve CPU performance. The options are Disable
and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

The CPU prefetches the cache line for 64 bytes if this feature is set to Disabled. The CPU
prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable. The
options are Enable and Disable.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enable to enable the DCU (Data Cache Unit) Streamer Prefetcher which will stream
and prefetch data and send it to the Level 1 data cache to improve data processing and
system performance. The options are Disable and Enable.

DCU IP Prefetcher (Available when supported by the CPU)

Select Enable for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.

LLC Prefetch

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L3 cache to improve CPU performance. The options are Disable
and Enable.

Extended APIC

Select Enable to activate APIC (Advanced Programmable Interrupt Controller) support. The
options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Disable and Enable.

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Chapter 4: UEFI BIOS

AdvancedPowerManagementConguration

Power Technology

Select Energy Efcient to support power-saving mode. Select Custom to customize system

power settings. Select Disabled to disable power-saving settings. The options are Disable,
EnergyEfcient, and Custom.

*If the feature is set to Custom, the following features will display:

Power Performance Tuning (Available when "Power Technology" is set to Custom)

Select BIOS to allow the system BIOS to congure the Power-Performance Tuning Bias

setting below. The options are OS Controls EPB and BIOS Controls EPB.

ENERGY_PERF_BIAS_CFG mode (ENERGY PERFORMANCE BIAS
CONFIGURATION Mode) (Available when supported by the Processor and when
"Power Performance Tuning" is set to BIOS Controls EPB)

Use this feature to set the processor power use policy to achieve the desired operation
settings for your machine by prioritizing system performance or energy savings. Select
Maximum Performance to maximize system performance (to its highest potential); however,
this may result in maximum power consumption as energy is needed to fuel the processor
frequency. The higher the performance is, the higher the power consumption will be. Select

Max Power Efcient to maximize power saving; however, system performance may be

substantially impacted because limited power use decreases the processor frequency. The
options are Performance, Balanced Performance, Balanced Power, and Power.

CPU P State Control

This feature allows the user to congure the following CPU power settings:

SpeedStep (P-States)

Intel SpeedStep Technology allows the system to automatically adjust processor voltage
and core frequency to reduce power consumption and heat dissipation. The options are
Disable and Enable.

EIST PSD Funtion

This feature allows the user to choose between Hardware and Software to control the
processor's frequency and performance (P-state). In HW_ALL mode, the processor hard­ware is responsible for coordinating the P-state, and the OS is responsible for keeping the
P-state request up to date on all Logical Processors. In SW_ALL mode, the OS Power
Manager is responsible for coordinating the P-state, and must initiate the transition on

all Logical Processors. In SW_ANY mode, the OS Power Manager is responsible for

coordinating the P-state and may initiate the transition on any Logical Processors. The
options are HW_ALL, SW_ALL, and SW_ANY.

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Super X11SPA-TF/-T User's Manual

Turbo Mode

This feature will enable dynamic control of the processor, allowing it to run above stock
frequency. The options are Disable and Enable.

Hardware PM State Control

Hardware P-States

This feature allows the user to select between OS and hardware-controlled P-states.
Selecting Native Mode allows the OS to choose a P-state. Selecting Out of Band Mode
allows the hardware to autonomously choose a P-state without OS guidance. Selecting
Native Mode with No Legacy Support functions as Native Mode with no support for older
hardware. The options are Disable, Native Mode, Out of Band Mode, and Native Mode
with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Enabling this feature allows the hardware to autonomously choose to enter a C-state
based on power consumption and clock speed. The options are Disable and Enable.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are
Disable, Enable, and Auto.

Enhanced Halt State (C1E)

Select Enable to use Enhanced Halt State technology, which will signicantly reduce the

CPU's power consumption by reducing its clock cycle and voltage during a Halt-state.
The options are Disable and Enable.

Package C State Control

Package C State

This feature allows the user to set the limit on the C State package register. The options
are C0/C1 state, C2 state, C6 (Non Retention) state, C6 (Retention) state, No Limit, and

Auto.

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Chapter 4: UEFI BIOS

CPU T State Control

Software Controlled T-States

Use this feature to enable Software Controlled T-States. The options are Disable and
Enable.

ChipsetConguration

Warning: Setting the wrong values in the following features may cause the system to
malfunction.

North Bridge

This feature allows the user to congure the following North Bridge settings.

UPIConguration

The following UPI information will display:

• Number of CPU

• Number of Active UPI Link

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base / Limit

• UPI Global MMIO High Base / Limit

• UPI Pci-e Conguration Base / Size

Degrade Precedence

Use this feature to set degrade precedence when system settings are in conict. Select

Topology Precedence to degrade Features. Select Feature Precedence to degrade Topol­ogy. The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable for the QPI to enter the L0p state for power saving. The options are Dis­able, Enable, and Auto.

Link L1 Enable

Select Enable for the QPI to enter the L1 state for power saving. The options are Dis­able, Enable, and Auto.

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Super X11SPA-TF/-T User's Manual

IO Directory Cache (IODC)

IO Directory Cache is an 8-entry cache that stores the directory state of remote IIO writes
and memory lookups, and saves directory updates. Use this feature to lower cache to
cache (C2C) transfer latencies. The options are Disable, Auto, Enable for Remote InvItoM
Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and
Enable for Remote InvItoM and Remote WCiLF.

SNC

Select Enable to use the "Sub NUMA (Non-Uniform Memory Access) Cluster" (SNC)
memory scheme, which supports full SNC (2-cluster) interleave and 1-way IMC interleave.
Select Auto for 1-cluster or 2-cluster support depending on the status of IMC (Integrated
Memory Controller) Interleaving. The options are Disable, Enable, and Auto.

XPT Prefetch

Select Enable for Extended (Xtended) Prediction Table (XPT) Prefetch support which
will allow a read request to be sent to the memory controller requesting the prefetch
in parallel to an LLC (Last Level Cache) look-up. The options are Disable and Enable.

KTI Prefetch

KTI Prefetch is a feature that enables memory read to start early on a DDR bus, where
the KTI Rx path will directly create a Memory Speculative Read command to the memory
controller. The options are Disable and Enable.

Local/Remote Threshold

Use this feature to congure the threshold settings for local and remote systems that

are connected in the network. The options are Disable, Auto, Low, Medium, and High.

Stale AtoS

Select Enable to remove the contents and the structures of the les that are no longer

needed in the remote host server but are still in use by the local client machine from
Directory A to Directory S in the NFS (Network File System) to optimize system perfor­mance. The options are Disable, Enable, and Auto.

LLC Dead Line Alloc

Select Enable to opportunistically ll the deadlines in LLC (Last Level Cache). The op­tions are Disable, Enable, and Auto.

Isoc Mode

Select Enable for Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.

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MemoryConguration

Enforce POR

Select POR (Plan of Record) to enforce POR restrictions on DDR4 frequency and volt­age programming. The options are POR and Disable.

PPR Type

Use this feature to select Post Package Repair Type. The options are Auto, Hard PPR,
Soft PPR, and PPR Disabled.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules.
The options are Auto, 1866, 2000, 2133, 2400, 2666, and 2933.

Data Scrambling for DDR4

Use this feature to enable or disable data scrambling for DDR4 memory. The options
are Auto, Disable, and Enable.

tCCD_L Relaxation

Select Enable to get TCDD settings from SPD (Serial Presence Detect) and implement
into memory RC code to improve system reliability. Select Disable for TCCD to follow
Intel POR. The options are Auto and Disable.

tRWSR Relaxation

Select Enable to use the same tRWSR DDR timing setting among all memory channels,
in which case, the worst case value among all channels will be used. Select Disable to
use different values for the tRWSR DDR timing settings for different channels as trained.
The options are Disable and Enable.

2x Refresh

Use this feature to select the memory controller refresh rate to 2x refresh mode. The
options are Auto and Enable.

Page Policy

Use this feature to set the page policy for onboard memory support. The options are

Auto, Closed, and Adaptive.

IMC Interleaving

Use this feature to congure interleaving settings for the IMC (Integrated Memory

Controller), which will improve memory performance. The options are Auto, 1-way
Interleave, and 2-way Interleave.

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Memory Topology

This feature displays the information of onboard memory modules as detected by the
BIOS.

MemoryRASConguration

Static Virtual Lockstep Mode

Select Enable to run the system's memory channels in lockstep mode to minimize
memory access latency. The options are Disable and Enable.

Mirror Mode

This feature allows memory to be mirrored between two channels, providing 100%
redundancy. The options are Disable, Mirror Mode 1LM, and Mirror Mode 2LM.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.

Correctable Error Threshold

Use this feature to specify the threshold value for correctable memory-error logging,
which sets a limit on the maximum number of events that can be logged in the memory
error log at a given time. The default setting is 100.

Intel® Run Sure

Select Enable to support Intel Run Sure Technology to further enhance critical data
protection and to increase system uptime and resiliency. The options are Disable
and Enable.

SDDC Plus One

Single Device Data Correction (SDDC) organizes data in a single bundle (x4/x8 DRAM).
If any or all the bits become corrupted, corrections occur. The x4 condition is corrected
on all cases. The x8 condition is corrected only if the system is in Lockstep Mode. The
options are Disable and Enable.

ADDDC Sparing

Adaptive Double Device Data Correction (ADDDC) Sparing detects when the prede­termined threshold for correctable errors is reached, copying the contents of the failing
DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The
options are Disable and Enable.

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Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected on a memory module and send the correction to the requestor (the original
source). When this feature is set to Enable, the IO hub will read and write back one
cache line every 16K cycles if there is no delay caused by internal processing. By us-

ing this method, roughly 64 GB of memory behind the IO hub will be scrubbed every

day. The options are Disable and Enable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before the
next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24.
The default setting is 24.

IIOConguration

EV DFX Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces­sor will always remain clear during electric tuning. The options are Disable and Enable.

CPUConguration

IOU1 (II0 PCIe Br2)

This feature congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (II0 PCIe Br3)

This feature congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

CPU SLOT7 PCI-E 3.0 x16/CPU SLOT1 PCI-E 3.0 x16/M.2C01 PCI-E

3.0 x4/M.2C02 PCI-E 3.0 x4/M.2C03 PCI-E 3.0 x4/M.2C04 PCI-E 3.0 x4

Link Speed

Use this feature to select the link speed for the PCI-E port specied by the user. The

options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

The following information will also be displayed:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

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PCI-E Port Max Payload Size

Selecting Auto for this feature will enable the motherboard to automatically detect
the maximum Transaction Layer Packet (TLP) size for the connected PCI-E device,

allowing for maximum I/O efciency. Selecting 128B or 256B will designate maximum

packet size of 128 or 256. The options are 128B, 256B, and Auto.

IOATConguration

Disable TPH

TPH is used for data-tagging with a destination ID and a few important attributes. It
can send critical data to a particular cache without writing through to memory. Select
No in this feature for TLP Processing Hint support, which will allow a "TPL request"
to provide "hints" to help optimize the processing of each transaction occurred in the
target memory space. The options are No and Yes.

Prioritize TPH

Use this feature to enable Prioritize TPH support. The options are Enable and Disable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support, which will allow certain transac­tions to violate the strict-ordering rules of PCI bus for a transaction to be completed
prior to other transactions that have already been enqueued. The options are Disable
and Enable.

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support
reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through
the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across
Intel platforms, providing greater reliability, security and availability in networking and
data-sharing. The options are Enable and Disable.

by

ACS Control

This feature allows users to choose whether they want to enable or disable PCI-E Ac­cess Control Services (ACS) Extended Capability. The options are Enable and Disable.

Interrupt Remapping

Use this feature to enable Interrupt Remapping support, which detects and controls
external interrupt requests. The options are Enable and Disable.

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PassThrough DMA

Use this feature to allow devices such as network cards to access the system memory
without using a processor. Select Enable to use the Non-Isoch VT-d Engine Pass
Through Direct Memory Access (DMA) support. The options are Enable and Disable.

ATS

Use this feature to enable Non-Isoch VT-d Engine Address Translation Services (ATS)
support. ATS translates virtual addresses to physical addresses. The options are En-

able and Disable.

Posted Interrupt

Use this feature to enable VT-d Posted Interrupt. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Use this feature to maintain setting coherency between processors or other devices.
Select Enable for the Non-Isoch VT-d engine to pass through DMA to enhance system
performance. The options are Enable and Disable.

Intel® VMD Technology

Intel® VMD for Volume Management Device on CPU1

VMDCongforPStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the feature above is set to Enable, the following features will become avail-

able for conguration:

CPU SLOT2/3/4/5 PCI-E 3.0 VMD (Available when the device is detected by
the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCI-E root ports 1A~1D. The options
are Disable and Enable.

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VMDCongforPStack1

Intel VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the feature above is set to Enable, the following features will become avail-

able for conguration:

CPU SLOT7 PCI-E 3.0 x16 VMD/CPU SLOT6 PCI-E 3.0 x8 VMD (Available when
the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCI-E root ports 2A~2D. The options
are Disable and Enable.

VMDCongforPStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the feature above is set to Enable, the following features will become avail-

able for conguration:

CPU SLOT1 PCI-E 3.0 x16 VMD/M.2C01 PCI-E 3.0 x4 VMD/M.2C02 PCI-E 3.0 x4
VMD/M.2C03 PCI-E 3.0 x4 VMD/M.2C04 PCI-E 3.0 x4 VMD (Available when the
device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCI-E root ports 3A~3D. The options
are Disable and Enable.

PCI-E Completion Timeout Disable

Use this feature to enable PCI-E Completion Timeout support for electric tuning. The
options are Yes, No, and Per-Port.

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South Bridge

The following USB information will display:

• USB Module Version

• USB Devices

Legacy USB Support

This feature enables support for USB 2.0 and older. The options are Enabled, Disabled,
and Auto.

XHCI Hand-off

When this feature is disabled, the motherboard will not support USB 3.0. The options are

Enabled and Disabled.

Port 60/64 Emulation

This feature allows legacy I/O support for USB devices like mice and keyboards. The options
are Enabled and Disabled.

PCIe PLL SSC

Select Enable for PCH PCI-E Spread Spectrum Clocking support, which will allow the BIOS
to monitor and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. The options are Enable and Disable.

Azalia

Use this feature to enable or disable Azalia audio devices. If Auto is selected, BIOS will
automatically enable Azalia once an Azalia device is detected. The options are Enable,
Disable, and Auto.

Azalia PME Enable

Use this feature to enable or disable PME (Power Management Event) for Azalia. The
options are Enable and Disable.

ServerMEConguration(forX11SPA-TFonly)

The following General ME Conguration will display:

• Oper. Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1

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• ME Firmware Status #2

• Current State

• Error Code

WorkstationMeConguration(forX11SPA-Tonly)

The following General ME Conguration will display:

• Oper. Firmware Version

• Me Firmware

• Me Firmware SKU

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

PCHSATAConguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the
SATA devices that are supported by the Intel PCH chip and displays the following features:

SATA Controller

This feature enables or disables the onboard SATA controller supported by the Intel PCH
chip. The options are Disable and Enable.

CongureSATAas

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID.

SATA HDD Unlock

This feature allows the user to remove any password-protected SATA disk drives. The options
are Enable and Disable.

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Aggressive Link Power Management

When this feature is set to Enable, the SATA AHCI controller manages the power usage of
the SATA link. The controller will put the link in a low power mode during extended periods of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.

*If the feature "Congure SATA as" above is set to RAID, the following features will
become available for conguration:

SATA Port 0 ~ Port 7

This feature displays the information detected on the installed SATA drive on the particular
SATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0 ~ Port 7 Hot Plug

Set this feature to Enable for hot plug support, which will allow the user to replace a SATA
drive without shutting down the system. The options are Disable and Enable.

Port 0 ~ Port 7 Spin Up Device

On an edge detect from 0 to 1, set this feature to allow the PCH to initialize the device.
The options are Disable and Enable.

Port 0 ~ Port 7 SATA Device Type

Use this feature to specify if the SATA port specied by the user should be connected to a

Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State
Drive.

PCIe/PCI/PnPConguration

The following information will display:

• PCI Bus Driver Version

• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.

The options are Disabled and Enabled.

SR-IOV Support

Use this feature to enable or disable Single Root I/O Virtualization Support. The options are
Disabled and Enabled.

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MMIO High Base

Use this feature to select the base memory size according to memory-address mapping for
the I/O hub. The options are 56T, 40T, 24T, 16T, 4T, 2T, and 1T.

MMIO High Granularity Size

Use this feature to select the high memory size according to memory-address mapping for

the I/O hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

Maximum Read Request

Use this feature to select the Maximum Read Request size of the PCI-Express device, or
select Auto to allow the System BIOS to determine the value. The options are Auto, 128
Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

Use this feature to select the low base address for PCI-E adapters to increase base memory.

The options are 1G, 1.5G, 1.75G, 2G, 2.25G, and 3G.

NVMe Firmware Source

Use this feature to select the NVMe rmware to support booting. The options are Vendor
Dened Firmware and AMI Native Support. The default option, VendorDenedFirmware,

is pre-installed on the drive and may resolve errata or enable innovative functions for the
drive. The other option, AMI Native Support, is offered by the BIOS with a generic method.

VGA Priority

Use this feature to select VGA priority when multiple VGA devices are detected. Select

Onboard to give priority to your onboard video device. Select Offboard to give priority to your
graphics card. The options are Onboard and Offboard.

CPU SLOT1 PCI-E 3.0 x16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU SLOT2 PCI-E 3.0 x8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU SLOT3 PCI-E 3.0 x16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU SLOT4 PCI-E 3.0 x8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

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CPU SLOT5 PCI-E 3.0 x16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU SLOT6 PCI-E 3.0 x8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU SLOT7 PCI-E 3.0 x16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

M.2C01 PCI-E 3.0 x4 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

M.2C02 PCI-E 3.0 x4 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

M.2C03 PCI-E 3.0 x4 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

M.2C04 PCI-E 3.0 x4 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

Bus Master Enable

This feature allows users to change Bus Master Enable policy. If Disabled is selected, this
policy will be enable based on device settings; if Enabled is selected, the policy will be enabled
all the time. The options are Disabled and Enabled.

Onboard LAN Option ROM Type

Use this feature to select which rmware function to be loaded for LAN Port1 used for system

boot. The options are Legacy and EFI.

Onboard LAN1 Option ROM

Use this feature to select which rmware function to be loaded for LAN Port1 used for system

boot. The options are Disabled, PXE, and iSCSI.

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Onboard LAN2 Option ROM

Use this feature to select which rmware function to be loaded for LAN Port 2 used for system

boot. The options are Disabled and PXE.

Onboard Video Option ROM

Use this feature to select the Onboard Video Option ROM type. The options are Disabled,
Legacy, and EFI.

NetworkStackConguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

IPv4 PXE Support

Select Enabled to enable IPv4 PXE boot support. The options are Disabled and Enabled.

IPv4 HTTP Support

Select Enabled to enable IPv4 HTTP boot support. The options are Disabled and Enabled.

IPv6 PXE Support

Select Enabled to enable IPv6 PXE boot support. The options are Disabled and Enabled.

IPv6 HTTP Support

Select Enabled to enable IPv6 HTTP boot support. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this feature to specify the wait time to press the ESC key to abort the PXE boot. Press
"+" or "-" on your keyboard to change the value. The default setting is 0.

Media Detect Count

Use this feature to specify the number of times media will be checked. Press "+" or "-" on
your keyboard to change the value. The default setting is 1.

SuperIOConguration

The following Super IO information will display:

• Super IO Chip AST2500

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