Supermicro X11SDV-16C-TP8F operation manual

X11SDV-16C/-12C/-8C-TP8F

USER MANUAL

Revision 1.0

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes

!

no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

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SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
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pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
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WARNING: This product can expose you to chemicals including
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The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
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Manual Revision 1.0

Release Date: June 07, 2018

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2018 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians and knowledgeable end users.
It provides information for the installation and use of the X11SDV-16C/-12C/-8C-TP8F
motherboard.

About This Motherboard

The Supermicro X11SDV-16C/-12C/-8C-TP8F motherboard supports an Intel® Xeon® D-2100
SoC processor. This a high performance, low powered Flex ATX motherboard that is ideal for
embedded networking and storage systems. The latest features for this motherboard inlcude
support for eight LAN ports with dual 10GbE SFP+ and dual 10Gbase-T ports, M.2 M-Key/B­Key connections, and an NVMe connection. Please note that this motherboard is intended to
be installed and serviced by professional technicians only. For processor/memory updates,
please refer to our website at http://www.supermicro.com/products/.

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and to prevent

damage done to the components or injury to yourself:

Warning! Indicates important information given to prevent equipment/property damage

or personal injury.

Warning! Indicates high voltage may be encountered when performing a procedure.

Important: Important information given to ensure proper system installation or to

relay safety precautions.

Note: Additional Information given to differentiate various models or to provide in­formation for correct system setup.

3

X11SDV-16C/-12C/-8C-TP8F User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Preface

Table of Contents

Chapter 1 Introduction

1.1 Checklist ...............................................................................................................................8

Quick Reference ...............................................................................................................11

Quick Reference Table ......................................................................................................13

Motherboard Features .......................................................................................................15

1.2 Processor Overview ...........................................................................................................18

1.3 Special Features ................................................................................................................18

Recovery from AC Power Loss .........................................................................................18

1.4 System Health Monitoring ..................................................................................................18

Onboard Voltage Monitors ................................................................................................19

Fan Status Monitor with Firmware Control .......................................................................19

Environmental Temperature Control .................................................................................19

System Resource Alert......................................................................................................19

1.5 ACPI Features ....................................................................................................................19

1.6 Power Supply .....................................................................................................................20

1.7 Serial Port ...........................................................................................................................20

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................21

Precautions .......................................................................................................................21

Unpacking .........................................................................................................................21

2.2 Motherboard Installation .....................................................................................................22

Tools Needed ....................................................................................................................22

Location of Mounting Holes ..............................................................................................22

Installing the Motherboard.................................................................................................23

2.3 Memory Support and Installation .......................................................................................24

Memory Support ................................................................................................................24

DIMM Module Population Conguration ...........................................................................24

DIMM Module Population Sequence ................................................................................25

DIMM Installation ..............................................................................................................26

DIMM Removal .................................................................................................................26

2.4 Rear I/O Ports ....................................................................................................................27

5

X11SDV-16C/-12C/-8C-TP8F User's Manual

2.5 Front Control Panel ............................................................................................................31

2.6 Connectors .........................................................................................................................36

Power Connections ...........................................................................................................36

Headers .............................................................................................................................38

2.7 Jumper Settings .................................................................................................................48

How Jumpers Work ...........................................................................................................48

2.8 LED Indicators ....................................................................................................................53

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................56

Before Power On ..............................................................................................................56

No Power ..........................................................................................................................56

No Video ...........................................................................................................................56

System Boot Failure ..........................................................................................................57

Memory Errors ..................................................................................................................57

Losing the System's Setup Conguration .........................................................................58

When the System Becomes Unstable ..............................................................................58

3.2 Technical Support Procedures ...........................................................................................60

3.3 Frequently Asked Questions ..............................................................................................61

3.4 Battery Removal and Installation .......................................................................................62

Battery Removal ................................................................................................................62

Proper Battery Disposal ....................................................................................................62

Battery Installation .............................................................................................................62

3.5 Returning Merchandise for Service ....................................................................................63

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................64

Starting the Setup Utility ...................................................................................................64

4.2 Main Setup .........................................................................................................................65

4.3 Advanced ............................................................................................................................67

4.4 Event Logs .........................................................................................................................95

4.5 IPMI ....................................................................................................................................97

4.6 Security .............................................................................................................................101

4.7 Boot ..................................................................................................................................106

4.8 Save & Exit .......................................................................................................................108

6

Preface

Appendix A BIOS Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................11 2

Appendix C Standardized Warning Statements

Battery Handling ..............................................................................................................114

Product Disposal .............................................................................................................116

Appendix D UEFI BIOS Recovery

Appendix E Dual Boot Block

BIOS Boot Block .............................................................................................................122

BIOS Boot Block Corruption Occurrence ......................................................................122

7

X11SDV-16C/-12C/-8C-TP8F User's Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader. Supermicro
boards are designed to provide you with the highest standards in quality and performance.

Several important parts that are included with the motherboard are listed below. If anything
listed is damaged or missing, please contact your retailer.

1.1 Checklist

Main Parts List

Description Part Number Quantity

Supermicro Motherboard X11SDV-16C/-12C/-8C-TP8F 1

SATA Cables CBL-0044L 4

Quick Reference Guide MNL-2007-QRG 1

MiniSAS HD Cables CBL-SAST-0616 2

I/O Shield MCP-260-00098-0N 1

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website

for possible updates to the manual revision level.

8

Chapter 1: Introduction

Figure 1-1. X11SDV-16C-TP8F Motherboard Image

9

X11SDV-16C/-12C/-8C-TP8F User's Manual

1

JSMB1

1

JI2C1

JI2C2

JPME2

1

JL1
USB 0/1

2

JMP1_SRW1

JMP1_SRW2

JMP1

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

PCI-E 3.0 X1

JMD2_SRW1

JPG1

JWD1

JPUSB1

Figure 1-2. X11SDV-8C-TP8F Motherboard Layout

(not drawn to scale)

A

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JLANLED1

S-SGPIO1

A

C

C

LED3

LED2

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JTGLED1

JNVI2C1

UID

VGA

JMD1_SRW1

LEDT4

C

LEDT2

C

PRESS FIT

A

A

SFP1
LAN 7/8

A

C

A

C

LEDT1

LAN 5/6

LEDT3

CPU

LAN 3/4

LAN 1/2

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

JPL1

LAN1/2/3/4

USB 2/3

JTGLED2

S-SATA0

JSTBY1

JSD1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

:SUPER DOM

JNS1

JD1

FANB

4-7:SPEAKER

1-3:PWR LED

JSIM1

M.2-H

2

S-SATA3

JTPM1

JF1:

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

COM1

JBT1

JGP1

FANA

JF1

A

C

LED1

:LEDPWR

JPW1

DIMMB1

DIMMA1

BAR CODE

DIMME1

DIMMD1

X11SDV-8C-TP8F

16

REV:1.02

FAN4

MADE IN USA

BT1

FAN3

JPH1

FAN2

FAN1

Note: Components not documented are for internal testing only.

10

JMP1_SRW2

JMP1_SRW1

JSMB1

JI2C1
JWD1
JI2C2

JPUSB1

JPME2

JMP1

JL1

JMD2_SRW1

USB0/1

JSIM1

USB2/3

JMD2

JTGLED2

S-SATA3

S-SATA2
S-SATA1

S-SATA0

JSTBY1

JMD1

JPME2

1

JL1
USB 0/1

USB 2/3

JTGLED2

S-SATA0

JSTBY1

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1_SRW1

JMP1

:SUPER DOM

JNS1

JD1

4-7:SPEAKER

1-3:PWR LED

2

JMP1_SRW2

JPG1

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

JPG1

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

LEDM1

SLOT6

JIPMB1

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JLANLED1

S-SGPIO1

2

JTPM1

JF1:

HDD

OH

PWR

NIC1NIC2

X

RST

LED

FF

ON

I-SATA4-7

SLOT7

JIPMB1

JTGLED1

COM1

PWR
LED

JBT1

Quick Reference

JMD1_SRW1

LEDT2

LEDT4

LED3

LED2

VGA

UID

A

A

UID

C

C

LED3

LED2

JMD1_SRW1

CPU SLOT7 PCI-E 3.0 X8

JNVI2C1

JGP1

JF1

16

A

C

LED1

FANA

:LEDPWR

DIMME1

DIMMD1

VGA

LEDT4

LEDT2

BAR CODE

LEDT3

LEDT1

LAN7/8

PRESS FIT

LEDT1

A

A

C

C

A

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

X11SDV-8C-TP8F

REV:1.02

FAN4

LAN5/6

LAN 5/6

MADE IN USA

LAN3/4

LAN 3/4

FAN3

Chapter 1: Introduction

LAN1/2

IPMI

USB4/5 (3.0)

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

IPMI_LAN

LAN 1/2

USB 4/5 (3.0)

JPI2C1

JPV1

JPW1

DIMMB1

DIMMA1

BT1

JPH1

FAN1

FAN2

JPL1

JPI2C1

JPV1
JLANLED1
JNVI2C1
JTGLED1

S-SGPIO1

JPW1

DIMME1
DIMMD1
DIMMB1

DIMMA1

FAN1

JSD1

JD1

JNS1

FANB

LED1

FANA

JGP1

COM1

I-SATA4-7

JF1

JBT1

FAN4

BT1

FAN3

FAN2

JPH1

I-SATA0-3

JTPM1

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connec-

tions. Jumpers/LED indicators not indicated are used for testing only.

• " " indicates the location of Pin 1.

• When JLED1 (Onboard Power LED indicator) is on, system power is on. Unplug the power

cable before installing or removing any components.

11

X11SDV-16C/-12C/-8C-TP8F User's Manual

Figure 1-3. X11SDV-TP8F Series Motherboard Model Variation Table

Motherboard Model Name X11SDV-8C-

TP8F

Processor Name D-2146NT D-2166NT D-2183IT

Number of Cores 8 12 16

Number of Threads 16 24 32

Processor Base Frequency 2.30 GHz 2.00 GHz 2.20 GHz

Max Turbo Frequency 3.00 GHz 3.00 GHz 3.00 GHz

SoC Max TDP 80 W 85 W 100 W

Number of Memory Channels 4 4 4

Maximum Memory Speed 2133 MHz 2133 MHz 2400 MHz

Intel® Turbo Boost Technology 2.00 2.00 2.00

Embedded Options Available Yes Yes Yes

Integrated Intel® QuickAssist Technology Yes Yes No

Intel® Virtualization Technology (VT-x) Yes Yes Yes

Intel® Virtualization Technology for Directed

I/O (VT-d)

Intel® TSX-NI Yes Yes Yes

Instruction Set 64-bit 64-bit 64-bit

Instruction Set Extensions Intel® AVX2 Intel® AVX2 Intel® AVX2

Number of AVX-512 FMA Units 1 1 1

Yes Yes Yes

X11SDV-12C-

TP8F

X11SDV-16C-

TP8F

12

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

JBT1 CMOS Clear Open: Normal, Closed: Clear CMOS

JI2C1, JI2C2 SMB to PCI-E Slots Enable/Disable Pins 2-3 (Disabled)

JNS1 Mini-SAS HDD NVMe/SATA Mode Select Pins 1-2: SATA (Default), Pins 2-3: NVMe

JPG1 Onboard VGA Enable Pins 1-2 (Enabled)

JPL1 LAN1/2/3/4 Enable Pins 1-2 (Enabled)

JPME2 Manufacturing Mode Select Pins 1-2 (Normal)

JPUSB1 USB Wake Up Pins 1-2 (Enabled)

JWD1 Watch Dog Pins 1-2 (Reset)

LED Description Status

LED1 Power LED Solid Green: Power On

LED2 UID LED Solid Blue: Unit Identied

LED3 Overheat/PWR Fail/Fan Fail

LEDM1 BMC Heartbeat Blinking Green: BMC Normal

Solid Red: Overheat

Blinking Red: PWR Fail or Fan Fail

Connector Description

BT1 Onboard Battery

COM1 COM Header

FAN1 - FAN4, FANA, FANB System/CPU Fan Headers

IPMI_LAN Dedicated IPMI LAN Port

I-SATA0-3, I-SATA4-7 Eight Intel® PCH SATA 3.0 Ports or Two NVMe U.2 Ports

(See jumper JNS1 setting)

JD1 PWR LED/Buzzer Header (Pins 1-4: PWR LED, Pins 5-7: Buzzer)

JF1 Front Control Panel Header

JGP1 General Purpose I/O Header

JIPMB1 System Management Bus Header (for IPMI only)

JL1 Chassis Intrusion Header

JLANLED1 LAN1 - LAN4 Activity LED Header

JMD1 M.2 PCI-E 3.0 x4/S-SATA5 Connector (M-Key 2280)

JMD2 M.2 PCI-E 3.0 x2/S-SATA4 Connector (B-Key 3042)

JMD1_SRW1, JMD2_SRW1 M.2 Holding Screws

JMP1 Mini PCI-E x1 Connector

JMP1_SRW1 Mini PCI-E x1 Connector Holding Screw

JNVI2C1 NVMe I2C Header

JPI2C1 Power I2C System Management Bus (Power SMB) Header

JPH1 4-pin Power Connector for HDD use

Note: Table is continued on the next page.

13

X11SDV-16C/-12C/-8C-TP8F User's Manual

Connector Description

JPW1 24-pin ATX Main Power Connector

JPV1 12V 8-pin DC Power Connector (Required to provide extra power to CPU, or as

alternative power for special enclosure when the 24 pin ATX power is not in use)

JSD1 SATA Disk On Module (DOM) Power Connector

JSIM1 Nano SIM Slot for M.2 B-Key WAN card support

JSMB1 System Management Bus Header

JSTBY1 +5V Standby Power Header

JTGLED1 LAN7/LAN8 Activity LED Header

JTGLED2 LAN5/LAN6 Activity LED Header

JTPM1 Trusted Platform Module (TPM)/Port 80 Connector

LAN1 - LAN4 1GbE (RJ45) LAN Ports

LAN5 - LAN6 10GbE (RJ45) LAN Ports

LAN7 - LAN8 10G SFP+ LAN Ports

S-SATA0 - S-SATA3 SATA 3.0 Ports

S-SGPIO1 Serial General Purpose I/O Header for S-SATA0-3

SLOT6 CPU PCI-E 3.0 x16 Slot

SLOT7 CPU PCI-E 3.0 x8 Slot

UID Unit Identier Button

USB0/1, USB2/3 Front Accessible USB 2.0 Headers

USB4/5 Back Panel USB 3.0 Ports

VGA VGA Port

14

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• Intel® Xeon® D-2100 Series SoC with a TDP of up to 100W

Memory

• Supports up to 256GB of ECC RDIMM or 512GB of ECC LRDIMM DDR4 memory with speeds of up to 2400MHz

DIMM Size

• Up to 128GB at 1.2V

Expansion Slots

• Three (3) PCI-E 3.0 slots: one PCI-E 3.0 x16 slot, one PCI-E 3.0 x8 slot, one Mini PCI-E 3.0 x1 slot

• One (1) M.2 PCI-E 3.0 x4 slot

• One (1) M.2 PCI-E 3.0 x2 slot

Network

• Intel SoC integrated 10G Controller

Baseboard Management Controller (BMC)

• ASpeed AST2500

Graphics

• Graphics controller via ASpeed AST2500

I/O Devices

• Serial (COM) Header • One (1) front accessible serial header (COM1)

• SATA 3.0 • Twelve (12) SATA 3.0 ports (two additional via the M.2 connector)

• RAID (PCH) • RAID 0, 1, 5, and 10

Peripheral Devices

• Four (4) front accessible USB 2.0 headers (USB0/1, USB2/3)

• Two (2) USB 3.0 ports on the I/O back panel (USB4/5)

BIOS

• 512Mb AMI BIOS® SPI Flash BIOS

• Plug and Play (PnP), SPI dual/quad speed support, real time clock (RTC) wakeup, dual boot block, ACPI 3.0, BIOS rescue

hot-key, and SMBIOS 2.7

Note: The table above is continued on the next page.

15

X11SDV-16C/-12C/-8C-TP8F User's Manual

Motherboard Features

Power Management

• ACPI power management

• CPU fan auto-off in sleep mode

• Power button override mechanism

• Power-on mode for AC power recovery

System Health Monitoring

• Onboard voltage monitors for CPU cores, +1.8V, +3.3V, +5V, +/-12V, +3.3V Stby, +5V Stby, VBAT, HT, Memory, PCH

temperature, system temperature, and memory temperature

• CPU 5+1 phase switching voltage regulator

• CPU/System overheat control

• CPU Thermal Trip support

Fan Control

• Fan status monitoring with rmware 4-pin fan speed control via IPMI interface

• Low noise fan speed control

System Management

• PECI (Platform Environment Control Interface) 3.1 support

• Intel® Node Manager

• IPMI 2.0 with KVM support

• SuperDoctor® 5, Watch Dog, NMI

• Chassis Intrusion header and detection

• Power supply monitoring

LED Indicators

• CPU/system overheat LED

• Power / suspend-state indicator LED

• Fan failed LED

• UID / Remote UID

• HDD activity LED

• LAN activity LED

Other

• RoHS

Dimensions

• Flex ATX form factor (9" x 7.25") (228.6 mm x 184.15 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

16

Figure 1-4.

Chipset Block Diagram

Chapter 1: Introduction

JLAN2

DDR4 1866/2133/2400

E1

JLAN1

M.2(M-key)CONN

M.2(B-key)CONN

miniPCIe

SATA3.0#3
SATA3.0#2
SATA3.0#1
SATA3.0#0

MINI-SAS HD / U.2

E

DDR4 DIMM

I350 AM4

D1

D

DDR4 DIMM

PCIE 3.0 x4

PCIE 3.0 x4

SATA3.0#5

PCIE 3.0 x2

SATA3.0#4

PCIE 3.0 x1

SATA3.0

PCIE 3.0 x8 /

SATA GEN3 x8

PCIE 3.0 x1

U1

PE2[15:12]

PE2[11:8]

PCH

Flexible I/O
17

Flexible I/O
8,9

Flexible I/O
16

Flexible I/O
11

Flexible I/O
12~15

Flexible I/O
18~25

Flexible I/O
10

SoC

CPU

Flexible I/O
6,7

PE2[7:0]

PE1[15:0]

10G PHY

KR

SFI

eSPI

DDR4 1866/2133/2400

A1

A

DDR4 DIMM

PCIE 3.0 x8

JPCIE1 SLOT7 PCIE 3.0 x8

PCIE 3.0 x16

JPCIE2 SLOT6 PCIE 3.0 x16

X557-AT2

SPI

JTPM1 Header

USB 3.0/2.0

USB 2.0

B1

B

DDR4 DIMM

SFP+

USB 3.0 Rear I/O

USB2.0 HUB

GL854G

JLAN3

M.2(B-key)CONN

USB 2.0 Header

USB 2.0 Header

miniPCIe

DDR 3

COM1

SPI

FLASH

BMC

AST2500

3rd LAN

+

USB3.0

REAR IO

1G LAN

1G LAN

10G LAN

SFP+

VGA

IPMI LAN

PHY

RTL8211F

VGA CONN

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

17

X11SDV-16C/-12C/-8C-TP8F User's Manual

1.2 Processor Overview

The Intel Xeon D-2100 Series SoC processor, with up to 16 cores and up to 100W of
power, offers performance, reliability, and high intelligence. As a low-power system-on-a-chip
motherboard, the X11SDV-16C/-12C/-8C-TP8F is optimized for a variety of workloads that
include networking and cloud storage.

• ACPI Power Management Logic Support Rev. 4.0a

• Intel Turbo Boost Technology

• Congurable TDP (cTDP) and Lower-Power Mode

• Adaptive Thermal Management/Monitoring

• PCI-E 3.0, SATA 3.0, NVMe, and M.2 (B-Key and M-Key) connectors

• System Management Bus (SMBus) Specication Version 2.0

• Intel Trusted Execution Technology (Intel TXT)

• Intel Rapid Storage Technology

• Intel Virtualization Technology for Directed I/O (Intel VT-d)

1.3 Special Features

This section describes the health monitoring features of the X11SDV-16C/-12C/-8C-TP8F
motherboard. The motherboard has an onboard System Hardware Monitor chip that supports
system health monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

1.4 System Health Monitoring

The motherboard has an onboard Baseboard Management Controller (BMC) chip that
supports system health monitoring.

18

Chapter 1: Introduction

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. Users can

adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time readings

of these voltage levels are all displayed in the BIOS.

Fan Status Monitor with Firmware Control

The system health monitor chip can check the RPM status of a cooling fan. The CPU and
chassis fans are controlled by BIOS Thermal Management through the back panel.

Environmental Temperature Control

System Health sensors monitor temperatures and voltage settings of onboard processors
and the system in real time via the IPMI interface. Whenever the temperature of the CPU or

the system exceeds a user-dened threshold, system/CPU cooling fans will be turned on to

prevent the CPU or the system from overheating

Note: To avoid possible system overheating, please provide adequate airow to your

system.

System Resource Alert

This feature is available when used with SuperDoctor 5® in the Windows OS or in the Linux
environment. SuperDoctor is used to notify the user of certain system events. For example,

you can congure SuperDoctor to provide you with warnings when the system temperature,
CPU temperatures, voltages and fan speeds go beyond a predened range.

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system, including its hardware, operating
system and application software. This enables the system to automatically turn on and off
peripherals such as CD-ROMs, network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play, and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures,

while providing a processor architecture-independent implementation that is compatible with
Windows 7, Windows 8, Windows 10, Windows 2012/2012 Server, and Windows 2016 Server
operating systems.

19

X11SDV-16C/-12C/-8C-TP8F User's Manual

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates.

It is strongly recommended that you use a high quality power supply that meets ATX power

supply Specication 2.02 or above. It must also be SSI compliant. For more information,

please refer to the website at http://www.ssiforum.org/. Additionally, in areas where noisy

power transmission is is present, you may choose to install a line lter to shield the computer

from noise. It is recommended that you also install a power surge protector to help avoid
problems caused by power surges.

Note 1: The X11SDV-16C/-12C/-8C-TP8F motherboard alternatively supports an 8-pin
12V DC input power supply for embedded applications. The 12V DC input is limited to
a 36A design. It provides up to 432W power input to the motherboard. Keep onboard

power use within the power limits specied above. Overcurrent DC power use may

cause damage to the motherboard.

1.7 Serial Port

The X11SDV-16C/-12C/-8C-TP8F motherboard supports one serial communication
connection. COM Port 1 can be used for input/output. The UART provides legacy speeds
with a baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250
K, 500 K, or 1 Mb/s, which support high-speed serial communication devices.

20

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To prevent damage to your
motherboard, it is important to handle it very carefully. The following measures are generally

sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure your computer chassis provides excellent conductivity

between the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of onboard CMOS battery. Do not install the onboard battery

upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

21

X11SDV-16C/-12C/-8C-TP8F User's Manual

2.2 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.

Phillips Screwdriver (1)

Tools Needed

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

JMD2

S-SATA2

I-SATA0-3

PRESS FIT PRESS FIT

FANB

JPG1

JWD1

M.2-H

S-SATA3

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JLANLED1

S-SGPIO1

2

JTPM1

JF1:

HDD

OH

PWR

NIC1NIC2

X

RST

LED

FF

ON

I-SATA4-7

1

JPME2

1

JL1

USB 0/1

USB 2/3

JTGLED2

S-SATA0

JSTBY1

JSD1

JMP1_SRW1

JSMB1

JI2C1

JMP1_SRW2

JI2C2

JMP1

PCI-E 3.0 X2/S-SATA4

:SUPER DOM

JNS1

JD1

4-7:SPEAKER

1-3:PWR LED

S-SATA1

PWR
LED

COM1

JIPMB1

JTGLED1

JBT1

Phillips Screws (6)

A

A

UID

C

C

LED3

LED2

JMD1_SRW1

CPU SLOT7 PCI-E 3.0 X8

JNVI2C1

JGP1

JF1

16

A

C

LED1

FANA

:LEDPWR

DIMME1

DIMMD1

VGA

LEDT4

LEDT2

BAR CODE

PRESS FIT

LEDT1

A

A

C

C

A

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

LAN 5/6

Standoffs (6)

Only if Needed

LAN 3/4

LAN 1/2

BT1

FAN3

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

JPI2C1

FAN1

JPL1:

2-3:DISABLE

1-2:ENABLE

LAN1/2/3/4

JPL1

Location of Mounting Holes

Note: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

22

Chapter 2: Installation

Installing the Motherboard

1. Locate the mounting holes on the motherboard. See the previous page for the location.

2. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

3. Install standoffs in the chassis as needed.

4. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

5. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

6. Repeat Step 5 to insert #6 screws into all mounting holes.

7. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or components might
look different from those shown in this manual.

23

X11SDV-16C/-12C/-8C-TP8F User's Manual

2.3 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules.

Important: Exercise extreme care when installing or removing DIMM modules to pre-

vent any possible damage.

Memory Support

The X11SDV-16C/-12C/-8C-TP8F motherboard supports up to 256GB of ECC RDIMM or
512GB of ECC LRDIMM DDR4 memory with speeds of up to 2400MHz in four memory slots.
Populating these DIMM slots with memory modules of the same type and size will result in
interleaved memory, which will improve memory performance.

DIMM Module Population Conguration

For optimal memory performance, follow the table below when populating memory.

Memory Population (Balanced)

DIMMA1 DIMMB1 DIMMD1 DIMME1

4GB 4GB 8GB

4GB 4GB 4GB 4GB 16GB

8GB 8GB 16GB

8GB 8GB 8GB 8GB 32GB

16GB 16GB 32GB

16GB 16GB 16GB 16GB 64GB

32GB 32GB 64GB

32GB 32GB 32GB 32GB 128GB

64GB 64GB 128GB

64GB 64GB 64GB 64GB 256GB

128GB 128GB 256GB

Total System

Memory

128GB 128GB 128GB 128GB 512GB

24

Chapter 2: Installation

DIMM Module Population Sequence

When installing memory modules, the DIMM slots should be populated in the following order:
DIMMB1, DIMMA1, DIMME1, DIMMD1.

• Always use DDR4 DIMM modules of the same type, size, and speed.

• Mixed DIMM speeds can be installed. However, all DIMMs will run at the speed of the

slowest DIMM.

• The motherboard will support odd-numbered modules (one or three modules installed).

However, for best memory performance, install DIMM modules in pairs to activate memory
interleaving.

JPME2

1

JL1

USB 0/1

USB 2/3

JTGLED2

S-SATA0

JSTBY1

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1_SRW1

JMP1

:SUPER DOM

JNS1

JD1

4-7:SPEAKER

1-3:PWR LED

2

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

JPG1

JMP1_SRW2

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JLANLED1

S-SGPIO1

2

JTPM1

JF1:

HDD

OH

PWR

NIC1NIC2

X

RST

LED

FF

ON

I-SATA4-7

PWR
LED

JIPMB1

JTGLED1

JBT1

COM1

A

A

UID

C

C

LED3

LED2

JMD1_SRW1

CPU SLOT7 PCI-E 3.0 X8

JNVI2C1

JGP1

JF1

16

A

C

LED1

FANA

:LEDPWR

VGA

DIMME1

DIMMD1

LEDT4

C

LEDT2

C

BAR CODE

PRESS FIT

LEDT1

A

A

A

SFP1
LAN 7/8

A

C

C

LAN 5/6

LEDT3

CPU

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

LAN 3/4

FAN3

BT1

LAN 1/2

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

JPI2C1

FAN1

JPL1:

1-2:ENABLE

2-3:DISABLE

JPL1

LAN1/2/3/4

DIMMA1

DIMMB1

DIMMD1

DIMME1

25

X11SDV-16C/-12C/-8C-TP8F User's Manual

DIMM Installation

1. Insert the desired number of DIMMs into
the memory slots, starting with DIMMB1,
DIMMA1, DIMME1, DIMMD1. For best

performance, please use the memory
modules of the same type and speed in
the same bank.

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

5. Press both ends of the module straight
down into the slot until the module snaps
into place.

A

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

PWR
ON

PRESS FIT PRESS FIT

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

COM1

JF1:

HDD

OH

PWR

NIC1NIC2

X

RST

LED

FF

LED

I-SATA4-7

A

C

C

LED3

LED2

CPU SLOT7 PCI-E 3.0 X8

JNVI2C1

JBT1

JGP1

JF1

16

A

C

LED1

FANA

:LEDPWR

UID

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

1

JMP1_SRW1

JSMB1

1

JI2C1

JMP1_SRW2

JI2C2

JPME2

1

JMP1

PCI-E 3.0 X1

JL1
USB 0/1

JMD2_SRW1

G4

G1

S1

S3

USB 2/3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

JTGLED2

S-SATA0

S-SATA2

S-SATA1

:SUPER DOM

JSTBY1

I-SATA0-3

JNS1

JD1

FANB

JSD1

4-7:SPEAKER

1-3:PWR LED

PRESS FIT

VGA

JMD1_SRW1

LEDT4

A

C

LEDT2

A

C

SFP1
LAN 7/8

LAN 3/4

LEDT1

A

LAN 5/6

C

A

LEDT3

C

CPU

DIMME1

DIMMD1

BAR CODE

X11SDV-8C-TP8F

REV:1.02

FAN4

BT1

MADE IN USA

FAN3

JPL1:

1-2:ENABLE
2-3:DISABLE

LAN1/2/3/4

JPL1

IPMI_LAN

LAN 1/2

USB 4/5 (3.0)

JPI2C1

JPV1

JPW1

DIMMB1

DIMMA1

JPH1

FAN1

FAN2

Notches

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

DIMM Removal

Press both release tabs on the ends of the
DIMM module to unlock it. Once the DIMM
module is loosened, remove it from the
memory slot.

Release Tabs

Press both notches

straight down into

the memory slot.

26

Chapter 2: Installation

2.4 Rear I/O Ports

See Figure 2-1 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

A

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

A

LED3

C

C

LED2

UID

PRESS FIT

VGA

JMD1_SRW1

JPL1:

1-2:ENABLE

2-3:DISABLE

JPL1

LAN1/2/3/4

JPME2

1

JL1

USB 0/1

USB 2/3

JTGLED2

S-SATA0

JSTBY1

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1_SRW1

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JNS1

2

JPG1

JMP1_SRW2

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

LEDT4

LEDT2

A

C

A

C

SFP1
LAN 7/8

A

A

C

C

LEDT1

LEDT3

LAN 3/4

LAN 5/6

LAN 1/2

JLANLED1

JTGLED1

S-SGPIO1

JNVI2C1

CPU

2

JTPM1

PWR

RST

ON

JF1:

OH

X

FF

I-SATA4-7

JBT1

COM1

JGP1

JF1

HDD

PWR

NIC1NIC2

LED

LED

FANA

A

C

LED1

:LEDPWR

16

DIMME1

DIMMD1

BAR CODE

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

Figure 2-1. I/O Port Locations and Denitions

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

JPI2C1

FAN1

1

4

2

5

6

7

8

9

11

10

12

3

# Description # Description # Description

1 IPMI LAN 5 LAN1 9 LAN5

2 USB5 6 LAN4 10 SFP LAN8

3 USB4 7 LAN3 11 SFP LAN7

4 LAN2 8 LAN6 12 VGA

27

X11SDV-16C/-12C/-8C-TP8F User's Manual

VGA Port

A VGA video port is located near LAN ports 7/8 on the I/O back panel. See the board layout
below for the location.

LAN Ports

There are eight LAN ports located on the I/O back panel of the motherboard. LAN1 - LAN4
are RJ45 1GbE Ethernet ports, LAN5 - LAN6 are 10GbE ports, and LAN7 - LAN8 are 10G
SFP+ ports. The motherboard also offers one IPMI LAN port.

LAN Port

Pin Denitions

Pin# Denition Pin# Denition

1 TX_D1+ 5 BI_D3-

2 TX_D1- 6 RX_D2-

3 RX_D2+ 7 BI_D4+

4 BI_D3+ 8 BI_D4-

JPME2

JL1
USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

1

UID

JMD1_SRW1

5

4 3 2

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

6

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

1. VGA Port

2. LAN1/2

3. LAN3/4

4. LAN5/6

5. LAN7/8

6. IPMI LAN

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

28

Chapter 2: Installation

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB4/5) on the I/O back panel. The motherboard also has
two front access USB 2.0 headers (USB0/1, USB2/3). The onboard headers can be used to
provide front side USB access with a cable (not included).

Back Panel USB 4/5 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

A1 VBUS B1 Power

A2 D- B2 USB_N

A3 D+ B3 USB_P

A4 GND B4 GND

A5 Stda_SSRX- B5 USB3_RN

A6 Stda_SSRX+ B6 USB3_RP

A7 GND B7 GND

A8 Stda_SSTX- B8 USB3_TN

A9 Stda_SSTX+ B9 USB3_TP

A

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

1

JMP1_SRW1

JSMB1

1

JI2C1

JI2C2

JPME2

1

JMP1

JL1

USB 0/1

1

USB 2/3

2

JTGLED2

S-SATA0

:SUPER DOM

JSTBY1

JNS1

JD1

JSD1

4-7:SPEAKER

1-3:PWR LED

JPG1

JMP1_SRW2

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

LEDM1

2

JTPM1

OH

PWR

X

RST

FF

ON

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

FANA

C

JF1

A

LED1

:LEDPWR

C

LED2

C

UID

JMD1_SRW1

JNVI2C1

16

DIMME1

DIMMD1

VGA

LEDT2

BAR CODE

PRESS FIT

LEDT4

A

A

C

C

A

A

C

C

SFP1
LAN 7/8

X11SDV-8C-TP8F

REV:1.02

FAN4

LEDT1

LEDT3

CPU

LAN 5/6

MADE IN USA

LAN 3/4

Front Panel USB 0/1, 2/3 (2.0)

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 2 +5V

3 USB_N 4 USB_N

5 USB_P 6 USB_P

7 Ground 8 Ground

9 Key 10 NC

3

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

1. USB0/1

2. USB2/3

IPMI_LAN

LAN 1/2

FAN3

USB 4/5 (3.0)

JPI2C1

JPV1

JPW1

DIMMB1

BT1

DIMMA1

JPH1

FAN2

FAN1

3. USB4/5

29

X11SDV-16C/-12C/-8C-TP8F User's Manual

Unit Identier Button/UID LED Indicator

A Unit Identier (UID) button and an LED indicator are located on the motherboard. The UID

button is located next to the VGA port on the back panel. The UID LED is located at LED2,
next to the UID button. When you press the UID button, the UID LED will be turned on.
Press the UID button again to turn off the LED indicator. The LED indicator provides easy

identication of a system unit that may be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at https://www.

supermicro.com/support/manuals/.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

UID Button

Pin Denitions

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

1

2

A

A

UID

C

C

LED3

LED2

JMD1_SRW1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JF1:

NIC1NIC2

I-SATA4-7

HDD
LED

JNVI2C1

JBT1

COM1

JGP1

JF1

PWR
LED

16

A

C

LED1

FANA

:LEDPWR

DIMME1

DIMMD1

VGA

LEDT4

LEDT2

BAR CODE

PRESS FIT

LEDT1

A

A

C

C

A

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

LAN 5/6

LAN 3/4

FAN3

UID LED

Pin Denitions

Color Status

Blue: On Unit Identied

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

IPMI_LAN

LAN 1/2

USB 4/5 (3.0)

JPI2C1

JPV1

JPW1

DIMMB1

BT1

DIMMA1

JPH1

FAN2

FAN1

1. UID Button

2. UID LED

30

Chapter 2: Installation

2.5 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

A

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

A

LED3

C

C

LED2

UID

PRESS FIT

VGA

JMD1_SRW1

JPL1:
2-3:DISABLE

1-2:ENABLE

JPL1

LAN1/2/3/4

JPME2

1

JL1
USB 0/1

USB 2/3

JTGLED2

S-SATA0

JSTBY1

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JMP1_SRW1

JNS1

2

JPG1

JMP1_SRW2

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JLANLED1

S-SGPIO1

2

JTPM1

JF1:

HDD

OH

PWR

NIC1NIC2

X

RST

LED

FF

ON

I-SATA4-7

LEDT1

LEDT4

A

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

C

LEDT2

C

A

A

SFP1
LAN 7/8

C

A

C

LEDT3

JTGLED1

JNVI2C1

JBT1

COM1

JGP1

JF1

PWR
LED

FANA

A

C

LED1

:LEDPWR

16

DIMME1

DIMMD1

BAR CODE

X11SDV-8C-TP8F

REV:1.02

FAN4

Figure 2-2. JF1 Header Pins

LAN 5/6

CPU

MADE IN USA

LAN 3/4

FAN3

BT1

LAN 1/2

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

JPI2C1

FAN1

PWR

Reset

Power Button

Reset Button

3.3V

UID

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

1 2

15

31

Ground

Ground

PWR Fail LED

OH/Fan Fail LED

NIC2 Activity LED

NIC1 Activity LED

HDD LED

PWR LED

16

X11SDV-16C/-12C/-8C-TP8F User's Manual

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/off the system. This button can also be congured to function as a suspend

button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system
is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for

pin denitions.

Power Button

Pin Denitions (JF1)

Pin# Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case. Refer the table below for pin denitions.

Reset Button

Pin Denitions (JF1)

Pin# Denition

3 Reset

4 Ground

1 2

1

PWR

Power Button

Reset

2

Reset Button

3.3V

UID

3.3V Stby

3.3V Stby

Ground

Ground

PWR Fail LED

OH/Fan Fail LED

NIC2 Activity LED

NIC1 Activity LED

1. PWR Button

2. Reset Button

3.3V Stby

3.3V

HDD LED

PWR LED

15

16

32

Chapter 2: Installation

Overheat (OH)/Fan Fail

Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer

to the tables below for pin denitions.

OH/Fan Fail Indicator

Status

State Denition

Off Normal

On Overheat

Flashing Fan Fail

OH/Fan Fail LED

Pin Denitions (JF1)

Pin# Denition

7 Blue LED

8 OH/Fan Fail LED

NIC1/NIC2 Activity LED

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins 11
and 12 of JF1, and the LED connection for LAN port 2 is on pins 9 and 10. Attach the NIC

LED cables here to display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9 Pull up to +3.3 Stby

10 NIC2 Activity LED

11 Pull up to +3.3 Stby

12 NIC1 Activity LED

PWR

Reset

Power Button

Reset Button

3.3V

UID

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

1 2

15

Ground

Ground

PWR Fail LED

OH/Fan Fail LED

NIC2 Activity LED

NIC1 Activity LED

HDD LED

PWR LED

16

1. OH/Fan Fail LED

2. NIC2 Activity LED

3. NIC1 Activity LED

1

2

3

33

X11SDV-16C/-12C/-8C-TP8F User's Manual

HDD LED/UID Switch

The HDD LED/UID Switch connection is located on pins 13 and 14 of JF1. Attach a cable to
pin 14 to show hard drive activity status. Attach a cable to pin 13 to use UID switch. Refer

to the table below for pin denitions.

HDD LED

Pin Denitions (JF1)

Pin# Denition

13 3.3V Stdby/UID_SW

14 HDD Active

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. See the table below for pin

denitions.

PWR

Reset

Power Button

Reset Button

3.3V

UID

1 2

Power LED

Pin Denitions (JF1)

Pin# Denition

15 3.3V

16 PWR LED

Ground

Ground

PWR Fail LED

OH/Fan Fail LED

1. HDD LED

2. PWR LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

NIC2 Activity LED

NIC1 Activity LED

HDD LED

PWR LED

15

16

1

2

34

Chapter 2: Installation

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

PWR Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 Power Fail

PWR

Reset

Power Button

Reset Button

3.3V

UID

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

1 2

15

Ground

Ground

PWR Fail LED

OH/Fan Fail LED

NIC2 Activity LED

NIC1 Activity LED

HDD LED

PWR LED

16

1. PWR Fail LED

1

35

X11SDV-16C/-12C/-8C-TP8F User's Manual

2.6 Connectors

Power Connections

Main ATX Power Supply Connector

The primary power supply connector (JPW1) meets the ATX SSI EPS 12V specication.

ATX Power 24-pin Connector

Pin Denitions

Pin# Denition Pin# Denition

13 +3.3V 1 +3.3V

14 -12V 2 +3.3V

15 Ground 3 Ground

16 PS_ON 4 +5V

17 Ground 5 Ground

18 Ground 6 +5V

19 Ground 7 Ground

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 Ground 12 +3.3V

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

Required Connection

1. 24-Pin ATX Main PWR

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

1

FAN1

36

Chapter 2: Installation

Secondary Power Connector

JPV1 must also be connected to the power supply. This connector is used to power the
process and provides alternative power for special enclosure when the 24-pin ATX power is
not in use.

+12V 8-pin Power

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 8 +12V

Required Connection

HDD Power Connector

JPH1 is a 4-pin power connector for HDD use. It provides power from the motherboard to
the onboard HDD.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

+12V 8-pin Power

Pin Denitions

Pin# Denition

1 12V

2-3 GND

4 5V

1. 8-pin PWR (Required)

2. 4-pin HDD Power

1

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

2

37

X11SDV-16C/-12C/-8C-TP8F User's Manual

Headers

Fan Headers

The X11SDV-16C/-12C/-8C-TP8F has six 4-pin fan headers (FAN1 ~ FAN4, FANA, FANB).
These headers are backwards-compatible with the traditional 3-pin fans. However, fan speed
control is available for 4-pin fans only by Thermal Management via the IPMI 2.0 interface.

Refer to the table below for pin denitions.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 2.5A/+12V (Red)

3 Tachometer

4 PWM_Control

Power LED/Buzzer Header

On the JD1 header, pins 1-4 are for the Power LED and pins 5-7 are for the buzzer.

Speaker Connector

Pin Denitions

Pin Setting Denition

Pins 1-4 Speaker

Pins 3-4 Buzzer

A

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

1

JMP1_SRW1

JSMB1

1

JI2C1

JI2C2

JPME2

1

JMP1

JL1

USB 0/1

USB 2/3

JTGLED2

S-SATA0

:SUPER DOM

JSTBY1

JNS1

JD1

7

JSD1

4-7:SPEAKER

1-3:PWR LED

JPG1

JMP1_SRW2

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

6

LEDM1

2

JTPM1

OH

PWR

X

RST

FF

ON

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

5

A

LED1

FANA

C

C

LED2

JNVI2C1

C

:LEDPWR

UID

JMD1_SRW1

DIMME1

16

VGA

DIMMD1

LEDT4

LEDT2

BAR CODE

4

PRESS FIT

LEDT1

A

A

C

C

A

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

LAN 5/6

LAN 3/4

LAN 1/2

BT1

3

FAN3

2

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

JPI2C1

FAN1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

1. FAN1

2. FAN2

3. FAN3

4. FAN4

5. FANA

6. FANB

7. Speaker/Buzzer Header

1

38

Chapter 2: Installation

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to

the table below for pin denitions.

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

Mini PCI-E x1 Connector

This connector can support storage devices such as a mini PCI-E SSD hard drive.

JPME2

JL1

1

USB 2/3

JTGLED2

JSTBY1

1

JSMB1

1

JI2C1

JI2C2

1

USB 0/1

S-SATA0

JSD1

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

2

JMP1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

:SUPER DOM

JNS1

JD1

FANB

4-7:SPEAKER

1-3:PWR LED

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

1. Chassis Intrusion

2. Mini PCI-E x1 Connector

IPMI_LAN

USB 4/5 (3.0)

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

PRESS FIT

VGA

JMD1_SRW1

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

JPV1

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

39

X11SDV-16C/-12C/-8C-TP8F User's Manual

General Purpose I/O Header

The JGP1 (General Purpose Input/Output) header is a general purpose I/O expander on a

pin header via the SMBus. Refer to the table below for pin denitions.

SGPIO Header

Pin Denitions

Pin# Denition Pin# Denition

1 +5V Power 2 GND

3 GP0 4 GP1

5 GP2 6 GP3

7 GP5 8 GP5

9 GP6 10 GP7

Serial General Purpose I/O Header

One S-SGPIO (Serial Link General Purpose Input/Output) header is at S-SGPIO1 on the

motherboard. Refer to the table below for pin denitions.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

2

JBT1

COM1

JGP1

JF1

1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

SGPIO Header

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 GND 4 Data

5 Load 6 GND

7 Clock 8 NC

NC = No Connection

1. General Purpose I/O

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

Header

2. Serial General Purpose
I/O Header

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

40

Chapter 2: Installation

Standby Power

The +5V Standby Power header is located at JSTBY1 on the motherboard. You must have
a card with a Standby Power connector and a cable to use this feature. Refer to the table

below for pin denitions.

Standby Power

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 NC

Disk On Module Power Connector

One power connector for a SATA DOM (Disk On Module) device is located at JSD1. Connect
the appropriate cable here to provide power support for your Serial Link DOM device.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

1

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

2

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

DOM Power

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

1. Standby PWR

2. SATA DOM PWR

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

41

X11SDV-16C/-12C/-8C-TP8F User's Manual

SMBus Header

A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate
cable here to use the IPMB I2C connection on your system. Refer to the table below for pin

denitions.

External I2C Header

Pin Denitions

Pin# Denition

1 Data

2 GND

3 Clock

4 NC

Power SMB (I2C) Header

The Power System Management Bus (I2C) connector (JPI2C1) monitors the power supply,

fan, and system temperatures. Refer to the table below for pin denitions.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

1

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

Power SMB Header

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

1. SMBus Header

2. Power SMB I2C

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

2

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

42

Chapter 2: Installation

TPM/Port 80 Header

A Trusted Platform Module (TPM)/Port 80 header is located at JTPM1 to provide TPM support
and a Port 80 connection. Use this header to enhance system performance and data security.

Refer to the table below for pin denitions.

Trusted Platform Module Header

Pin Denitions

Pin# Denition Pin# Denition

1 +3.3V 2 SPI_CS#

3 RESET# 4 SPI_MISO

5 SPI_CLK 6 GND

7 SPI_MOSI 8

9 +3.3V Stby 10 SPI_IRQ#

System Management Bus Header

A System Management Bus header for additional slave devices or sensors is located at

JSMB1. See the table below for pin denitions.

External I2C Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 NC

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

2

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

1. TPM Header

2. Power SMB Header

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

43

X11SDV-16C/-12C/-8C-TP8F User's Manual

Nano SIM Slot

The JSIM1 slot supports a Nano SIM card.

COM Header

One COM header (COM1) is located on the motherboard. Refer to the table below for pin

denitions.

COM Header

Pin Denitions

Pin# Denition Pin# Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

1

M.2-H

2

S-SATA3

JTPM1

2

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

1. Nano SIM Slot

2. COM Header

IPMI_LAN

USB 4/5 (3.0)

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

PRESS FIT

VGA

JMD1_SRW1

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

JPV1

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

44

Chapter 2: Installation

LAN Activity Header

JLANLED1 is the activity LED header for LAN1 through LAN4.

LAN Activity LED

Pin Denitions

Pin# Denition

1 3V3 Stby

2 LAN3_ACT_N

3 3V3 Stby

4 LAN4_ACT_N

LAN Activity LED Headers

JTGLED1 is the activity LED header for LAN7 and LAN8, and JTGLED2 is the activity header
for LAN5 and LAN6.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

3

S-SATA2

S-SATA1

JNS1

FANB

LAN Activity LED

Pin Denitions

Pin# Denition

1 3V3 Stby

2 LAN5_ACT_N

3 3V3 Stby

4 LAN6_ACT_N

LEDM1

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

S-SATA3

I-SATA0-3

PRESS FIT PRESS FIT

1

2

JTPM1

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

COM1

JF1:

HDD

OH

PWR

PWR

NIC1NIC2

X

RST

LED

FF

LED

ON

I-SATA4-7

A

A

UID

C

C

LED3

LED2

CPU SLOT7 PCI-E 3.0 X8

JNVI2C1

2

JBT1

JGP1

JF1

16

A

C

LED1

FANA

:LEDPWR

LAN Activity LED

Pin Denitions

Pin# Denition

1 3V3 Stby

2 LAN7_ACT_N

3 3V3 Stby

4 LAN8_ACT_N

1. JLANLED1 Header

2. JTGLED1 Header

3. JTGLED2 Header

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

PRESS FIT

VGA

JMD1_SRW1

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

FAN1

DIMME1

DIMMD1

BAR CODE

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

45

X11SDV-16C/-12C/-8C-TP8F User's Manual

SATA Ports

Twelve SATA 3.0 ports, supported by the Intel SoC chipset, are located on the
X11SDV-16C/-12C/-8C-TP8F motherboard. These SATA ports support RAID 0, 1, 5, and 10.
SATA ports provide serial-link signal connections, which are faster than the connections of
Parallel ATA. Two additional SATA connections are availabe via the M.2 connector. Refer to

the tables below for pin denitions.

SATA 3.0 Port

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

M.2 Connection

The X11SDV-16C/-12C/-8C-TP8F board has two M.2 connectors at JMD1 and JMD2. JMD1
supports M-Key 2280 and is mux with S-SATA5 while JMD2 supports B-Key 3042 and is mux
with S-SATA4. M.2 was formerly Next Generation Form Factor (NGFF) and serves to replace
mini PCI-E and mSATA. M.2 allows for a greater variety of card sizes, increased functionality,

and spatial efciency.

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

4

2

1

JMP1_SRW1

JSMB1

1

JI2C1

JI2C2

JPME2

1

JMP1

JL1

USB 0/1

USB 2/3

JTGLED2

S-SATA0

:SUPER DOM

JSTBY1

JNS1

JD1

1 2

JSD1

4-7:SPEAKER

1-3:PWR LED

JPG1

JMP1_SRW2

JWD1

JPUSB1

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

5

JSIM1

S4

S6
G2

G3

M.2-H

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA3

S-SATA2

S-SATA1

I-SATA0-3

PRESS FIT PRESS FIT

FANB

LEDM1

2

JTPM1

PWR
ON

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

3

JF1:

HDD

OH

PWR

NIC1NIC2

X

RST

LED

FF

LED

I-SATA4-7

A

A

UID

C

C

LED3

LED2

JMD1_SRW1

CPU SLOT7 PCI-E 3.0 X8

JNVI2C1

JGP1

JF1

16

A

C

LED1

FANA

:LEDPWR

DIMME1

DIMMD1

VGA

LEDT4

LEDT2

BAR CODE

PRESS FIT

LEDT1

A

A

C

C

A

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

LAN 5/6

LAN 3/4

FAN3

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

IPMI_LAN

LAN 1/2

USB 4/5 (3.0)

JPI2C1

JPV1

JPW1

DIMMB1

BT1

DIMMA1

JPH1

FAN2

FAN1

1. I-SATA0-3

2. I-SATA4-7

3. S-SATA0-3

4. M.2 Connector JMD1

5. M.2 Connector JMD2

46

Chapter 2: Installation

NVMe I2C Header

JNVI2C1 is a management header for the Supermicro AOC NVMe PIC-E peripheral cards.
Connect a corresponding I2C cable to this header. Refer to the table below for pin denitions.

I2C Header

Pin Denitions

Pin# Denition

1 PE_HP_SCL

2 Ground

3 PE_HP_SDA

4 PVCCIO

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

1

JNVI2C1

C

:LEDPWR

1. NVMe I2C Header

IPMI_LAN

USB 4/5 (3.0)

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

PRESS FIT

VGA

JMD1_SRW1

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

JPV1

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

47

X11SDV-16C/-12C/-8C-TP8F User's Manual

2.7 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram

below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, Closed means the jumper is on and Open means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

48

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear the CMOS. Instead of pins, this jumper consists of contact pads to
prevent accidental clearing of the CMOS. To clear the CMOS, use a metal object such as a
small screwdriver to touch both pads at the same time to short the connection.

Note: Shut down the system and then short JBT1 to clear the CMOS.

LAN Port Enable/Disable

Use jumper JPL1 to enable or disable LAN1 - LAN4. Refer to the table below for jumper
settings.

LAN Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled (Deafult)

Pins 2-3 Disabled

JPME2

JL1
USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

1-3:PWR LED

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

LED1

FANA

A

C

C

LED2

A

C

:LEDPWR

UID

JNVI2C1

16

1. CMOS Clear

2. LAN1 - LAN4 Enable/
Disable

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

2

PRESS FIT

VGA

JMD1_SRW1

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

DIMMA1

JPH1

FAN2

FAN1

DIMME1

DIMMD1

BAR CODE

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

49

X11SDV-16C/-12C/-8C-TP8F User's Manual

Manufacturing Mode Select

Close pins 2-3 of jumper JPME2 to bypass SPI ash security and force the system to operate
in the manufacturing mode, which will allow the user to ash the system rmware from a host
server for system setting modications. Refer to the table below for jumper settings.

Manufacturing Mode

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal (Default)

Pins 2-3 Manufacturing Mode

VGA Enable/Disable

Use jumper JPG1 to enable the onboard VGA connector. Refer to the table below for jumper
settings.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

2

JMP1_SRW2

PCI-E 3.0 X1

1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

1. Manufacturing Mode

2. VGA Enable

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

50

Chapter 2: Installation

Watch Dog

JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.

Note: When Watch Dog is enabled, users need to write their own application software
to disable it.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset (Default)

Pins 2-3 NMI

Open Disabled

SMBus to PCI-E Slots

Use jumpers JI2C1 and JI2C2 to enable PCI-E SMB (System Management Bus) support to
improve system management for the onboard PCI-E slot.

SMBus to PCI-E Slots

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled (Default)

1. Watch Dog Timer

2. SMBus to PCI-E Slots

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

1

JMP1_SRW2

2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

51

X11SDV-16C/-12C/-8C-TP8F User's Manual

Mini-SAS HDD NVMe/SATA Mode Select

Use jumper JNS1 to select the Mini-SAS hard disk drive mode to NVMe or SATA.

SMBus to PCI-E Slots

Jumper Settings

Jumper Setting Denition

Pins 1-2 SATA (Default)

Pins 2-3 NVMe

USB Wake Up

Use the JPUSB1 jumper to enable system wake up via a USB device. This jumper allows you
to wake up the system by pressing a key on the USB keyboard or by clicking the USB mouse.
Enable the jumper to activate this function. When the USB Wake Up function is enabled, it
will be active on all USB ports

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

1

FANB

1-3:PWR LED

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

USB Wake Up

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled (Default)

Pins 2-3 Disabled

1. Mini SAS Mode Select

2. USB Wake Up

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

JMD1_SRW1

PRESS FIT

VGA

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

52

Chapter 2: Installation

2.8 LED Indicators

LAN LEDs

Eight LAN ports (LAN1 - LAN8) are located on the I/O back panel. Each Ethernet LAN port has
two LEDs. The green LED indicates activity, while the other Link LED may be green, amber,
or off to indicate the speed of the connection. Refer to the tables below for more information.

LAN Link LEDs (Left)

LED State

LED Color Denition

Off No Connection/10 Mbps/100 Mbps

Amber 1 Gbps

Green 10 Gbps

A

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

C

C

LED2

JNVI2C1

C

:LEDPWR

UID

JMD1_SRW1

DIMME1

16

VGA

DIMMD1

LEDT4

LEDT2

BAR CODE

PRESS FIT

LEDT1

A

A

C

C

A

A

LEDT3

C

C

SFP1
LAN 7/8

X11SDV-8C-TP8F

REV:1.02

FAN4

LAN 5/6

CPU

MADE IN USA

24 3

LAN 3/4

LAN Activity LEDs (Right)

LED State

Color Status Denition

Green Flashing Active

1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

1. LAN1/2 LEDs

2. LAN3/4 LEDs

IPMI_LAN

LAN 1/2

FAN3

USB 4/5 (3.0)

JPI2C1

JPV1

JPW1

DIMMB1

BT1

DIMMA1

JPH1

FAN2

FAN1

3. LAN5/6 LEDs

4. LAN7/8 LEDs

53

X11SDV-16C/-12C/-8C-TP8F User's Manual

Power LED

LED1 is an Onboard Power LED. When this LED is lit, it means power is present on the
motherboard. In suspend mode, this LED will blink on and off. Be sure to turn off the system
and unplug the power cord(s) before removing or installing components.

Onboard Power LED Indicator

LED Color Denition

System Off

Off

(power cable not

connected)

Green System On

BMC Heartbeat LED

LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is working. Refer
to the table below for the LED status.

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

2

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

Onboard Power LED Indicator

LED Color Denition

Blinking

Green

UID

JMD1_SRW1

PRESS FIT

VGA

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

BMC Normal

LAN 3/4

LAN 1/2

IPMI_LAN

USB 4/5 (3.0)

JPV1

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

1. Onboard PWR LED

2. BMC Heartbeat LED

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

54

Overheat/PWR Fail/Fan Fail LED

LED3 is the Overheat/Power Fail/Fan Fail LED.

Onboard Power LED Indicator

LED Color Denition

Solid Red System overheat

Blinking Red PWR Fail or Fan Fail

Chapter 2: Installation

JPME2

JL1

USB 0/1

USB 2/3

JTGLED2

JSTBY1

1

S-SATA0

JSD1

1

JSMB1

1

JI2C1

JI2C2

JMP1

:SUPER DOM

JD1

4-7:SPEAKER

1-3:PWR LED

JPB1:(debug only)

1-2:ENABLE
2-3:DISABLE

PCI-E 3.0 X4 / S-SATA5

JMD1:M.2-HC

2

JMP1_SRW1

JMP1_SRW2

PCI-E 3.0 X1

JMD2_SRW1

G4

G1

S1

S3

S2

S5

S4

S6
G2

G3

JMD2

PCI-E 3.0 X2/S-SATA4

S-SATA2

S-SATA1

JNS1

FANB

LEDM1

JPG1

JWD1

JPUSB1

JSIM1

M.2-H

2

S-SATA3

JTPM1

OH

PWR

X

RST

FF

ON

I-SATA0-3

PRESS FIT PRESS FIT

1

A

LED3

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT6 PCI-E 3.0 X16

CPU SLOT7 PCI-E 3.0 X8

JIPMB1

JLANLED1

JTGLED1

S-SGPIO1

JBT1

COM1

JGP1

JF1

JF1:

HDD

PWR

NIC1NIC2

LED

LED

I-SATA4-7

A

LED1

FANA

A

C

C

LED2

JNVI2C1

C

:LEDPWR

1. Overheat/PWR Fail/
Fan Fail LED

IPMI_LAN

USB 4/5 (3.0)

JPI2C1

JPL1:

1-2:ENABLE

2-3:DISABLE

LAN1/2/3/4

JPL1

UID

PRESS FIT

VGA

JMD1_SRW1

LAN 3/4

LAN 1/2

LEDT1

LEDT4

A

A

LAN 5/6

C

C

A

LEDT2

A

LEDT3

C

C

SFP1
LAN 7/8

JPV1

CPU

JPW1

DIMMB1

BAR CODE

DIMME1

DIMMD1

16

X11SDV-8C-TP8F

MADE IN USA

REV:1.02

FAN4

BT1

FAN3

DIMMA1

JPH1

FAN2

FAN1

55

X11SDV-16C/-12C/-8C-TP8F User's Manual

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard
and mouse.

3. Remove all add-on cards.

4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to
the motherboard.

No Power

1. Make sure that there are no short circuits between the motherboard and the chassis.

2. Make sure that the ATX power connectors are properly connected.

3. Check that the 115V/230V switch, if available, on the power supply is properly set.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

No Video

1. If the power is on but you have no video, remove all add-on cards and cables.

2. Use the speaker to determine if any beep codes are present. Refer to Appendix A for
details on beep codes.

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Chapter 3: Troubleshooting

3. Remove all memory modules and turn on the system (if the alarm is on, check the
specs of memory modules, reset the memory or try a different one).

System Boot Failure

If the system does not display POST or does not respond after the power is turned on, check
the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and con-

tacting both pads on the CMOS clear jumper (JBT1). (Refer to Section 2-8 in Chapter 2.)

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure

in this chapter.

Memory Errors

When a no-memory beep code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that the
DIMMs are properly and fully installed. Click on the Tested Memory List link on the
motherboard product page to see a list of supported memory.

2. Check if different speeds of DIMMs have been installed. It is strongly recommended that
you use the same RAM type and speed for all DIMMs in the system.

3. Make sure that you are using the correct type of ECC DDR4 UDIMM modules
recommended by the manufacturer.

4. Check for bad DIMM modules or slots by swapping a single module among all memory
slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. Follow the instructions
given in Section 2-4 in Chapter 2.

6. Please follow the instructions given in the DIMM population tables listed in Section 2-4
to install your memory modules.

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Losing the System's Setup Conguration

1. Make sure that you are using a high-quality power supply. A poor-quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 2-7 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies

~3VDC. If it does not, replace it with a new one.If the above steps do not x the setup
conguration problem, contact your vendor for repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Click on the Tested Memory List link on the motherboard product page to see
a list of supported memory.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD/DVD.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

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Chapter 3: Troubleshooting

3. Using the minimum conguration for troubleshooting: Remove all unnecessary
components (starting with add-on cards rst), and use the minimum conguration (but

with the CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

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X11SDV-16C/-12C/-8C-TP8F User's Manual

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please note that as
a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it

is best to rst check with your distributor or reseller for troubleshooting services. They should
know of any possible problems with the specic system conguration that was sold to you.

1. Please go through the Troubleshooting Procedures and Frequently Asked Questions
(FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.

com/FAQ/index.php) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.com/

ResourceApps/BIOS_IPMI_Intel.html).

3. If you still cannot resolve the problem, include the following information when contacting
Supermicro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (This can be seen on the initial display when your system rst

boots up.)

• System conguration

4. An example of a Technical Support form is on our website at http://www.supermicro.com/

RmaForm/.

• Distributors: For immediate assistance, please have your account number ready when

placing a call to our Technical Support department. We can be reached by email at sup­[e-mail].

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Chapter 3: Troubleshooting

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The motherboard supports up to 256GB of RDIMM and 512GB of LRDIMM Non-

ECC/ECC DDR4 memory. To enhance memory performance, do not mix memory modules of
different speeds and sizes. Please follow all memory installation instructions given in Section
2-3 in Chapter 2.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://

www.supermicro.com/ResourceApps/BIOS_IPMI_Intel.html. Please check our BIOS warning

message and the information on how to update your BIOS on our website. Select your

motherboard model and download the BIOS le to your computer. Also, check the current

BIOS revision to make sure that it is newer than your BIOS before downloading. You can

choose from the zip le and the .exe le. If you choose the zip BIOS le, please unzip the BIOS
le onto a bootable USB device. Run the batch le using the format FLASH.BAT lename.rom
from your bootable USB device to ash the BIOS. Then, your system will automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent possible
system boot failure!)

Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your
motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery
instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.

supermicro.com/support/manuals/.

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3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow steps 1 and 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Important: When replacing a battery, be sure to only replace it with the same type.

OR

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Chapter 3: Troubleshooting

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the X11SDV-16C-TP8F motherboard.

The BIOS is stored on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to the BIOS that may not be reected

in this manual.

Starting the Setup Utility

To enter the BIOS Setup Utility, hit the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during the
setup navigation process.

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Chapter 4: BIOS

4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen.
The Main BIOS setup screen is shown below and the following features will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in MM/DD/YYYY format. The time

is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is the BIOS build date after RTC reset.

Supermicro X11SDV-16C-TP8F

BIOS Version

This feature displays the version of the BIOS ROM used in the system.

Build Date

This feature displays the date when the version of the BIOS ROM used in the system was built.

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Memory Information

Total Memory

This feature displays the total size of memory available in the system.

Memory Speed

This feature displays the default speed of the memory modules installed in the system.

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4.3 Advanced

Use this menu to congure advanced settings.

Chapter 4: BIOS

Warning: Take caution when changing the Advanced settings. An incorrect value, a very high
DRAM frequency or an incorrect BIOS timing setting may cause the system to malfunction.
When this occurs, restore to default manufacturer settings.

Boot Feature

Quiet Boot

Use this feature to select the screen display between POST messages or the OEM logo at
bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM
logo instead of the normal POST messages. The options are Disabled and Enabled.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to display
the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by
the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the Numlock key. The options are Off and On.

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Wait For "F1" If Error

This feature forces the system to wait until the F1 key is pressed if an error occurs. The
options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

If this item is enabled, the BIOS will automatically reboot the system from a specied boot

device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Port 61h bit-4 Emulation

Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are Disabled and Enabled.

Power Conguration

Watch Dog Function

If enabled, the Watch Dog timer will allow the system to reboot when it is inactive for more

than ve minutes. The options are Disabled and Enabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for four seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power Off for the system
power to remain off after a power loss. Select Power On for the system power to be turned
on after a power loss. Select Last State to allow the system to resume its last power state
before a power loss. The options are Stay Off, Power On, and Last State.

CPU Conguration

The following CPU information will display:

• Processor BSP Revision

68

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

Chapter 4: BIOS

• Processor 0 Version

Hyper-Threading (ALL)

Select Enabled to support Intel Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.

Cores Enabled

Set a numeric value to enable the number of cores. Refer to Intel's website for more
information. Enter 0 to enable all cores.

Execute Disable Bit (Available if supported by the OS & the CPU)

Set to Enable for Execute Disable Bit support, which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,

thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor or

damaging the system during a virus attack. The options are Disable and Enable. Refer to
Intel and Microsoft websites for more information.

Intel Virtualization Technology

Use this feature to enable the Vanderpool Technology. This technology allows the system to
run several operating systems simultaneously. The options are Disable and Enable.

PPIN Control

Select Unlock/Enable to use the Protected Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.

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Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L2 cache to improve CPU performance. The options are Disable
and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

The CPU prefetches the cache line for 64 bytes if this feature is set to Disabled. The CPU
prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable. The
options are Enable and Disable.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enable to enable the DCU (Data Cache Unit) Streamer Prefetcher which will stream
and prefetch data and send it to the Level 1 data cache to improve data processing and
system performance. The options are Disable and Enable.

DCU IP Prefetcher (Available when supported by the CPU)

Select Enable for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.

LLC Prefetch

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L3 cache to improve CPU performance. The options are Disable
and Enable.

Extended APIC

Select Enable to activate APIC (Advanced Programmable Interrupt Controller) support. The
options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Disable and Enable.

Advanced Power Management Conguration

Power Technology

This feature allows the user to congure CPU power management settings. The options

are Disable, Energy Efcient, and Custom.

*If the feature above is set to Custom, the following features will be available for

conguration:

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Chapter 4: BIOS

Power Performance Tuning

This feature allows the user to set whether the operating system or the BIOS controls
the Energy Performance BIAS (EPB). The options are OS Controls EPB and BIOS
Controls EPB.

*If the feature above is set to BIOS Controls EPB, the following features will be

available for conguration:

ENERGY_PERF_BIAS_CFG Mode

The Energy Perfomance BIAS (EPB) feature allows the user to congure CPU power

and perfomance settings. Select Maximum Performance to set the highest performance.

Select Performance to optimize performance over energy efciency. Select Balanced

Perfomance to priortize performance optimization while conserving energy. Select Bal­anced Power to prioritize energy conservation while maintaining good performance.

Select Power to optimize energy efcency over performance. The options are Maximum

Performance, Performance, Balanced Performance, Balanced Power, and Power.

CPU P State Control

This feature allows the user to congure the following CPU power settings:

SpeedStep (Pstates)

Intel SpeedStep Technology allows the system to automatically adjust processor volt­age and core frequency to reduce power consumption and heat dissipation. The options
are Disable and Enable. If this feature is set to Disabled, the next two features are not

available for conguration.

EIST PSD Funtion

This feature allows the user to choose between Hardware and Software to control the
processor's frequency and performance (P-state). In HW_ALL mode, the processor hard­ware is responsible for coordinating the P-state, and the OS is responsible for keeping the
P-state request up to date on all Logical Processors. In SW_ALL mode, the OS Power
Manager is responsible for coordinating the P-state, and must initiate the transition on

all Logical Processors. In SW_ANY mode, the OS Power Manager is responsible for

coordinating the P-state and may initiate the transition on any Logical Processors. The
options are HW_ALL, SW_ALL, and SW_ANY.

Turbo Mode

This feature will enable dynamic control of the processor, allowing it to run above stock
frequency. The options are Disable and Enable.

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X11SDV-16C/-12C/-8C-TP8F User's Manual

Hardware PM State Control

Hardware P-States

This setting allows the user to select between OS and hardware-controlled P-states.
Selecting Native Mode allows the OS to choose a P-state. Selecting Out of Band Mode
allows the hardware to autonomously choose a P-state without OS guidance. Selecting
Native Mode with No Legacy Support functions as Native Mode with no support for older
hardware. The options are Disable, Native Mode, Out of Band Mode, and Native Mode
with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Enabling this setting allows the hardware to autonomously choose to enter a C-state
based on power consumption and clock speed. The options are Disable and Enable.

This feature must be set to Disable to be able to congure the next two features.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are
Disable, Enable, and Auto.

Enhanced Halt State (C1E)

Select Enable to use Enhanced Halt State technology, which will signicantly reduce the

CPU's power consumption by reducing its clock cycle and voltage during a Halt state.
The options are Disable and Enable.

Package C State Control

Package C State

This feature allows the user to set the limit on the C State package register. The options
are C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) State, No Limit,
and Auto.

CPU T State Control

Software Controlled T-States

Use this feature to enable Software Controlled T-States. The options are Disable and
Enable.

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Chapter 4: BIOS

Chipset Conguration

Warning: Setting the wrong values in the sections below may cause the system to malfunction.

North Bridge Conguration

UPI Conguration

The following UPI information will display:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base / Limit

• UPI Global MMIO High Base / Limit

• UPI Pci-e Conguration Base / Size

Degrade Precedence

Use this feature to set degrade precedence when system settings are in conict. Select

Topology Precedence to degrade Features. Select Feature Precedence to degrade Topol­ogy. The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable for the QPI to enter the L0p state for power saving. The options are Dis­able, Enable, and Auto.

Link L1 Enable

Select Enable for the QPI to enter the L1 state for power saving. The options are Dis­able, Enable, and Auto.

IO Directory Cache (IODC)

IO Directory Cache is an 8-entry cache that stores the directory state of remote IIO writes
and memory lookups, and saves directory updates. Use this feature to lower cache to
cache (C2C) transfer latencies. The options are Disable, Auto, Enable for Remote InvItoM
Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and
Enable for Remote InvItoM and Remote WViLF.

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X11SDV-16C/-12C/-8C-TP8F User's Manual

SNC

Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into
clusters based on address range. Each cluster is connected to a subset of the memory
controller. Enabling SNC improves average latency and reduces memory access conges­tion to achieve higher performance. Select Auto for 1-cluster or 2-clusters depending on
IMC interleave. Select Enable for Full SNC (2-clusters and 1-way IMC interleave). The
options are Disable, Enable, and Auto.

Isoc Mode

Isochronous (Isoc) mode allows time-sensitive processes to be given priority. The options
are Disable, Enable, and Auto.

Memory Conguration

Enforce POR

Select POR (Plan of Record) to enforce POR restrictions on DDR4 frequency and volt­age programming. The options are POR and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules.
The options are Auto, 2133, 2400, and 2666.

Data Scrambling for DDR4

Use this feature to enable or disable data scrambling for DDR4 memory. The options
are Auto, Disable, and Enable.

tCCD_L Relaxation

Select Auto to get TCDD settings from SPD (Serial Presence Detect) and implement into
memory RC code to improve system reliability. Select Disable for TCCD to follow Intel
POR. The options are Disable and Auto.

Enable ADR

Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Disable and Enable.

2X REFRESH

Use this feature to select the memory controller refresh rate to 2x refresh mode. The
options are Auto and Enable.

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Chapter 4: BIOS

Memory Topology

This feature displays the information of onboard memory modules as detected by the
BIOS.

Memory RAS Conguration

Static Virtual Lockstep Mode

Select Enable to run the system's memory channels in lockstep mode to minimize
memory access latency. The options are Disable and Enable.

Mirror mode

This feature allows memory to be mirrored between two channels, providing 100%
redundancy. The options are Disable, Mirror Mode 1LM, and Mirror Mode 2LM.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.

*If the feature above is set to Enable, Multi Rank Sparing will be available for

conguration:

Multi Rank Sparing

Use this feature to indicate how many memory ranks to reserve in case of memory
failure. The options are One Rank and Two Rank.

Correctable Error Threshold

Use this feature to specify the threshold value for correctable memory error logging,
which sets a limit on the maximum number of events that can be logged in the memory
error log at a given time. The default setting is 100.

SDDC

Single device data correction +1 (SDDC Plus One) organizes data in a single bundle
(x4/x8 DRAM). If any or all the bits become corrupted, corrections occur. The x4 con­dition is corrected on all cases. The x8 condition is corrected only if the system is in
Lockstep Mode. The options are Disable and Enable.

ADDDC Sparing

Adaptive Double Device Data Correction (ADDDC) Sparing detects when the prede­termined threshold for correctable errors is reached, copying the contents of the failing
DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The
options are Disable and Enable.

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X11SDV-16C/-12C/-8C-TP8F User's Manual

Patrol Scrub

Patrol Scrub is a process that allows the CPU to correct correctable memory errors
detected on a memory module and send the correction to the requestor (the original
source). When this feature is set to Enable, the IO hub will read and write back one
cache line every 16K cycles if there is no delay caused by internal processing. By us-

ing this method, roughly 64 GB of memory behind the IO hub will be scrubbed every

day. The options are Disable and Enable.

*If the feature above is set to Enable, Patrol Scrub Interval will be available for

conguration:

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before the
next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24.
The default setting is 24.

IIO Conguration

EV DFX Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces­sor will always remain clear during electric tuning. The options are Disable and Enable.

CPU Conguration

IOU0 (II0 PCIe Br1)

Use this feature congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II0 PCIe Br2)

Use this feature congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (II0 PCIe Br3)

Use this feature congures the PCI-E port Bifuraction setting for a PCI-E port specied

by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

CPU SLOT6 PCI-E 3.0 X16

Link Speed

Use this feature to select the link speed for this port. The options are Auto, Gen 1
(2.5 GT/s), Gen 2 (5GT/s), and Gen 3 (GT/s).

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PCI-E Port Link Status

This feature shows the status of the device plugged into this slot.

PCI-E Port Link Max

This feature shows the status of the device plugged into this slot.

PCI-E Port Link Speed

This feature shows the status of the device plugged into this slot.

PCI-E Port Max Payload Size

Use this feature to select the maximum payload size for this port. The options are
128B, 256B, and Auto.

CPU SLOT7 PCI-E 3.0 X8

Link Speed

Use this feature to select the link speed for this port. The options are Auto, Gen 1
(2.5 GT/s), Gen 2 (5GT/s), and Gen 3 (GT/s).

PCI-E Port Link Status

This feature shows the status of the device plugged into this slot.

PCI-E Port Link Max

This feature shows the status of the device plugged into this slot.

PCI-E Port Link Speed

This feature shows the status of the device plugged into this slot.

PCI-E Port Max Payload Size

Use this feature to select the maximum payload size for this port. The options are
128B, 256B, and Auto.

IOAT Conguration

Disable TPH

Transparent Huge Pages (TPH) is a Linux memory management system that enables
communication in larger blocks (pages). Enabling this feature will increase perfor­mance. The options are No and Yes.

*If the feature above is set to No, Relaxed Ordering will be available for congu­ration:

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Prioritize TPH

Use this feature to enable Prioritize TPH support. The options are Enable and Disable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support, which will allow certain transac­tions to violate the strict-ordering rules of PCI bus for a transaction to be completed
prior to other transactions that have already been enqueued. The options are Disable
and Enable.

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by
reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through
the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across
Intel platforms, providing greater reliability, security and availability in networking and
data-sharing. The options are Enable and Disable.

*If the feature above is set to Enable, the ve features below will be available

for conguration:

Interrupt Remapping

Use this feature to enable Interrupt Remapping support, which detects and controls
external interrupt requests. The options are Enable and Disable.

PassThrough DMA

Use this feature to allow devices such as network cards to access the system memory
without using a processor. Select Enable to use the Non-Isoch VT_D Engine Pass
Through Direct Memory Access (DMA) support. The options are Enable and Disable.

ATS

Use this feature to enable Non-Isoch VT-d Engine Address Translation Services (ATS)
support. ATS translates virtual addresses to physical addresses. The options are En-

able and Disable.

Posted Interrupt

Use this feature to enable VT_D Posted Interrupt. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Use this feature to maintain setting coherency between processors or other devices.
Select Enable for the Non-Isoch VT-d engine to pass through DMA to enhance system
performance. The options are Enable and Disable.

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Intel® VMD Technology

Intel® VMD for Volume Management Device on CPU

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the feature above is set to Enable, the following features will be available

for conguration:

CPU SLOT6 PCI-E 3.0X16 VMD

Use this feature to enable or disable Volume Management Device (VMD) Technology
for this port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 1A~1D. The options
are Disable and Enable.

PCI-E Completion Timeout Disable

Use this feature to enable PCI-E Completion Timeout support for electric tuning. The
options are Yes, No, and Per-Port.



South Bridge Conguration

The following South Bridge information will display:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled, and Auto.

XHCI Hand-off

This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the
XHCI driver. The settings are Enabled and Disabled.

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Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Disabled and Enabled.

Server ME Conguration

• General ME Conguration

• Oper. Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

PCH SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the
SATA devices that are supported by the Intel PCH chip and displays the following features:

SATA Controller

This feature enables or disables the onboard SATA controller supported by the Intel PCH
chip. The options are Disable and Enable.

Congure SATA as

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID.

SATA HDD Unlock

This feature allows the user to remove any password-protected SATA disk drives. The options
are Enable and Disable.

Aggressive Link Power Management

When this feature is set to Enable, the SATA AHCI controller manages the power usage of
the SATA link. The controller will put the link in a low power mode during extended periods
of I/O inactivity, and will return the link to an active state when I/O activity resumes. The op­tions are Disable and Enable.

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Chapter 4: BIOS

*If the feature "Congure SATA as" above is set to RAID, the following features will be
available for conguration:

SATA RSTe Boot Info

Select Enable to provide full int13h support for the devices attached to SATA controller. The
options are Disable and Enable.

SATA RAID Option ROM/UEFI Driver

Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

SATA Port 0/4/5/6/7

This feature displays the information detected on the installed SATA drive on the particular
SATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0~7 Hot Plug

Set this feature to Enable for hot plug support, which will allow the user to replace a SATA
drive without shutting down the system. The options are Disable and Enable.

Port 0~7 Spin Up Device

On an edge detect from 0 to 1, set this feature to allow the PCH to initialize the device.
The options are Disable and Enable.

Port 0~7 SATA Device Type

Use this feature to specify if the SATA port specied by the user should be connected to a

Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State
Drive.

PCH sSATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the
SATA devices that are supported by the Intel PCH chip and displays the following features:

sSATA Controller

This feature enables or disables the onboard sSATA controller supported by the Intel PCH
chip. The options are Enable and Disable.

Congure sSATA as

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI

and RAID.

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SATA HDD Unlock

This feature allows the user to remove any password-protected SATA disk drives. The options
are Disable and Enable.

Aggressive Link Power Management

When this feature is set to Enable, the SATA AHCI controller manages the power usage of
the SATA link. The controller will put the link in a low power mode during extended periods
of I/O inactivity, and will return the link to an active state when I/O activity resumes. The op­tions are Disable and Enable.

*If the feature "Congure sSATA as" above is set to RAID, the following features will
display:

sSATA RSTe Boot Info

Select Enable to provide full int13h support for the devices attached to sSATA controller. The

options are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver

Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 ~ Port 5

This feature displays the information detected on the installed sSATA drive on the particular
sSATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0 ~ Port 5 Hot Plug

Set this feature to Enable for hot plug support, which will allow the user to replace a SATA
drive without shutting down the system. The options are Disable and Enable.

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this feature to allow the PCH to initialize the device.
The options are Disable and Enable.

Port 0 ~ Port 5 sSATA Device Type

Use this feature to specify if the SATA port specied by the user should be connected to a

Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State
Drive.

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PCIe/PCI/PnP Conguration

PCIe/PCI/PnP Conguration

The following information will display:

• PCI Bus Driver Version

• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.

The options are Disabled and Enabled.

SR-IOV Support

Use this feature to enable or disable Single Root IO Virtualization Support. The options are

Disabled and Enabled.

MMIO High Base

Use this feature to select the base memory size according to memory-address mapping for
the IO hub. The options are 56T, 40T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this feature to select the high memory size according to memory-address mapping for

the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

Maximum Read Request

Use this feature to select the Maximum Read Request size of the PCI-Express device, or
select Auto to allow the System BIOS to determine the value. The options are Auto, 128
Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

Use this feature to select the low base address for PCIE adapters to increase base memory.

The options are 1G, 1.5G, 1.75G, 2G, 2.25G. and 3G.

NVMe Firmware Source

Use this feature to select the NVMe rmware to support booting. The options are Vendor

Dened Firmware and AMI Native Support. The default option, Vendor Dened Firmware,

is pre-installed on the drive and may resolve errata or enable innovative functions for the

drive. The other option, AMI Native Support, is offered by the BIOS with a generic method.

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VGA Priority

Use this feature to select VGA priority when multiple VGA devices are detected. Select On­board to give priority to your onboard video device. Select Offboard to give priority to your
graphics card. The options are Onboard and Offboard.

CPU SLOT6 PCI-E 3.0 X16 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

CPU SLOT7 PCI-E 3.0 X8 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

JMD1: M.2-HC PCI-E 3.0 X4 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

JMD2: M.2-H PCI-E 3.0 X2 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

PCI-E 3.0 X1 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

Onboard LAN Option ROM Type

Use this feature to select which rmware type to be loaded for onboard LAN devices. The

options Legacy and EFI. Select Legacy to display and congure the Onboard LAN1 ~ LAN8
Option ROM features.

Onboard LAN1 Option ROM

Use this feature to select which rmware function to be loaded for LAN Port1 used for system

boot. The options are Disabled, PXE, and iSCSI.

Onboard LAN2 ~ LAN4 Option ROM

Use this feature to select which rmware function to be loaded for the specied LAN ports

used for system boot. The options are Disabled and PXE.

Onboard LAN5 ~ LAN8 Option ROM

Use this feature to select which rmware function to be loaded for the specied LAN ports

used for system boot. The options are Disabled and Legacy.

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Chapter 4: BIOS

Onboard Video Option ROM

Use this feature to select the Onboard Video Option ROM type. The options are Disabled,
Legacy, and EFI.

Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

*If the feature above is set to Enabled, the next six features will be available for

conguration:

Ipv4 PXE Support

Select Enabled to enable IPv4 PXE boot support. The options are Disabled and Enabled.

Ipv4 HTTP Support

Select Enabled to enable IPv4 HTTP boot support. The options are Disabled and Enabled.

Ipv6 PXE Support

Select Enabled to enable IPv6 PXE boot support. The options are Disabled and Enabled.

Ipv6 HTTP Support

Select Enabled to enable IPv6 HTTP boot support. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this option to specify the wait time to press the ESC key to abort the PXE boot. Press
"+" or "-" on your keyboard to change the value. The default setting is 0.

Media Detect Count

Use this option to specify the number of times media will be checked. Press "+" or "-" on
your keyboard to change the value. The default setting is 1.



Super IO Conguration

Super IO Chip AST2500



Serial Port 1 Conguration

Serial Port 1

Select Enabled to enable the onboard serial port specied by the user. The options are

Enabled and Disabled. Enable this feature for the next two features to display and only

the Change Settings feature is available for conguration.

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Device Settings

This feature displays the base I/O port address and the Interrupt Request address of a

serial port specied by the user.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial

Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to
a serial port specied. The options are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5,
6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6,
7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).



Serial Port 2 Conguration

Serial Port 2

Select Enabled to enable the onboard serial port specied by the user. The options are

Enabled and Disabled. Enable this feature for the next two features to display and only

the Change Settings feature is available for conguration.

Device Settings

This feature displays the base I/O port address and the Interrupt Request address of a

serial port specied by the user.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial

Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to
a serial port specied. The options are Auto, (IO=2F8h; IRQ=3), (IO=3F8h; IRQ=3, 4, 5,
6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6,
7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).



Serial Port Console Redirection

COM1

Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options are
Disabled and Enabled.

*If the feature above is set to Enabled, the following features will become available for

conguration:

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Chapter 4: BIOS

Console Redirection Settings

Terminal Type

This feature allows the user to select the target terminal emulation type for Console
Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color
and function key support. Select ANSI to use the Extended ASCII Character Set. Select
VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The
options are VT100, VT100+, VT-UTF8, and ANSI.

Bits per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600, and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors. Select
Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if
the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do
not want to send a parity bit with your data bits in transmission. Select Mark to add a mark
as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity
bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Disabled and Enabled.

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Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

Redirection After BIOS POST

Use this feature to enable or disable legacy console redirection after BIOS POST. When
set to BootLoader, legacy console redirection is disabled before booting the OS. When set
to Always Enable, legacy console redirection remains enabled when booting the OS. The
options are Always Enable and BootLoader.

SOL Console Redirection

Select Enabled to use the SOL port for Console Redirection. The options are Disabled and
Enabled.

*If the feature above is set to Enabled, the following features are available for

conguration:

Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.

SOL

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function
key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to
use UTF8 encoding to map Unicode characters into one or more bytes. The options are
VT100, VT100+, VT-UTF8, and ANSI.

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Chapter 4: BIOS

Bits per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600, and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Disabled and Enabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.

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Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

Redirection After BIOS POST

Use this feature to enable or disable legacy console redirection after BIOS POST. When
set to BootLoader, legacy console redirection is disabled before booting the OS. When set
to Always Enable, legacy console redirection remains enabled when booting the OS. The
options are Always Enable and BootLoader.

Legacy Console Redirection

Redirection COM Port

Use this feature to select a COM port to display redirection of Legacy OS and Legacy OPROM
messages. The options are COM1 and SOL.

Serial Port for Out-of-Band Management/Windows Emergency
Management Services (EMS)

The submenu allows the user to congure Console Redirection settings to support Out-of-

Band Serial Port management.

EMS (Emergency Management Services) Console Redirection

Select Enabled to use a COM port selected by the user for EMS Console Redirection. The
options are Disabled and Enabled.

*If the feature above is set to Enabled, the following features are available for

conguration:



Console Redirection Settings

This feature allows the user to specify how the host computer will exchange data with the
client computer, which is the remote computer used by the user.

Out-of-Band Mgmt Port

The feature selects a serial port in a client server to be used by the Microsoft Windows
Emergency Management Services (EMS) to communicate with a remote host server. The
options are COM1 and SOL.

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Chapter 4: BIOS

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100,
VT100+, VT-UTF8, and ANSI.

Bits per second

This feature sets the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None, Hardware RTS/CTS, and Software Xon/Xoff.

Data Bits

Parity

Stop Bits



ACPI Settings

Use this feature to congure Advanced Conguration and Power Interface (ACPI) power

management settings for your system.

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Disabled and Enabled.

High Precision Event Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic
interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing
multimedia streams, providing smooth playback and reducing the dependency on other
timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.
The options are Disabled and Enabled.

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Trusted Computing

*The features in the Trusted Computing section on this page are displayed if a TPM

1.2 module is detected:

Conguration

Security Device Support

If this feature and the TPM jumper on the motherboard are both set to Enabled, onboard
security devices will be enabled for TPM support to enhance data integrity and network
security. Please reboot the system for a change on this setting to take effect. The options
are Disable and Enable.

TPM State

Select Enabled to use TPM (Trusted Platform Module) settings to enhance system data
security. Please reboot your system for any change on the TPM state to take effect. The
options are Disabled and Enabled.

Pending Operation

Use this feature to schedule a TPM-related operation to be performed by a security device

for system data integrity. Your system will reboot to carry out a pending TPM operation. The

options are None and TPM Clear.

Note: Your system will reboot to carry out a pending TPM operation.

Device Select

Use this feature to select the TPM version. TPM 1.2 will restrict support to TPM 1.2 devices.
TPM 2.0 will restrict support for TPM 2.0 devices. Select Auto to enable support for both
versions. The default setting is Auto.

Current Status Information

This feature displays the status of the TPM support on this motherboard.

• TPM Enabled Status

• TPM Active Status

• TPM Owner Status

SMCI BIOS-Based TPM Provision Support

Use feature to enable the Supermicro TPM Provision support. The options are Disabled and
Enabled.

TXT Support

Intel TXT (Trusted Execution Technology) helps protect against software-based attacks and

ensures protection, condentiality and integrity of data stored or created on the system. Use

this feature to enable or disable TXT Support. The options are Disabled and Enabled.

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*The features in the Trusted Computing section on this page and the next are
displayed if a TPM 2.0 module is detected:

TPM20 Device Found

Vendor: IFX

Firmware Version: 7.62

Security Device Support

If this feature and the TPM jumper on the motherboard are both set to Enabled, onboard
security devices will be enabled for TPM support to enhance data integrity and network
security. Please reboot the system for a change on this setting to take effect. The options
are Disable and Enable.

The following TPM information will be displayed:

• Active PCR banks

• Available PCR banks

*If the feature "Security Device Support" is enabled, the following features are available
for conguration:

SHA256 PCR Bank

Use this feature to disable or enable the SHA256 Platform Conguration Register (PCR) bank

for the installed TPM device. The options are Disabled and Enabled.

Pending operation

Use this feature to schedule a TPM-related operation to be performed by a security device

for system data integrity. Your system will reboot to carry out a pending TPM operation. The

options are None and TPM Clear.

Platform Hierarchy

Use this feature to disable or enable platform hierarchy for platform protection. The options
are Disabled and Enabled.

Storage Hierarchy

Use this feature to disable or enable storage hierarchy for cryptographic protection. The
options are Disabled and Enabled.

Endorsement Hierarchy

Use this feature to disable or enable endorsement hierarchy for privacy control. The options
are Disabled and Enabled.

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PH Randomization

Use this feature to disable or enable Platform Hiearchy (PH) Randomization. The options are

Disabled and Enabled.

SMCI BIOS-Based TPM Provision Support

Use feature to enable the Supermicro TPM Provision support. The options are Disabled and
Enabled.

TXT Support

Intel TXT (Trusted Execution Technology) helps protect against software-based attacks and

ensures protection, condentiality and integrity of data stored or created on the system. Use

this feature to enable or disable TXT Support. The options are Disabled and Enabled.

iSCSI Conguration

iSCSI Initiator Name

This feature allows the user to enter the unique name of the iSCSI Initiator in IQN format.

Once the name of the iSCSI Initiator is entered into the system, congure the proper settings

for the following features.

Add an Attempt

Delete Attempts

Change Attempt Order

Intel(R) Virtual RAID on CPU

Intel(R) VROC with VMD Technology 5.2.4.1000

RAID volumes and Intel VMD Controllers information will be displayed if they are detected
by the system.

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4.4 Event Logs

Use this menu to congure event log settings.

Chapter 4: BIOS

Change SMBIOS Event Log Settings

Enabling/Disabling Options

SMBIOS Event Log

Change this feature to enable or disable all features of the SMBIOS Event Logging during
system boot. The options are Enabled and Disabled.

Erasing Settings

Erase Event Log

Select Enabled to erase all error events in the SMBIOS (System Management BIOS) log
before an event logging is initialized at bootup. The options are No, Yes, Next reset, and

Yes, Every reset.

When Log is Full

Select Erase Immediately to immediately erase all errors in the SMBIOS event log when the
event log is full. Select Do Nothing for the system to do nothing when the SMBIOS event log
is full. The options are Do Nothing and Erase Immediately.

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SMBIOS Event Log Standard Settings

Log System Boot Event

Select Enabled to log system boot events. The options are Enabled and Disabled.

MECI (Multiple Event Count Increment)

Enter the increment value for the multiple event counter. Enter a number between 1 to 255.
The default setting is 1.

METW (Multiple Event Count Time Window)

This feature is used to determine how long (in minutes) should the multiple event counter wait
before generating a new event log. Enter a number between 0 to 99. The default setting is 60.

Note: Please reboot the system for the changes to take effect.

View SMBIOS Event Log

This feature allows the user to view the event in the SMBIOS event log. The following
categories are displayed:

DATE/TIME/ERROR CODE/SEVERITY

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Chapter 4: BIOS

4.5 IPMI

Use this menu to congure Intelligent Platform Management Interface (IPMI) settings.

BMC Firmware Revision

This feature indicates the IPMI rmware revision in your system.

IPMI STATUS

This feature indicates the status of the IPMI rmware installed in your system.

System Event Log

Enabling/Disabling Options

SEL Components

Select Enabled for all system event logging at bootup. The options are Disabled and

Enabled.

Erasing Settings

Erase SEL

Select Yes, On next reset to erase all system event logs upon next system reboot. Select
Yes, On every reset to erase all system event logs upon each system reboot. Select No
to keep all system event logs after each system reboot. The options are No, Yes, On next
reset, and Yes, On every reset.

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When SEL is Full

This feature allows the user to determine what the BIOS should do when the system event
log is full. Select Erase Immediately to erase all events in the log when the system event
log is full. The options are Do Nothing and Erase Immediately.

Note: After making changes on a setting, be sure to reboot the system for the changes
to take effect.

BMC Network Conguration

BMC network conguration

Congure IPV4 support

IPMI LAN Selection

This feature displays the IPMI LAN setting. The default setting is Failover.

IPMI Network Link Status

This feature displays the IPMI Network Link status. The default setting is Dedicated LAN.

Update IPMI LAN Conguration

Select Yes for the BIOS to implement all IP/MAC address changes at the next system boot.
The options are No and Yes.

*If the feature above is set to Yes, the Conguration Address Source and VLAN
features are available for conguration:

Conguration Address Source

Use this feature to select the source of the IP address for this computer. If Static is selected,
you will need to know the IP address of this computer and enter it to the system manually in

the eld. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host Conguration

Protocol) server in the network that is attached to and request the next available IP address
for this computer. The options are DHCP and Static.

*If the feature above is set to Static, the Station IP Address/Subnet Mask/Gateway IP
Address features are available for conguration:

Station IP Address

This feature displays the Station IP address for this computer. This should be in decimal
and in dotted quad form (i.e., 192.168.10.253).

Subnet Mask

This feature displays the sub-network that this computer belongs to. The value of each
three-digit number separated by dots should not exceed 255.

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Chapter 4: BIOS

Station MAC Address

This feature displays the Station MAC address for this computer. Mac addresses are 6
two-digit hexadecimal numbers.

Gateway IP Address

This feature displays the Gateway IP address for this computer. This should be in decimal

and in dotted quad form (i.e., 192.168.10.253).

VLAN

This feature is congurable if the Update IPMI LAN Conguration feature is set to Yes.

Use this feature to enable or disable the IPMI VLAN function. The options are Disable
and Enable.

*If the feature above is set to Enable, the VLAN ID feature below is available for
conguration:

VLAN ID

Use this feature to select a value for VLAN ID.

Congure IPV6 support

IPV6 Support

Use this feature to enable IPV6 support. The options are Enabled and Disabled.

Conguration Address Source

Use this feature to select the source of the IP address for this computer. If Static is selected,
you will need to know the IP address of this computer and enter it to the system manually in

the eld. If DHCP is selected, the BIOS will search for a DHCP (Dynamic Host Conguration

Protocol) server in the network that is attached to and request the next available IP address
for this computer. The options are Unspecied, Static, and DHCP.

*If the feature above is set to Static, the Station IP Address/Prex Length/IPV6 Router1
IP Address features are available for conguration:

Station IPV6 Address

Use this feature to enter the IPV6 address.

Prex Length

Use this feature to change the prex length.

IPV6 Router1 IP Address

Use this feature to change the IPV6 Router1 IP address.

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IPMI Function Support

Use this feature to enable IPMI support. The options are Enabled and Disabled. When
Disabled, the system powers on quickly by removing BIOS support for extended IPMI
features. The Disable option is for applications that require faster power on time wthout
using Supermicro Update Manager (SUM) or extended IPMI features. The BMC network

conguration in the BIOS setup is also invalid when IPMI Function Support is disabled.

The general BMC function and motherboard health monitor such as fan control are still
functioning even when this option is disabled.

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