ST VNH5180A-E User Manual
Features
Type R
VNH5180A-E
Automotive fully integrated H-bridge motor driver
DS(on)
180 mΩ max
(per leg)
I
outVCCmax
8A 41V
VNH5180A-E
■ Output current: 8 A
■ 3 V CMOS compatible inputs
■ Undervoltage shutdown
■ Overvoltage clamp
■ Thermal shutdown
■ Cross-conduction protection
■ Current and power limitation
■ Very low standby power consumption
■ PWM operation up to 20 KHz
■ Protection against loss of ground and loss of
V
CC
Current sense output proportional to motor
■
current
■ Output protected against short to ground and
short to V
Package: ECOPACK
■
CC
®
Description
The VNH5180A-E is a full bridge motor driver
intended for a wide range of automotive
applications. The device incorporates a dual
monolithic high-side driver and two low-side
switches. Both switches are designed using
STMicroelectronics’ well known and proven
Table 1. Device summary
Package
PowerSSO-36 TP
proprietary VIPower
to efficiently integrate on the same die a true
Power MOSFET with an intelligent
signal/protection circuitry. The three dies are
assembled in PowerSSO-36 TP package on
electrically isolated leadframes. This package,
specifically designed for the harsh automotive
environment offers improved thermal
performance thanks to exposed die pads.
Moreover, its fully symmetrical mechanical design
allows superior manufacturability at board level.
The input signals IN
interface to the microcontroller to select the motor
direction and the brake condition. The DIAG
or DIAG
/ENB, when connected to an external
B
pull-up resistor, enables one leg of the bridge.
Each DIAG
/ENA provides a feedback digital
A
diagnostic signal as well. The normal operating
condition is explained in the truth table. The CS
pin allows to monitor the motor current by
delivering a current proportional to its value when
CS_DIS pin is driven low or left open. When
CS_DIS is driven high, CS pin is in high
impedance condition. The PWM, up to 20 KHz,
allows to control the speed of the motor in all
possible conditions. In all cases, a low level state
on the PWM pin turns off both the LS
switches.
Order codes
Tube Tape and reel
®
M0 technology that allows
and INB can directly
A
and LSB
A
/ENA
A
PowerSSO-36 TP VNH5180A-E VNH5180ATR-E
December 2011 Doc ID 17074 Rev 5 1/31
www.st.com
1
Contents VNH5180A-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1 PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1.1 Thermal calculation in clockwise and anti-clockwise operation in
steady-state mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1.2 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 PowerSSO-36 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 PowerSSO-36 TP packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31 Doc ID 17074 Rev 5
VNH5180A-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. Pin functions description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Logic inputs (INA, INB, ENA, ENB, PWM, CS_DIS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 10. Switching (VCC = 13 V, RLOAD = 5 W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Current sense (9 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 14. Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 15. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 16. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 17. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 18. Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 23
Table 19. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 20. PowerSSO-36 TP mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 21. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Doc ID 17074 Rev 5 3/31
List of figures VNH5180A-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Definition of the low-side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Definition of the high-side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Definition of dynamic cross conduction current during a PWM operation. . . . . . . . . . . . . . 14
Figure 8. Definition of delay response time of sense current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Waveforms in full-bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. Waveforms in full-bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 11. Typical application circuit for DC to 20 kHz PWM operation short circuit protection . . . . . 19
Figure 12. Behavior in fault condition (how a fault can be cleared) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 13. Half-bridge configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 14. Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 15. PowerSSO-36™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 16. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 17. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 23
Figure 18. Detailed chipset configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 19. PowerSSO-36 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 25
Figure 20. PowerSSO-36 LSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 25
Figure 21. Thermal fitting model of an H-bridge in PowerSSO-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 22. PowerSSO-36 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 23. PowerSSO-36 TP tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 24. PowerSSO-36 TP tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4/31 Doc ID 17074 Rev 5
VNH5180A-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
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Table 2. Block description
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Name Description
Logic control
Allows the turn-on and the turn-off of the high-side and the
low-side switches according to the truth table.
Undervoltage Shuts down the device for battery voltage lower than 5V.
High-side and low-side clamp voltage
High-side and low-side driver
Protect the high-side and the low-side switches from the
high voltage on the battery line.
Drive the gate of the concerned switch to allow a proper
R
for the leg of the bridge.
DS(on)
Current limitation Limits the motor current in case of short circuit.
"
"
High-side and low-side overtemperature
protection
Low-side overload detector
In case of short-circuit with the increase of the junction
temperature, it shuts down the concerned driver to prevent
degradation and to protect the die.
Detects when low side current exceeds shutdown current
and latches off the concerned Low side.
Signalizes the abnormal behaviour of the switch (output
Fault detection
Power limitation
shorted to ground or output shorted to battery) by pulling
down the concerned ENx/DIAGx pin.
Limits the power dissipation of the high-side driver inside
safe range in case of short to ground condition.
Doc ID 17074 Rev 5 5/31
Block diagram and pin description VNH5180A-E
Figure 2. Configuration diagram (top view)
NC
DRAIN LS
GND_A
GND_A
NC
GND_A
GND_A
DRAIN LS
NC
SOURCE HS
SOURCE HS
SOURCE HS
V
NC
IN_A
EN/DIAG_A
IN_PWM
NC
CC
1
A
36
NC
DRAIN LS
B
GND_B
GND_B
Slug2
Slug3
NC
GND_B
GND_B
A
DRAIN LS
B
NC
A
A
A
Slug1
SOURCE HS
SOURCE HS
SOURCE HS
V
CC
NC
B
B
B
IN_B
EN/DIAG_B
CS_DIS
18
19
CS
Table 3. Suggested connections for unused and not connected pins
INPUTx, PWM
Connection / pin Current sense N.C. SOURCE_HSx DRAIN_LSx
Floating Not allowed X X X X
To ground
Table 4. Pin definitions and functions
Pin N° Symbol Function
13, 24 V
1, 5, 9, 14, 18, 23,
28, 32, 36
15 INA Clockwise input
16 ENA/DIAGA
17 IN_PWM PWM input.
19 CS Output of current sense.
Through 1 kΩ
resistor
, Heat Slug1 Drain of high-side switches and power supply voltage.
CC
NC Not connected.
X Not allowed X
Status of high-side and low-side switches A;
open drain output.
DIAGx/ENx
CS_DIS
Through 10 kΩ
resistor
6/31 Doc ID 17074 Rev 5
VNH5180A-E Block diagram and pin description
Table 4. Pin definitions and functions (continued)
Pin N° Symbol Function
20 CS_DIS
21 EN
22 IN
25, 26, 27, 29, 35 OUT
B/DIAGB
B Counter clockwise input.
B
Heat Slug3 Source of high-side switch B / drain of low-side switch B.
,
Active high CMOS compatible pin to disable current sense
pin.
Status of high-side and low-side switches b;
open drain output.
30, 31, 33, 34 GNDB Source of low-side switch B.
2, 8, 10, 11, 12 OUTA, Heat Slug2 Source of high-side switch A / drain of low-side switch A.
3, 4, 6, 7 GND
Table 5. Pin functions description
A Source of low-side switch A.
Name Description
V
CC
GND Power ground.
OUT
OUT
IN
A
IN
B
Battery connection.
A
Power connections to the motor.
B
Voltage controlled input pins with hysteresis, CMOS compatible. These two pins
control the state of the bridge in normal operation according to the truth table (brake
to VCC, Brake to GND, clockwise and counterclockwise).
Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low-side
PWM
FETS get modulated by the PWM signal during their ON phase allowing speed control
of the motor.
Open drain bidirectional logic pins.These pins must be connected to an external pull
/DIAG
EN
A
ENB/DIAG
up resistor. When externally pulled low, they disable half-bridge A or B. In case of fault
A
detection (thermal shutdown of a high-side FET or excessive ON-state voltage drop
B
across a low-side FET), these pins are pulled low by the device (see
table in fault conditions (detected on OUTA)
).
Table 14: Truth
Analog current sense output. This output delivers a current proportional to the motor
CS
current if CS_DIS is low or left open. The information can be read back as an analog
voltage across an external resistor.
CS_DIS Active high CMOS compatible pin to disable the current sense pin.
Doc ID 17074 Rev 5 7/31
Electrical specifications VNH5180A-E
2 Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
I
I
I
INA
INB
ENA
I
ENB
IN
A
IN
B
DIAGA/EN
DIAGB/EN
PWM
I
pw
V
CC
OUT
A
OUT
B
A
B
CS
CS_DIS
I
CSD
V
SENSE
I
SENSE
I
OUTB
I
OUTA
V
OUTB
V
OUTA
GND
V
I
GND
CSD
CC
V
V
INA
INB
V
V
ENA
ENB
V
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 6. Absolute maximum ratings
Symbol Parameter Value Unit
V
I
max
I
I
I
CS_DIS
V
V
T
I
GND
Supply voltage + 41 V
CC
Maximum output current (continuous) Internally limited A
Reverse output current (continuous) -15 A
I
R
I
Input current (INA and INB pins) +/- 10 mA
IN
Enable input current (DIAGA/ENA and DIAGB/ENB pins) +/- 10 mA
EN
PWM Input current +/- 10 mA
pw
CS_DIS input current +/- 10 mA
Current sense maximum voltage VCC-41/+V
CS
Electrostatic discharge
ESD
(Human body model: R=1.5 kΩ, C=100 pF)
Junction operating temperature -40 to 150 °C
T
c
Storage temperature -55 to 150 °C
STG
DC reverse ground pin current 200 mA
pw
Table 6: Absolute maximum ratings
CC
may
V
2kV
8/31 Doc ID 17074 Rev 5
VNH5180A-E Electrical specifications
2.2 Thermal data
Table 7. Thermal data
Symbol Parameter Max. value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (per leg)
Thermal resistance junction-ambient See
2.3 Electrical characteristics
Values specified in this section are for VCC = 9 V up to 18 V; -40 °C < TJ < 150 °C, unless
otherwise specified.
Table 8. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
R
ONHS
R
ONLS
Operating supply voltage 5.5 18 V
CC
I
Supply current
S
Static high-side resistance
Static low-side resistance
High-side free-wheeling
V
f
diode forward voltage
HSD 4.8 °C/W
LSD 4.6
Figure 17
Off-state with all fault cleared and
ENx = 0 (standby)
IN
=INB=PWM=0; Tj = 25 °C;
A
=13V
V
CC
36µA
Off-state with all fault cleared and
ENx = 0 (standby)
IN
=INB=PWM=0;
A
=13V; Tj=- 40 to 150 °C
V
CC
Off-state (no standby)
=INB=PWM=0; ENx=5V;
IN
A
=- 40 to 150 °C
T
j
On-state:
IN
or INB= 5 V; no PWM
A
36mA
On-state:
IN
or INB=5V; PWM=20kHz
A
I
= 2.5 A; Tj= -40 °C 75 mΩ
OUT
I
= 2.5 A; Tj=25°C 115 mΩ
OUT
I
= 2.5 A; Tj= 150 °C 230 mΩ
OUT
I
= 2.5 A; Tj=- 40 to 150 °C 250 mΩ
OUT
I
= 2.5A; Tj=25°C 53.5 mΩ
OUT
I
= 2.5A; Tj=- 40 to 150 °C 110 mΩ
OUT
=-2.5A; Tj= 150 °C 0.7 0.9 V
I
OUT
°C/W
10 µA
5mA
6mA
Doc ID 17074 Rev 5 9/31
Electrical specifications VNH5180A-E
Table 8. Power section (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Tj=25°C; V
=13V
V
I
L(off)
I
Table 9. Logic inputs (INA, INB, ENA, ENB, PWM, CS_DIS)
High-side off-state output
current (per channel)
Dynamic cross-
RM
conduction current
CC
Tj= 125 °C; V
=13V
V
CC
I
= 2.5A (see
OUT
=ENX=0V;
OUTX
OUTX
Figure 6
03µA
=ENX=0V;
05µA
)0.6A
Symbol Parameter Test conditions Min. Typ. Max. Unit
Normal operation
V
Input low level voltage
IL
(DIAGX/ENX pin acts as an
0.9 V
input pin)
Normal operation
V
Input high level voltage
IH
(DIAGX/ENX pin acts as an
2.1 V
input pin)
Normal operation
V
IHYST
Input hysteresis voltage
(DIAGX/ENX pin acts as an
0.15 V
input pin)
I
= 1 mA 5.5 6.3 7.5 V
V
I
I
V
ICL
INL
INH
DIAG
Input clamp voltage
Input current VIN=0.9V 1 µA
Input current VIN=2.1V 10 µA
Enable output low
level voltage
IN
I
=-1mA -1.0-0.7-0.3 V
IN
Fault operation
(DIAG
/ENX pin acts as an
X
output pin); I
EN
=1mA
0.4 V
Table 10. Switching (VCC=13V, R
Symbol Parameter Test conditions Min. Typ. Max. Unit
f PWM frequency 0 20 kHz
t
d(on)
t
d(off)
t
t
t
DEL
Turn-on delay time
Turn-off delay time
Rise time See
r
Fall time See
f
Delay time during change
of operating mode
High-side free wheeling
t
diode reverse recovery
rr
time
10/31 Doc ID 17074 Rev 5
=5Ω)
LOAD
Input rise time < 1µs
(see
Figure 6
)
Input rise time < 1µs
(see
Figure 6
)
Figure 5
Figure 5
See
Figure 4
Figure 7
See
250 µs
250 µs
12µs
12µs
200 400 1600 µs
400 ns
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