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VNH3SP30-E
Datasheet (ST)
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Datasheet VNH3SP30-E Datasheet (ST)

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Features
VNH3SP30-E
Automotive fully integrated H-bridge motor driver
Type R
VNH3SP30-E
■ Output current: 30A
■ 5V logic level compatible inputs
■ Undervoltage and overvoltage shutdown
■ Thermal shut down
■ Cross-conduction protection
■ Linear current limiter
■ Very low standby power consumption
■ PWM operation up to 10 kHz
■ Protection against loss of ground and loss of
V
CC
■ Package: ECOPACK
DS(on)
45mΩ max
(per leg)
®
I
V
out
30A 40V
ccmax
Description
The VNH3SP30-E is a full-bridge motor driver intended for a wide range of automotive applications. The device incorporates a dual monolithic high-side driver (HSD) and two low­side switches. The HSD switch is designed using STMicroelectronics proprietary VIPower™ M0-3 technology that efficiently integrates a true Power MOSFET with an intelligent signal/protection circuit on the same die.
MultiPowerSO-30™
The low-side switches are vertical MOSFETs manufactured using STMicroelectronics proprietary EHD (“STripFET™”) process.The three circuits are assembled in a MultiPowerSO­30 package on electrically isolated lead frames. This package, specifically designed for the harsh automotive environment, offers improved thermal performance thanks to exposed die pads. Moreover, its fully symmetrical mechanical design provides superior manufacturability at board level. The input signals IN
and INB can directly
A
interface with the microcontroller to select the motor direction and the brake condition. Pins DIAG
/ENA or DIAGB/ENB, when connected to an
A
external pull-up resistor, enable one leg of the bridge. They also provide a feedback digital diagnostic signal. The normal condition operation is explained in The speed of the motor can be controlled in all possible conditions by the PWM up to kHz. In all cases, a low level state on the PWM pin will turn off both the LS switches. When PWM rises to a high level, LS LS
turn on again depending on the input pin
B
and LS
A
B
or
A
state.

Table 1. Device summary

Order codes
Package
Tube Tape & reel
MultiPowerSO-30 VNH3SP30-E VNH3SP30TR-E
February 2008 Rev 7 1/33
www.st.com
33
Contents VNH3SP30-E
Contents
1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 Open load detection in Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady­state mode 26
4.1.2 Thermal resistances definition
(values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26
4.1.3 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1.4 Single pulse thermal impedance definition
(values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2 MultiPowerSO-30 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 29
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/33
VNH3SP30-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Pin functions description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs (INA, INB, ENA, ENB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Switching (V
Table 10. Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 12. Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 26
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 16. MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
=13V, R
CC
=1.1Ω, unless otherwise specified) . . . . . . . . . . . . . . . . . . 10
LOAD
3/33
List of figures VNH3SP30-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. Definition of the low side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Definition of the high side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. On state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Off state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. High level enable pin current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Delay time during change of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Enable clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. High level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Low level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. PWM high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. PWM low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. PWM high level current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 23. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24. Current limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. On state high side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. On state low side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27. On state high side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 28. On state low side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 29. Output voltage rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 30. Output voltage fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 31. Enable output low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 32. ON state leg resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit protection . . . . . 20
Figure 34. Half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 35. Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 36. Waveforms in full bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 37. Waveforms in full bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 38. MultiPowerSO-30™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 39. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 40. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 25
Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . 27
Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . 27
Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 44. MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 45. MultiPowerSO-30 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 46. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4/33
VNH3SP30-E Block diagram and pins description

1 Block diagram and pins description

Figure 1. Block diagram

Table 2. Block description

Name Description
Logic control
Overvoltage + undervoltage
High side and low side clamp voltage
High side and low side driver
Linear current limiter
Overtemperature protection
Fault detection
Allows the turn-on and the turn-off of the high side and the low side switches according to the truth table
Shuts down the device outside the range [5.5V..36V] for the battery voltage
Protects the high side and the low side switches from the high voltage on the battery line in all configurations for the motor
Drives the gate of the concerned switch to allow a proper R the bridge
Limits the motor current by reducing the high side switch gate-source voltage when short-circuit to ground occurs
In case of short-circuit with the increase of the junction’s temperature, shuts down the concerned high side to prevent its degradation and to protect the die
Signals an abnormal behavior of the switches in the half-bridge A or B by pulling low the concerned EN
/DIAGx pin
x
DS(on)
for the leg of
5/33
Block diagram and pins description VNH3SP30-E

Figure 2. Configuration diagram (top view)

Table 3. Pin definitions and functions

Pin No Symbol Function
1, 25, 30 OUT
, Heat Slug3 Source of high side switch A / Drain of low side switch A
A
2, 4, 7, 9, 12, 14, 17, 22, 24, 29NC Not connected
3, 13, 23 VCC, Heat Slug1 Drain of high side switches and power supply voltage
6EN
5IN
A
A
/DIAG
A
Status of high side and low side switches A; open drain output
Clockwise input
8 PWM PWM input
11 IN
10 EN
15, 16, 21 OUT
26, 27, 28 GND
18, 19, 20 GND
1. GNDA and GNDB must be externally connected together.
B
/DIAG
B
B
, Heat Slug2 Source of high side switch B / Drain of low side switch B
B
A
B
Counter clockwise input
Status of high side and low side switches B; open drain output
Source of low side switch A
Source of low side switch B
(1)
(1)
6/33
VNH3SP30-E Block diagram and pins description

Table 4. Pin functions description

Name Description
V
CC
, GNDBPower grounds; must always be externally connected together
GND
A
OUTBPower connections to the motor
OUT
A,
Battery connection
Voltage controlled input pins with hysteresis, CMOS compatible. These two pins
IN
A, INB
control the state of the bridge in normal operation according to the truth table (brake to VCC, brake to GND, clockwise and counterclockwise).
Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low side
PWM
FETs are modulated by the PWM signal during their ON phase allowing speed control of the motor.
Open drain bidirectional logic pins. These pins must be connected to an external pull
ENA/DIAGA, ENB/DIAG
up resistor. When externally pulled low, they disable half-bridge A or B. In case of fault detection (thermal shutdown of a high side FET or excessive ON state voltage
B
drop across a low side FET), these pins are pulled low by the device (see truth table in fault condition).
7/33
Electrical specifications VNH3SP30-E

2 Electrical specifications

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratings

Table 5. Absolute maximum ratings

Symbol Parameter Value Unit
V
cc
I
max1
I
R
I
IN
EN
I
pw
V
ESD
T
j
c
T
STG
Supply voltage -0.3...40 V
Maximum output current (continuous) 30
Reverse output current (continuous) -30
Input current (INA and INB pins) ±10
Enable input current (DIAGA/ENA and DIAGB/ENB pins) ±10
PWM input current ±10
Electrostatic discharge (R = 1.5kΩ, C = 100pF) – logic pins – output pins: OUT
, OUTB, V
A
CC
Junction operating temperature Internally limited
Case operating temperature -40 to 150
Storage temperature -55 to 150
A
mAI
4 5
kV kV
°CT
8/33
VNH3SP30-E Electrical specifications

2.2 Electrical characteristics

Vcc = 9V up to 18V; -40°C < Tj< 150°C, unless otherwise specified.

Table 6. Power section

Symbol Parameter Test Conditions Min Typ Max Unit
V
Operating supply
CC
voltage
5.5 36 V
Off state:
20 3040µA
I
S
Supply current
=INB=PWM=0; Tj= 25°C; VCC=13V
IN
A
=INB=PWM=0
IN
A
On state:
or INB=5V, no PWM 15 mA
IN
A
R
ONHS
R
ONLS
Static high side resistance
Static low side resistance
= 12A; Tj= 25°C
I
OUT
= 12A; Tj= -40 to 150°C
I
OUT
= 12A; Tj= 25°C
I
OUT
= 12A; Tj= -40 to 150°C
I
OUT
23 30
60
mΩ
11 15
30
High side free-
V
wheeling diode
f
= 12 A0.81.1V
I
f
forward voltage
I
L(off)
High side off state output current (per channel)
Tj=25°C; V
= 125°C; V
T
j
=ENX=0V; VCC=13V
OUTX
=ENX=0V; VCC=13V
OUTX
3 5

Table 7. Logic inputs (INA, INB, ENA, ENB)

Symbol Parameter Test conditions Min Typ Max Unit
V
IL
V
IH
V
IHYST
V
ICL
I
INL
I
INH
V
DIAG
Input low level voltage
Input high level voltage 3.25
Normal operation (DIAG as an input pin)
/ENX pin acts
X
1.5
Input hysteresis voltage 0.5
IIN=1mA 6 6.8 8
Input clamp voltage
= -1mA -1 -0.7 -0.3
I
IN
Input low current VIN=1.5V 1
Input high current VIN=3.25V 10
Enable output low level voltage
Fault operation (DIAGX/ENX pin acts as an output pin); IEN=1mA
0.4 V
µA
µA
V
µA
9/33
Electrical specifications VNH3SP30-E

Table 8. PWM

Symbol Parameter Test Conditions Min Typ Max Unit
V
pwl
I
pwl
V
pwh
I
pwh
V
pwhhyst
V
pwcl
V
pwtest
I
pwtest
Table 9. Switching (VCC=13V, R
PWM low level voltage 1.5 V
PWM low level pin current
V
=1.5V 1 µA
pw
PWM high level voltage 3.25 V
PWM high level pin current
V
= 3.25V 10 µA
pw
PWM hysteresis voltage 0.5
I
= 1mA VCC+0.3 VCC+0.7 VCC+1
PWM clamp voltage
Test mode PWM pin voltage
Test mode PWM pin current
pw
= -1mA -5 -3.5 -2
I
pw
-3.5 -2 -0.5 V
= -2 V -2000 -500 µA
V
IN
=1.1Ω, unless otherwise specified)
LOAD
Symbol Parameter Test Conditions Min Typ Max Unit
f PWM frequency 0 10 kHz
t
d(on)
t
d(off)
t
r
t
f
t
DEL

Table 10. Protection and diagnostic

Turn-on delay time
Turn-off delay time
Rise time (see Figure 5)1.53
Fall time (see Figure 5)25
Delay time during change of operating mode
Input rise time < 1µs (see Figure 6)
Input rise time < 1µs (see Figure 6)
100 300
85 255
(see Figure 4) 600 1800
V
µs
Symbol Parameter Test Conditions Min Typ Max Unit
V
V
I
T
T
LIM
USD
OV
TSD
TR
HYST
Undervoltage shut-down 5.5
Overvoltage shut-down 36 43
Current limitation 30 45 A
Thermal shut-down temperature V
Thermal reset temperature 135
Thermal hysteresis 7 15
10/33
= 3.25V 150 170 200
IN
V
°CT
VNH3SP30-E Electrical specifications

Figure 4. Definition of the delay times measurement

V
INA
t
V
INB
t
PWM
t
I
LOAD
t
t
DEL
DEL

Figure 5. Definition of the low side switching times

PWM
V
OUTA, B
90%
t
t
80%
t
f
20%
10%
t
r
t
11/33
Electrical specifications VNH3SP30-E

Figure 6. Definition of the high side switching times

V
INA
t
D(on)
t
D(off)
t
V
OUTA
90%
10%
t
12/33
VNH3SP30-E Electrical specifications

Table 11. Truth table in normal operating conditions

INAIN
1
B
1
DIAGA/EN
A
DIAGB/EN
OUT
B
OUT
A
B
H Brake to V
H
0 L Clockwise (CW)
11
1
0
L
H Counterclockwise (CCW)
0 L Brake to GND

Table 12. Truth table in fault conditions (detected on OUTA)

IN
A
IN
B
DIAGA/EN
A
DIAGB/EN
B
OUT
A
1
1
0L
1
1H
0
0L
0
OPEN
X0 OPEN
X
1
1
0L
Fault Information Protection Action
Operating mode
CC
OUT
B
H
H
Note: Notice that saturation detection on the low side power MOSFET is possible only if the
impedance of the short-circuit from the output to the battery is less than 100m
Ω when the
device is supplied with a battery voltage of 13.5V.
13/33
Electrical specifications VNH3SP30-E

Table 13. Electrical transient requirements

ISO T/R - 7637/1
Test Pulse
Test LevelITest LevelIITest Level
III
Test Level
IV
Delays and Impedance
1 -25V -50V -75V -100V 2ms, 10Ω
2 +25V +50V +75V +100V 0.2ms, 10Ω
3a -25V -50V -100V -150V
3b +25V +50V +75V +100V
4 -4V -5V -6V -7V 100ms, 0.01Ω
5 +26.5V +46.5V +66.5V +86.5V 400ms, 2Ω
ISO T/R - 7637/1
Tes t Pulse
Test Levels
Result I
Test Levels
Result II
Test Levels
Result III
1
2
3a
CCC
C
3b
4
(1)
5
1. For load dump exceeding the above value a centralized suppressor must be adopted
EEE
Class Contents
Test Levels
0.1µs, 50Ω
Test Levels
Result IV
C
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after
E
exposure to disturbance and cannot be returned to proper operation without replacing the device.
14/33
VNH3SP30-E Electrical specifications

2.3 Electrical characteristics curves

Figure 7. On state supply current Figure 8. Off state supply current

Figure 9. High level input current Figure 10. Input clamp voltage

Figure 11. Input high level voltage Figure 12. Input low level voltage

15/33
Electrical specifications VNH3SP30-E

Figure 13. Input hysteresis voltage Figure 14. High level enable pin current

Figure 15. Delay time during change of

Figure 16. Enable clamp voltage

operation mode

Figure 17. High level enable voltage Figure 18. Low level enable voltage

16/33
VNH3SP30-E Electrical specifications

Figure 19. PWM high level voltage Figure 20. PWM low level voltage

Figure 21. PWM high level current Figure 22. Overvoltage shutdown

Figure 23. Undervoltage shutdown Figure 24. Current limitation

17/33
Electrical specifications VNH3SP30-E
Figure 25. On state high side resistance vs
T
case
Figure 27. On state high side resistance vs
Vcc
Figure 26. On state low side resistance vs
T
case

Figure 28. On state low side resistance vs Vcc

Figure 29. Output voltage rise time Figure 30. Output voltage fall time

18/33
VNH3SP30-E Electrical specifications

Figure 31. Enable output low level voltage Figure 32. ON state leg resistance

19/33
Application information VNH3SP30-E

3 Application information

In normal operating conditions the DIAGX/ENX pin is considered as an input pin by the device. This pin must be externally pulled high.
PWM pin usage: In all cases, a “0” on the PWM pin will turn off both LS When PWM rises back to “1”, LS
or LSB turn on again depending on the input pin state.
A
and LSB switches.
A
Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit
protection
µC
Note: The value of the blocking capacitor (C) depends on the application conditions and defines voltage and
current ripple onto supply line at PWM operation. Stored energy of the motor inductance may fly back into the blocking capacitor, if the bridge driver goes into tri-state. This causes a hazardous overvoltage if the capacitor is not big enough. As basic orientation, 500µF per 10A load current is recommended.
In case of a fault condition the DIAGX/ENX pin is considered as an output pin by the device.
The fault conditions are:
● overtemperature on one or both high sides
● short to battery condition on the output (saturation detection on the low side power
MOSFET)
20/33
VNH3SP30-E Application information
Possible origins of fault conditions may be:
● OUT
● OUT
is shorted to ground → overtemperature detection on high side A.
A
is shorted to VCC → low side power MOSFET saturation detection
A
(a)
.
When a fault condition is detected, the user can know which power element is in fault by monitoring the IN
, INB, DIAGA/ENA and DIAGB/ENB pins.
A
In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn on the respective output (OUT
) again, the input signal must rise from low to high level.
X

3.1 Reverse battery protection

Three possible solutions can be considered:
1. a Schottky diode
2. an N-channel MOSFET connected to the GND pin (see Figure 33: Typical application
circuit for DC to 10 kHz PWM operation short circuit protection on page 20
3. a P-channel MOSFET connected to the V
The device sustains no more than -30A in reverse battery conditions because of the two body diodes of the power MOSFETs. Additionally, in reverse battery condition the I/Os of VNH3SP30-E will be pulled down to the V must be inserted to limit the current sunk from the microcontroller I/Os. If I maximum target reverse current through µC I/Os, the series resistor is:
D
connected to VCC pin
pin
CC
line (approximately -1.5V). A series resistor
CC
Rmax
is the
V
IOsVCC
R
---------------------------------= I
Rmax

3.2 Open load detection in Off mode

It is possible for the microcontroller to detect an open load condition by adding a simply resistor (for example, 10k ohm) between one of the outputs of the bridge (for example,
B) and one microcontroller input. A possible sequence of inputs and enable signals is
OUT the following: IN
● normal condition: OUTA = H and OUTB = H
● open load condition: OUTA = H and OUTB = L: In this case the OUTB pin is internally
pulled down to GND. This condition is detected on OUT an open load fault.
a. An internal operational amplifier compares the Drain-Source MOSFET voltage with the internal reference (2.7V
Typ.). The relevant low side power MOS is switched off when its Drain-Source voltage exceeds the reference voltage.
A = 1, INB = X, ENA = 1, ENB = 0.
–
B pin by the microcontroller as
21/33
Application information VNH3SP30-E

3.3 Test mode

The PWM pin can be used to test the load connection between two half-bridges. In the Test mode (V can be used to turn on the high side A or B, respectively, in order to connect one side of the load at V verify the continuity of the load connection. In case of load disconnection, the DIAD pin corresponding to the faulty output is pulled down.

Figure 34. Half-bridge configuration

pwm = -2V) the internal power MOS gate drivers are disabled. The INA or INB inputs
CC voltage. The check of the voltage on the other side of the load can be used to
X/ENX
V
CC
DIAG
/EN
A
DIAGB/EN
PWM
OUT
GND
B
IN
A
IN
B A B
B
IN
A
IN
B
DIAG
/EN
A
DIAGB/EN
PWM
OUT
A
GND
A
B
OUT
B
GND
A
B
M
OUT
A
GND
A
Note: The VNH3SP30-E can be used as a high power half-bridge driver achieving an On
resistance per leg of 22.5mΩ.

Figure 35. Multi-motors configuration

V
CC
/EN
DIAG
A
DIAGB/EN
PWM
OUT
IN
A
IN
B A B
B
IN
A
IN
B
DIAG
/EN
A
DIAGB/EN
PWM
OUT
A
A
B
OUT
B
M
2
OUT
A
GND
GND
M
B
1
A
GND
GND
M
B
3
A
Note: The VNH3SP30-E can easily be designed in multi-motors driving applications such as seat
positioning systems where only one motor must be driven at a time. DIAG
/ENX pins allow
X
to put unused half-bridges in high impedance.
22/33
VNH3SP30-E Application information

Figure 36. Waveforms in full bridge operation

23/33
Application information VNH3SP30-E

Figure 37. Waveforms in full bridge operation (continued)

24/33
VNH3SP30-E Package and PCB thermal data

4 Package and PCB thermal data

4.1 MultiPowerSO-30 thermal data

Figure 38. MultiPowerSO-30™ PC board

Note: Layout condition of R
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad layout to
2
16cm
).

Figure 39. Chipset configuration

Figure 40. Auto and mutual R
condition
45
40
35
30
25
20
15
10
°C/W
5
0
0 5 10 15 20
and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
th
HIGH SIDE
CHIP
HS
AB
LOW SIDE
CHIP A
LS
A
vs PCB copper area in open box free air
thj-amb
2
of Cu area (refer to PCB layout)
cm
LOW SIDE
CHIP B
LS
B
RthHS
RthLS
RthHSLS
RthLSLS
25/33
Package and PCB thermal data VNH3SP30-E

4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady-state mode

Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-
state mode
HSAHSBLSALS
ON OFF OFF ON
OFF ON ON OFF
B
P x R
P x R
dHSA
thHSLS
dHSB
thHSLS
x R
x R
T
jHSAB
thHS
+ T
thHS
+ T
+ P
amb
+ P
amb
dLSB
dLSA
P
dHSA
P
dLSB
P
dHSB
P
dLSA

4.1.2 Thermal resistances definition (values according to the PCB heatsink area)

R
= R
thHS
HS
in ON state)
B
R
= R
thLS
R
thHSLS
thHSA
thLSA
= R
thHSALSB
= R
= R
= High Side Chip Thermal Resistance Junction to Ambient (HSA or
thHSB
= Low Side Chip Thermal Resistance Junction to Ambient
thLSB
= R
thHSBLSA
= Mutual Thermal Resistance Junction to Ambient
between High Side and Low Side Chips
R
thLSLS
= R
thLSALSB
= Mutual Thermal Resistance Junction to Ambient between Low Side
Chips

4.1.3 Thermal calculation in transient mode

T
T
T
jHSAB
jLSA
jLSB
= Z
= Z
= Z
thHS
thHSLS
thHSLS
x P
x P
x P
dHSAB
dHSAB
dHSAB
+ Z
+ Z
+ Z
thHSLS
x P
thLS
thLSLS
x (P
dLSA
x P
dLSA
+ Z
dLSA
+ P
thLSLS
+ Z
(b)
dLSB
thLS
x R
x R
x R
x R
x P
x P
T
jLSA
thHSLS
thLSLS
thHSLS
thLS
) + T
dLSB
dLSB
+ T
amb
+
+ T
+
amb
+ T
+ T
amb
amb
amb
P x R
P x R
dHSA
thLS
dHSB
thLSLS
x R
+ T
x R
T
jLSB
thHSLS
amb
thHSLS
+ T
amb
+ P
+ P
dLSB
dLSA

4.1.4 Single pulse thermal impedance definition (values according to the PCB heatsink area)

Z
= High Side Chip Thermal Impedance Junction to Ambient
thHS
Z
= Z
thLS
Z
thHSLS
between High Side and Low Side Chips
Z
thLSLS
Chips
b. Calculation is valid in any dynamic operating condition. Pd values set by user.
26/33
thLSA
= Z
thHSABLSA
= Z
thLSALSB
= Z
= Low Side Chip Thermal Impedance Junction to Ambient
thLSB
= Z
thHSABLSB
= Mutual Thermal Impedance Junction to Ambient
= Mutual Thermal Impedance Junction to Ambient between Low Side
VNH3SP30-E Package and PCB thermal data
Equation 1: pulse calculation formula
Z
THδ
where
R
TH
δ Z
THtp
1 δ–()+⋅=
δ tpT⁄=
Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse
100
Footprint
ZthHS
10
ZthHSLS
°C/W
1
4 cm2 8 cm2 16 cm2
Footprint 4 cm2 8 cm2 16 cm2
0.1
0.001 0.01 0. 1 1 10 100 1000
time (sec)
Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse
100
Footprint 4 cm2 8 cm2 16 cm2
Footprint
10
°C/W
1
4 cm2 8 cm2 16 cm2
0,1
0,001 0,01 0,1 1 10 100 1000time (sec)
27/33
Package and PCB thermal data VNH3SP30-E
Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30
Table 15. Thermal parameters
(1)
Area/island (cm2)Footprint4 816
R1 = R7 (°C/W) 0.05
R2 = R8 (°C/W) 0.3
R3 (°C/W) 0.5
R4 (°C/W) 1.3
R5 (°C/W) 14
R6 (°C/W) 44.7 39.1 31.6 23.7
R9 = R10= R15= R16 (°C/W) 0.6
R11 = R17 (°C/W) 0.8
R12 = R18 (°C/W) 1.5
R13 = R19 (°C/W) 20
R14 = R20 (°C/W) 46.9 36.1 30.4 20.8
R21 = R22 = R23 (°C/W) 115
C1 = C7 = C9 = C15 (W.s/°C) 0.001
C2 = C8 (W.s/°C) 0.005
C3 = (W.s/°C) 0.02
C4 = C13 = C19 (W.s/°C) 0.3
C5 (W.s/°C) 0.6
C6 (W.s/°C) 5 7 9 11
C10 = C11= C16 = C17 (W.s/°C) 0.003
C12 = C18 (W.s/°C) 0.075
C14 = C20 (W.s/°C) 2.5 3.5 4.5 5.5
1. The blank space means that the value is the same as the previous one.
28/33
VNH3SP30-E Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

5.2 MultiPowerSO-30 package mechanical data

Figure 44. MultiPowerSO-30 package outline

29/33
Package and packing information VNH3SP30-E

Table 16. MultiPowerSO-30 mechanical data

Symbol
Min Typ Max
A 2.35
A2 1.85 2.25
A3 0 0.1
B 0.42 0.58
C 0.23 0.32
D 17.1 17.2 17.3
E 18.85 19.15
E115.91616.1
e1
F1 5.55 6.05
F2 4.6 5.1
F3 9.6 10.1
L 0.8 1.15
N 10deg
S 0deg 7deg
Millimeters

Figure 45. MultiPowerSO-30 suggested pad layout

30/33
VNH3SP30-E Package and packing information

5.3 Packing information

Note: The devices can be packed in tube or tape and reel shipments (see the Device summary on
page 1 for packaging quantities).

Figure 46. MultiPowerSO-30 tube shipment (no suffix)

A
C
B
Dimension mm
Tube length (± 0.5) 532 A3.82 B23.6 C (± 0.13) 0.8

Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”)

Reel dimensions
Dimension mm
A (max) 330 B (min) 1.5 C (± 0.2) 13 D (min) 20.2 G (+ 2 / -0) 32 N (min) 100 T (max) 38.4
Tape dimensions
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986
Description Dimension mm
Tape width W 32 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 24 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 2 Hole Position F (± 0.1) 14.2
To p
cover
tape
End
500 mm min
No componentsNo components Components
Empty components pockets
User direction of feed
Start
500 mm min
31/33
Revision history VNH3SP30-E

6 Revision history

Table 17. Document revision history

Date Revision Description of changes
Aug-2004 1
Initial release of lead-free version based on the VNH3SP30 datasheet (May 2004 - Rev.1)
Aug- 2005 2 Modified figure 5
Document converted into new ST corporate template. Changed document title . Changed features on page 1 to add ECOPACK Added section 1: device block description on page 5. Added section 2: pinout description on page 6. Added section 3: maximum ratings on page 8. Added section 4: electrical characteristics on page 9. Added “low” and “high” to parameters for I
INL and IINH in Table 6 on
page 9.
20-Dec-2006 3
Added section 5: Waveforms and truth table on page 12. Changed first of two fault conditions in section 5 on page 12. Inserted note in Figure 4 on page 12. Added vertical limitation line to left side arrow of t
page 17. Added section 6: thermal data on page 26. Added section 7: package characteristics on page 30. Added section 8: packaging information on page 32. Updated disclaimer (last page) to include a mention about the use of ST products in automotive applications.
Document reformatted. Changed Table 6: Power section on page 9 : supply current and static
20-Jun-2007 4
resistance values. Added Table 7: Logic inputs (INA, INB, ENA, ENB) on page 9 : V
.
ROW
Deleted Enable (Logic I/O pin) Table.
13-Sep-2007 5 Updated Table 2: Block description on page 5.
® package.
D(off) to Figure 7 on
DIAG
15-Nov-2007 6
Corrected Figure 34 note : changed On resistance per leg from 9.5 mΩ to 22.5 mΩ .
06-Feb-2008 7 Corrected Heat Slug numbers in Table 3: Pin definitions and functions.
32/33
VNH3SP30-E
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